Semiconductor test structure and test method thereof

Abstract

The invention discloses a semiconductor test structure and a test method thereof. According to the invention, the P-type well regions and the N-type well regions which are alternately distributed are formed in the active region, and the S-shaped active region metal silicide strips serving as S-shaped test structures are formed on the surface of the active region; the two ends of the snakelike active region metal silicide strip are located above the well regions of different conduction types respectively, so that the snakelike active region metal silicide strip covers the surfaces of the PN junctions which are connected in series; through the snakelike test structure, the square resistance of the snakelike active region metal silicide strip can be accurately measured, whether electric leakage exists in the substrate or not is detected, and whether continuity of the snakelike active region metal silicide strip is abnormal or not and whether bridging exists or not is detected. Furthermore, a cross comb-shaped test structure used for measuring the breakdown voltage of the metal silicide layer of the active region to judge whether the isolation between the active regions meets the requirement is formed in the region where the snake-shaped test structure is located, so that the comprehensiveness of the test structure can be improved, and the test area of a test pattern in a chip is saved; the area utilization rate is effectively improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a semiconductor test structure and a test method thereof which can detect whether the continuity of metal silicide in an active area is abnormal and whether a bridge exists. Background Art

[0002] In the semiconductor manufacturing process, there are various process problems that can cause various semiconductor devices to fail. In order to detect these failures in a timely manner so that the production line can make improvements as soon as possible, various wafer acceptance test (WAT) test structures are designed and tested. WAT is a key step in wafer manufacturing. Its data verifies whether the wafer product meets the electrical specification requirements of the process technology platform and monitors whether there are any abnormalities in the process.

[0003] Nowadays, the WAT test structure is not designed inside the actual product chip, but is designed in the scribe groove between the chips on the wafer, striving for the minimum width and minimum area. At present, the test structure for testing whether the continuity of the active area metal silicide (AASilicide) is abnormal, the test structure for testing whether there is a bridge in the active area metal silicide, and the test structure for testing the block resistance of the active area metal silicide are all single. For example, the test structure for testing whether the continuity of the active area metal silicide is abnormal uses a serpentine test structure, the test structure for testing whether there is a bridge in the active area metal silicide uses a cross-comb structure, and the test structure for testing the block resistance of the active area metal silicide uses a bone-shaped or serpentine structure, and the above three test structures are separately set in the scribe groove between the chips on the wafer. Currently, there is no test structure that can test these items at the same time. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a semiconductor test structure and a test method thereof, which can accurately measure the square resistance of the metal silicide in the active area, detect whether there is leakage in the substrate, and detect whether the continuity of the metal silicide in the active area is abnormal and whether there is a bridge, thereby improving the accuracy and comprehensiveness of the test structure and saving the area of ​​the test pattern.

[0005] To solve the above problems, an embodiment of the present invention provides a semiconductor test structure, comprising: a substrate; an active area, formed in the substrate by an isolation structure definition, wherein a P-type well area and an N-type well area extending along a first direction and alternately distributed along a second direction are formed in the active area, wherein the first direction and the second direction are both parallel to the surface of the substrate and there is an angle between the first direction and the second direction; an active area metal silicide layer, formed on the surface of the active area, the active area metal silicide layer comprising a serpentine active area metal silicide strip as a serpentine test structure, wherein both ends of the serpentine active area metal silicide strip are respectively located above well areas of different conductivity types, so that the serpentine active area metal silicide strip covers the surfaces of multiple PN junctions connected in series; the serpentine test structure can be used to accurately measure the square resistance of the serpentine active area metal silicide strip, detect whether there is leakage in the substrate, and detect whether the continuity of the serpentine active area metal silicide strip is abnormal and whether there is bridging.

[0006] In some embodiments, one end of the serpentine active area metal silicide strip located above the P-type well area is electrically connected to a first test pad, and the other end of the serpentine active area metal silicide strip located above the N-type well area is electrically connected to a second test pad; during testing, a test voltage is applied to the first test pad, the second test pad is grounded, and multiple PN junctions connected in series are forward conducted, and a test voltage is applied to the second test pad, the first test pad is grounded, and multiple PN junctions connected in series are reverse biased.

[0007] In some embodiments, the serpentine active area metal silicide strip has a first bending portion and a second bending portion that are alternately distributed along the first direction and have opposite bending directions; the active area metal silicide layer also includes a cross-comb active area metal silicide strip as a cross-comb test structure, and the cross-comb active area metal silicide strip includes a first comb-shaped active area metal silicide strip and a second comb-shaped active area metal silicide strip; the first comb-shaped active area metal silicide strip has a plurality of first comb teeth arranged at intervals along the first direction and a first comb handle connecting all the first comb teeth and extending along the first direction; the second comb-shaped active area metal silicide strip has A plurality of second comb teeth arranged at intervals along the first direction and a second comb handle connecting all the second comb teeth and extending along the first direction; the first comb handle and the second comb handle are located on opposite sides of the serpentine active area metal silicide strip along the second direction, the first comb teeth are accommodated in an opening of the first comb handle from the second bend portion of the serpentine active area metal silicide strip, and the second comb teeth are accommodated in an opening of the second comb handle from the first bend portion of the serpentine active area metal silicide strip; the cross-comb test structure can be used to measure the breakdown voltage of the active area metal silicide layer to determine whether the isolation between active areas meets the requirements.

[0008] In some embodiments, the first comb handle is located above the N-type well region or the P-type well region on the side of the first bend portion near the serpentine active area metal silicide strip, and the second comb handle is located above the N-type well region or the P-type well region on the side of the second bend portion near the serpentine active area metal silicide strip, and the first comb handle is electrically connected to the third test pad, and the second comb handle is electrically connected to the second test pad; during testing, by applying a scanning voltage to the third test pad and grounding the second test pad, the leakage current can be measured, and then the breakdown voltage of the active area metal silicide layer can be obtained to determine whether the isolation between the active areas meets the requirements.

[0009] To solve the above problem, an embodiment of the present invention further provides a method for testing a semiconductor test structure, comprising the following steps: providing a semiconductor test structure, wherein the semiconductor test structure adopts the semiconductor test structure including the serpentine test structure described in the present invention; electrically connecting one end of the serpentine active area metal silicide strip of the serpentine test structure located above the P-type well area to a first test pad, and electrically connecting the other end of the serpentine active area metal silicide strip located above the N-type well area to a second test pad; applying a test voltage to the first test pad, grounding the second test pad, forward conducting a plurality of PN junctions connected in series, and measuring a first test current; applying the test voltage to the second test pad, grounding the first test pad, reverse biasing a plurality of PN junctions connected in series, and measuring a second test current; obtaining a first block resistance of the serpentine active area metal silicide strip according to the first test current, and obtaining a second block resistance of the serpentine active area metal silicide strip according to the second test current; comparing the first block resistance with the second block resistance to determine whether there is leakage in the substrate and whether the continuity of the serpentine active area metal silicide strip is abnormal and whether there is a bridge.

[0010] In some embodiments, the first block resistance is calculated using the following formula: R1=(V / I1) / (L / W); the second block resistance is calculated using the following formula: R2=(V / I2) / (L / W); wherein R1 is the first block resistance, I1 is the first test current, R2 is the second block resistance, I2 is the second test current, V is the test voltage, W is the width of the serpentine active area metal silicide strip, L is the length of the serpentine active area metal silicide strip, and W meets the minimum design rule.

[0011] In some embodiments, the step of comparing the first block resistance with the second block resistance specifically includes one of the following comparison results: if the first block resistance is equal to the second block resistance, it is determined that there is no leakage in the substrate; if the difference between the first block resistance and the second block resistance is greater than a first preset value, it is determined that there is leakage in the substrate; if the first block resistance and the second block resistance are both greater than the first resistance value, it is determined that there is an abnormality in the connectivity of the serpentine active area metal silicide strips; if the first block resistance and the second block resistance are both less than the second resistance value, it is determined that there is a bridge in the serpentine active area metal silicide strips; wherein, the order of magnitude of the first resistance value is greater than the order of magnitude of the second resistance value.

[0012] In some embodiments, the semiconductor test structure also includes the cross-comb test structure described in the present invention; the method also includes: electrically connecting one comb handle of the cross-comb test structure to a third test pad and electrically connecting another comb handle of the cross-comb test structure to the second test pad; applying a scan voltage to the third test pad and grounding the second test pad to measure the leakage current; obtaining the scan voltage applied when the leakage current is equal to the current threshold as the breakdown voltage of the metal silicide layer in the active area.

[0013] In some embodiments, the method also includes: determining whether the breakdown voltage of the active area metal silicide layer is greater than or equal to a preset voltage threshold, and if so, determining that the isolation between the first comb-shaped active area metal silicide strip and the second comb-shaped active area metal silicide strip meets the isolation requirements.

[0014] In some embodiments, the scanning voltage gradually increases from 0V to 12V, and the current threshold is 1uA.

[0015] The above technical scheme forms alternately distributed P-type well regions and N-type well regions in the active region, and forms multiple series-connected PN junctions through the alternately distributed P-type well regions and N-type well regions, so that during testing, the test current only flows through the metal silicide layer in the active region, thereby eliminating the influence of the leakage current of the substrate on the test result; a serpentine active region metal silicide strip is formed on the surface of the active region as a serpentine test structure, and the two ends of the serpentine active region metal silicide strip are respectively located above the well regions of different conductivity types, so that the serpentine active region metal silicide strip covers the surfaces of multiple series-connected PN junctions; the serpentine test structure can accurately measure the square resistance of the serpentine active region metal silicide strip, detect whether the substrate has leakage, and detect whether the continuity of the serpentine active region metal silicide strip is abnormal and whether there is bridging. Furthermore, a cross-comb test structure for measuring the breakdown voltage of the active area metal silicide layer is formed on the surface of the active area, and the corresponding comb handles of the two comb-shaped active area metal silicide strips as the cross-comb test structure are located on the opposite sides of the serpentine active area metal silicide strip, and the corresponding comb teeth of the two comb-shaped active area metal silicide strips are accommodated in the openings of the corresponding bending parts of the serpentine active area metal silicide strip, thereby improving the comprehensiveness of the test structure, saving the test area of ​​the test pattern in the chip, and effectively improving the area utilization rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 A schematic top view of a semiconductor test structure provided by an embodiment of the present invention;

[0018] Figure 2 For along Figure 1 Sectional view along line AA;

[0019] Figure 3 For along Figure 1 Sectional view of the middle BB line;

[0020] Figure 4 A schematic diagram of the steps of a method for testing a semiconductor test structure provided by an embodiment of the present invention.

[0021] Description of reference numerals:

[0022] D1 first direction D2 second direction D3 third direction

[0023] 10 substrate 20 active region 30 active region metal silicide layer

[0024] 21P-type well region 22N-type well region

[0025] 31Snake-shaped active area metal silicide strip

[0026] 311 first end 312 second end

[0027] 313 first bending portion 314 second bending portion

[0028] 32 First comb-shaped active area metal silicide strip

[0029] 321 first comb teeth 322 first comb handle

[0030] 33 Second comb-shaped active area metal silicide strip

[0031] 331 second comb teeth 332 second comb handle

[0032] PAD1 First test pad

[0033] PAD2 Second test pad

[0034] PAD3 third test pad DETAILED DESCRIPTION

[0035] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0036] Please also read Figure 1 to Figure 3 ,in, Figure 1 A schematic top view of a semiconductor test structure provided by an embodiment of the present invention; Figure 2 For along Figure 1 Sectional view along line AA; Figure 3 For along Figure 1 Cross-section along line BB.

[0037] like Figure 1 to Figure 3As shown, the semiconductor test structure described in this embodiment includes: a substrate 10, an active area 20, and an active area metal silicide layer 30. Among them, the first direction D1 and the second direction D2 are both parallel to the surface of the substrate 10 and there is an angle (for example, 90 degrees) between the first direction D1 and the second direction D2, and the third direction D3 is perpendicular to the surface of the substrate 10. For the convenience of explanation, in the following embodiments, the first direction D1 is the X-axis direction in the Cartesian coordinate system, the second direction D2 is the Y-axis direction in the Cartesian coordinate system, and the third direction D3 is the Z-axis direction in the Cartesian coordinate system.

[0038] Specifically, the substrate 10 may include a silicon substrate, a germanium (Ge) substrate, a silicon germanium (SiGe) substrate, a silicon-on-insulator (SOI) substrate, or a germanium-on-insulator (GOI) substrate, etc. The substrate may also be a stacked structure, such as a silicon / silicon germanium stack, etc. In this embodiment, the substrate is described by taking a silicon substrate as an example.

[0039] Specifically, the active area 20 is formed in the substrate 10 through the isolation structure definition, and the active area 20 is formed with a P-type well area 21 and an N-type well area 22 extending along the first direction D1 and alternately distributed along the second direction D2. The P-type well area 21 and the N-type well area 22 that are alternately distributed can be formed by alternately injecting two ions (NPLUS and PPLUS) into the active area 20. The alternately distributed P-type well area 21 and the N-type well area 22 form a plurality of PN junctions connected in series, so that during the test, the test current only flows through the active area metal silicide layer 30, eliminating the influence of the leakage current of the substrate on the test result. In this embodiment, the active area 20 is a single crystal silicon active area. The single crystal silicon on the upper layer of the active area 20 will react with a metal (any one of nickel, titanium, cobalt, etc.) to generate a large piece of active area metal silicide, forming the active area metal silicide layer 30.

[0040] Specifically, the active area metal silicide layer 30 is formed on the surface of the active area 20, and the active area metal silicide layer 30 includes a serpentine active area metal silicide strip 31 as a serpentine test structure, and the two ends of the serpentine active area metal silicide strip 31 are respectively located above the well areas of different conductivity types, so that the serpentine active area metal silicide strip 31 covers the surface of multiple series-connected PN junctions. The serpentine test structure can be used to measure the square resistance of the serpentine active area metal silicide strip, detect whether there is leakage in the substrate, and detect whether the continuity of the serpentine active area metal silicide strip is abnormal and whether there is a bridge. In addition, the semiconductor test structure provided in this embodiment has a higher measurement accuracy than the general serpentine structure by forming alternatingly distributed P-type well areas 21 and N-type well areas 22 in the active area 20 below the active area metal silicide layer 30.

[0041] Specifically, one end of the serpentine active area metal silicide strip 31 located above the P-type well area 21 is electrically connected to the first test pad PAD1, and the other end of the serpentine active area metal silicide strip 31 located above the N-type well area 22 is electrically connected to the second test pad PAD2. During the test, by applying a test voltage to the first test pad PAD1 and grounding the second test pad PAD2, multiple series PN junctions are forward-conducted; by applying a test voltage to the second test pad PAD2 and grounding the first test pad PAD1, multiple series PN junctions are reverse-biased.

[0042] Specifically, the test pads may be metal (eg, aluminum) sheets, and each test pad may be electrically connected to the structure to be tested on the active region metal silicide layer 30 through a lead or a contact structure.

[0043] In this embodiment, the first end 311 of the serpentine active area metal silicide strip 31 is located above the P-type well region 21 and electrically connected to the first test pad PAD1; the second end 312 of the serpentine active area metal silicide strip 31 is located above the N-type well region 22 and electrically connected to the second test pad PAD2.

[0044] In this embodiment, the serpentine active area metal silicide strip 31 has first bending portions 313 and second bending portions 314 that are alternately distributed along the first direction D1 and have opposite bending directions. Specifically, the first bending portions 313 and the second bending portions 314 have opposite opening directions.

[0045] In order to save the test area of ​​the test key in the chip and effectively improve the area utilization rate, in one embodiment of the present invention, the active area metal silicide layer 30 also includes a cross-comb active area metal silicide strip as a cross-comb test structure, and the cross-comb active area metal silicide strip includes a first comb-shaped active area metal silicide strip 32 and a second comb-shaped active area metal silicide strip 33. The first comb-shaped active area metal silicide strip 32 has a plurality of first comb teeth 321 arranged at intervals along the first direction D1 and a first comb handle 322 connecting all the first comb teeth 321 and extending along the first direction D1; in this embodiment, one end of all the first comb teeth 321 is connected to each other above the same well region (for example, the N-type well region 22) to form the first comb handle 322. The second comb-shaped active area metal silicide strip 33 has a plurality of second comb teeth 331 arranged at intervals along the first direction D1 and a second comb handle 332 connecting all the second comb teeth 331 and extending along the first direction D1; in this embodiment, one end of all the second comb teeth 331 is connected to each other above the same well region (for example, another N-type well region 22) to form the second comb handle 332. The first comb handle 322 and the second comb handle 332 are located on opposite sides of the serpentine active area metal silicide strip 31 along the second direction D2, the first comb teeth 321 are accommodated in the opening of the second bending portion 314 of the serpentine active area metal silicide strip 31 toward the first comb handle 322, and the second comb teeth 331 are accommodated in the opening of the first bending portion 313 of the serpentine active area metal silicide strip 31 toward the second comb handle 332. The cross-comb test structure can be used to measure the breakdown voltage of the active area metal silicide layer 30 to determine whether the isolation between active areas meets the requirements. That is, in this embodiment, a cross-comb test structure is formed in the area where the serpentine test structure is located to measure the breakdown voltage of the metal silicide layer in the active area to determine whether the isolation between the active areas meets the requirements. This can improve the comprehensiveness of the test structure, save the test area of ​​the test pattern in the chip, and effectively improve the area utilization.

[0046] Specifically, the first comb handle 322 is located above the N-type well region 22 or the P-type well region 21 on the side of the first bending portion 313 close to the serpentine active area metal silicide strip 31, and the second comb handle 332 is located above the N-type well region 22 or the P-type well region 21 on the side of the second bending portion 314 close to the serpentine active area metal silicide strip 31. The first comb handle 322 is electrically connected to the third test pad PAD3, and the second comb handle 332 is electrically connected to the second test pad PAD2; during testing, by applying a scanning voltage to the third test pad PAD3 and grounding the second test pad PAD2, the leakage current can be measured, and then the breakdown voltage of the active area metal silicide layer 30 is obtained to determine whether the isolation between the active areas meets the requirements.

[0047] In this embodiment, the first comb handle 322 is located above the N-type well region 22 on the side of the first bending portion 313 of the serpentine active area metal silicide strip 31, and the second comb handle 332 is located above the N-type well region 22 on the side of the second bending portion 314 of the serpentine active area metal silicide strip 31. In other embodiments, the first comb handle 322 may be located above the P-type well region 21 on the side of the first bend portion 313 of the serpentine active area metal silicide strip 31, and the second comb handle 332 may also be located above the P-type well region 21 on the side of the second bend portion 314 of the serpentine active area metal silicide strip 31; or, the first comb handle 322 may be located above the N-type well region 22 on the side of the first bend portion 313 of the serpentine active area metal silicide strip 31, and the second comb handle 332 may be located above the P-type well region 21 on the side of the second bend portion 314 of the serpentine active area metal silicide strip 31; or, the first comb handle 322 may be located above the P-type well region 21 on the side of the first bend portion 313 of the serpentine active area metal silicide strip 31, and the second comb handle 332 may be located above the N-type well region 22 on the side of the second bend portion 314 of the serpentine active area metal silicide strip 31. That is, the first comb handle 322 and the second comb handle 332 can be located above the well regions of the same conductivity type on the opposite sides of the serpentine active area metal silicide strip 31 along the second direction D2, or can be located above the well regions of different conductivity types on the opposite sides of the serpentine active area metal silicide strip 31 along the second direction D2.

[0048] By combining the cross-comb active area metal silicide strips as a cross-comb test structure with the serpentine active area metal silicide strips as a serpentine test structure, the test area of ​​the test pattern in the chip is saved and the area utilization rate is effectively improved.

[0049] Based on the same inventive concept, the present invention further provides a method for testing a semiconductor test structure, and the test method adopts the semiconductor test structure described in the above embodiment of the present invention.

[0050] See also Figure 4 , which is a schematic diagram of the steps of a test method for a semiconductor test structure provided by an embodiment of the present invention. Figure 4As shown, in this embodiment, the method includes the following steps: S1, providing a semiconductor test structure, the semiconductor test structure including the above-mentioned serpentine test structure of the present invention; S2, electrically connecting one end of the serpentine active area metal silicide strip located above the P-type well area of ​​the serpentine test structure to a first test pad, and electrically connecting the other end of the serpentine active area metal silicide strip located above the N-type well area to a second test pad; S3, applying a test voltage to the first test pad, grounding the second test pad, and forwardly conducting a plurality of PN junctions connected in series, and measuring a first test current; S4, applying the test voltage to the second test pad, grounding the first test pad, reverse biasing a plurality of PN junctions in series, and measuring a second test current; S5, obtaining the first block resistance of the serpentine active area metal silicide strip according to the first test current, and obtaining the second block resistance of the serpentine active area metal silicide strip according to the second test current; and S6, comparing the first block resistance with the second block resistance to determine whether there is leakage in the substrate and whether the continuity of the serpentine active area metal silicide strip is abnormal and whether there is a bridge. The semiconductor test structure and its working method can refer to Figure 1 to Figure 3 Shown and described.

[0051] Specifically, the first block resistance is calculated using the following formula: R1 = (V / I1) / (L / W); the second block resistance is calculated using the following formula: R2 = (V / I2) / (L / W). Wherein, R1 is the first block resistance, I1 is the first test current, R2 is the second block resistance, I2 is the second test current, V is the test voltage, W is the width of the serpentine active area metal silicide strip 31, and W satisfies the minimum design rule (DR), and L is the length of the serpentine active area metal silicide strip 31 (in this embodiment, Figure 1 The length of the serpentine active area metal silicide strip 31 extending from PAD1 to PAD2).

[0052] In this embodiment, the step of comparing the first sheet resistance with the second sheet resistance specifically includes one of the following comparison results.

[0053] (1) If the first block resistance is equal to the second block resistance, it is determined that there is no leakage in the substrate. If there is no leakage in the substrate, the measured first block resistance and second block resistance data are more accurate than those of the general serpentine structure. When the PN junction is reverse biased, theoretically there is only a small amount of leakage current in the cut-off state, and the test current will only flow through the surface of the serpentine active area metal silicide strip 31 and will not flow to the substrate. Therefore, if there is no leakage in the substrate 10, the test current is not affected by the substrate, and the measured second test current I2 is basically the same as the first test current I1, so that the first block resistance is equal to the second block resistance. The comparison of the test results of the two serpentine test structures is to detect whether the test current only flows through the active area metal silicide layer on the surface of the active area; if the first block resistance is equal to the second block resistance, it means that there is no leakage in the substrate 10, which is an ideal perfect situation.

[0054] (2) If the difference between the first block resistance and the second block resistance is greater than a first preset value (which can be set according to the design rule requirements), it is determined that the substrate 10 has leakage. If the substrate 10 has leakage, the test current will be affected by the substrate. When the PN junction is reverse biased, there is still a large amount of leakage current (greater than the first current value) passing through the substrate, so that the measured second test current I2 is very different from the first test current I1, and thus the first block resistance is very different from the second block resistance. Therefore, if the first block resistance is very different from the second block resistance (the difference is greater than the first preset value), it means that the substrate 10 has leakage and does not meet the isolation requirements.

[0055] (3) If both the first block resistance and the second block resistance are greater than the first resistance value, it is determined that the connectivity of the serpentine active area metal silicide strip is abnormal. If the connectivity of the serpentine active area metal silicide strip 31 is abnormal, the measured test current will be extremely small (less than the corresponding current threshold), so that the acquired block resistance is close to infinity. Therefore, if both the first block resistance and the second block resistance are greater than the first resistance value (the first resistance value is greater than the corresponding resistance threshold, for example, close to infinity), it means that the connectivity of the serpentine active area metal silicide strip 31 is abnormal, which may be caused by abnormal etching size of the active area, and the process needs to be improved.

[0056] (4) If both the first block resistance and the second block resistance are less than the second resistance value, it is determined that the serpentine active area metal silicide strip is bridged. If the serpentine active area metal silicide strip 31 is bridged, the measured test current will be too large (greater than the corresponding current threshold), so that the acquired block resistance is extremely small. Therefore, if both the first block resistance and the second block resistance are less than the second resistance value (the order of magnitude of the second resistance value is less than the corresponding resistance threshold), it means that the serpentine active area metal silicide strip 31 is bridged, and the process window may need to be improved. Wherein, the order of magnitude of the first resistance value is greater than the order of magnitude of the second resistance value, for example, the order of magnitude of the first resistance value is in the thousands or tens of thousands of ohms, and the order of magnitude of the second resistance value is in the ohms or less.

[0057] In some embodiments, the semiconductor test structure further includes: Figure 1 The cross-comb active area metal silicide strips shown as a cross-comb test structure include a first comb-shaped active area metal silicide strip 32 and a second comb-shaped active area metal silicide strip 33. The first comb-shaped active area metal silicide strip 32 has a plurality of first comb teeth 321 arranged at intervals along a first direction D1 and a first comb handle 322 connecting all the first comb teeth 321 and extending along the first direction D1. The second comb-shaped active area metal silicide strip 33 has a plurality of second comb teeth 331 arranged at intervals along the first direction D1 and a second comb handle 332 connecting all the second comb teeth 331 and extending along the first direction D1. The first comb handle 322 and the second comb handle 332 are located on opposite sides of the serpentine active area metal silicide strip 31 along the second direction D2, the first comb teeth 321 are accommodated in the opening of the second bent portion 314 of the serpentine active area metal silicide strip 31 toward the first comb handle 322, and the second comb teeth 331 are accommodated in the opening of the first bent portion 313 of the serpentine active area metal silicide strip 31 toward the second comb handle 332.

[0058] Accordingly, the method further includes: (1) electrically connecting one comb handle of the cross-comb test structure to a third test pad and electrically connecting another comb handle of the cross-comb test structure to the second test pad; (2) applying a scan voltage to the third test pad and grounding the second test pad to measure a leakage current; and (3) obtaining the scan voltage applied when the leakage current is equal to a current threshold as a breakdown voltage of the metal silicide layer in the active area.

[0059] Specifically, Figure 1As shown, the first comb handle 322 is electrically connected to the third test pad PAD3, and the second comb handle 332 is electrically connected to the second test pad PAD2. A scan voltage is applied to the third test pad PAD3, and the second test pad PAD2 is grounded, and the leakage current is measured, and then the scan voltage when the leakage current is equal to the current threshold is obtained as the breakdown voltage of the active area metal silicide layer 30.

[0060] Specifically, the scan voltage gradually increases from 0V to 12V, and the current threshold is 1uA. That is, the scan voltage applied when the leakage current is measured to be 1uA is used as the breakdown voltage of the active area metal silicide layer 30 .

[0061] In some embodiments, it is also possible to judge whether the isolation between the two comb-shaped active area metal silicide strips of the cross-comb active area metal silicide strips meets the isolation requirement according to the breakdown voltage of the active area metal silicide layer. Wherein, if the breakdown voltage of the active area metal silicide layer is larger, it means that the isolation between the two comb-shaped active area metal silicide strips of the cross-comb active area metal silicide strips is better; otherwise, it is worse.

[0062] Specifically, the method also includes: determining whether the breakdown voltage of the active area metal silicide layer is greater than or equal to a preset voltage threshold, and if so, determining that the isolation between the first comb-shaped active area metal silicide strip and the second comb-shaped active area metal silicide strip meets the isolation requirements.

[0063] It can be seen from the above content that the semiconductor test structure and the test method thereof provided in this embodiment form alternately distributed P-type well regions and N-type well regions in the active region, and form multiple PN junctions in series through the alternately distributed P-type well regions and N-type well regions, so that during the test, the test current only flows through the metal silicide layer in the active region, thereby eliminating the influence of the leakage current of the substrate on the test result; a serpentine active region metal silicide strip is formed on the surface of the active region as a serpentine test structure, and the two ends of the serpentine active region metal silicide strip are respectively located above the well regions of different conductivity types, so that the serpentine active region metal silicide strip covers the surfaces of multiple PN junctions in series; the serpentine test structure can accurately measure the square resistance of the serpentine active region metal silicide strip, detect whether the substrate has leakage, and detect whether the continuity of the serpentine active region metal silicide strip is abnormal and whether there is bridging. Furthermore, a cross-comb test structure is formed on the surface of the active area to measure the breakdown voltage of the metal silicide layer in the active area to determine whether the isolation between the active areas meets the requirements. The corresponding comb handles of the two comb-shaped active area metal silicide strips of the cross-comb test structure are located on opposite sides of the serpentine active area metal silicide strip, and the corresponding comb teeth of the two comb-shaped active area metal silicide strips are accommodated in the openings of the corresponding bending parts of the serpentine active area metal silicide strip. This can improve the comprehensiveness of the test structure, save the test area of ​​the test pattern in the chip, and effectively improve the area utilization rate.

[0064] It should be noted that the terms "including" and "having" and their variations involved in the document of the present invention are intended to cover non-exclusive inclusions. The terms "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence, unless the context clearly indicates, and it should be understood that the data used in this way can be interchanged under appropriate circumstances. The term "one or more" depends at least in part on the context, and can be used to describe features, structures or characteristics in a singular sense, or can be used to describe features, structures or combinations of features in a plural sense. The term "based on" can be understood as not necessarily intended to express a set of exclusive factors, but can alternatively, also at least in part depending on the context, allow the presence of other factors that are not necessarily explicitly described. In addition, the embodiments of the present invention and the features in the embodiments can be combined with each other without conflict. In addition, in the above description, the description of well-known components and technologies is omitted to avoid unnecessary confusion of the concept of the present invention. In the above embodiments, each embodiment focuses on the differences from other embodiments, and the same / similar parts between the embodiments can be referred to each other.

[0065] The above is only a preferred embodiment of the present invention. It should be pointed out that ordinary technicians in this technical field can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A semiconductor test structure, characterized in that: include: substrate; An active region is formed in the substrate through an isolation structure, wherein the active region is formed with a P-type well region and an N-type well region extending along a first direction and alternately distributed along a second direction, wherein the first direction and the second direction are both parallel to the substrate surface and an angle is formed between the first direction and the second direction; An active area metal silicide layer is formed on the surface of the active area, the active area metal silicide layer includes a serpentine active area metal silicide strip as a serpentine test structure, and two ends of the serpentine active area metal silicide strip are respectively located above well areas of different conductivity types, so that the serpentine active area metal silicide strip covers the surfaces of multiple series-connected PN junctions; The serpentine test structure can be used to accurately measure the square resistance of the serpentine active area metal silicide strip, detect whether there is leakage in the substrate, and detect whether the continuity of the serpentine active area metal silicide strip is abnormal and whether there is bridging.

2. The semiconductor test structure according to claim 1, characterized in that: One end of the serpentine active area metal silicide strip located above the P-type well region is electrically connected to the first test pad, and the other end of the serpentine active area metal silicide strip located above the N-type well region is electrically connected to the second test pad; During the test, a test voltage is applied to the first test pad, the second test pad is grounded, and multiple PN junctions in series are forward-biased; a test voltage is applied to the second test pad, the first test pad is grounded, and multiple PN junctions in series are reverse-biased.

3. The semiconductor test structure according to claim 2, characterized in that: The serpentine active area metal silicide strip has a first bending portion and a second bending portion which are alternately distributed along the first direction and have opposite bending directions; The active area metal silicide layer further includes a cross-comb active area metal silicide strip as a cross-comb test structure, wherein the cross-comb active area metal silicide strip includes a first comb-shaped active area metal silicide strip and a second comb-shaped active area metal silicide strip; The first comb-shaped active area metal silicide strip has a plurality of first comb teeth arranged at intervals along the first direction and a first comb handle connecting all the first comb teeth and extending along the first direction; The second comb-shaped active area metal silicide strip has a plurality of second comb teeth arranged at intervals along the first direction and a second comb handle connecting all the second comb teeth and extending along the first direction; The first comb handle and the second comb handle are located at opposite sides of the serpentine active area metal silicide strip along the second direction, the first comb teeth are accommodated in an opening of the second bend portion of the serpentine active area metal silicide strip toward the first comb handle, and the second comb teeth are accommodated in an opening of the first bend portion of the serpentine active area metal silicide strip toward the second comb handle; The cross-comb test structure can be used to measure the breakdown voltage of the metal silicide layer in the active area to determine whether the isolation between the active areas meets the requirements.

4. The semiconductor test structure according to claim 3, characterized in that: The first comb handle is located above the N-type well region or the P-type well region on one side of the first bending portion of the serpentine active area metal silicide strip, and the second comb handle is located above the N-type well region or the P-type well region on one side of the second bending portion of the serpentine active area metal silicide strip, the first comb handle is electrically connected to the third test pad, and the second comb handle is electrically connected to the second test pad; During testing, by applying a scan voltage to the third test pad and grounding the second test pad, the leakage current can be measured, and then the breakdown voltage of the metal silicide layer in the active area can be obtained.

5. A method for testing a semiconductor test structure, characterized in that: The steps include: Providing a semiconductor test structure, wherein the semiconductor test structure adopts the semiconductor test structure including the serpentine test structure as claimed in claim 1; Electrically connecting one end of the serpentine active area metal silicide strip of the serpentine test structure located above the P-type well area to the first test pad, and electrically connecting the other end of the serpentine active area metal silicide strip located above the N-type well area to the second test pad; A test voltage is applied to the first test pad, the second test pad is grounded, a plurality of PN junctions connected in series are forward-conducted, and a first test current is measured; The test voltage is applied to the second test pad, the first test pad is grounded, a plurality of PN junctions connected in series are reverse biased, and a second test current is measured; The first block resistance of the serpentine active area metal silicide strip is obtained according to the first test current, and the second block resistance of the serpentine active area metal silicide strip is obtained according to the second test current; the first block resistance is compared with the second block resistance to determine whether there is leakage in the substrate and whether the continuity of the serpentine active area metal silicide strip is abnormal and whether there is bridging.

6. The method according to claim 5, characterized in that The first block resistance is calculated using the following formula: R1 = (V / I1) / (L / W); The second block resistance is calculated using the following formula: R2 = (V / I2) / (L / W); Among them, R1 is the first block resistance, I1 is the first test current, R2 is the second block resistance, I2 is the second test current, V is the test voltage, W is the width of the serpentine active area metal silicide strip, L is the length of the serpentine active area metal silicide strip, and W meets the minimum design rules.

7. The method according to claim 5, characterized in that The step of comparing the first sheet resistance with the second sheet resistance specifically includes one of the following comparison results: If the first sheet resistance is equal to the second sheet resistance, it is determined that there is no leakage in the substrate; If the difference between the first sheet resistance and the second sheet resistance is greater than a first preset value, it is determined that the substrate has leakage; If both the first block resistance and the second block resistance are greater than the first resistance value, it is determined that the connectivity of the serpentine active area metal silicide strip is abnormal; If the first sheet resistance and the second sheet resistance are both less than a second resistance value, it is determined that the serpentine active area metal silicide strips are bridged; The first resistance value has an order of magnitude greater than the second resistance value.

8. The method according to claim 5, characterized in that The semiconductor test structure further comprises the cross-comb test structure as claimed in claim 3; the method further comprises: Electrically connecting one comb handle of the cross-comb test structure to the third test pad, and electrically connecting another comb handle of the cross-comb test structure to the second test pad; A scan voltage is applied to the third test pad and the second test pad is grounded to measure the leakage current; and the scan voltage applied when the leakage current is equal to the current threshold is obtained as the breakdown voltage of the metal silicide layer in the active area.

9. The method according to claim 8, characterized in that The method further comprises: It is determined whether the breakdown voltage of the active area metal silicide layer is greater than or equal to a preset voltage threshold, and if so, it is determined that the isolation between the first comb-shaped active area metal silicide strip and the second comb-shaped active area metal silicide strip meets the isolation requirement.

10. The method according to claim 8, characterized in that The scanning voltage gradually increases from 0V to 12V, and the current threshold is 1uA.

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