Multi-path charging port isolation circuit and charging method

Abstract

The invention discloses a multipath charging port isolation circuit and method, and the circuit comprises at least two selection circuits, the selection circuits comprise a first selection circuit, and the first selection circuit comprises a first overvoltage protection chip and a second overvoltage protection chip which are connected in series in a back-to-back manner. A first voltage input pin of the first overvoltage protection chip is used for being connected with first power input, and a first voltage output pin of the first overvoltage protection chip is electrically connected with a second voltage output pin of the second overvoltage protection chip. A second voltage input pin of the second overvoltage protection chip is used for outputting a first charging voltage to a device to be charged; and the control device outputs a first control signal and / or a second control signal to control the on-off of the overvoltage protection chip. According to the invention, the structure is simple, and a back-to-back connection mode of the OVP chips is adopted to play a role in multipath isolation and selection.

Description

Technical Field

[0001] The invention belongs to the technical field of multi-channel charging, and specifically relates to a multi-channel charging port isolation circuit and a charging method. Background Art

[0002] Some electronic devices have multiple input designs for charging. Because of the difference in chargers, the voltage of each input is different. If multiple power sources are plugged in or present at the same time, it is easy to cause short circuit and leakage of high-voltage and low-voltage power sources. Some exposed charging ports have no isolation switches. As long as one input is available, the other inputs will always be charged. For example, some POS machines have both USB and POGOPIN contact charging designs. If the USB is plugged in and charged, the exposed POGOPIN cannot be placed on a metal table. If it is placed on a metal table, the positive and negative will be short-circuited. Some products have priority considerations for power sources with multiple inputs. Therefore, conventional multi-charging input designs generally have isolation circuits to isolate or switch each power source. Taking the wireless charging design of mobile phones as an example, when the mobile phone is wirelessly charged, the path of the wired charging path needs to be closed to prevent the voltage of the wired plug-in and the wireless output from causing a short circuit during wireless charging, which may damage the electronic device.

[0003] Currently, a single NMOS is used as a switch, but because MOS tubes have parasitic diodes, they cannot achieve the purpose of bidirectional isolation. This will result in: when one path is powered, the other path will also be powered. When the other path is also plugged into the power supply, the voltage difference between the power supplies will cause a short circuit. Another method is to use two "back-to-back" NMOS, as shown below Figure 1 As shown, because there are two back-to-back MOS, the parasitic diodes cannot be normally conducted before and after, and isolation can be achieved in both directions. However, the turn-on condition of NMOS is to enable EN1' and EN2', which requires a voltage higher than the output voltage VBUS' to drive. This high voltage cannot be obtained in some products, or the high-voltage drive may increase the cost. Therefore, it is very important to obtain a multi-channel charging port isolation circuit and charging method that overcome the above defects. Summary of the invention

[0004] In order to solve at least one of the above technical problems, on the one hand, the present invention provides a multi-channel charging port isolation circuit, including at least two selection circuits, the selection circuit includes a first selection circuit, the first selection circuit includes a first overvoltage protection chip and a second overvoltage protection chip connected in series back to back, a first voltage input pin of the first overvoltage protection chip is used to connect a first power input, a first voltage output pin of the first overvoltage protection chip is electrically connected to a second voltage output pin of the second overvoltage protection chip, and the second voltage input pin of the second overvoltage protection chip is used to output a first charging voltage to a device to be charged; The selection circuit includes a second selection circuit, the second selection circuit includes a third overvoltage protection chip and a fourth overvoltage protection chip connected in series back to back, the third voltage input pin of the third overvoltage protection chip is used to connect the second power input, the third voltage output pin of the third overvoltage protection chip is electrically connected to the fourth voltage output pin of the fourth overvoltage protection chip, and the fourth voltage input pin of the fourth overvoltage protection chip is used to output the second charging voltage to the device to be charged; The first enable terminal of the first overvoltage protection chip and the second enable terminal of the second overvoltage protection chip both input a first control signal; The third enable terminal of the third overvoltage protection chip and the fourth enable terminal of the fourth overvoltage protection chip both input the second control signal; The on and off of the overvoltage protection chip is controlled by the control signal of the enable terminal, so as to realize bidirectional isolation of the two overvoltage protection chips of the selection circuit and perform voltage protection for the power input of each selection circuit.

[0005] It also includes a control device, which outputs a first control signal and / or a second control signal to control the on and off of the overvoltage protection chip.

[0006] It also includes a detection circuit, which is connected to the first power input of the first selection circuit and the second power input of the second selection circuit; the detection output signal of the detection circuit is electrically connected to the input end of the control device, and the control device outputs the first control signal and / or the second control signal according to the detection output signal.

[0007] The detection circuit includes a first detection circuit, the first detection circuit includes a fifth MOS tube, the source of the fifth MOS tube is electrically connected to the first voltage input pin of the first overvoltage protection chip through the second resistor and the first resistor, the source of the fifth MOS tube is connected to the connection point of the first resistor and the second resistor, the drain of the fifth MOS tube outputs a first detection signal, and a first bidirectional TVS diode is connected between the source and the gate of the fifth MOS tube. The detection circuit includes a second detection circuit, the second detection circuit includes a sixth MOS tube, the source of the sixth MOS tube is electrically connected to the second voltage input pin of the third overvoltage protection chip through the third resistor and the fourth resistor, the source of the sixth MOS tube is connected to the connection point of the third resistor and the fourth resistor, the drain of the sixth MOS tube outputs a second detection signal, and a second bidirectional TVS diode is connected between the source and the gate of the sixth MOS tube.

[0008] The first bidirectional TVS diode and the second bidirectional TVS diode are used to limit the drain voltage of the MOS tube to not exceed the safety threshold, thereby effectively avoiding device damage.

[0009] At least one of the first overvoltage protection chip, the second overvoltage protection chip, the third overvoltage protection chip and the fourth overvoltage protection chip includes: a detection module, a first MOS tube, an NMOS tube, a boost module; a selection module, an operational amplifier, a logic controller; a reference voltage source, an oscillator; the drain of the NMOS tube is connected to the input port, the source is connected to the output port, the gate of the first MOS tube is connected to the detection module, the detection module is connected to the input port, the detection module is grounded, the source of the first MOS tube is grounded, and the gate of the NMOS tube is connected to the boost module; the selection module is connected to the OVLO port, the drain of the NMOS tube is connected to the selection module, the selection module is connected to the in-phase input terminal of the operational amplifier, the output of the operational amplifier is connected to the logic controller, and the output of the logic controller is connected to the boost module; the logic controller is connected to the ACOK port, the reference voltage source is connected to the inverting input terminal of the operational amplifier, the reference voltage source is connected to the oscillator, and the oscillator is connected to the logic controller. The control device outputs a signal to control the on and off of the NMOS tube through the enable terminal.

[0010] Through the above technical solution, the first overvoltage protection chip and the second overvoltage protection chip are internally integrated with a boost module to obtain a high voltage to drive the NMOS tube. The NMOS tube inside the overvoltage protection chip will be turned off when the OVP protection is triggered. The on and off of the NMOS tube can also be controlled by the enable end of the overvoltage protection chip, thereby achieving the purpose of autonomous selection through the controller.

[0011] On the other hand, the present invention provides a multi-channel charging method, including the multi-channel charging port isolation circuit described above, wherein the multi-channel charging port isolation circuit uses a controller to obtain in real time a signal from a detection circuit to detect whether there is a voltage input at a first power input and a second power input, so as to control the first selection circuit or the second selection circuit to be turned on, and then select the first power input or the second power input for power supply, wherein the power supply method includes: When the controller receives a signal that both the first power input and the second power input have voltage input, the controller outputs a first control signal to control the first selection circuit to be turned on, and the second selection circuit to be in an off state, so that the first power input supplies power, or the controller outputs a second control signal to control the first selection circuit to be turned on, and the first selection circuit to be in an off state, so that the second power input supplies power; When the controller only receives a signal that the first power input has a voltage input, the controller outputs a first control signal to control the first selection circuit to be turned on, and the second selection circuit is in a disconnected state, so that the first power input is powered; When the controller only receives a signal indicating that the second power input has a voltage input, the controller outputs a second control signal to control the first selection circuit to be turned on, and the first selection circuit is in a disconnected state, so that the second power input is powered.

[0012] Compared with the prior art, the advantages of the present invention are: the present invention has a simple structure, adopts an OVP chip, has a high voltage protection function, and adopts a "back-to-back" mode of the OVP chip to play a role of multi-path isolation and selection. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 This is the existing isolation circuit diagram; Figure 2 This is a multi-channel charging port isolation circuit diagram of the present invention; Figure 3 This is a schematic diagram of the internal structure of the OVP chip of the present invention; Reference numerals: 1 detection module, 2 first MOS tube, 3 NMOS tube, 4 boost module; 5 selection module, 6 operational amplifier, 7 logic controller; 8 reference voltage source, 9 oscillator; MA1 first overvoltage protection chip, MA2 second overvoltage protection chip; VBUS1 first power input; EN1A first control signal; MA3 third overvoltage protection chip, MA4 fourth overvoltage protection chip; VBUS2 second power input; EN2A second control signal; Q5 fifth MOS tube; R2 second resistor; R1 first resistor; D1 first bidirectional TVS diode; Q6 sixth MOS tube; R3 third resistor; R4 fourth resistor; D2 second bidirectional TVS diode; STATE1 first detection signal; STATE2 second detection signal. DETAILED DESCRIPTION

[0014] In order to enable those skilled in the art to better understand the present invention, and thus to more clearly define the scope of the protection claimed in the present invention, the present invention is described in detail with respect to certain specific embodiments of the present invention. It should be noted that the following are only certain specific implementations of the present invention, which are only some embodiments of the present invention, wherein the specific and direct description of the relevant structures is only for the convenience of understanding the present invention, and each specific feature does not naturally and directly limit the scope of implementation of the present invention.

[0015] Referring to the accompanying drawings, the present invention adopts the following technical solutions. On the one hand, the present invention provides a multi-channel charging port isolation circuit, including at least two selection circuits, wherein the selection circuit includes a first selection circuit, wherein the first selection circuit includes a first overvoltage protection chip MA1 and a second overvoltage protection chip MA2 connected in series back to back, wherein a first voltage input pin IN1 of the first overvoltage protection chip MA1 is used to connect to a first power input VBUS1, a first voltage output pin OUT1 of the first overvoltage protection chip MA1 is electrically connected to a second voltage output pin OUT2 of the second overvoltage protection chip MA2, and a second voltage input pin IN2 of the second overvoltage protection chip MA2 is used to output a first charging voltage to a device to be charged; The selection circuit includes a second selection circuit, the second selection circuit includes a third overvoltage protection chip MA3 and a fourth overvoltage protection chip MA4 connected in series back to back, the third voltage input pin IN3 of the third overvoltage protection chip is used to connect the second power input VBUS2, the third voltage output pin OUT3 of the third overvoltage protection chip MA3 is electrically connected to the fourth voltage output pin OUT4 of the fourth overvoltage protection chip MA4, and the fourth voltage input pin IN4 of the fourth overvoltage protection chip MA4 is used to output the second charging voltage to the device to be charged; The first enable terminal EN1 of the first overvoltage protection chip MA1 and the second enable terminal EN2 of the second overvoltage protection chip MA2 both input the first control signal EN1A; The third enable terminal EN3 of the third overvoltage protection chip MA3 and the fourth enable terminal EN4 of the fourth overvoltage protection chip MA4 both input the second control signal EN2A; The controller controls the enable terminals of the first overvoltage protection chip MA1, the second overvoltage protection chip MA2, the third overvoltage protection chip MA3 and the fourth overvoltage protection chip MA4, that is, the controller outputs a control signal to control the on and off of the first to fourth overvoltage protection chips, thereby realizing bidirectional isolation of the two overvoltage protection chips of the first selection circuit and the second selection circuit, and the two overvoltage protection chips connected back to back can effectively clamp the overvoltage in the positive and negative directions respectively. In some circuits where the power supply may be reversed or there may be bidirectional transient voltage shocks on the signal line, the overvoltage protection chips connected back to back can play a protective role when the positive voltage is too high and the negative voltage is too high, preventing the sensitive components in the circuit from being damaged by overvoltage.

[0016] The overvoltage protection chip consumes a certain amount of power when working, especially when dealing with large overvoltage and current, which will generate more heat. Back-to-back connection can double the heat dissipation area of ​​the two chips, which is conducive to better heat dissipation, lowering the operating temperature of the chip, thereby improving the reliability and service life of the chip.

[0017] The first bidirectional TVS diode D1 and the second bidirectional TVS diode D2 are used to protect the MOS tube from transient overvoltage damage and prevent damage caused by reverse power connection. If the power supply is reversed, the bidirectional TVS diode can provide a low-resistance path between the source and the ground, limiting the reverse voltage within a safe range and preventing the reverse current from damaging the MOS tube and other circuit components. This can increase the fault tolerance of the circuit in the event of a power connection error and protect the entire circuit system; and it can stabilize the potential of the source.

[0018] The device further comprises a control device, which outputs a first control signal EN1A and / or a second control signal EN2A to control the on and off of the overvoltage protection chip.

[0019] It also includes a detection circuit, which is connected to the first power input VBUS1 of the first selection circuit and the second power input VBUS2 of the second selection circuit; the detection output signal of the detection circuit is electrically connected to the input end of the control device, and the control device outputs the first control signal EN1A and / or the second control signal EN2A according to the detection output signal.

[0020] The detection circuit includes a first detection circuit, the first detection circuit includes a fifth MOS transistor Q5, the source of the fifth MOS transistor Q5 is electrically connected to the first voltage input pin of the first overvoltage protection chip MA1 through the second resistor R2 and the first resistor R1, the source of the fifth MOS transistor Q5 is connected to the connection point of the first resistor R1 and the second resistor R2, the drain of the fifth MOS transistor Q5 outputs a first detection signal STATE1, and a first bidirectional TVS diode D1 is connected between the source and the gate of the fifth MOS transistor Q5. The detection circuit includes a second detection circuit, the second detection circuit includes a sixth MOS transistor Q6, the source of the sixth MOS transistor Q6 is electrically connected to the second voltage input pin of the third overvoltage protection chip MA3 through the third resistor R3 and the fourth resistor R4, the source of the sixth MOS transistor Q6 is connected to the connection point of the third resistor R3 and the fourth resistor R4, the drain of the sixth MOS transistor Q6 outputs a second detection signal STATE2, and a second bidirectional TVS diode D2 is connected between the source and the gate of the sixth MOS transistor Q6.

[0021] The first overvoltage protection chip MA1, the second overvoltage protection chip MA2, the third overvoltage protection chip MA3 and the fourth overvoltage protection chip MA4 include: a detection module 1, a first MOS tube 2, an NMOS tube 3, a boost module 4; a selection module 5, an operational amplifier 6, a logic controller 7; a reference voltage source 8, an oscillator 9; the drain of the NMOS tube 3 is connected to the input port IN, the source is connected to the output port OUT, the gate of the first MOS tube 2 is connected to the detection module 1, the detection module 1 is connected to the input port IN, the detection module 1 is grounded, the source of the first MOS tube 2 is grounded, and the gate of the NMOS tube 3 is connected to the boost module 4; the selection module 5 is connected to the OVLO port, the drain of the NMOS tube 3 is connected to the selection module 5, the selection module 5 is connected to the non-inverting input terminal of the operational amplifier 6, the output of the operational amplifier 6 is connected to the logic controller 7, and the output of the logic controller 7 is connected to the boost module 4; the logic controller 7 is connected to the ACOK port, the reference voltage source 8 is connected to the inverting input terminal of the operational amplifier 6, the reference voltage source 8 is connected to the oscillator 9, and the oscillator 9 is connected to the logic controller 7. The control device outputs a signal to control the on / off of the NMOS tube 3 via the enable terminal.

[0022] Through the above technical solution, the boost module 4 integrated inside the first overvoltage protection chip MA1 and the second overvoltage protection chip MA2 can obtain a high voltage to drive the NMOS tube 3. The NMOS tube 3 inside the overvoltage protection chip will be turned off when the OVP protection is triggered. The on and off of the NMOS tube 3 can also be controlled by the enable end of the overvoltage protection chip, thereby achieving the purpose of autonomous selection through the controller.

[0023] On the other hand, the present invention provides a multi-channel charging method, including the multi-channel charging port isolation circuit, wherein the multi-channel charging port isolation circuit uses a controller to obtain in real time a signal of a detection circuit to detect whether a first power input VBUS1 and a second power input VBUS2 have voltage inputs, so as to control the first selection circuit or the second selection circuit to be turned on, and then select the first power input VBUS1 or the second power input VBUS2 for power supply, wherein the power supply method includes: When the controller obtains a signal that both the first power input VBUS1 and the second power input VBUS2 have voltage inputs, the controller outputs a first control signal EN1A to control the first selection circuit to be turned on, and the second selection circuit to be in a disconnected state, so that the first power input VBUS1 is powered, or the controller outputs a second control signal EN2A to control the first selection circuit to be turned on, and the first selection circuit to be in a disconnected state, so that the second power input VBUS2 is powered; When the controller only receives a signal that the first power input VBUS1 has a voltage input, the controller outputs a first control signal EN1A to control the first selection circuit to be turned on, and the second selection circuit is in a disconnected state, so that the first power input VBUS1 is powered; When the controller only receives a signal that the second power input VBUS2 has a voltage input, the controller outputs a second control signal EN2A to control the first selection circuit to be turned on, and the first selection circuit is in a disconnected state, so that the second power input VBUS2 provides power.

[0024] For example Figure 2As shown, the first power input VBUS1 and the second power input VBUS2 are two power inputs, the first resistor R1 and the second resistor R2 are two voltage divider resistors, when the first power input VBUS1 is input, the fifth MOS tube Q5 is turned on, and the first detection signal STATE1 is matched with the controller, such as the internal pull-up of the CPU can detect the insertion of the first power input VBUS1, and the second detection signal STATE2 is the same. Assuming that the first power input VBUS1 and the second power input VBUS2 of the product may be inserted at the same time, and when the first power input VBUS1 and the second power input VBUS2 are inserted at the same time, the power supply of the first power input VBUS1 needs to be used first, then the circuit can detect which one is inserted through the first detection signal STATE1 and the second detection signal STATE2, and the first control signal EN1A and the second control signal EN2A can select and control any OVP chip to open.

[0025] Compared with the prior art, the advantages of the present invention are: the present invention has a simple structure, adopts an overvoltage protection chip, namely an OVP chip, has a high voltage protection function, and the present invention adopts a "back-to-back" mode of the OVP chip to play a role of multi-path isolation and selection.

[0026] So far, the technical solutions of the present invention have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present invention is obviously not limited to these specific embodiments. Without departing from the principle of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present invention.

Claims

1. A multi-channel charging port isolation circuit, characterized in that: The device comprises at least two selection circuits, wherein the selection circuit comprises a first selection circuit, wherein the first selection circuit comprises a first overvoltage protection chip (MA1) and a second overvoltage protection chip (MA2) connected in series back to back, wherein a first voltage input pin of the first overvoltage protection chip (MA1) is used to connect a first power input (VBUS1), a first voltage output pin of the first overvoltage protection chip (MA1) is electrically connected to a second voltage output pin of the second overvoltage protection chip (MA2), and a second voltage input pin of the second overvoltage protection chip (MA2) is used to output a first charging voltage to a device to be charged; The selection circuit comprises a second selection circuit, the second selection circuit comprises a third overvoltage protection chip (MA3) and a fourth overvoltage protection chip (MA4) connected in series back to back, the third voltage input pin of the third overvoltage protection chip (MA3) is used to connect the second power input (VBUS2), the third voltage output pin of the third overvoltage protection chip (MA3) is electrically connected to the fourth voltage output pin of the fourth overvoltage protection chip (MA4), and the fourth voltage input pin of the fourth overvoltage protection chip (MA4) is used to output the second charging voltage to the device to be charged; A first control signal (EN1A) is input to a first enable terminal of the first overvoltage protection chip (MA1) and a second enable terminal of the second overvoltage protection chip (MA2); The third enable terminal of the third overvoltage protection chip (MA3) and the fourth enable terminal of the fourth overvoltage protection chip (MA4) are both input with the second control signal (EN2A); The on and off of the overvoltage protection chip is controlled by the control signal of the enable terminal, so as to realize bidirectional isolation of the two overvoltage protection chips of the selection circuit and perform voltage protection for the power input of each selection circuit.

2. The multi-channel charging port isolation circuit according to claim 1, characterized in that: The device also includes a control device, which outputs a first control signal (EN1A) and / or a second control signal (EN2A) to control the on and off of the overvoltage protection chip.

3. The multi-channel charging port isolation circuit according to claim 2, characterized in that: It also includes a detection circuit, which is connected to the first power input (VBUS1) of the first selection circuit and the second power input (VBUS2) of the second selection circuit; the detection output signal of the detection circuit is electrically connected to the input end of the control device, and the control device outputs the first control signal (EN1A) and / or the second control signal (EN2A) according to the detection output signal.

4. The multi-channel charging port isolation circuit according to claim 3, characterized in that: The detection circuit comprises a first detection circuit, the first detection circuit comprises a fifth MOS tube (Q5), the source of the fifth MOS tube (Q5) is electrically connected to a first voltage input pin (IN1) of a first overvoltage protection chip (MA1) through a second resistor (R2) and a first resistor (R1), the source of the fifth MOS tube (Q5) is connected to a connection point between the first resistor (R1) and the second resistor (R2), the drain of the fifth MOS tube (Q5) outputs a first detection signal (STATE1), and a first bidirectional TVS diode (D1) is connected between the source and the gate of the fifth MOS tube (Q5).

5. The multi-channel charging port isolation circuit according to claim 3, characterized in that: The detection circuit comprises a second detection circuit, the second detection circuit comprises a sixth MOS tube (Q6), the source of the sixth MOS tube (Q6) is electrically connected to a second voltage input pin (IN3) of a third overvoltage protection chip (MA3) through a third resistor (R3) and a fourth resistor (R4), the source of the sixth MOS tube (Q6) is connected to a connection point between the third resistor (R3) and the fourth resistor (R4), the drain of the sixth MOS tube (Q6) outputs a second detection signal (STATE2), and a second bidirectional TVS diode (D2) is connected between the source and the gate of the sixth MOS tube (Q6).

6. The multi-channel charging port isolation circuit according to claim 1, characterized in that: At least one of the first overvoltage protection chip (MA1), the second overvoltage protection chip (MA2), the third overvoltage protection chip (MA3) and the fourth overvoltage protection chip (MA4) comprises: A detection module (1), a first MOS tube (2), an NMOS tube (3), and a boost module (4); Select module (5), operational amplifier (6), logic controller (7); Reference voltage source (8), oscillator (9); The drain of the NMOS tube (3) is connected to the input port, the source is connected to the output port, the gate of the first MOS tube (2) is connected to the detection module (1), the detection module (1) is connected to the input port, the detection module (1) is grounded, the source of the first MOS tube (2) is grounded, and the gate of the NMOS tube (3) is connected to the boost module (4); The selection module (5) is connected to the OVLO port, the drain of the NMOS tube (3) is connected to the selection module (5), the selection module (5) is connected to the non-inverting input terminal of the operational amplifier (6), the output of the operational amplifier (6) is connected to the logic controller (7), the output of the logic controller (7) is connected to the boost module (4); the logic controller (7) is connected to the ACOK port, the reference voltage source (8) is connected to the inverting input terminal of the operational amplifier (6), the reference voltage source (8) is connected to the oscillator (9), the oscillator (9) is connected to the logic controller (7), and the control device outputs a signal to control the on and off of the NMOS tube (3) through the enable terminal.

7. A multi-channel charging method, characterized in that: The multi-channel charging port isolation circuit comprises the multi-channel charging port isolation circuit as claimed in any one of claims 1 to 6, wherein the multi-channel charging port isolation circuit uses a controller to obtain in real time a signal of a detection circuit to detect whether a first power input (VBUS1) and a second power input (VBUS2) have a voltage input, so as to control the first selection circuit or the second selection circuit to be turned on, and then select the first power input (VBUS1) or the second power input (VBUS2) for power supply, wherein the power supply method comprises: When the controller receives a signal that both the first power input (VBUS1) and the second power input (VBUS2) have voltage inputs, the controller outputs a first control signal (EN1A) to control the first selection circuit to be turned on, and the second selection circuit to be in a disconnected state, so that the first power input (VBUS1) is powered, or the controller outputs a second control signal (EN2A) to control the first selection circuit to be turned on, and the first selection circuit to be in a disconnected state, so that the second power input (VBUS2) is powered; When the controller only receives a signal indicating that the first power input (VBUS1) has a voltage input, the controller outputs a first control signal (EN1A) to control the first selection circuit to be turned on, and the second selection circuit to be turned off, so that the first power input (VBUS1) is powered; When the controller only receives a signal indicating that the second power input (VBUS2) has a voltage input, the controller outputs a second control signal (EN2A) to control the first selection circuit to be turned on, and the first selection circuit is in a disconnected state, so that the second power input (VBUS2) is powered.

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