Turn-off control circuit of transistor

Abstract

The invention discloses a turn-off control circuit of a transistor, and belongs to the field of inverter systems. The turn-off control circuit of the transistor comprises a voltage sampling circuit which is used for collecting the voltage of a bus connected with the transistor to be controlled; and the driving control circuit is respectively connected with the voltage sampling circuit and the transistor to be controlled, and is used for adjusting the driving negative voltage corresponding to the transistor to be controlled based on the magnitude of the bus voltage so as to control the transistor to be controlled to be switched off. According to the turn-off control circuit of the transistor, under the condition that the bus voltage is small, the driving negative voltage of the IGBT is increased so as to improve the turn-off speed of the IGBT and reduce loss, under the condition that the bus voltage is large, the driving negative voltage of the IGBT is reduced, voltage stress borne by the collector electrode end and the emitter electrode end of the IGBT is reduced, the service life of the IGBT is prolonged, and reliability is improved; therefore, the reliability of the inverter circuit is improved.

Description

Technical Field

[0001] The present application belongs to the field of inverter systems, and in particular, relates to a transistor shutdown control circuit. Background Art

[0002] In a T-type three-level inverter, an insulated gate bipolar transistor (IGBT) is a composite fully controlled voltage-driven power semiconductor device composed of a bipolar transistor and an insulated gate field effect transistor. The corresponding driving voltage when it is turned on is positive, and the corresponding driving voltage when it is turned off is negative. In the related art, when the bus voltage is large, the IGBT turn-off voltage stress is large, which affects the reliability and life of the IGBT, and further affects the reliability of the inverter. Summary of the invention

[0003] The present application aims to solve at least one of the technical problems existing in the prior art. To this end, the present application proposes a transistor shutdown control circuit, which increases the negative driving voltage of the IGBT to increase its shutdown speed and reduce losses when the bus voltage is low, and reduces the negative driving voltage of the IGBT to reduce the voltage stress on the collector and emitter of the IGBT when the bus voltage is high, thereby extending the service life of the IGBT, improving reliability, and thus improving the reliability of the inverter circuit.

[0004] In a first aspect, the present application provides a transistor turn-off control circuit, the circuit comprising:

[0005] A voltage sampling circuit, used for collecting the bus voltage connected to the transistor to be controlled;

[0006] The drive control circuit is connected to the voltage sampling circuit and the transistor to be controlled respectively, and is used to adjust the drive negative voltage corresponding to the transistor to be controlled based on the magnitude of the bus voltage to control the transistor to be controlled to be turned off.

[0007] According to the transistor shutdown control circuit of the present application, a voltage sampling circuit for collecting the bus voltage connected to the transistor to be controlled and a drive control circuit for adjusting the driving negative voltage corresponding to the transistor to be controlled based on the magnitude of the bus voltage to control the shutdown of the transistor to be controlled are provided, so that when the bus voltage is small, the driving negative voltage of the IGBT is increased to increase its shutdown speed and reduce losses. When the bus voltage is large, the driving negative voltage of the IGBT is reduced, the voltage stress on the collector and emitter of the IGBT is reduced, the service life of the IGBT is extended, the reliability is improved, and thus the reliability of the inverter circuit is improved.

[0008] According to one embodiment of the present application, when the bus voltage is less than a first threshold, the drive control circuit increases the drive negative voltage;

[0009] When the bus voltage is not less than the first threshold, the drive control circuit reduces the drive negative voltage.

[0010] According to one embodiment of the present application, the drive control circuit includes:

[0011] Control module;

[0012] A photoelectric coupler, wherein an input end of the photoelectric coupler is connected to the control module and is used to receive a first level signal output by the control module; a first capacitor and a second capacitor connected in series are arranged between a first output end and a second output end of the photoelectric coupler, and a first voltage regulator is connected in parallel to the first capacitor; a midpoint of the first capacitor and the second capacitor is connected to the transistor to be controlled, and the transistor to be controlled is connected to one of the first output end and the second output end based on the first level signal;

[0013] A switch module, the switch module is connected to the control module, and is used to receive a second level signal output by the control module, the second level signal is determined based on the size of the bus voltage; the first output end is connected to the first voltage through the switch module, and the on-state voltage drop of the switch module is controlled based on the second level signal.

[0014] According to one embodiment of the present application, the switch module includes:

[0015] A first resistor and a second resistor connected in series;

[0016] A transistor, wherein the emitter of the transistor is grounded, the collector of the transistor is connected to the second resistor, and the base of the transistor is connected to the control module;

[0017] A PMOS tube, wherein the gate of the PMOS tube is connected between the first resistor and the second resistor, the drain of the PMOS tube is connected to the first output end, the source of the PMOS tube is connected to the first voltage, and a gating device is connected in parallel between the drain and the source of the PMOS tube, and the conduction voltage drop of the gating device is greater than the conduction voltage drop of the PMOS tube.

[0018] According to one embodiment of the present application, the gating device includes a diode, an anode of the diode is connected to the source of the PMOS tube, and a cathode of the diode is connected to the drain of the PMOS tube.

[0019] According to one embodiment of the present application, the gating device includes a fourth resistor.

[0020] According to the transistor shutdown control circuit of the present application, by setting a fourth resistor or diode between the source and the drain of the PMOS tube to pull down the first voltage, the function of reducing the driving negative voltage of the IGBT when the bus voltage is large can be achieved. This can effectively ensure the life and reliability of the IGBT and has high design flexibility and low design cost.

[0021] According to an embodiment of the present application, when the bus voltage is less than a first threshold, the second level signal is a high level, the transistor is turned on, the PMOS tube is turned on, and the first voltage is connected to the first output terminal through the PMOS tube.

[0022] According to an embodiment of the present application, when the bus voltage is not less than the first threshold, the second level signal is at a low level, the transistor is turned off, and the first voltage is connected to the first output terminal through the gating device.

[0023] According to one embodiment of the present application, the drive control circuit further includes:

[0024] Transformer, the first output end is connected to the switch module via the transformer.

[0025] According to an embodiment of the present application, when the first level signal is at a low level, the second output terminal is connected to the transistor to be controlled;

[0026] When the first level signal is at a high level, the first output terminal is connected to the transistor to be controlled.

[0027] The above one or more technical solutions in the embodiments of the present application have at least one of the following technical effects:

[0028] By setting a voltage sampling circuit for collecting the bus voltage connected to the transistor to be controlled and a drive control circuit for adjusting the driving negative voltage corresponding to the transistor to be controlled based on the magnitude of the bus voltage to control the shutdown of the transistor to be controlled, the driving negative voltage of the IGBT is increased to increase its shutdown speed and reduce losses when the bus voltage is small, and the driving negative voltage of the IGBT is reduced to reduce the voltage stress on the collector and emitter of the IGBT when the bus voltage is large, thereby extending the service life of the IGBT, improving reliability, and thus improving the reliability of the inverter circuit.

[0029] Furthermore, a gating device having a conduction voltage drop greater than the conduction voltage drop of the PMOS tube is provided between the source and the drain of the PMOS tube, and the conduction state of the PMOS tube is controlled based on the magnitude of the bus voltage, so that when the bus voltage is relatively large, the PMOS tube is controlled to be turned off to turn on the gating device, thereby pulling down the first voltage, thereby reducing the driving negative voltage of the IGBT, thereby reducing the voltage stress of the IGBT; when the bus voltage is relatively small, the PMOS tube is controlled to be turned on to maintain a relatively high driving negative voltage of the IGBT to increase its turn-off speed, reduce losses, extend the service life of the IGBT, and improve reliability, thereby improving the reliability of the inverter circuit, and having relatively high control precision and accuracy.

[0030] Furthermore, by setting a fourth resistor or diode between the source and drain of the PMOS tube to lower the first voltage, the function of reducing the driving negative voltage of the IGBT when the bus voltage is large can be achieved, which can effectively ensure the life and reliability of the IGBT and has higher design flexibility and lower design cost.

[0031] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0033] Figure 1 It is one of the structural schematic diagrams of the transistor turn-off control circuit provided in the embodiment of the present application;

[0034] Figure 2 This is the second structural schematic diagram of the transistor turn-off control circuit provided in the embodiment of the present application;

[0035] Figure 3 It is a control logic diagram of a transistor shutdown control circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0036] The following will be combined with the drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments in the present application belong to the scope of protection of this application.

[0037] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0038] The transistor shutdown control circuit provided in the embodiment of the present application is described in detail below through specific embodiments and application scenarios in conjunction with the accompanying drawings.

[0039] like Figure 1 As shown, the transistor turn-off control circuit includes: a voltage sampling circuit 130 and a drive control circuit.

[0040] It should be noted that the transistor turn-off control circuit of the present application can be used in an inverter circuit, such as a T-type three-level inverter, etc., to drive the transistor in the inverter circuit to turn on and off.

[0041] Among them, the transistor may include an insulated gate bipolar transistor (IGBT), which is a composite fully controlled voltage-driven power semiconductor device composed of a bipolar transistor Q2 and an insulated gate field effect transistor. The driving voltage used to control the conduction of the IGBT is usually a positive voltage, and the driving voltage used to control the shutdown of the IGBT is usually a negative voltage.

[0042] The transistor turn-off control circuit can be arranged in the driving power circuit of the IGBT to control the conduction and turn-off of each transistor to be controlled in the driving power circuit of the IGBT.

[0043] The voltage sampling circuit 130 is used to collect the bus voltage connected to the transistor to be controlled, that is, Figure 1 The voltage between BUS+ and BUS- is measured and the collected bus voltage is sent to the drive control circuit.

[0044] The drive control circuit is connected to the voltage sampling circuit 130 and the transistor to be controlled respectively, and is used to receive the bus voltage and adjust the drive negative voltage corresponding to the transistor to be controlled based on the bus voltage to control the transistor to be controlled to turn off.

[0045] During the actual execution process, the bus voltage corresponding to the transistor to be controlled is collected in real time. When the bus voltage is small, a relatively large driving negative voltage is applied to both ends of the transistor to be controlled through the driving control circuit to increase the turn-off speed of the transistor to be controlled, thereby reducing the turn-off loss.

[0046] When the bus voltage is large, a relatively small driving negative voltage is applied to both ends of the transistor to be controlled through the driving control circuit to reduce the risk of component damage caused by excessive voltage stress on the collector and emitter of the transistor to be controlled due to excessive bus voltage and too fast shutdown speed of the transistor to be controlled, which exceeds the IGBT specifications. The reliability and life of the IGBT are improved, thereby improving the reliability of the inverter circuit.

[0047] In some embodiments, when the bus voltage is less than the first threshold, the drive control circuit increases the drive negative voltage;

[0048] When the bus voltage is not less than the first threshold, the drive control circuit reduces the drive negative voltage.

[0049] In this embodiment, the first threshold may be based on user customization.

[0050] If the bus voltage is less than the first threshold, it can be approximately considered that the bus voltage is small, and the negative driving voltage of the IGBT can be increased to increase its turn-off speed, reduce loss, and extend the service life of the IGBT.

[0051] If the bus voltage is not less than the first threshold, it can be approximately considered that the current bus voltage is relatively large, which can reduce the negative driving voltage of the IGBT, reduce the voltage stress on the collector and emitter of the IGBT, extend the service life of the IGBT, improve reliability, and further improve the reliability of the inverter circuit.

[0052] According to the transistor shutdown control circuit provided in the embodiment of the present application, a voltage sampling circuit 130 for collecting the bus voltage connected to the transistor to be controlled and a drive control circuit for adjusting the driving negative voltage corresponding to the transistor to be controlled based on the size of the bus voltage to control the shutdown of the transistor to be controlled are provided, so that when the bus voltage is small, the driving negative voltage of the IGBT is increased to increase its shutdown speed and reduce the loss. When the bus voltage is large, the driving negative voltage of the IGBT is reduced, the voltage stress on the collector and emitter of the IGBT is reduced, the service life of the IGBT is extended, and the reliability is improved, thereby improving the reliability of the inverter circuit.

[0053] Continue to refer Figure 1 In some embodiments, the driving control circuit may include: a control module MCU, a photocoupler 120 and a switch module.

[0054] In this embodiment, the control module MCU may be a microcontroller unit (MCU).

[0055] An input end of the photocoupler 120 is connected to the control module MCU and is used to receive a first level signal output by the control module MCU.

[0056] The first level signal may be expressed as a square wave signal.

[0057] A first capacitor C1 and a second capacitor C2 connected in series are provided between the first output terminal and the second output terminal of the photocoupler 120 , and a first voltage regulator tube D2 is connected in parallel to the first capacitor C1 .

[0058] The interface corresponding to the first output terminal is VCC, and the interface corresponding to the second output terminal is VEE.

[0059] The midpoint of the first capacitor C1 and the second capacitor C2 is connected to the transistor to be controlled via the interface VSS.

[0060] The transistor to be controlled is connected to one of the first output terminal and the second output terminal based on a first level signal.

[0061] In the actual implementation process, the control module MCU can generate a first level signal based on actual needs to alternately apply a driving positive voltage and a driving negative voltage to both ends of the transistor to be controlled to achieve the turning on and off of the transistor to be controlled.

[0062] In some embodiments, when the first level signal is at a low level, the second output terminal is connected to the transistor to be controlled;

[0063] When the first level signal is at a high level, the first output terminal is connected to the transistor to be controlled.

[0064] For example, when the first level signal is a high level signal, the transistor to be controlled is connected to the first output terminal, a positive driving voltage is applied across the transistor to be controlled, and the transistor to be controlled is turned on.

[0065] When the first level signal is a low level signal, the transistor to be controlled is connected to the second output terminal, a negative driving voltage is applied to both ends of the transistor to be controlled, and the transistor to be controlled is turned off.

[0066] The switch module is connected to the control module MCU, and the first output end is connected to the first voltage through the switch module.

[0067] The switch module is used to receive the second level signal output by the control module MCU, and adjust the conduction voltage drop of the switch module based on the second level signal.

[0068] The second level signal is determined based on the magnitude of the bus voltage.

[0069] The second level signal may be expressed as a square wave signal.

[0070] The second level signal can be adjusted accordingly based on the magnitude of the bus voltage.

[0071] It should be noted that, in the present application, the first level signal and the second level signal do not interfere with each other.

[0072] The first output terminal is connected to the first voltage via the switch module.

[0073] The value of the first voltage may be user-defined.

[0074] In the actual implementation process, the control module MCU sends a second level signal to the switch module to adjust the conduction voltage drop of the switch module.

[0075] For example, when the bus voltage is large, the control module MCU sends a low-level signal to the switch module, causing the switch module to be turned on with a larger conduction voltage drop. The voltage of the first voltage given to the first output terminal through the switch module is reduced, thereby reducing the driving negative voltage of the transistor to be controlled.

[0076] When the bus voltage is small, the control module MCU sends a high-level signal to the switch module, so that the switch module is turned on with a smaller conduction voltage drop. The first voltage given to the first output terminal through the switch module is higher, thereby providing a higher driving negative voltage to the transistor to be controlled.

[0077] Continue to refer Figure 1 In some embodiments, the switch module may include: a first resistor R1, a second resistor R2, a transistor Q2 and a PMOS transistor Q1.

[0078] In this embodiment, the first resistor R1 and the second resistor R2 are connected in series.

[0079] The transistor Q2 may be an NPN transistor.

[0080] The emitter of the transistor Q2 is grounded, the collector of the transistor Q2 is connected to the second resistor R2, and the base of the transistor Q2 is connected to the control module MCU.

[0081] In some embodiments, the switch module may further include a third resistor R3.

[0082] Continue to refer Figure 1 The third resistor R3 is connected between the control module MCU and the base of the transistor Q2.

[0083] The gate of the PMOS tube Q1 is connected between the first resistor R1 and the second resistor R2 , the drain of the PMOS tube Q1 is connected to the first output end, and the source of the PMOS tube Q1 is connected to the first voltage.

[0084] A gating device is connected in parallel between the drain and source of the PMOS tube Q1 , and a conduction voltage drop of the gating device is greater than a conduction voltage drop of the PMOS tube Q1 .

[0085] The conduction voltage drop of the PMOS tube Q1 is small.

[0086] In actual implementation, when the PMOS tube Q1 is turned on, the gating device is turned off. Since the conduction voltage drop of the PMOS tube Q1 is small and the voltage division is small, the voltage transmitted to the first output terminal is also relatively large.

[0087] When the PMOS tube Q1 is turned off, the gating device is turned on. Since the conduction voltage drop of the gating device is greater than the conduction voltage drop of the PMOS tube Q1, the voltage division is large, and the voltage transmitted to the first output terminal is relatively small.

[0088] The gate device or the PMOS tube Q1 is turned on by controlling the magnitude of the bus voltage to divide the first voltage to different degrees, thereby adjusting the magnitude of the voltage supplied to the first output terminal to change the driving negative voltage. The driving negative voltage can be adaptively adjusted based on the bus voltage, which helps to reduce losses, extend the service life of the IGBT, and improve reliability, thereby improving the reliability of the inverter circuit and having higher control precision and accuracy.

[0089] Continue to refer Figure 1 In some embodiments, the drive control circuit may further include: a transformer 110 .

[0090] In this embodiment, the first output terminal is connected to the switch module via the transformer 110 .

[0091] Continue to refer Figure 1 , the drain of the PMOS tube Q1 is connected to the first output terminal through the transformer 110.

[0092] In some embodiments, when the bus voltage is less than the first threshold, the second level signal is high level, the transistor Q2 is turned on, the PMOS transistor Q1 is turned on, and the first voltage is connected to the first output terminal through the PMOS transistor Q1.

[0093] In this embodiment, when the bus voltage is less than the first threshold, it is approximately considered that the bus voltage is small, and the control module MCU outputs a high level to the switch module. After receiving the high level, the transistor Q2 is turned on, the PMOS tube Q1 is turned on, and the first voltage is connected to the first output terminal through the PMOS tube Q1.

[0094] The on-state voltage drop of the PMOS tube Q1 is small, so the driving negative voltage provided to the IGBT is large.

[0095] At this time, the bus voltage is small, and the risk of shutdown voltage stress is relatively small. At the same time, the IGBT driving negative voltage is large, the shutdown speed is fast, and the switching loss is small.

[0096] In some embodiments, when the bus voltage is not less than the first threshold, the second level signal is at a low level, the transistor Q2 is turned off, and the first voltage is connected to the first output terminal via the gating device.

[0097] In this embodiment, when the bus voltage is not less than the first threshold value, it is approximately considered that the bus voltage is large, and the control module MCU outputs a low level to the switch module, the transistor Q2 is turned off after receiving the low level, the PMOS tube Q1 is turned off, the gating device is turned on, and the first voltage is connected to the first output terminal through the gating device.

[0098] The on-state voltage drop of the gating device is greater than the on-state voltage drop of the PMOS tube Q1. When the first voltage remains unchanged, the driving negative voltage provided to the IGBT is reduced. At this time, even if the bus voltage is large, the driving negative voltage provided to the IGBT through the gating device is small, which reduces the risk of the IGBT turn-off voltage stress exceeding the specification and improves the reliability of the IGBT.

[0099] According to the transistor shutdown control circuit provided in the embodiment of the present application, a gating device having a conduction voltage drop greater than the conduction voltage drop of the PMOS tube Q1 is provided between the source and the drain of the PMOS tube Q1, and the conduction state of the PMOS tube Q1 is controlled based on the magnitude of the bus voltage, so that when the bus voltage is relatively large, the PMOS tube Q1 is controlled to be turned off to turn on the gating device, thereby pulling down the first voltage, thereby reducing the driving negative voltage of the IGBT, so as to reduce the voltage stress of the IGBT; when the bus voltage is relatively small, the PMOS tube Q1 is controlled to be turned on to maintain a relatively high driving negative voltage of the IGBT to increase its shutdown speed, reduce losses, extend the service life of the IGBT, and improve reliability, thereby improving the reliability of the inverter circuit, and having relatively high control precision and accuracy.

[0100] Continue to refer Figure 1 In some embodiments, the gating device may include a diode D1.

[0101] In this embodiment, the anode of the diode D1 is connected to the source of the PMOS transistor Q1 , and the cathode of the diode D1 is connected to the drain of the PMOS transistor Q1 .

[0102] The forward voltage drop of the diode D1 is greater than the forward voltage drop of the PMOS tube Q1.

[0103] The control logic of the present application is specifically described below by taking the gating device including the diode D1 as an example.

[0104] like Figure 3As shown, when the control module MCU collects a small bus voltage between the positive and negative buses (BUS+ and BUS-) through the voltage sampling circuit 130, the control module MCU sends a high-level signal to the switch module to turn on the transistor Q2, and the PMOS tube Q1 is turned on through the voltage division of the first resistor R1 and the second resistor R2.

[0105] Since the conduction voltage drop of the PMOS transistor Q1 is relatively low, the first voltage makes the voltages across the first capacitor C1 and the second capacitor C2 obtained through the transformer 110 denoted as VCC-VSS and VSS-VEE respectively relatively large.

[0106] In this process, the control module MCU sends a first level signal to the photocoupler 120. When the first level signal is a high level signal, the first output terminal is connected to the IGBT, that is, the value of Vg is equal to VCC, the driving positive voltage of the IGBT gate is VCC-VSS, and the IGBT is turned on; at this time, since the Zener diode D1 is connected in parallel at both ends of the first capacitor C1, the driving positive voltage VCC-VSS of the IGBT is a stable value.

[0107] When the first level signal is a low level signal, the second output terminal is connected to the IGBT, that is, the value of Vg is equal to VEE, the driving negative voltage of the IGBT gate is VEE-VSS, and the IGBT is turned off; at this time, since the bus voltage is small, the risk of turn-off voltage stress is small, and at the same time, the IGBT driving negative voltage VEE-VSS is large, which makes the turn-off speed fast, the switching loss small, and the junction temperature relatively low.

[0108] Continue to refer Figure 3 When the control module MCU collects a large bus voltage between the positive and negative buses (BUS+ and BUS-) through the voltage sampling circuit 130, the control module MCU sends a low-level signal to the switch module to turn off the transistor Q2 and the PMOS tube Q1; the diode D1 is turned on, and the first voltage passes through the diode D1 and then through the transformer 110 to obtain the voltage across the first capacitor C1 and the second capacitor C2; it can be understood that the value of the first voltage is fixed, and the conduction voltage drop of the diode D1 is greater than the conduction voltage drop of the PMOS tube Q1. The voltage across the first capacitor C1 remains unchanged due to the existence of the first voltage regulator tube D2. Therefore, compared with the case where the PMOS tube Q1 is turned on, the voltage given to the second capacitor C2 when the diode D1 is turned on becomes smaller, that is, the driving negative voltage VEE-VSS becomes smaller.

[0109] In this process, the control module MCU sends a first level signal to the photocoupler 120. When the first level signal is a high level signal, the first output terminal is connected to the IGBT, that is, the value of Vg is equal to VCC, and the driving positive voltage of the IGBT gate is VCC-VSS. The driving positive voltage remains unchanged under the action of the first voltage regulator tube D2, and the IGBT is turned on.

[0110] When the first level signal is a low level signal, the second output terminal is connected to the IGBT, that is, the value of Vg is equal to VEE, the driving negative voltage VEE-VSS of the GBT gate becomes smaller, and the IGBT is turned off; therefore, even if the bus voltage is large, the IGBT driving negative voltage is small, so that the turn-off voltage stress of the IGBT is small, thereby reducing the risk of the IGBT turn-off voltage stress exceeding the specification and improving the reliability of the IGBT.

[0111] like Figure 2 As shown, in some embodiments, the gating device may include a fourth resistor R4.

[0112] In this embodiment, a fourth resistor R4 may be used to replace the diode D1 .

[0113] The fourth resistor R4 is connected between the source and the drain of the PMOS transistor Q1 .

[0114] The resistance value of the fourth resistor R4 can be determined based on the conduction voltage drop of the diode D1 replaced by the fourth resistor R4, so that the voltage drop across the fourth resistor R4 is consistent with the conduction voltage drop of the diode D1.

[0115] According to the transistor shutdown control circuit provided in the embodiment of the present application, by setting a fourth resistor R4 or a diode D1 between the source and the drain of the PMOS tube Q1 to pull down the first voltage, the function of reducing the driving negative voltage of the IGBT when the bus voltage is large can be achieved. This can effectively ensure the life and reliability of the IGBT, and has high design flexibility and low design cost.

[0116] An embodiment of the present application also provides an inverter system.

[0117] The inverter system is connected to the transistor shutdown control circuit as described in any of the above embodiments, and the transistor shutdown control circuit controls the on and off of the IGBT.

[0118] According to the inverter system described in the embodiment of the present application, by setting a transistor shutdown control circuit, based on the size of the bus voltage, the driving negative voltage corresponding to the transistor to be controlled is adjusted to control the driving control circuit to shut down the transistor to be controlled, so that when the bus voltage is small, the driving negative voltage of the IGBT is increased to increase its shutdown speed and reduce losses. When the bus voltage is large, the driving negative voltage of the IGBT is reduced to reduce the voltage stress on the collector and emitter of the IGBT, thereby extending the service life of the IGBT and improving reliability, thereby improving the reliability of the inverter circuit.

[0119] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0120] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, a disk, or an optical disk), and includes a number of instructions for a terminal (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0121] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

[0122] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0123] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A transistor shutdown control circuit, characterized in that: include: A voltage sampling circuit, used for collecting the bus voltage connected to the transistor to be controlled; The drive control circuit is connected to the voltage sampling circuit and the transistor to be controlled respectively, and is used to adjust the drive negative voltage corresponding to the transistor to be controlled based on the magnitude of the bus voltage to control the transistor to be controlled to be turned off.

2. The transistor shutdown control circuit according to claim 1, characterized in that: When the bus voltage is less than a first threshold, the drive control circuit increases the drive negative voltage; When the bus voltage is not less than the first threshold, the drive control circuit reduces the drive negative voltage.

3. The transistor shutdown control circuit according to claim 2, characterized in that: The drive control circuit comprises: Control module; A photoelectric coupler, wherein an input end of the photoelectric coupler is connected to the control module and is used to receive a first level signal output by the control module; a first capacitor and a second capacitor connected in series are arranged between a first output end and a second output end of the photoelectric coupler, and a first voltage regulator is connected in parallel to the first capacitor; a midpoint of the first capacitor and the second capacitor is connected to the transistor to be controlled, and the transistor to be controlled is connected to one of the first output end and the second output end based on the first level signal; A switch module, the switch module is connected to the control module, and is used to receive a second level signal output by the control module, the second level signal is determined based on the size of the bus voltage; the first output end is connected to the first voltage through the switch module, and the on-state voltage drop of the switch module is controlled based on the second level signal.

4. The transistor shutdown control circuit according to claim 3, characterized in that: The switch module comprises: A first resistor and a second resistor connected in series; A transistor, wherein the emitter of the transistor is grounded, the collector of the transistor is connected to the second resistor, and the base of the transistor is connected to the control module; A PMOS tube, wherein the gate of the PMOS tube is connected between the first resistor and the second resistor, the drain of the PMOS tube is connected to the first output end, the source of the PMOS tube is connected to the first voltage, and a gating device is connected in parallel between the drain and the source of the PMOS tube, and the conduction voltage drop of the gating device is greater than the conduction voltage drop of the PMOS tube.

5. The transistor shutdown control circuit according to claim 4, characterized in that: The gating device comprises a diode, an anode of the diode is connected to the source of the PMOS tube, and a cathode of the diode is connected to the drain of the PMOS tube.

6. The transistor shutdown control circuit according to claim 4, characterized in that: The gating device includes a fourth resistor.

7. The transistor shutdown control circuit according to any one of claims 4 to 6, characterized in that: When the bus voltage is less than the first threshold, the second level signal is at a high level, the transistor is turned on, the PMOS tube is turned on, and the first voltage is connected to the first output terminal through the PMOS tube.

8. The transistor shutdown control circuit according to any one of claims 4 to 6, characterized in that: When the bus voltage is not less than the first threshold, the second level signal is at a low level, the transistor is turned off, and the first voltage is connected to the first output terminal via the gating device.

9. The transistor shutdown control circuit according to any one of claims 3 to 6, characterized in that: The drive control circuit also includes: Transformer, the first output end is connected to the switch module via the transformer.

10. The transistor shutdown control circuit according to any one of claims 3 to 6, characterized in that: When the first level signal is at a low level, the second output terminal is connected to the transistor to be controlled; When the first level signal is at a high level, the first output terminal is connected to the transistor to be controlled.

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