Harmonic suppression circuit, harmonic suppression method and household appliance

Abstract

The embodiment of the invention relates to a harmonic suppression circuit, a harmonic suppression method and a household appliance. The harmonic suppression circuit comprises an adjustable reactor and a control unit, the first end of the adjustable reactor is connected with the power connection port, and the second end of the adjustable reactor is connected with a bus capacitor included in the mainboard unit; the first end of the control unit is connected with the power connection port, and the second end of the control unit is connected with the bus capacitor; the control unit is used for obtaining the bus voltage in front of the bus capacitor; determining a voltage change trend of the bus voltage in a first time period; determining an adjustment strategy of the adjustable reactance based on the voltage change trend; and adjusting the adjustable reactance according to the adjustment strategy. Therefore, the working stability and applicability of the circuit can be improved in a harmonic suppression scene.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a harmonic suppression circuit, a harmonic suppression method and a household appliance. Background Art

[0002] Generally, unit harmonics are divided into current harmonics and power supply harmonics. In related technologies, the solution to harmonics is usually to suppress the generation of harmonics through reactance and capacitance.

[0003] However, the above solutions usually have the following problems:

[0004] Generators working in different environments will fail to suppress power harmonics due to different working voltages. This failure will reduce the stability of the generator and shorten its working life; it is more likely to generate harmful radiation. Although the incoming power after reactance treatment suppresses current harmonics, it will cause the voltage to rise; this is beyond the capacitance range of the bus capacitor that suppresses power harmonics, and it is very easy to cause bulging damage to the bus capacitor.

[0005] It can be seen that in the harmonic suppression scenario, how to improve the stability and applicability of circuit operation is a technical issue worthy of attention. Summary of the invention

[0006] In view of this, in order to solve some or all of the above technical problems, the embodiments of the present application provide a harmonic suppression circuit, a harmonic suppression method and a household appliance.

[0007] In a first aspect, an embodiment of the present application provides a harmonic suppression circuit, the harmonic suppression circuit comprising an adjustable reactance and a control unit;

[0008] The first end of the adjustable reactance is connected to the electrical port, and the second end of the adjustable reactance is connected to the bus capacitor included in the mainboard unit;

[0009] The first end of the control unit is connected to the power port, and the second end of the control unit is connected to the bus capacitor;

[0010] The control unit is used to: obtain the bus voltage before the bus capacitor; determine the voltage change trend of the bus voltage in a first time period; determine the adjustment strategy of the adjustable reactance based on the voltage change trend; and adjust the adjustable reactance according to the adjustment strategy.

[0011] In a possible implementation manner, the control unit is specifically configured to:

[0012] Determine a first voltage value of the bus voltage at a start time of the first time period, and a second voltage value of the bus voltage at an end time of the first time period;

[0013] determining a slope corresponding to the first time period based on the first voltage value and the second voltage value;

[0014] The slope is determined as a voltage variation trend of the bus voltage in the first time period.

[0015] In a possible implementation manner, the voltage variation trend is represented by a numerical value; and

[0016] The control unit is specifically used for:

[0017] Determining a change amplitude of the voltage change trend within a second time period;

[0018] Based on the variation amplitude, an adjustment strategy of the adjustable reactance is determined.

[0019] In a possible implementation manner, the voltage variation trend is represented by a numerical value; and

[0020] The control unit is specifically used for:

[0021] Determining a difference between the voltage change trend and a preset voltage threshold;

[0022] Based on the difference, an adjustment strategy for the adjustable reactance is determined.

[0023] In a possible implementation manner, the preset voltage threshold includes a preset first voltage threshold and a preset second voltage threshold, and the first voltage threshold is less than the second voltage threshold;

[0024] The control unit is specifically used for:

[0025] When the difference between the voltage change trend and the first voltage threshold is less than or equal to a first preset threshold, controlling the reactance value of the adjustable reactance to increase;

[0026] When the difference between the second voltage threshold and the voltage change trend is less than or equal to a second preset threshold, the reactance value of the adjustable reactance is controlled to decrease.

[0027] In a possible implementation manner, the first voltage threshold is determined based on a current harmonic suppression value, and the second voltage threshold is determined based on a limit value for resisting power supply harmonics.

[0028] In a possible implementation manner, the mainboard unit further includes a filter device;

[0029] The second end of the adjustable reactance is connected to the bus capacitor through the filter device;

[0030] The filter device is used to prevent the interference signal from the second end of the adjustable reactance from being input into the bus capacitor.

[0031] In a possible implementation manner, the mainboard unit further includes a rectifier bridge;

[0032] The second end of the adjustable reactance is connected to the bus capacitor through the rectifier bridge;

[0033] The rectifier bridge is used to: convert the alternating current output from the second end of the adjustable reactance into direct current; and transmit the direct current to the bus capacitor.

[0034] In a second aspect, an embodiment of the present application provides a harmonic suppression method, the harmonic suppression method comprising:

[0035] Obtaining a bus voltage before a bus capacitor, wherein the bus capacitor is connected to a second end of an adjustable reactance, and a first end of the adjustable reactance is connected to an electrical port;

[0036] Determining a voltage variation trend of the bus voltage within a first time period;

[0037] Based on the voltage variation trend, determining an adjustment strategy for the adjustable reactance;

[0038] The adjustable reactance is adjusted according to the adjustment strategy.

[0039] In a third aspect, an embodiment of the present application provides a household appliance, wherein the household appliance comprises the harmonic suppression circuit of any embodiment of the harmonic suppression circuit of the first aspect.

[0040] The harmonic suppression circuit provided by the embodiment of the present application includes an adjustable reactance and a control unit; the first end of the adjustable reactance is connected to the power port, and the second end of the adjustable reactance is connected to the bus capacitor included in the mainboard unit; the first end of the control unit is connected to the power port, and the second end of the control unit is connected to the bus capacitor; the control unit is used to: obtain the bus voltage before the bus capacitor; determine the voltage change trend of the bus voltage within a first time period; determine the adjustment strategy of the adjustable reactance based on the voltage change trend; and adjust the adjustable reactance according to the adjustment strategy. Thus, the adjustable reactance is adjusted by adjusting the voltage change trend of the bus voltage before the bus capacitor obtained by the control unit so that the bus voltage is in the normal working voltage range. In this way, the stability and applicability of the circuit operation can be improved in the harmonic suppression scenario.

[0041] The harmonic suppression method provided in the embodiment of the present application obtains the bus voltage before the bus capacitor, wherein the bus capacitor is connected to the second end of the adjustable reactance, and the first end of the adjustable reactance is connected to the power port, and then the voltage change trend of the bus voltage in the first time period is determined, and then the adjustment strategy of the adjustable reactance is determined based on the voltage change trend, and then the adjustable reactance is adjusted according to the adjustment strategy. Thus, the voltage change trend of the bus voltage before the bus capacitor obtained by the control unit is used to adjust the adjustable reactance so that the bus voltage is in the normal working voltage range, so that the stability and applicability of the circuit operation can be improved in the harmonic suppression scenario. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0043] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0044] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0045] Figure 1 A schematic diagram of the structure of a harmonic suppression circuit provided in an embodiment of the present application;

[0046] Figure 2 A schematic diagram of the structure of another harmonic suppression circuit provided in an embodiment of the present application;

[0047] Figure 3 A schematic diagram of the structure of another harmonic suppression circuit provided in an embodiment of the present application;

[0048] Figure 4 A schematic diagram of a voltage variation trend of a bus voltage in a harmonic suppression circuit provided in an embodiment of the present application;

[0049] Figure 5 A schematic diagram of a harmonic suppression method provided in an embodiment of the present application;

[0050] Figure 6 A schematic flow chart of another harmonic suppression method provided in an embodiment of the present application;

[0051] Figure 7 A schematic diagram of the structure of a household appliance provided in an embodiment of the present application. DETAILED DESCRIPTION

[0052] Various exemplary embodiments of the present application will now be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. It should be noted that unless otherwise specifically stated, the relative arrangement of the components and steps, the numerical expressions and the numerical values ​​described in these embodiments do not limit the scope of the present application.

[0053] Those skilled in the art will understand that the terms "first" and "second" in the embodiments of the present application are only used to distinguish between different steps, devices, modules and other objects, and do not represent any specific technical meanings, nor do they indicate the logical order between them.

[0054] It should also be understood that in this embodiment, “plurality” may refer to two or more than two, and “at least one” may refer to one, two or more than two.

[0055] It should also be understood that any component, data or structure mentioned in the embodiments of the present application can generally be understood as one or more, unless explicitly limited or otherwise indicated in the context.

[0056] In addition, the term "and / or" in this application is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this application generally indicates that the associated objects before and after are in an "or" relationship.

[0057] It should also be understood that the description of the various embodiments in this application focuses on the differences between the various embodiments, and the same or similar aspects thereof can be referenced to each other, and for the sake of brevity, they will not be described one by one.

[0058] The following description of at least one exemplary embodiment is merely illustrative in nature and is not intended to limit the present application, its application, or uses.

[0059] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the above-mentioned technologies, methods, and equipment should be considered as part of the specification.

[0060] It should be noted that like reference numerals and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0061] It should be noted that, in the absence of conflict, the embodiments in this application and the features in the embodiments can be combined with each other. To facilitate the understanding of the embodiments of the present application, the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0062] In order to solve the technical problem of how to improve the stability and applicability of circuit operation in harmonic suppression scenarios in the prior art, the present application provides a harmonic suppression circuit, a harmonic suppression method and a household appliance, which can improve the stability and applicability of circuit operation in harmonic suppression scenarios.

[0063] Figure 1 A schematic diagram of the structure of a harmonic suppression circuit provided in an embodiment of the present application.

[0064] like Figure 1 As shown, the harmonic suppression circuit includes an adjustable reactance 10 and a control unit 20;

[0065] The first end of the adjustable reactance 10 is connected to the power port, and the second end of the adjustable reactance 10 is connected to the bus capacitor 31 included in the mainboard unit 30 .

[0066] A first end of the control unit 20 is connected to the power port, and a second end of the control unit 20 is connected to the bus capacitor 31 .

[0067] The control unit 20 is used to: obtain the bus voltage before the bus capacitor 31; determine the voltage change trend of the bus voltage in a first time period; determine the adjustment strategy of the adjustable reactance 10 based on the voltage change trend; and adjust the adjustable reactance 10 according to the adjustment strategy.

[0068] The first time period may be any time period. As an example, the control unit 20 may obtain the bus voltage before the bus capacitor 31 once at a preset frequency and at intervals of a preset duration, thereby determining the voltage change trend of the bus voltage within the first time period (corresponding to the preset duration). As another example, the control unit 20 may also obtain the bus voltage before the bus capacitor 31 once when a preset condition is met, thereby determining the voltage change trend of the bus voltage within the first time period.

[0069] The voltage variation trend may indicate an upward trend or a downward trend of the bus voltage, and / or the voltage variation trend may indicate a variation amplitude of the bus voltage, etc.

[0070] The adjustment strategy may include controlling the adjustable reactance 10 to increase or decrease. Alternatively, the adjustment strategy may include controlling the amplitude of the increase or decrease of the adjustable reactance 10. Alternatively, the adjustment strategy may include controlling the speed of the increase or decrease of the adjustable reactance 10.

[0071] In some optional implementations of this embodiment, the control unit 20 is specifically configured to determine the voltage variation trend of the bus voltage within the first time period in the following manner:

[0072] First, a first voltage value of the bus voltage at the start time of the first time period and a second voltage value of the bus voltage at the end time of the first time period are determined.

[0073] The first voltage value may be a voltage value of the bus voltage at the start time of the first time period.

[0074] The second voltage value may be a voltage value of the bus voltage at the end time of the first time period.

[0075] Afterwards, a slope corresponding to the first time period is determined based on the first voltage value and the second voltage value.

[0076] For example, the difference between the second voltage value and the second voltage value may be calculated first, and then the quotient of the difference and the duration corresponding to the first time period may be determined as the slope corresponding to the first time period.

[0077] Then, the slope is determined as the voltage variation trend of the bus voltage in the first time period.

[0078] It can be understood that in the above optional implementation, the voltage variation trend of the bus voltage in the first time period can be obtained by calculating the slope corresponding to the first time period, thereby achieving quantification of the voltage variation trend, thereby more accurately measuring the voltage variation trend.

[0079] In some optional implementations of this embodiment, the voltage variation trend is represented by a numerical value.

[0080] In this case, the control unit 20 is specifically used to determine the adjustment strategy of the adjustable reactance 10 based on the voltage variation trend in the following manner:

[0081] First, the variation range of the voltage variation trend in the second time period is determined.

[0082] The second time period may be the same as or different from the first time period. In addition, the number of the second time period may be one or more.

[0083] The change amplitude can be: the difference between the change amplitude corresponding to the end time of the second time period and the change amplitude corresponding to the start time of the second time period; or, the difference between the change amplitude corresponding to the start time of the second time period and the change amplitude corresponding to the end time of the second time period.

[0084] Afterwards, based on the variation amplitude, an adjustment strategy of the adjustable reactance 10 is determined.

[0085] Here, a variety of methods may be used to determine the adjustment strategy of the adjustable reactance 10 based on the variation amplitude.

[0086] As an example, if the change amplitude is greater than a preset value, then it can be determined that the adjustable reactance 10 needs to be adjusted; if the change amplitude is less than or equal to the preset value, then it can be determined that the adjustable reactance 10 does not need to be adjusted.

[0087] As another example, if the variation amplitude is greater than a preset value, and the voltage value of the bus voltage before the bus capacitor corresponding to the end time of the second time period does not belong to the preset voltage range, then it can be determined that the adjustable reactance 10 needs to be adjusted.

[0088] It can be understood that in the above optional implementation, the adjustment strategy of the adjustable reactance 10 can be determined by the change amplitude of the voltage change trend in the second time period. Therefore, the adjustable reactance can be adjusted according to the change of the voltage change trend in a certain time period, thereby improving the stability of harmonic suppression.

[0089] In some optional implementations of this embodiment, the voltage variation trend is represented by a numerical value.

[0090] In this case, the control unit 20 is specifically used to determine the adjustment strategy of the adjustable reactance 10 based on the voltage variation trend in the following manner:

[0091] First, a difference between the voltage variation trend and a preset voltage threshold is determined.

[0092] The preset voltage threshold may be a preset voltage value. In addition, the number of the preset voltage thresholds may be one or more.

[0093] Afterwards, based on the difference, an adjustment strategy for the adjustable reactance 10 is determined.

[0094] Here, a variety of methods may be used to determine the adjustment strategy of the adjustable reactance 10 based on the difference.

[0095] As an example, if the difference is greater than a preset value, then it can be determined that the adjustable reactance 10 needs to be adjusted; if the difference is less than or equal to the preset value, then it can be determined that the adjustable reactance 10 does not need to be adjusted.

[0096] As another example, if the change amplitude of the voltage change trend in the second time period is greater than or equal to a predetermined first value, and the difference between the voltage change trend and the predetermined first voltage threshold is less than or equal to a predetermined second value, then the reactance value of the adjustable reactance can be controlled to increase. If the change amplitude of the voltage change trend in the second time period is greater than or equal to a predetermined third value, and the difference between the voltage change trend and the predetermined second voltage threshold is less than or equal to a predetermined fourth value, then the reactance value of the adjustable reactance can be controlled to decrease.

[0097] The first value and the third value may be equal or different.

[0098] The second value and the fourth value may be equal or different.

[0099] It can be understood that in the above optional implementation, the adjustment strategy of the adjustable reactance 10 can be determined by the difference between the voltage change trend and the preset voltage threshold. Therefore, the adjustable reactance can be adjusted according to the degree of convergence between the voltage change trend and the preset voltage threshold, thereby improving the precision of the reactance adjustment, thereby improving the stability and effectiveness of harmonic suppression.

[0100] In some application scenarios of the above optional implementation manner, the preset voltage threshold includes a preset first voltage threshold and a preset second voltage threshold, and the first voltage threshold is smaller than the second voltage threshold.

[0101] On this basis, the control unit 20 is specifically configured to determine the adjustment strategy of the adjustable reactance based on the difference in the following manner:

[0102] When the difference between the voltage change trend and the first voltage threshold is less than or equal to the first preset threshold, the reactance value of the adjustable reactance 10 is controlled to increase; when the difference between the second voltage threshold and the voltage change trend is less than or equal to the second preset threshold, the reactance value of the adjustable reactance 10 is controlled to decrease.

[0103] The first voltage threshold and the second voltage threshold may be two preset voltage thresholds with different values.

[0104] It can be understood that in the above application scenario, the adjustable reactance can be adjusted according to the degree of proximity between the voltage change trend and the first voltage threshold and the second voltage threshold. This can improve the fineness of the reactance adjustment and further improve the stability and effectiveness of harmonic suppression.

[0105] In some cases of the above application scenarios, the first voltage threshold is determined based on a current harmonic suppression value, and the second voltage threshold is determined based on a limit value for resisting power supply harmonics.

[0106] Among them, in the power system, after taking harmonic suppression measures, the magnitude of harmonic current can be effectively reduced or eliminated. For example, using passive filters, active filters and other equipment to suppress harmonic currents of a specific order to reduce them to a specified range, the amount of harmonic current reduction corresponding to the suppression effect achieved by these devices is the current harmonic suppression value.

[0107] The limit value of power supply harmonic resistance refers to the maximum allowable value of power supply harmonics that electrical equipment or systems can withstand. When the harmonic content in the power supply exceeds this limit value, it may cause problems such as equipment performance degradation, shortened life, or even damage. Different electrical equipment and systems have different power supply harmonic resistance limit values ​​according to their own characteristics and design requirements.

[0108] It can be understood that in the above case, the adjustable reactance can be adjusted by the current harmonic suppression value and the limit value of the power supply harmonic resistance, so that the bus voltage is in the normal working voltage range, which can further improve the stability and applicability of the circuit operation.

[0109] In some optional implementations of this embodiment, the mainboard unit 30 further includes a filter device.

[0110] The second end of the adjustable reactance 10 is connected to the bus capacitor 31 through the filter device.

[0111] The filter device is used to prevent the interference signal from the second end of the adjustable reactance 10 from being input into the bus capacitor 31 .

[0112] It can be understood that in the above optional implementation, the effectiveness of harmonic suppression can be further improved by using filtering devices.

[0113] In some optional implementations of this embodiment, the mainboard unit 30 further includes a rectifier bridge;

[0114] The second end of the adjustable reactance 10 is connected to the bus capacitor 31 through the rectifier bridge;

[0115] The rectifier bridge is used to: convert the alternating current output from the second end of the adjustable reactor 10 into direct current; and transmit the direct current to the bus capacitor 31 .

[0116] It can be understood that in the above optional implementation, a more stable DC power supply can be provided through a rectifier bridge, thereby providing a more stable DC power supply for the mainboard power supply.

[0117] It should be noted that, in the absence of conflict, the technical features recorded in different optional implementations may be included in the same embodiment, and for the sake of brevity, they are not repeated here.

[0118] The harmonic suppression circuit provided by the embodiment of the present application includes an adjustable reactance and a control unit; the first end of the adjustable reactance is connected to the power port, and the second end of the adjustable reactance is connected to the bus capacitor included in the mainboard unit; the first end of the control unit is connected to the power port, and the second end of the control unit is connected to the bus capacitor; the control unit is used to: obtain the bus voltage before the bus capacitor; determine the voltage change trend of the bus voltage within a first time period; determine the adjustment strategy of the adjustable reactance based on the voltage change trend; and adjust the adjustable reactance according to the adjustment strategy. Thus, the adjustable reactance is adjusted by adjusting the voltage change trend of the bus voltage before the bus capacitor obtained by the control unit so that the bus voltage is in the normal working voltage range. In this way, the stability and applicability of the circuit operation can be improved in the harmonic suppression scenario.

[0119] The following is an illustrative description of the embodiments of the present application, but it should be noted that the following content is only used to understand the technical solutions of the embodiments of the present application and does not constitute a limitation on the protection scope of the embodiments of the present application.

[0120] In related technologies, unit harmonics are divided into current harmonics and power harmonics, and the solution to harmonics is to suppress the generation of harmonics through reactance and capacitance. However, there are some problems in this process:

[0121] (1) Generators operating in different environments will fail to suppress power harmonics due to different operating voltages. This failure will reduce the stability of the generator, shorten its service life, and make it more likely to generate harmful radiation.

[0122] (2) The reason for its failure is that although the inductor-treated access power suppresses current harmonics, it will cause the voltage to rise; this is beyond the capacitance range of the bus capacitor that suppresses power harmonics, and it is very easy to cause bulging damage to the bus capacitor.

[0123] This solution can directly use an adjustable reactance to meet all environments and units without the need for additional modules.

[0124] Specifically, see Figure 2 and Figure 3 A detailed introduction to this program:

[0125] 1. Improve the reactance of the input voltage (that is, the voltage of the above-mentioned power port) and add a controller module (that is, the above-mentioned control unit). The chip on the module detects the change in bus voltage before the bus capacitor, and compares the analyzed data with the preset value (including the above-mentioned first voltage threshold and second voltage threshold). There are three values, corresponding to the voltage range of the normal working range of the bus capacitor, the voltage that is about to exceed the normal working range (corresponding to the above-mentioned first voltage threshold and second voltage threshold) and a detection time period (that is, the above-mentioned first time period or second time period). The combination of these three can greatly guarantee the stability of harmonic filtering of the unit. Realize dynamic switching of reactance to ensure the life of the unit.

[0126] Among the above three values, the first value is an interval, which is determined by 50% of the bus capacitor withstand voltage value (ie, the above second voltage threshold) and the current harmonic suppression value (ie, the above first voltage threshold).

[0127] Here, different bus capacitance values ​​may be used for different mainboard units and different units. The upper limit of the above range depends on the reactance value at which the voltage value of the bus capacitance will exceed 50% of its withstand voltage value due to the resistance to power supply harmonics. That is, when the capacitor is abnormal, the resistance to power supply harmonics is the maximum value for the unit.

[0128] The second value is the above-mentioned slope. If the detected slope value approaches the above-mentioned first voltage threshold or second voltage threshold, it is a dangerous change.

[0129] The third value is the detection value per unit time, that is, the first time period or the second time period mentioned above.

[0130] 2. If Figure 2 As shown, the harmonic suppression circuit consists of an adjustable reactance and a control IC. The IC not only checks the value of the bus voltage, but also adjusts the adjustable reactance. This method only needs one adjustable reactance to work properly.

[0131] See also Figure 4 , the relationship between the voltage U across the reactance and the reactance L is:

[0132]

[0133] In this formula, the current I is a constant relative to time t, and the change in the reactance value will cause the voltage across the reactance to change. In this model, the bus voltage is the input voltage plus the voltage across the reactance. It can be approximately considered that the change in bus voltage is not only related to the input voltage, but also to the reactance voltage. When the input voltage does not change under certain conditions, the reactance voltage will affect the change in bus voltage, and vice versa. In this case, the normal operation of the internal components against power supply harmonics and current harmonics will be affected.

[0134] As shown in the figure, when the reactance value is too large, the bus voltage will increase. In the power supply harmonic protection, a second voltage threshold is set. Once this value is exceeded, the mainboard will be damaged, causing the unit to work abnormally or even be scrapped. However, if a reactance with a smaller reactance is replaced, the voltage across the reactance will become smaller, resulting in a low bus voltage, which will affect the processing of current harmonics and make it impossible to achieve the filtering effect. Therefore, this solution can make the voltage across the reactance within a reasonable working range.

[0135] Figure 6 For the entire control logic.

[0136] Assume that the adjustable reactance range is 0-A (μH), the bus voltage is U1, and the limit voltage value for power supply harmonics is U max , the current harmonic limit voltage value is U min ; In this range of voltage (U min ,U max ) corresponds to the reactance working interval value (a, b), the initial working reactance value is x and x∈(a, b), and the time period Δ for scanning and detecting the bus voltage t (ms), the reactance value x on the reactance corresponding to the bus voltage at this time ′ Before starting the unit, set the voltage range and the time period for scanning the bus voltage in the control chip program. t After the unit is turned on, the control chip continuously scans and detects the change trend of the bus voltage. t (i.e. the first time period mentioned above), a voltage change is detected, and the voltage change trend and the set voltage interval (U min ,U max ) for comparison. If the bus voltage approaches the limit value of power supply harmonic resistance (i.e., the second voltage threshold mentioned above), the control chip adjusts the adjustable reactance to reduce the reactance value of the reactance and make it not less than the set working range value, i.e., x>a∪x <x ′. Where x represents the actual reactance value. The bus voltage trend is continuously detected until the bus voltage is in the normal working voltage range. If the bus voltage trend is detected to be close to the limit value of the current harmonic (that is, the first voltage threshold mentioned above), the controller chip increases the reactance value on the reactance so that the reactance increases but is not greater than the set working reactance value range, that is, x<b∪x> x ′ . It is also necessary to continuously detect the trend of the bus voltage until it is determined that the bus voltage is in the normal operating range. If the bus voltage is not detected to be significantly increased and approaching the limit value, the controller chip will not process it and wait for the next time period (that is, the first time period mentioned above) to be detected. After the detection of each time period is completed, the detection chip does not end the work process and continues to detect the changes in the bus voltage to ensure the safety of the unit. The monitoring will not stop until the unit is shut down.

[0137] The limitation of harmonic current determines the lower limit of reactance, and the resistance to power supply harmonics determines the upper limit of reactance. Other ranges are called abnormal. The reactance corresponding to the maximum harmonic current tested before leaving the factory is set as the lower limit at this time. The upper limit depends on the reactance value when the voltage value of the bus capacitor caused by the resistance to power supply harmonics is about to exceed 50% of its withstand voltage value.

[0138] Figure 4 In the figure, the maximum value is 50% of the busbar capacitor withstand voltage, the minimum value is the current harmonic suppression value, and the blue line is the voltage curve during normal operation.

[0139] The following method can be used to determine the change trend of the bus voltage before the bus capacitor: Assume that there is a function f(t) of the bus voltage U and time t; in general, the slope of the function within a certain period of time is its change trend: k = df(t) / dΔt, and when k>0.5 in a period of time Δt, it can be regarded as a voltage rising trend. When k<-0.5, it can be regarded as a voltage falling trend.

[0140] It should be noted that, in addition to the contents recorded above, this embodiment may also include the technical features described in the above embodiments, so as to achieve the technical effects of the harmonic suppression circuit shown above. Please refer to the above description for details. For the sake of brevity, it will not be repeated here.

[0141] The harmonic suppression circuit provided in the embodiment of the present application adds a control unit to the power port to detect the change of the bus voltage at the rear. When the bus voltage is in an abnormal voltage range, the adjustable reactance is controlled so that the reactance value meets the normal working range, thereby achieving the purpose of protecting the mainboard. It can work in any environment and on multiple units. In addition, by setting the voltage range, it is possible to further determine that the bus voltage working range is correct and ensure the stable operation of the line. In addition, this solution can use a controller chip to control the reactance value of the reactance, and adapt to multiple units, so that the bus voltage can work within a reasonable range.

[0142] Figure 5 A schematic diagram of a harmonic suppression method provided in an embodiment of the present application. Figure 5 As shown, the method specifically includes:

[0143] Step 101, obtaining a bus voltage before a bus capacitor, wherein the bus capacitor is connected to a second end of an adjustable reactance, and a first end of the adjustable reactance is connected to an electrical port.

[0144] Step 102: determining a voltage variation trend of the bus voltage within a first time period.

[0145] Step 103: determining an adjustment strategy for the adjustable reactance based on the voltage variation trend.

[0146] Step 104: adjusting the adjustable reactance according to the adjustment strategy.

[0147] In this embodiment, the specific implementation of the above steps can refer to the above description and will not be repeated here.

[0148] In some optional implementations of this embodiment, determining the voltage change trend of the bus voltage within the first time period includes:

[0149] Determine a first voltage value of the bus voltage at a start time of the first time period, and a second voltage value of the bus voltage at an end time of the first time period;

[0150] determining a slope corresponding to the first time period based on the first voltage value and the second voltage value;

[0151] The slope is determined as a voltage variation trend of the bus voltage in the first time period.

[0152] In some optional implementations of this embodiment, the voltage variation trend is represented by a numerical value; and

[0153] The step of determining an adjustment strategy for the adjustable reactance based on the voltage variation trend includes:

[0154] Determining a change amplitude of the voltage change trend within a second time period;

[0155] Based on the variation amplitude, an adjustment strategy of the adjustable reactance is determined.

[0156] In some optional implementations of this embodiment, the voltage variation trend is represented by a numerical value; and

[0157] The step of determining an adjustment strategy for the adjustable reactance based on the voltage variation trend includes:

[0158] Determining a difference between the voltage change trend and a preset voltage threshold;

[0159] Based on the difference, an adjustment strategy for the adjustable reactance is determined.

[0160] In some application scenarios of the above optional implementation manner, the preset voltage threshold includes a preset first voltage threshold and a preset second voltage threshold, and the first voltage threshold is less than the second voltage threshold;

[0161] The step of determining an adjustment strategy for the adjustable reactance based on the difference comprises:

[0162] When the difference between the voltage change trend and the first voltage threshold is less than or equal to a first preset threshold, controlling the reactance value of the adjustable reactance to increase;

[0163] When the difference between the second voltage threshold and the voltage change trend is less than or equal to a second preset threshold, the reactance value of the adjustable reactance is controlled to decrease.

[0164] In some cases of the above application scenarios, the first voltage threshold is determined based on a current harmonic suppression value, and the second voltage threshold is determined based on a limit value for resisting power supply harmonics.

[0165] In some optional implementations of this embodiment, the mainboard unit further includes a filter device;

[0166] The second end of the adjustable reactance is connected to the bus capacitor through the filter device;

[0167] The filter device is used to prevent the interference signal from the second end of the adjustable reactance from being input into the bus capacitor.

[0168] In some optional implementations of this embodiment, the mainboard unit further includes a rectifier bridge;

[0169] The second end of the adjustable reactance is connected to the bus capacitor through the rectifier bridge;

[0170] The rectifier bridge is used to: convert the alternating current output from the second end of the adjustable reactance into direct current; and transmit the direct current to the bus capacitor.

[0171] It should be noted that, in addition to the contents recorded above, this embodiment may also include the corresponding technical features described in the above embodiments, so as to achieve the technical effects described above. For details, please refer to the description of the clothes. For the sake of brevity, they will not be elaborated here.

[0172] The harmonic suppression method provided in the embodiment of the present application obtains the bus voltage before the bus capacitor, wherein the bus capacitor is connected to the second end of the adjustable reactance, and the first end of the adjustable reactance is connected to the power port, and then the voltage change trend of the bus voltage in the first time period is determined, and then the adjustment strategy of the adjustable reactance is determined based on the voltage change trend, and then the adjustable reactance is adjusted according to the adjustment strategy. Thus, the voltage change trend of the bus voltage before the bus capacitor obtained by the control unit is used to adjust the adjustable reactance so that the bus voltage is in the normal working voltage range, so that the stability and applicability of the circuit operation can be improved in the harmonic suppression scenario.

[0173] Figure 7 A schematic diagram of the structure of a household appliance provided in an embodiment of the present application is shown in FIG. Figure 7 As shown, the household appliance 500 includes any of the above-mentioned harmonic suppression circuits 501 .

[0174] Here, the household appliance 500 may be, for example, an air conditioner, a refrigerator, etc.

[0175] The household appliance provided in the embodiment of the present application includes any of the above-mentioned harmonic suppression circuits. The harmonic suppression circuit includes an adjustable reactance and a control unit; the first end of the adjustable reactance is connected to the power port, and the second end of the adjustable reactance is connected to the bus capacitor included in the mainboard unit; the first end of the control unit is connected to the power port, and the second end of the control unit is connected to the bus capacitor; the control unit is used to: obtain the bus voltage before the bus capacitor; determine the voltage change trend of the bus voltage within a first time period; determine the adjustment strategy of the adjustable reactance based on the voltage change trend; and adjust the adjustable reactance according to the adjustment strategy. Thus, the adjustable reactance is adjusted by adjusting the voltage change trend of the bus voltage before the bus capacitor obtained by the control unit so that the bus voltage is in the normal working voltage range. In this way, the stability and applicability of the circuit operation can be improved in the harmonic suppression scenario.

[0176] The above description is only a specific implementation of the present application, so that those skilled in the art can understand or implement the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest range consistent with the principles and novel features applied for herein.

Claims

1. A harmonic suppression circuit, characterized in that: The harmonic suppression circuit includes an adjustable reactance and a control unit; The first end of the adjustable reactance is connected to the electrical port, and the second end of the adjustable reactance is connected to the bus capacitor included in the mainboard unit; The first end of the control unit is connected to the power port, and the second end of the control unit is connected to the bus capacitor; The control unit is used to: obtain the bus voltage before the bus capacitor; determine the voltage change trend of the bus voltage in a first time period; determine the adjustment strategy of the adjustable reactance based on the voltage change trend; and adjust the adjustable reactance according to the adjustment strategy.

2. The harmonic suppression circuit according to claim 1, characterized in that: The control unit is specifically used for: Determine a first voltage value of the bus voltage at a start time of the first time period, and a second voltage value of the bus voltage at an end time of the first time period; determining a slope corresponding to the first time period based on the first voltage value and the second voltage value; The slope is determined as a voltage variation trend of the bus voltage in the first time period.

3. The harmonic suppression circuit according to claim 1, characterized in that: The voltage variation trend is represented by numerical values; and The control unit is specifically used for: Determining a change amplitude of the voltage change trend within a second time period; Based on the variation amplitude, an adjustment strategy of the adjustable reactance is determined.

4. The harmonic suppression circuit according to claim 1, characterized in that: The voltage variation trend is represented by numerical values; and The control unit is specifically used for: Determining a difference between the voltage change trend and a preset voltage threshold; Based on the difference, an adjustment strategy for the adjustable reactance is determined.

5. The harmonic suppression circuit according to claim 4, characterized in that: The preset voltage threshold includes a preset first voltage threshold and a preset second voltage threshold, and the first voltage threshold is less than the second voltage threshold; The control unit is specifically used for: When the difference between the voltage change trend and the first voltage threshold is less than or equal to a first preset threshold, controlling the reactance value of the adjustable reactance to increase; When the difference between the second voltage threshold and the voltage change trend is less than or equal to a second preset threshold, the reactance value of the adjustable reactance is controlled to decrease.

6. The harmonic suppression circuit according to claim 5, characterized in that: The first voltage threshold is determined based on a current harmonic suppression value, and the second voltage threshold is determined based on a limit value for resisting power supply harmonics.

7. The harmonic suppression circuit according to any one of claims 1 to 5, characterized in that: The mainboard unit also includes a filter device; The second end of the adjustable reactance is connected to the bus capacitor through the filter device; The filter device is used to prevent the interference signal from the second end of the adjustable reactance from being input into the bus capacitor.

8. The harmonic suppression circuit according to any one of claims 1 to 5, characterized in that: The mainboard unit also includes a rectifier bridge; The second end of the adjustable reactance is connected to the bus capacitor through the rectifier bridge; The rectifier bridge is used to: convert the alternating current output from the second end of the adjustable reactance into direct current; and transmit the direct current to the bus capacitor.

9. A harmonic suppression method, characterized in that: The method comprises: Obtaining a bus voltage before a bus capacitor, wherein the bus capacitor is connected to a second end of an adjustable reactance, and a first end of the adjustable reactance is connected to an electrical port; Determining a voltage variation trend of the bus voltage within a first time period; Based on the voltage variation trend, determining an adjustment strategy for the adjustable reactance; The adjustable reactance is adjusted according to the adjustment strategy.

10. A household appliance, characterized in that: The household electrical appliance comprises the harmonic suppression circuit according to any one of claims 1 to 8.

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