Packaging structure and forming method thereof

Abstract

The invention relates to a packaging structure and a forming method thereof. The packaging structure comprises an adapter plate which comprises a first main surface and a second main surface which are oppositely distributed along a first direction; the first chip is positioned on the first main surface of the adapter plate, and the first chip is electrically connected with the adapter plate; the storage structure is located on the first main face of the adapter plate, the storage structure is electrically connected with the adapter plate, and the storage structure and the first chip are arranged in the second direction; and the second chip is located on the second main surface of the adapter plate, the second chip is electrically connected with the adapter plate, and the projection of the second chip on the second main surface covers the projection of the first chip on the second main surface and the projection of the storage structure on the second main surface. The integration level and the expandability of the packaging structure are improved, and the area of the whole packaging structure is effectively saved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a packaging structure and a forming method thereof. Background Art

[0002] Currently, the semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced several generations of ICs, each with smaller and more complex circuits than the previous generation. In the process of IC development, functional density (i.e., the number of interconnected devices per chip area) has generally increased, and geometric size (i.e., the smallest component that can be produced using a manufacturing process) has continued to decrease. The application of adapters can interconnect multiple heterogeneous or homogeneous chips and realize signal transmission, thereby ultimately realizing the integration of microsystems.

[0003] In the 2.5D packaging structure, more and more functions need to be integrated in a limited space to solve the challenges in the production process. However, the current 2.5D structure mostly uses a tiling method to integrate multiple chips, resulting in a larger size of the final packaging structure. Moreover, when the number of chips integrated in the packaging structure increases, the heat dissipation performance of the packaging structure will be affected, resulting in a decrease in the service life of the packaging structure. In addition, integrating the storage structure with other chips is also a hot topic in current research.

[0004] Therefore, how to integrate the storage structure with other chips in a limited space to expand the function of the packaging structure while improving the heat dissipation performance of the packaging structure and achieving the improvement and expansion of the performance of the packaging structure is a technical problem that needs to be solved urgently. Summary of the invention

[0005] The present invention provides a packaging structure and a forming method thereof, which are used to integrate a storage structure and other chips in a limited space to expand the function of the packaging structure while improving the heat dissipation performance of the packaging structure, thereby achieving improvement and expansion of the performance of the packaging structure.

[0006] According to some embodiments, the present invention provides a packaging structure, comprising:

[0007] The adapter plate comprises a first main surface and a second main surface which are oppositely distributed along a first direction;

[0008] A first chip is located on the first main surface of the adapter board, and the first chip is electrically connected to the adapter board;

[0009] a storage structure, located on the first main surface of the adapter board, the storage structure being electrically connected to the adapter board, the storage structure and the first chip being arranged along a second direction, the second direction being perpendicular to the first direction;

[0010] The second chip is located on the second main surface of the adapter board, and the second chip is electrically connected to the adapter board, and the projection of the second chip on the second main surface covers the projection of the first chip on the second main surface and the projection of the storage structure on the second main surface.

[0011] In some embodiments, the second chip includes a front side and a back side that are oppositely distributed along the first direction, and a functional area of ​​the second chip is located on the front side of the second chip;

[0012] The second chip is hybrid-bonded on the second main surface of the adapter board, and the front surface of the second chip faces the adapter board.

[0013] In some embodiments, it also includes:

[0014] A first vertical interconnection structure, penetrating the adapter board at least along the first direction, wherein one end of the first vertical interconnection structure is electrically connected to the first chip, and the other end of the first vertical interconnection structure is electrically connected to the second chip;

[0015] The second vertical interconnection structure penetrates the adapter board at least along the first direction, and one end of the second vertical interconnection structure is electrically connected to the storage structure, and the other end is electrically connected to the second chip.

[0016] In some embodiments, the first vertical interconnect structure includes a first conductive connection column penetrating the adapter board along the first direction, a first solder pad located on a side of the first conductive connection column facing the first chip, a first internal interconnect solder ball located on the first solder pad, and a first metal layer located on a side of the first conductive connection column facing the second chip, and the first internal interconnect solder ball is electrically connected to the first chip;

[0017] The second vertical interconnection structure includes a second conductive connecting column passing through the adapter board along the first direction, a second solder pad located on the side of the second conductive connecting column facing the storage structure, a second internal interconnection solder ball located on the second solder pad, and a second metal layer located on the side of the second conductive connecting column facing the second chip, and the second internal interconnection solder ball is electrically connected to the storage structure.

[0018] In some embodiments, it also includes:

[0019] A bonding dielectric layer covers the second main surface of the adapter plate, wherein the first metal layer and the second metal layer are located in the bonding dielectric layer.

[0020] In some embodiments, it also includes:

[0021] a third vertical interconnect structure, which continuously penetrates the adapter plate, the bonding dielectric layer and the second chip at least along the first direction, and the third vertical interconnect structure is electrically connected to the first chip;

[0022] A fourth vertical interconnection structure continuously penetrates the adapter board, the bonding medium layer and the second chip at least along the first direction, and the fourth vertical interconnection structure is electrically connected to the storage structure.

[0023] In some embodiments, the third vertical interconnect structure includes a third conductive connection column that penetrates the adapter board, the bonding dielectric layer and the second chip along the first direction, a third solder pad located on the side of the third conductive connection column facing the first chip, a third internal interconnect solder ball located on the third solder pad, and a first lead solder ball located on the surface of the second chip on the side away from the adapter board;

[0024] The fourth vertical interconnection structure includes a fourth conductive connecting column that penetrates the adapter board, the bonding medium layer and the second chip along the first direction, a fourth solder pad located on the side of the fourth conductive connecting column facing the storage structure, a fourth internal interconnection solder ball located on the fourth solder pad, and a second lead-out solder ball located on the surface of the second chip on the side away from the adapter board.

[0025] In some embodiments, it also includes:

[0026] a first internal interconnect structure, comprising a fifth solder pad located on the first main surface of the adapter board and a fifth internal interconnect solder ball located on the fifth solder pad, the fifth solder pad being electrically connected to the adapter board, and the fifth internal interconnect solder ball being electrically connected to the first chip;

[0027] The second internal interconnect structure includes a sixth solder pad located on the first main surface of the adapter board and a sixth internal interconnect solder ball located on the sixth solder pad, the sixth solder pad is electrically connected to the adapter board, and the sixth internal interconnect solder ball is electrically connected to the storage structure.

[0028] In some embodiments, it also includes:

[0029] The third chip is located on the first main surface of the adapter board, the first chip, the third chip and the storage structure are arranged in a direction parallel to the first main surface, and the projection of the second chip on the second main surface continuously covers the projection of the first chip on the second main surface, the projection of the third chip on the second main surface and the projection of the storage structure on the second main surface.

[0030] In some embodiments, it also includes:

[0031] The plastic encapsulation layer is located on the first main surface of the adapter board, and the plastic encapsulation layer continuously encapsulates the first chip and the storage structure.

[0032] In some embodiments, a surface of the first chip facing away from the transfer board along the first direction is flush with a surface of the storage structure facing away from the transfer board along the first direction.

[0033] In some embodiments, the plastic encapsulation layer exposes a surface of the first chip facing away from the adapter board and a surface of the storage structure facing away from the adapter board.

[0034] In some embodiments, the storage structure is a high bandwidth memory.

[0035] According to some other embodiments, the present invention further provides a method for forming a packaging structure, comprising the following steps:

[0036] forming an adapter plate, the adapter plate comprising a first main surface and a second main surface that are oppositely distributed along a first direction;

[0037] The second chip is connected to the second main surface of the adapter board, and the first chip and the storage structure are electrically connected to the first main surface of the adapter board, the storage structure and the first chip are arranged along the second direction, the first chip, the second chip and the storage structure are all electrically connected to the adapter board, the projection of the second chip on the second main surface covers the projection of the first chip on the second main surface and the projection of the storage structure on the second main surface, and the second direction intersects the first direction perpendicularly.

[0038] In some embodiments, the specific steps of connecting the second chip to the second main surface of the adapter board and electrically connecting the first chip and the storage structure to the first main surface of the adapter board include:

[0039] The second chip is connected to the second main surface of the adapter board, and the first chip, the third chip and the storage structure are electrically connected to the first main surface of the adapter board, the first chip, the third chip and the storage structure are arranged in a direction parallel to the first main surface, and the projection of the second chip on the second main surface continuously covers the projection of the first chip on the second main surface, the projection of the third chip on the second main surface and the projection of the storage structure on the second main surface.

[0040] In some embodiments, before connecting the second chip to the second main surface of the adapter board and electrically connecting the first chip and the storage structure to the first main surface of the adapter board, the following steps are also included:

[0041] Forming a first welding pad and a second welding pad on the first main surface of the adapter board and a first conductive connecting column and a second conductive connecting column penetrating the adapter board along the first direction, wherein the first conductive connecting column is electrically connected to the first welding pad, and the second conductive connecting column is electrically connected to the second welding pad;

[0042] A bonding dielectric layer and a first metal layer and a second metal layer penetrating the bonding dielectric layer along the first direction are formed on the second main surface of the adapter board, the first metal layer is electrically connected to the first conductive connection column, and the second metal layer is electrically connected to the second conductive connection column.

[0043] In some embodiments, the first and second solder pads located on the first main surface of the adapter board and the first and second conductive connecting columns penetrating the adapter board along the first direction are formed, the first conductive connecting column is electrically connected to the first solder pad, and the second conductive connecting column is electrically connected to the second solder pad. The specific steps include:

[0044] Provide adapter plate;

[0045] A first blind hole and a second blind hole are formed in the adapter plate and arranged along the second direction, and the first blind hole and the second blind hole both extend from the first main surface of the adapter plate to the inside of the adapter plate;

[0046] Forming a first conductive connection column in the first blind hole, forming a second conductive connection column in the second blind hole, and forming a first welding pad electrically connected to the first conductive connection column and a second welding pad electrically connected to the second conductive connection column on the first main surface of the adapter board;

[0047] The transfer plate is thinned to expose a surface of the first conductive connection column facing away from the first pad and a surface of the second conductive connection column facing away from the second pad.

[0048] In some embodiments, the second chip includes a front side and a back side that are relatively distributed along the first direction, and a functional area of ​​the second chip is located on the front side of the second chip; the specific steps of connecting the second chip to the second main surface of the adapter board and electrically connecting the first chip and the storage structure to the first main surface of the adapter board include:

[0049] Hybrid bonding the second chip to the transfer board in a direction where the front surface of the second chip faces the bonding medium layer;

[0050] The first chip and the storage structure are welded to the first main surface of the adapter board.

[0051] In some embodiments, before welding the first chip and the storage structure to the first main surface of the adapter board, the following steps are further included:

[0052] A third vertical interconnection structure and a fourth vertical interconnection structure are formed, both of which continuously penetrate the transfer board, the bonding medium layer and the second chip along the first direction, and the third vertical interconnection structure and the fourth vertical interconnection structure are arranged at intervals along the second direction.

[0053] In some embodiments, a third pad and a fourth pad are further provided on the first main surface of the adapter board; and the specific steps of forming a third vertical interconnect structure and a fourth vertical interconnect structure that continuously penetrate the adapter board, the bonding medium layer and the second chip along the first direction include:

[0054] A third conductive connection column is formed that sequentially passes through the second chip, the bonding medium layer and the adapter plate along the first direction and is electrically connected to the third pad, and a fourth conductive connection column is formed that sequentially passes through the second chip, the bonding medium layer and the adapter plate along the first direction and is electrically connected to the fourth pad, so as to form the third vertical interconnection structure including the third pad and the third conductive connection column, and to form the fourth vertical interconnection structure including the fourth pad and the fourth conductive connection column.

[0055] In some embodiments, the specific steps of forming a third conductive connection column that sequentially penetrates the second chip, the bonding medium layer, and the adapter plate along the first direction and is electrically connected to the third pad, and forming a fourth conductive connection column that sequentially penetrates the second chip, the bonding medium layer, and the adapter plate along the first direction and is electrically connected to the fourth pad include:

[0056] Etching begins from the surface of the second chip facing away from the adapter board to form a first through hole that sequentially penetrates the second chip, the bonding medium layer, and the adapter board along the first direction and exposes the third pad, and forming a second through hole that sequentially penetrates the second chip, the bonding medium layer, and the adapter board along the first direction and exposes the fourth pad;

[0057] A conductive material is filled in the first through hole and the second through hole, the third conductive connection column is formed in the first through hole, and the fourth conductive connection column is formed in the second through hole.

[0058] In some embodiments, before welding the first chip and the storage structure to the first main surface of the adapter board, the following steps are further included:

[0059] A first lead-out solder ball is formed on a surface of the third conductive connection column facing away from the third bonding pad, and a second lead-out solder ball is formed on a surface of the fourth conductive connection column facing away from the fourth bonding pad.

[0060] In some embodiments, a fifth pad and a sixth pad electrically connected to the adapter board are further provided on the first main surface of the adapter board; and the specific steps of welding the first chip and the storage structure to the first main surface of the adapter board include:

[0061] forming a first internal interconnection solder ball, a third internal interconnection solder ball, and a fifth internal interconnection solder ball on the surface of the first chip, and forming a second internal interconnection solder ball, a fourth internal interconnection solder ball, and a sixth internal interconnection solder ball on the surface of the memory structure;

[0062] The first chip and the storage structure are welded to the first main surface of the adapter board, so that the first internal interconnection solder ball on the first chip is welded to the first welding pad, the third internal interconnection solder ball is welded to the third welding pad, and the fifth internal interconnection solder ball is welded to the fifth welding pad, and the second internal interconnection solder ball on the storage structure is welded to the second welding pad, the fourth internal interconnection solder ball is welded to the fourth welding pad, and the sixth internal interconnection solder ball is welded to the sixth welding pad.

[0063] In some embodiments, a surface of the first chip facing away from the interposer is flush with a surface of the storage structure facing away from the interposer.

[0064] In some embodiments, after welding the first chip and the storage structure to the first main surface of the adapter board, the following steps are further included:

[0065] A plastic encapsulation layer for continuously encapsulating the first chip and the storage structure is formed on the first main surface of the adapter board, wherein the plastic encapsulation layer exposes a surface of the first chip facing away from the adapter board and a surface of the storage structure facing away from the adapter board.

[0066] In some embodiments, after forming a plastic encapsulation layer that continuously encapsulates the first chip and the storage structure on the first main surface of the adapter board, the following steps are further included:

[0067] A first lead-out solder ball is formed on a surface of the third conductive connection column facing away from the third bonding pad, and a second lead-out solder ball is formed on a surface of the fourth conductive connection column facing away from the fourth bonding pad.

[0068] The packaging structure and the method for forming the same provided by the present invention, by mounting the first chip and the storage structure on the first main surface of the adapter board, and arranging the second chip on the second main surface of the adapter board, and the projection of the second chip on the second main surface covers the projection of the first chip on the second main surface and the projection of the storage structure on the second main surface, not only realizes the integration of multiple chips and the storage structure in a limited space, improves the integration and scalability of the packaging structure, and expands the function of the packaging structure, but also arranges the second chip with the largest area on the second main surface, effectively saving the area of ​​the entire packaging structure, thereby helping to further reduce the size of the packaging structure. At the same time, the present invention arranges the first chip and the second chip on opposite sides of the adapter board, so that heat can be dissipated from opposite sides of the adapter board respectively, improving the overall heat dissipation performance of the packaging structure, and helping to further extend the service life of the packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0069] Figure 1 is a structural schematic diagram of a packaging structure in a specific implementation manner of the present invention;

[0070] Figure 2 is a schematic diagram of the structure of the adapter board before the first chip and the storage structure are mounted in a specific embodiment of the present invention;

[0071] Figure 3 is a flow chart of a method for forming a packaging structure in a specific embodiment of the present invention;

[0072] Figure 4 is a schematic diagram of the structure of the adapter board in a specific implementation manner of the present invention;

[0073] Figure 5 is a schematic diagram of a structure after a first vertical interconnection structure and a second vertical interconnection structure are formed in a specific embodiment of the present invention;

[0074] Figure 6 is a schematic diagram of the structure after the second chip is bonded to the second main surface of the adapter board in a specific embodiment of the present invention;

[0075] Figure 7 is a schematic diagram of the structure after the first through hole and the second through hole are formed in a specific embodiment of the present invention;

[0076] Figure 8 is a schematic diagram of a structure after a third vertical interconnection structure and a fourth vertical interconnection structure are formed in a specific embodiment of the present invention;

[0077] Fig. 9 is a schematic diagram of the structure of a first chip in a specific implementation manner of the present invention;

[0078] Fig.10 is a structural schematic diagram of a storage structure in a specific implementation manner of the present invention;

[0079] Fig.11 It is a schematic diagram of the structure after mounting the first chip and the storage structure on the first main surface of the adapter board in a specific embodiment of the present invention. DETAILED DESCRIPTION

[0080] The specific implementation manner of the packaging structure and the method for forming the same provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0081] This specific embodiment provides a packaging structure. Figure 1 is a schematic diagram of a packaging structure in a specific embodiment of the present invention, Figure 2 1 is a schematic diagram of the structure of the adapter board before the first chip and the storage structure are mounted in a specific embodiment of the present invention. Figure 1 and Figure 2 As shown, the packaging structure includes:

[0082] The adapter plate 10 comprises a first main surface and a second main surface which are oppositely distributed along a first direction D1;

[0083] A first chip 11 is located on the first main surface of the adapter board 10, and the first chip 11 is electrically connected to the adapter board 10;

[0084] A storage structure 13 is located on the first main surface of the adapter board 10, and the storage structure 13 is electrically connected to the adapter board 10. The storage structure 13 and the first chip 11 are arranged along a second direction D2, and the second direction D2 intersects the first direction D1 perpendicularly;

[0085] The second chip 12 is located on the second main surface of the adapter board 10, and the second chip 12 is electrically connected to the adapter board 10, and the projection of the second chip 12 on the second main surface covers the projection of the first chip 11 on the second main surface and the projection of the storage structure 13 on the second main surface.

[0086] Specifically, the adapter board 10 includes an adapter board body and a circuit layer 101 located in the adapter board body, the top surface of the adapter board body serves as the first main surface of the adapter board 10, and the bottom surface of the adapter board body serves as the second main surface of the adapter board 10. The material of the adapter board body may be silicon, glass or an organic polymer material. The circuit layer 101 is a high-density wiring layer arranged inside the adapter board body. The material of the circuit layer 101 may be a metal conductive material such as copper. In one example, the adapter board body includes multiple insulating dielectric layers stacked in sequence along the first direction D1, and the circuit layer 101 is distributed in the multiple insulating dielectric layers. The first chip 11 and the storage structure 13 are mounted on the first main surface of the adapter board 10, and the storage structure 13 and the first chip 11 are arranged along the second direction D2, that is, the storage structure 13 and the first chip 11 are laid flat on the first main surface of the adapter board 10. The second chip 12 is mounted on the second main surface of the adapter board 10, that is, the first chip 11 and the second chip 12 are arranged in a vertical direction. In one example, the first chip 11 is flip-mounted on the first main surface of the adapter board 10, that is, the functional surface of the first chip 11 faces the first main surface of the adapter board 10.

[0087] In some embodiments, the storage structure 13 is a high bandwidth memory (HBM). For example, the storage structure 13 includes a plurality of storage chips 131 stacked in sequence along the first direction D1 and a conductive connection structure 132 located between adjacent storage chips 131, and the conductive connection structure 132 is used to electrically connect adjacent storage chips 131. The storage chip 131 may be a DRAM (Dynamic Random Access Memory).

[0088] In this specific embodiment, by dissipating the second chip 12 on the side of the adapter board 10 away from the first chip 11, the first chip 11 and the storage structure 13 can be cooled from one side of the adapter board 10 along the first direction D1, and the second chip 12 can be cooled from the other side of the adapter board 10 along the first direction D1, thereby improving the overall heat dissipation performance of the packaging structure and helping to further extend the service life of the packaging structure. At the same time, since the projection of the second chip 12 on the second main surface covers the projection of the first chip 11 on the second main surface and the projection of the storage structure 13 on the second main surface (that is, the area of ​​the second chip 12 is greater than or equal to the sum of the area of ​​the first chip 11 and the area of ​​the storage structure 13), that is, the second chip 12 with a larger area is arranged on the side of the adapter board 10 away from the first chip 11 with a smaller area. On the one hand, the horizontal area of ​​the packaging structure can be reduced, so that the storage structure 13 and multiple chips can be integrated in a limited space, thereby improving the integration of the packaging structure and expanding the function of the packaging structure; on the other hand, the second chip 12 acts as an area carrier, and the second chip 12 and the adapter board 10 jointly carry the first chip 11 and the storage structure 13 located above the adapter board 10, which also helps to reduce deformation such as bending of the adapter board 10, thereby further improving the performance of the packaging structure.

[0089] In order to further improve the integration of the packaging structure, in one example, the packaging structure further includes a third chip located on the first main surface of the adapter board 10, and the first chip 11, the third chip and the storage structure 13 are arranged in a direction parallel to the first main surface, that is, the first chip 11, the third chip and the storage structure 13 are laid flat on the first main surface of the adapter board 10, and the projection of the second chip 12 on the second main surface continuously covers the projection of the first chip 11 on the second main surface, the projection of the third chip on the second main surface and the projection of the storage structure 13 on the second main surface. The first chip 11 and the third chip may be chips with the same structure and function; or the first chip 11 and the third chip may have different structures and functions.

[0090] In another example, the packaging structure also includes a fourth chip located on the first main surface of the adapter board 10, and the fourth chip is mounted on the surface of the first chip 11 facing away from the adapter board 10 along the first direction D1, and the fourth chip is electrically connected to the first chip 11 and / or the adapter board 10, and the surface of the fourth chip facing away from the first chip 11 is flush with the surface of the storage structure 13 facing away from the adapter board 10, so as to improve the overall flatness of the packaging structure while improving the heat dissipation performance of the packaging structure.

[0091] In other embodiments, the packaging structure can be provided with multiple functional chips and multiple storage structures on the first main surface of the adapter board 10, and at least a part of the functional chips and a part of the storage structures are laid flat on the first main surface of the adapter board 10, and the projection of the second chip 12 on the second main surface continuously covers the projections of all the functional chips on the second main surface and the projections of all the storage structures on the second main surface, so as to further improve the integration of the packaging structure and expand the functions of the packaging structure.

[0092] In some embodiments, the second chip 12 includes a front side and a back side that are oppositely distributed along the first direction D1, and the functional area 121 of the second chip 12 is located on the front side of the second chip 12;

[0093] The second chip 12 is hybrid-bonded on the second main surface of the transfer board 10 , and the front surface of the second chip 12 faces the transfer board 10 .

[0094] Specifically, mounting the second chip 12 on the second main surface of the adapter board 10 by hybrid bonding not only helps to simplify the manufacturing process of the packaging structure, but also can reduce the size of the packaging structure along the first direction D1, thereby facilitating further miniaturization of the packaging structure. The functional area 121 of the second chip 12 faces the adapter board 10, which helps to shorten the connection distance between the second chip 12 and the adapter board 10 and the first chip 11 and the storage structure 13, thereby further simplifying the process of the packaging structure. Moreover, facing the functional area 121 of the second chip 12 toward the adapter board 10 also helps to protect the functional area 121 and prevent subsequent processes from causing damage to the functional area 121. In one example, the functional area 121 can be exposed on the surface of the second chip 12 facing the adapter board 10.

[0095] In some embodiments, the packaging structure further includes:

[0096] A first vertical interconnection structure, penetrating the adapter board 10 at least along the first direction D1, wherein one end of the first vertical interconnection structure is electrically connected to the first chip 11, and the other end of the first vertical interconnection structure is electrically connected to the second chip 12;

[0097] The second vertical interconnection structure penetrates the adapter board 10 at least along the first direction D1 , and one end of the second vertical interconnection structure is electrically connected to the storage structure 13 , and the other end of the second vertical interconnection structure is electrically connected to the second chip 12 .

[0098] In some embodiments, the first vertical interconnect structure includes a first conductive connection column 151 that penetrates the adapter board 10 along the first direction D1, a first solder pad 201 located on the side of the first conductive connection column 151 facing the first chip 11, a first internal interconnect solder ball 211 located on the first solder pad 201, and a first metal layer 171 located on the side of the first conductive connection column 151 facing the second chip 12, and the first internal interconnect solder ball 211 is electrically connected to the first chip 11;

[0099] The second vertical interconnection structure includes a second conductive connecting column 152 that penetrates the adapter board 10 along the first direction D1, a second solder pad 202 located on the side of the second conductive connecting column 152 facing the storage structure 13, a second internal interconnection solder ball 212 located on the second solder pad 202, and a second metal layer 172 located on the side of the second conductive connecting column 152 facing the second chip 12, and the second internal interconnection solder ball 212 is electrically connected to the storage structure 13.

[0100] In some embodiments, the adapter board 10 includes an adapter board body and a circuit layer 101 located in the adapter board body, the circuit layer 101 is a high-density wiring layer, and the circuit layer 101 is electrically connected to the first vertical interconnection structure and the second vertical interconnection structure respectively.

[0101] In one example, the packaging structure further includes a bonding dielectric layer 19 covering the second main surface of the adapter board 10, and the first metal layer 171 and the second metal layer 172 are located in the bonding dielectric layer 19. The second chip 12 is bonded to the bonding dielectric layer 19, the first metal layer 171 and the second metal layer 172 by hybrid bonding.

[0102] By setting the first vertical interconnection structure, the electrical interconnection between the first chip 11 and the second chip 12 can be realized, that is, the first chip 11 is electrically connected to the second chip 12 through the first internal interconnection solder ball 211, the first pad 201, the first conductive connection column 151 and the first metal layer 171 in sequence, so as to realize the transmission of electrical signals between the first chip 11 and the second chip 12, so as to expand the function of the package structure. By setting the second vertical interconnection structure, the electrical interconnection between the storage structure 13 and the second chip 12 can be realized, that is, the storage structure 13 is electrically connected to the second chip 12 through the second internal interconnection solder ball 212, the second pad 202, the second conductive connection column 152 and the second metal layer 172 in sequence, so as to realize the transmission of signals between the storage structure 13 and the second chip 12, so as to further expand the function of the package structure. In one example, the second chip 12 also includes a peripheral area distributed around the periphery of the functional area 121, and the peripheral area has a wiring layer, and the wiring layer electrically connects the first metal layer 171 and the functional area and the second metal layer 172.

[0103] In some embodiments, the packaging structure further includes:

[0104] A third vertical interconnection structure continuously penetrates the adapter board 10 and the second chip 12 at least along the first direction D1, and the third vertical interconnection structure is electrically connected to the first chip 11;

[0105] The fourth vertical interconnection structure continuously penetrates the adapter board 10 and the second chip 12 at least along the first direction D1, and the fourth vertical interconnection structure is electrically connected to the storage structure 13.

[0106] In some embodiments, the third vertical interconnect structure includes a third conductive connection column 161 that penetrates the adapter board 10, the bonding medium layer 19 and the second chip 12 along the first direction D1, a third solder pad 203 located on the side of the third conductive connection column 161 facing the first chip 11, a third internal interconnect solder ball 213 located on the third solder pad 203, and a first lead solder ball 141 located on the surface of the second chip 12 on the side away from the adapter board 10;

[0107] The fourth vertical interconnection structure includes a fourth conductive connecting column 162 that penetrates the adapter board 10, the bonding medium layer 19 and the second chip 12 along the first direction D1, a fourth solder pad 204 located on the side of the fourth conductive connecting column 162 facing the storage structure 13, a fourth internal interconnection solder ball 214 located on the fourth solder pad 204, and a second lead-out solder ball 142 located on the surface of the second chip 12 on the side away from the adapter board 10.

[0108] Specifically, the third vertical interconnect structure can lead out the signal in the first chip 11 or transmit a control signal to the first chip 11, for example, the signal in the first chip 11 is led out through the third internal interconnect solder ball 213, the third solder pad 203, the third conductive connection column 161 and the first lead solder ball 141 in sequence, so as to facilitate the individual control of the first chip 11, so as to further expand the function of the packaging structure. The fourth vertical interconnect structure can lead out the signal in the storage structure 13 or transmit a control signal to the storage structure 13, for example, the signal in the storage structure is led out through the fourth internal interconnect solder ball 214, the fourth solder pad 204, the fourth conductive connection column 162 and the second lead solder ball 142 in sequence, so as to facilitate the individual control of the storage structure 13, so as to further expand the function of the packaging structure.

[0109] In order to further simplify the manufacturing process of the packaging structure and reduce the difficulty of the manufacturing process of the packaging structure, in some embodiments, along the second direction D2, the first vertical interconnection structure, the second vertical interconnection structure, the third vertical interconnection structure and the fourth vertical interconnection structure are designed with appropriate positions according to different requirements. In one example, the circuit layer 101 is located in the middle of the adapter board 10, the first vertical interconnection structure and the second vertical interconnection structure are distributed on opposite sides of the circuit layer 101 in the adapter board 10 along the second direction D2, the third vertical interconnection structure is located on the side of the first vertical interconnection structure away from the circuit layer 101 along the second direction D2, and the fourth vertical interconnection structure is located on the side of the second vertical interconnection structure away from the circuit layer 101 along the second direction D2. In another example, the circuit layer 101 is located in the middle of the adapter board 10, the first vertical interconnection structure and the second vertical interconnection structure are located on the same side of the circuit layer 101 in the adapter board 10, the third vertical interconnection structure and the fourth vertical interconnection structure are located on the same side of the circuit layer 101 in the adapter board 10, and the first vertical interconnection structure and the third vertical interconnection structure are distributed on opposite sides of the circuit layer 101 along the second direction D2, and the second vertical interconnection structure and the fourth vertical interconnection structure are distributed on opposite sides of the circuit layer 101 along the second direction D2.

[0110] In some embodiments, the packaging structure further includes:

[0111] A first internal interconnect structure, comprising a fifth pad 205 located on the first main surface of the adapter board 10 and a fifth internal interconnect solder ball 215 located on the fifth pad 205, wherein the fifth pad 205 is electrically connected to the adapter board 10, and the fifth internal interconnect solder ball 215 is electrically connected to the first chip 11;

[0112] The second internal interconnect structure includes a sixth solder pad 206 located on the first main surface of the adapter board 10 and a sixth internal interconnect solder ball 216 located on the sixth solder pad 206 , the sixth solder pad 206 is electrically connected to the adapter board 10 , and the sixth internal interconnect solder ball 216 is electrically connected to the storage structure 13 .

[0113] For example, the electrical connection between the first chip 11 and the circuit layer 101 in the adapter board 10 is realized through the fifth pad 205 and the fifth internal interconnection solder ball 215, and the electrical connection between the storage structure 13 and the circuit layer 101 in the adapter board 10 is realized through the sixth pad 206 and the sixth internal interconnection solder ball 216. Specifically, the fifth pad 205 and the sixth pad 206 are directly disposed on the first main surface of the adapter board 10, and the circuit layer 101 is electrically connected to the first chip 11 through the fifth pad 205, and the circuit layer 101 is electrically connected to the storage structure 13 through the sixth pad 206.

[0114] Since the first chip 11 is electrically connected to the second chip 12 through the first vertical interconnection structure, the first chip 11 is electrically connected to the circuit layer 101 in the adapter board 10 through the first internal interconnection structure, the storage structure 13 is electrically connected to the second chip 12 through the second vertical interconnection structure, and the storage structure is electrically connected to the circuit layer 101 in the adapter board 10 through the second internal interconnection structure, the electrical connection between the second chip 12 and the adapter board 10 can be achieved through the first vertical interconnection structure, the first chip 11 and the first internal interconnection structure, and the electrical connection between the second chip 12 and the adapter board 10 can be achieved through the second vertical interconnection structure, the storage structure 13 and the second internal interconnection structure, without setting an electrical connection line that directly electrically connects the second chip 12 and the adapter board 10, thereby helping to further optimize the line setting inside the packaging structure and reduce the parasitic capacitance effect inside the packaging structure.

[0115] In some embodiments, the packaging structure further includes:

[0116] The plastic encapsulation layer 18 is located on the first main surface of the adapter board 10 , and the plastic encapsulation layer 18 continuously encapsulates the first chip 11 and the storage structure 13 .

[0117] In some embodiments, a surface of the first chip 11 facing away from the adapter board 10 along the first direction D1 is flush with a surface of the storage structure 13 facing away from the adapter board 10 along the first direction D1.

[0118] In some embodiments, the plastic encapsulation layer 18 exposes a surface of the first chip 11 facing away from the adapter board 10 and a surface of the storage structure 13 facing away from the adapter board 10 .

[0119] In one example, by making the surface of the first chip 11 facing away from the adapter board 10 flush with the surface of the storage structure 13 facing away from the adapter board 10, the surface of the first chip 11 facing away from the adapter board 10 and the surface of the storage structure 13 facing away from the adapter board 10 can be exposed through the plastic encapsulation layer 18, so as to dissipate heat for the first chip 11 and the storage structure 13. The material of the plastic encapsulation layer 18 can be epoxy resin molding compound, silicone molding compound, polyimide molding compound or phenolic resin molding compound.

[0120] This specific embodiment also provides a method for forming a packaging structure. Figure 3 is a flow chart of a method for forming a packaging structure in a specific embodiment of the present invention. The schematic diagram of the packaging structure formed in this specific embodiment can be seen in Figure 1 and Figure 2 .like Figure 1-Figure 3 As shown, the method for forming the packaging structure includes the following steps:

[0121] Step S31, forming an adapter plate 10, wherein the adapter plate 10 includes a first main surface and a second main surface that are oppositely distributed along a first direction D1;

[0122] Step S32, connecting the second chip 12 to the second main surface of the adapter board 10, and electrically connecting the first chip 11 and the storage structure 13 to the first main surface of the adapter board 10, the storage structure 13 and the first chip 11 are arranged along the second direction D2, the first chip 11, the second chip 12 and the storage structure 13 are all electrically connected to the adapter board 10, the projection of the second chip 12 on the second main surface covers the projection of the first chip 11 on the second main surface and the projection of the storage structure 13 on the second main surface, and the second direction D2 intersects the first direction D1 at right angles.

[0123] In order to further increase the integration of the packaging structure, in some embodiments, the specific steps of connecting the second chip 12 to the second main surface of the adapter board 10 and electrically connecting the first chip 11 and the storage structure 13 to the first main surface of the adapter board 10 include:

[0124] The second chip 12 is connected to the second main surface of the adapter board 10, and the first chip 11, the third chip and the storage structure 13 are electrically connected to the first main surface of the adapter board 10, the first chip 11, the third chip and the storage structure 13 are arranged in a direction parallel to the first main surface, and the projection of the second chip 12 on the second main surface continuously covers the projection of the first chip 11 on the second main surface, the projection of the third chip on the second main surface and the projection of the storage structure 13 on the second main surface.

[0125] Figure 4 is a schematic diagram of the structure of the adapter board in a specific embodiment of the present invention, Figure 5 1 is a schematic diagram of a structure after forming the first vertical interconnection structure and the second vertical interconnection structure in a specific embodiment of the present invention. In some embodiments, before connecting the second chip 12 to the second main surface of the adapter board 10 and electrically connecting the first chip 11 and the storage structure 13 to the first main surface of the adapter board 10, the following steps are also included:

[0126] A first soldering pad 201 and a second soldering pad 202 are formed on the first main surface of the adapter board 10, and a first conductive connecting column 151 and a second conductive connecting column 152 are formed that penetrate the adapter board 10 along the first direction D1, wherein the first conductive connecting column 151 is electrically connected to the first soldering pad 201, and the second conductive connecting column 152 is electrically connected to the second soldering pad 202;

[0127] A bonding dielectric layer 19 and a first metal layer 171 and a second metal layer 172 penetrating the bonding dielectric layer along the first direction D1 are formed on the second main surface of the adapter board 10 . The first metal layer 171 is electrically connected to the first conductive connecting column 151 , and the second metal layer 172 is electrically connected to the second conductive connecting column 152 .

[0128] In some embodiments, the first pad 201 and the second pad 202 are formed on the first main surface of the adapter board 10, and the first conductive connection column 151 and the second conductive connection column 152 are formed along the first direction D1 to penetrate the adapter board 10, and the first conductive connection column 151 is electrically connected to the first pad 201, and the second conductive connection column 152 is electrically connected to the second pad 202. The specific steps include:

[0129] Providing an adapter plate 10;

[0130] A first blind hole and a second blind hole are formed in the adapter plate 10 and arranged along the second direction D2, and the first blind hole and the second blind hole both extend from the first main surface of the adapter plate 10 to the inside of the adapter plate;

[0131] A first conductive connection column 151 is formed in the first blind hole, a second conductive connection column 152 is formed in the second blind hole, and a first soldering pad 201 electrically connected to the first conductive connection column 151 and a second soldering pad 202 electrically connected to the second conductive connection column 152 are formed on the first main surface of the adapter board 10;

[0132] The adapter plate 10 is thinned to expose the surface of the first conductive connection column 151 facing away from the first pad 201 and the surface of the second conductive connection column 152 facing away from the second pad 202 .

[0133] For example, the adapter board 10 is provided, and the adapter board includes an adapter board body and the circuit layer 101 inside the adapter board body. The top surface of the adapter board body is used as the first main surface of the adapter board 10, and a first blind hole and a second blind hole extending along the first direction D1 are formed from the first main surface into the adapter board body, a first conductive connection column 151 is formed in the first blind hole, and a second conductive connection column 152 is formed in the second blind hole, and a plurality of welding pads are formed on the first main surface of the adapter board 10, and part of the welding pads located on one side of the circuit layer 101 along the second direction D2 are used as the first welding pads 201, and part of the welding pads located on the other side of the circuit layer 101 along the second direction D2 are used as the second welding pads 202, the first welding pads 201 are in contact with and electrically connected to the first conductive connection column 151, and the second welding pads 202 are in contact with and electrically connected to the second conductive connection column 152, as shown in FIG. Figure 4 As shown. The adapter board body is thinned to expose the surface of the first conductive connection column 151 away from the first solder pad 201 and the surface of the second conductive connection column 152 away from the second solder pad 202, and the surface of the adapter board body away from the first solder pad 201 after thinning is used as the second main surface of the adapter board 10. The method of exposing the surface of the first conductive connection column 151 and the surface of the second conductive connection column 152 can be BVR (Backside Via Reveal) or BFR (Backside via Flatness Reveal). Then, a bonding dielectric layer 19 and a first metal layer 171 and a second metal layer 172 that penetrate the bonding dielectric layer along the first direction D1 are formed on the second main surface of the adapter board 10, the first metal layer 171 is in contact and electrically connected with the first conductive connection column 151, and the second metal layer 172 is in contact and electrically connected with the second conductive connection column 152, as shown. Figure 5 shown.

[0134] Figure 61 is a schematic diagram of the structure after bonding the second chip to the second main surface of the adapter board in a specific embodiment of the present invention. In some embodiments, the second chip 12 includes a front side and a back side that are relatively distributed along the first direction, and the functional area 121 of the second chip 12 is located on the front side of the second chip; the specific steps of connecting the second chip 12 to the second main surface of the adapter board 10 and electrically connecting the first chip 11 and the storage structure 13 to the first main surface of the adapter board 10 include:

[0135] The second chip 12 and the transfer board 10 are hybrid-bonded in a direction where the front surface of the second chip 12 faces the bonding medium layer 19. Figure 6 As shown, the second chip 12 is bonded and electrically connected to the first metal layer 171 and the second metal layer 172;

[0136] The first chip 11 and the storage structure 13 are welded to the first main surface of the adapter board 10 .

[0137] Figure 7 is a schematic diagram of the structure after the first through hole and the second through hole are formed in a specific embodiment of the present invention, Figure 8 1 is a schematic diagram of a structure after forming the third vertical interconnection structure and the fourth vertical interconnection structure in a specific embodiment of the present invention. In some embodiments, before welding the first chip 11 and the storage structure 13 to the first main surface of the adapter board 10, the following steps are also included:

[0138] A third vertical interconnection structure and a fourth vertical interconnection structure are formed which continuously penetrate the transfer board 10, the bonding medium layer 19 and the second chip 12 along the first direction D1, and the third vertical interconnection structure and the fourth vertical interconnection structure are arranged at intervals along the second direction D2.

[0139] In some embodiments, a third pad 203 and a fourth pad 204 are further provided on the first main surface of the adapter board 10; the specific steps of forming a third vertical interconnection structure and a fourth vertical interconnection structure that continuously penetrate the adapter board 10, the bonding medium layer 19 and the second chip 12 along the first direction D1 include:

[0140] A third conductive connection column 161 is formed along the first direction D1, which sequentially passes through the second chip 12, the bonding medium layer 19 and the adapter board 10 and is electrically connected to the third pad 203, and a fourth conductive connection column 162 is formed along the first direction D1, which sequentially passes through the second chip 12, the bonding medium layer 19 and the adapter board 10 and is electrically connected to the fourth pad 204, so as to form the third vertical interconnection structure including the third pad and the third conductive connection column, and to form the fourth vertical interconnection structure including the fourth pad and the fourth conductive connection column.

[0141] In some embodiments, the specific steps of forming a third conductive connection column 161 that sequentially penetrates the second chip 12, the bonding medium layer 19, and the adapter board 10 along the first direction D1 and is electrically connected to the third pad 203, and forming a fourth conductive connection column 162 that sequentially penetrates the second chip 12, the bonding medium layer 19, and the adapter board 10 along the first direction D1 and is electrically connected to the fourth pad 204 include:

[0142] Etching is started from the surface of the second chip 12 away from the adapter board 10 to form a first through hole 71 that sequentially penetrates the second chip 12, the bonding dielectric layer 19 and the adapter board 10 along the first direction D1 and exposes the third pad 203, and a second through hole 72 that sequentially penetrates the second chip 12, the bonding dielectric layer 19 and the adapter board 10 along the first direction D1 and exposes the fourth pad 204 is formed. Figure 7 As shown;

[0143] Fill the first through hole 71 and the second through hole 72 with conductive material, form the third conductive connection column 161 in the first through hole 71, and form the fourth conductive connection column 162 in the second through hole 72. Figure 8 shown.

[0144] In some embodiments, before welding the first chip 11 and the storage structure 13 to the first main surface of the adapter board 10, the following steps are further included:

[0145] A first lead solder ball 141 is formed on a surface of the third conductive connection column 161 away from the third pad 203, and a second lead solder ball 142 is formed on a surface of the fourth conductive connection column 162 away from the fourth pad 204. Figure 8 shown.

[0146] Fig. 9 is a schematic diagram of the structure of the first chip in a specific embodiment of the present invention, Fig.10 is a schematic diagram of a storage structure in a specific embodiment of the present invention, Fig.11 1 is a schematic diagram of the structure after mounting the first chip and the storage structure on the first main surface of the adapter board in a specific embodiment of the present invention. In some embodiments, the first main surface of the adapter board 10 is also provided with a fifth pad 205 and a sixth pad 206 electrically connected to the adapter board 10; the specific steps of welding the first chip 11 and the storage structure 13 to the first main surface of the adapter board 10 include:

[0147] A first internal interconnection solder ball 211, a third internal interconnection solder ball 213 and a fifth internal interconnection solder ball 215 (eg, Fig. 9 As shown), a second internal interconnect solder ball 212, a fourth internal interconnect solder ball 214 and a sixth internal interconnect solder ball 216 are formed on the surface of the storage structure 13 (as shown in FIG. Fig.10 shown);

[0148] The first chip 11 and the storage structure are welded to the first main surface of the adapter board 10, so that the first internal interconnection solder ball 211 on the first chip 11 is welded to the first welding pad 201, the third internal interconnection solder ball 213 is welded to the third welding pad 203, and the fifth internal interconnection solder ball 215 is welded to the fifth welding pad 205, and the second internal interconnection solder ball 212 on the storage structure 13 is welded to the second welding pad 202, the fourth internal interconnection solder ball 214 is welded to the fourth welding pad 204, and the sixth internal interconnection solder ball 216 is welded to the sixth welding pad 206, as shown in FIG. Fig.11 shown.

[0149] In some embodiments, a surface of the first chip 11 facing away from the adapter board 10 is flush with a surface of the storage structure 13 facing away from the adapter board 10 .

[0150] In some embodiments, after welding the first chip 11 and the storage structure 13 to the first main surface of the adapter board 10, the following steps are further included:

[0151] A plastic encapsulation layer 18 is formed on the first main surface of the adapter board 10 to continuously encapsulate the first chip 11 and the storage structure 13. The plastic encapsulation layer 18 exposes the surface of the first chip 11 facing away from the adapter board 10 and the surface of the storage structure 13 facing away from the adapter board 10. Figure 1 shown.

[0152] For example, after the second chip 12 is mixedly bonded with the bonding medium layer 19, the first metal layer 171 and the second metal layer 172 in a direction in which the front surface of the second chip 12 faces the adapter board 10, the following is obtained: Figure 6Next, etching is started from the surface of the second chip 12 facing away from the adapter board 10 (i.e., the back side of the second chip 12) to form a first through hole 71 and a second through hole 72 that continuously penetrate the second chip 12 and the adapter board 10 along the first direction D1, as shown in FIG. Figure 7 Fill the first through hole and the second through hole with conductive materials such as copper or tungsten to form the third conductive connecting column 161 and the fourth conductive connecting column 162, as shown. Figure 8 Then, a first lead solder ball 141 is formed on the surface of the third conductive connection column 161 away from the third pad 203, and a second lead solder ball 142 is formed on the surface of the fourth conductive connection column 162 away from the fourth pad 204, as shown. Figure 8 Next, the first chip 11 formed with the first internal interconnection solder balls 211, the third internal interconnection solder balls 213, and the fifth internal interconnection solder balls 215 is welded to the first main surface of the adapter board 10, and the storage structure 13 formed with the second internal interconnection solder balls 212, the fourth internal interconnection solder balls 214, and the sixth internal interconnection solder balls 216 is welded to the first main surface of the adapter board 10, as shown. Fig.11 Afterwards, the first chip 11 and the storage structure 13 are encapsulated with an epoxy resin or other encapsulating material to form the encapsulating layer 18, as shown. Figure 1 The plastic encapsulation layer 18 exposes the surface of the first chip 11 facing away from the adapter board 10 and the surface of the storage structure 13 facing away from the adapter board 10 , so as to dissipate heat for the first chip 11 and the storage structure 13 .

[0153] This specific embodiment is described by taking the formation of the first lead solder ball and the second lead solder ball before mounting the first chip and the storage structure on the first main surface of the adapter board as an example. In other specific embodiments, after forming the plastic sealing layer 18 that continuously plastic seals the first chip 11 and the storage structure 13 on the first main surface of the adapter board 10, the following steps are also included:

[0154] A first lead-out solder ball 141 is formed on a surface of the third conductive connecting column 161 away from the third bonding pad 203 , and a second lead-out solder ball 142 is formed on a surface of the fourth conductive connecting column 162 away from the fourth bonding pad 204 .

[0155] Specifically, after mounting the first chip 11 and the storage structure 13 and forming the plastic encapsulation layer 18, a first lead-out solder ball 141 is formed on the surface of the third conductive connection column 161 away from the third pad 203, and a second lead-out solder ball 142 is formed on the surface of the fourth conductive connection column 162 away from the fourth pad 204. This can prevent the first lead-out solder ball 141 and the second lead-out solder ball 141 from being affected by the plastic encapsulation process and the mounting process of the first chip and the storage structure.

[0156] The packaging structure and the method for forming the same provided in this specific embodiment, by mounting the first chip and the storage structure on the first main surface of the adapter board, and arranging the second chip on the second main surface of the adapter board, and the projection of the second chip on the second main surface covers the projection of the first chip on the second main surface and the projection of the storage structure on the second main surface, not only realizes the integration of multiple chips and the storage structure in a limited space, improves the integration and scalability of the packaging structure, and expands the function of the packaging structure, but also arranges the second chip with the largest area on the second main surface, effectively saving the area of ​​the entire packaging structure, thereby helping to further reduce the size of the packaging structure. At the same time, this specific embodiment arranges the first chip and the second chip on opposite sides of the adapter board, so that heat can be dissipated from opposite sides of the adapter board respectively, improving the overall heat dissipation performance of the packaging structure, and helping to further extend the service life of the packaging structure.

[0157] The above is only a preferred embodiment of the present invention. It should be pointed out that ordinary technicians in this technical field can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A packaging structure, characterized in that: include: The adapter plate comprises a first main surface and a second main surface which are oppositely distributed along a first direction; A first chip is located on the first main surface of the adapter board, and the first chip is electrically connected to the adapter board; a storage structure, located on the first main surface of the adapter board, the storage structure being electrically connected to the adapter board, the storage structure and the first chip being arranged along a second direction, the second direction being perpendicular to the first direction; The second chip is located on the second main surface of the adapter board, and the second chip is electrically connected to the adapter board, and the projection of the second chip on the second main surface covers the projection of the first chip on the second main surface and the projection of the storage structure on the second main surface.

2. The packaging structure according to claim 1, characterized in that: The second chip comprises a front side and a back side which are oppositely distributed along the first direction, and a functional area of ​​the second chip is located on the front side of the second chip; The second chip is hybrid-bonded on the second main surface of the adapter board, and the front surface of the second chip faces the adapter board.

3. The packaging structure according to claim 1, characterized in that: Also includes: A first vertical interconnection structure, penetrating the adapter board at least along the first direction, wherein one end of the first vertical interconnection structure is electrically connected to the first chip, and the other end of the first vertical interconnection structure is electrically connected to the second chip; The second vertical interconnection structure penetrates the adapter board at least along the first direction, and one end of the second vertical interconnection structure is electrically connected to the storage structure, and the other end is electrically connected to the second chip.

4. The packaging structure according to claim 3, characterized in that: The first vertical interconnect structure includes a first conductive connection column penetrating the adapter board along the first direction, a first solder pad located on the side of the first conductive connection column facing the first chip, a first internal interconnect solder ball located on the first solder pad, and a first metal layer located on the side of the first conductive connection column facing the second chip, the first internal interconnect solder ball being electrically connected to the first chip; The second vertical interconnection structure includes a second conductive connecting column passing through the adapter board along the first direction, a second solder pad located on the side of the second conductive connecting column facing the storage structure, a second internal interconnection solder ball located on the second solder pad, and a second metal layer located on the side of the second conductive connecting column facing the second chip, and the second internal interconnection solder ball is electrically connected to the storage structure.

5. The packaging structure according to claim 4, characterized in that: Also includes: A bonding dielectric layer covers the second main surface of the adapter plate, wherein the first metal layer and the second metal layer are located in the bonding dielectric layer.

6. The packaging structure according to claim 5, characterized in that: Also includes: a third vertical interconnect structure, which continuously penetrates the adapter plate, the bonding dielectric layer and the second chip at least along the first direction, and the third vertical interconnect structure is electrically connected to the first chip; A fourth vertical interconnection structure continuously penetrates the adapter board, the bonding medium layer and the second chip at least along the first direction, and the fourth vertical interconnection structure is electrically connected to the storage structure.

7. The packaging structure according to claim 6, characterized in that: The third vertical interconnect structure includes a third conductive connection column that penetrates the transfer board, the bonding dielectric layer and the second chip along the first direction, a third bonding pad located on the side of the third conductive connection column facing the first chip, a third internal interconnect solder ball located on the third bonding pad, and a first lead solder ball located on the surface of the second chip on the side away from the transfer board; The fourth vertical interconnection structure includes a fourth conductive connecting column that penetrates the adapter board, the bonding medium layer and the second chip along the first direction, a fourth solder pad located on the side of the fourth conductive connecting column facing the storage structure, a fourth internal interconnection solder ball located on the fourth solder pad, and a second lead-out solder ball located on the surface of the second chip on the side away from the adapter board.

8. The packaging structure according to claim 4, characterized in that: Also includes: a first internal interconnect structure, comprising a fifth solder pad located on the first main surface of the adapter board and a fifth internal interconnect solder ball located on the fifth solder pad, the fifth solder pad being electrically connected to the adapter board, and the fifth internal interconnect solder ball being electrically connected to the first chip; The second internal interconnect structure includes a sixth solder pad located on the first main surface of the adapter board and a sixth internal interconnect solder ball located on the sixth solder pad, the sixth solder pad is electrically connected to the adapter board, and the sixth internal interconnect solder ball is electrically connected to the storage structure.

9. The packaging structure according to claim 1, characterized in that: Also includes: The third chip is located on the first main surface of the adapter board, the first chip, the third chip and the storage structure are arranged in a direction parallel to the first main surface, and the projection of the second chip on the second main surface continuously covers the projection of the first chip on the second main surface, the projection of the third chip on the second main surface and the projection of the storage structure on the second main surface.

10. The packaging structure according to claim 1, characterized in that: Also includes: The plastic encapsulation layer is located on the first main surface of the adapter board, and the plastic encapsulation layer continuously encapsulates the first chip and the storage structure.

11. The packaging structure according to claim 10, characterized in that: A surface of the first chip facing away from the adapter board along the first direction is flush with a surface of the storage structure facing away from the adapter board along the first direction.

12. The packaging structure according to claim 10, characterized in that: The plastic encapsulation layer exposes a surface of the first chip facing away from the adapter board and a surface of the storage structure facing away from the adapter board.

13. The packaging structure according to claim 1, characterized in that: The storage structure is a high bandwidth memory.

14. A method for forming a packaging structure, characterized in that: The steps include: An adapter board is formed, the adapter board comprising a first main surface and a second main surface relatively distributed along a first direction; a second chip is connected to the second main surface of the adapter board, and a first chip and a storage structure are electrically connected to the first main surface of the adapter board, the storage structure and the first chip are arranged along a second direction, the first chip, the second chip and the storage structure are all electrically connected to the adapter board, the projection of the second chip on the second main surface covers the projection of the first chip on the second main surface and the projection of the storage structure on the second main surface, and the second direction intersects the first direction perpendicularly.

15. The method for forming a packaging structure according to claim 14, characterized in that: The specific steps of connecting the second chip to the second main surface of the adapter board and electrically connecting the first chip and the storage structure to the first main surface of the adapter board include: The second chip is connected to the second main surface of the adapter board, and the first chip, the third chip and the storage structure are electrically connected to the first main surface of the adapter board, the first chip, the third chip and the storage structure are arranged in a direction parallel to the first main surface, and the projection of the second chip on the second main surface continuously covers the projection of the first chip on the second main surface, the projection of the third chip on the second main surface and the projection of the storage structure on the second main surface.

16. The method for forming a packaging structure according to claim 14, characterized in that: Before connecting the second chip to the second main surface of the adapter board and electrically connecting the first chip and the storage structure to the first main surface of the adapter board, the following steps are also included: Forming a first welding pad and a second welding pad on the first main surface of the adapter board and a first conductive connecting column and a second conductive connecting column penetrating the adapter board along the first direction, wherein the first conductive connecting column is electrically connected to the first welding pad, and the second conductive connecting column is electrically connected to the second welding pad; A bonding dielectric layer and a first metal layer and a second metal layer penetrating the bonding dielectric layer along the first direction are formed on the second main surface of the adapter board, the first metal layer is electrically connected to the first conductive connection column, and the second metal layer is electrically connected to the second conductive connection column.

17. The method for forming a packaging structure according to claim 16, wherein: The specific steps of forming a first welding pad and a second welding pad located on the first main surface of the adapter board and a first conductive connecting column and a second conductive connecting column penetrating the adapter board along the first direction, wherein the first conductive connecting column is electrically connected to the first welding pad and the second conductive connecting column is electrically connected to the second welding pad include: Provide adapter plate; A first blind hole and a second blind hole are formed in the adapter plate and arranged along the second direction, and the first blind hole and the second blind hole both extend from the first main surface of the adapter plate to the inside of the adapter plate; Forming a first conductive connection column in the first blind hole, forming a second conductive connection column in the second blind hole, and forming a first welding pad electrically connected to the first conductive connection column and a second welding pad electrically connected to the second conductive connection column on the first main surface of the adapter board; The transfer plate is thinned to expose a surface of the first conductive connection column facing away from the first pad and a surface of the second conductive connection column facing away from the second pad.

18. The method for forming a package structure according to claim 16, wherein: The second chip comprises a front side and a back side which are oppositely distributed along the first direction, and a functional area of ​​the second chip is located on the front side of the second chip; The specific steps of connecting the second chip to the second main surface of the adapter board and electrically connecting the first chip and the storage structure to the first main surface of the adapter board include: Hybrid bonding the second chip to the transfer board in a direction where the front surface of the second chip faces the bonding medium layer; The first chip and the storage structure are welded to the first main surface of the adapter board.

19. The method for forming a packaging structure according to claim 18, characterized in that: Before welding the first chip and the storage structure to the first main surface of the adapter board, the following steps are also included: A third vertical interconnection structure and a fourth vertical interconnection structure are formed, both of which continuously penetrate the transfer board, the bonding medium layer and the second chip along the first direction, and the third vertical interconnection structure and the fourth vertical interconnection structure are arranged at intervals along the second direction.

20. The method for forming a package structure according to claim 19, wherein: A third pad and a fourth pad are also provided on the first main surface of the adapter board; the specific steps of forming a third vertical interconnect structure and a fourth vertical interconnect structure that continuously penetrate the adapter board, the bonding medium layer and the second chip along the first direction include: A third conductive connection column is formed that sequentially passes through the second chip, the bonding medium layer and the adapter plate along the first direction and is electrically connected to the third pad, and a fourth conductive connection column is formed that sequentially passes through the second chip, the bonding medium layer and the adapter plate along the first direction and is electrically connected to the fourth pad, so as to form the third vertical interconnection structure including the third pad and the third conductive connection column, and to form the fourth vertical interconnection structure including the fourth pad and the fourth conductive connection column.

21. The method for forming a package structure according to claim 20, characterized in that: The specific steps of forming a third conductive connection column that sequentially penetrates the second chip, the bonding dielectric layer, and the adapter plate along the first direction and is electrically connected to the third pad, and forming a fourth conductive connection column that sequentially penetrates the second chip, the bonding dielectric layer, and the adapter plate along the first direction and is electrically connected to the fourth pad include: Etching begins from the surface of the second chip facing away from the adapter board to form a first through hole that sequentially penetrates the second chip, the bonding medium layer, and the adapter board along the first direction and exposes the third pad, and forming a second through hole that sequentially penetrates the second chip, the bonding medium layer, and the adapter board along the first direction and exposes the fourth pad; A conductive material is filled in the first through hole and the second through hole, the third conductive connection column is formed in the first through hole, and the fourth conductive connection column is formed in the second through hole.

22. The method for forming a package structure according to claim 20, wherein: Before welding the first chip and the storage structure to the first main surface of the adapter board, the following steps are also included: A first lead-out solder ball is formed on a surface of the third conductive connection column facing away from the third bonding pad, and a second lead-out solder ball is formed on a surface of the fourth conductive connection column facing away from the fourth bonding pad.

23. The method for forming a package structure according to claim 20, wherein: A fifth pad and a sixth pad electrically connected to the adapter board are also provided on the first main surface of the adapter board; the specific steps of welding the first chip and the storage structure to the first main surface of the adapter board include: forming a first internal interconnection solder ball, a third internal interconnection solder ball, and a fifth internal interconnection solder ball on the surface of the first chip, and forming a second internal interconnection solder ball, a fourth internal interconnection solder ball, and a sixth internal interconnection solder ball on the surface of the memory structure; The first chip and the storage structure are welded to the first main surface of the adapter board, so that the first internal interconnection solder ball on the first chip is welded to the first welding pad, the third internal interconnection solder ball is welded to the third welding pad, and the fifth internal interconnection solder ball is welded to the fifth welding pad, and the second internal interconnection solder ball on the storage structure is welded to the second welding pad, the fourth internal interconnection solder ball is welded to the fourth welding pad, and the sixth internal interconnection solder ball is welded to the sixth welding pad.

24. The method for forming a package structure according to claim 23, characterized in that: A surface of the first chip facing away from the adapter board is flush with a surface of the storage structure facing away from the adapter board.

25. The method for forming a package structure according to claim 23, wherein: After welding the first chip and the storage structure to the first main surface of the adapter board, the following steps are also included: A plastic encapsulation layer for continuously encapsulating the first chip and the storage structure is formed on the first main surface of the adapter board, wherein the plastic encapsulation layer exposes a surface of the first chip facing away from the adapter board and a surface of the storage structure facing away from the adapter board.

26. The method for forming a package structure according to claim 25, characterized in that: After forming a plastic encapsulation layer on the first main surface of the adapter board to continuously encapsulate the first chip and the storage structure, the following steps are also included: A first lead-out solder ball is formed on a surface of the third conductive connection column facing away from the third bonding pad, and a second lead-out solder ball is formed on a surface of the fourth conductive connection column facing away from the fourth bonding pad.

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