Backside illuminated CMOS image sensor and preparation method thereof

Abstract

According to the backside illuminated CMOS image sensor and the preparation method thereof provided by the invention, the silicon nitride protection layer which covers the photoelectric active layer and the groove and exposes the bonding pad is formed in the logic region, so that moisture entering the backside illuminated CMOS image sensor is effectively reduced through the silicon nitride protection layer, and the reliability of a device is improved.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductor manufacturing, and relates to a back-illuminated CMOS image sensor and a preparation method thereof. Background Art

[0002] An image sensor is a sensor that can sense optical information and convert it into a usable output signal. Depending on the principle it uses, it can include a charge-coupled device (CCD) image sensor and a complementary metal oxide semiconductor (CMOS) image sensor. Since CMOS image sensors are manufactured using traditional CMOS circuit technology, image sensors and their required peripheral circuits can be integrated, giving CMOS image sensors a wider application prospect.

[0003] CMOS image sensors are divided into two types: front-illuminated type and back-illuminated type. The biggest optimization of back-illuminated CMOS is to change the internal structure of the component and reverse the direction of the photosensitive layer so that light can enter directly from the back to avoid the light being affected by the circuit and transistor, thereby significantly improving the efficiency of light.

[0004] However, conventional back-illuminated CMOS image sensors often have the problem of reduced device reliability due to moisture intrusion during use.

[0005] Therefore, it is necessary to provide a back-illuminated CMOS image sensor and a manufacturing method thereof to improve the reliability of the back-illuminated CMOS image sensor. Summary of the invention

[0006] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a back-illuminated CMOS image sensor and a method for manufacturing the same, so as to solve the problem of reduced device reliability due to moisture intrusion in the prior art back-illuminated CMOS image sensor.

[0007] To achieve the above and other related objectives, the present invention provides a method for preparing a back-illuminated CMOS image sensor, comprising the following steps:

[0008] providing a first supporting substrate;

[0009] forming a photoelectric active layer on the first supporting substrate;

[0010] forming a wiring layer on the optoelectronic active layer;

[0011] Providing a second supporting substrate, and bonding the second supporting substrate to the wiring layer;

[0012] removing the first supporting substrate to expose the optoelectronic active layer;

[0013] forming an isolation structure disposed at intervals in the optoelectronic active layer in the pixel region;

[0014] forming a GND layer on the photoelectric active layer;

[0015] Patterning the GND layer and the optoelectronic active layer to form a groove in the logic area;

[0016] forming a pad electrically connected to the wiring layer in the groove;

[0017] forming a silicon nitride protection layer in the logic area, covering the optoelectronic active layer and the trench and exposing the pad;

[0018] A lens unit is formed in the pixel region and is arranged corresponding to the isolation structure.

[0019] Optionally, the silicon nitride protective layer includes a SiN layer and / or a Si3N4 layer; the thickness of the silicon nitride protective layer includes

[0021] Optionally, before bonding the second supporting substrate to the wiring layer, a process step of performing edge cutting on the wiring layer, the optoelectronic active layer and the first supporting substrate is also included.

[0022] Optionally, a method of bonding the second support substrate to the wiring layer includes a low temperature oxide-oxide fusion bonding method.

[0023] Optionally, the wiring layer includes a Damascus wiring layer prepared by a Damascus process.

[0024] Optionally, the method for preparing the back-illuminated CMOS image sensor is a wafer-level preparation method, and further includes the process steps of removing the second supporting substrate and performing cutting and separation.

[0025] Optionally, the cutting and separation method includes one or a combination of mechanical cutting and laser cutting.

[0026] The present invention further provides a back-illuminated CMOS image sensor, the back-illuminated CMOS image sensor comprising:

[0027] a second supporting substrate;

[0028] a wiring layer, the wiring layer being located on the second supporting substrate;

[0029] A photoelectric active layer, the photoelectric active layer is located on the wiring layer;

[0030] An isolation structure, wherein the isolation structure is located in the photoelectric active layer in the pixel region and is arranged at intervals;

[0031] A GND layer, wherein the GND layer is located on the photoelectric active layer;

[0032] A groove, wherein the groove penetrates the GND layer and the photoelectric active layer;

[0033] A pad, the pad being located in the groove and electrically connected to the wiring layer;

[0034] A silicon nitride protection layer, wherein the silicon nitride protection layer is located in the logic area, covers the optoelectronic active layer and the trench, and exposes the pad;

[0035] A lens unit is located in the pixel area and is arranged corresponding to the isolation structure.

[0036] Optionally, the silicon nitride protective layer includes a SiN layer and / or a Si3N4 layer; the thickness of the silicon nitride protective layer includes

[0038] Optionally, the wiring layer includes a Damascus wiring layer.

[0039] As described above, the back-illuminated CMOS image sensor and the method for manufacturing the same of the present invention form a silicon nitride protection layer in the logic region that covers the optoelectronic active layer and the trench and exposes the pad, so that the silicon nitride protection layer effectively reduces the entry of moisture into the back-illuminated CMOS image sensor, thereby improving the reliability of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 FIG. 1 is a flowchart of a manufacturing process of a back-illuminated CMOS image sensor according to an embodiment of the present invention.

[0041] Figure 2 It is a schematic diagram of the structure after forming the wiring layer in an embodiment of the present invention.

[0042] Figure 3 Shown is a schematic diagram of the structure after edge cutting in an embodiment of the present invention.

[0043] Figure 4 It is a schematic diagram of the structure after the second supporting substrate is bonded to the wiring layer in an embodiment of the present invention.

[0044] Figure 5 It is a schematic diagram of the structure after the isolation structure is formed in an embodiment of the present invention.

[0045] Figure 6 It is a schematic diagram of the structure after the GND layer is formed in an embodiment of the present invention.

[0046] Figure 7 It is a schematic diagram of the structure after the grooves are formed in an embodiment of the present invention.

[0047] Figure 8 It is a schematic diagram of the structure after the pad is formed in an embodiment of the present invention.

[0048] Fig. 9 It is a schematic diagram of the structure after forming a patterned photoresist layer in an embodiment of the present invention.

[0049] Fig.10 It is a schematic diagram of the structure after forming a patterned silicon nitride protective layer in an embodiment of the present invention.

[0050] Fig.11 It is a schematic diagram of the structure after the lens unit is formed in the embodiment of the present invention.

[0051] Description of Reference Numerals

[0052] 110 first supporting substrate

[0053] 120 second supporting substrate

[0054] 200 Photoelectric active layer

[0055] 210 Isolation Structure

[0056] 300 wiring layers

[0057] 400 Bonding layer

[0058] 500 GND layer

[0059] 600 Grooves

[0060] 700 Pad

[0061] 800 Silicon nitride protective layer

[0062] 900 Photoresist layer

[0063] 100 lens units

[0064] A Pixel area

[0065] B logic area DETAILED DESCRIPTION

[0066] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0067] For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic view is only an example, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional space dimensions of length, width and depth should be included.

[0068] For ease of description, spatial relational terms such as “under”, “below”, “below”, “below”, “over”, etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatial relational terms are intended to include other orientations of the device in use or operation in addition to the orientation depicted in the drawings, and may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed between the first and second features, so that the first and second features may not be in direct contact. In addition, when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or one or more intervening layers may also be present.

[0069] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0070] like Figure 1 The present embodiment provides a method for preparing a back-illuminated CMOS image sensor. The present embodiment forms a silicon nitride protection layer in a logic area of ​​the back-illuminated CMOS image sensor, which can cover a photoelectric active layer and a groove and expose a pad, so as to effectively reduce the entry of moisture into the back-illuminated CMOS image sensor through the silicon nitride protection layer, thereby improving device reliability.

[0071] For the convenience of description, in this embodiment, the illumination CMOS image sensor is divided into a pixel area A and a logic area B. Figure 2 to Figure 11 , the preparation of the back-illuminated CMOS image sensor is further introduced.

[0072] First, see Figure 1 and Figure 2 , perform step S1 to provide a first supporting substrate 110.

[0073] Specifically, the first supporting substrate 110 mainly functions to provide support for subsequent process steps. There is no excessive restriction on the material of the first supporting substrate 110, and it may be a glass substrate, a ceramic substrate, a semiconductor substrate, etc. In this embodiment, a silicon substrate is used as the first supporting substrate 110, but the specific type of the first supporting substrate 110 is not limited to this.

[0074] In this embodiment, in order to improve the process efficiency, the back-illuminated CMOS image sensor is preferably prepared at the wafer level, that is, the size of the first support substrate 110 can be 6 inches, 8 inches, 12 inches, etc., so that multiple independent back-illuminated CMOS image sensors can be prepared at one time through the subsequent cutting and separation process. The specific size of the first support substrate 110 is not limited here.

[0075] The cutting and separation method may include one or a combination of mechanical cutting and laser cutting, which can be selected according to needs.

[0076] Next, see Figure 1 and Figure 2 , executing step S2 , forming a photoelectric active layer 200 on the first supporting substrate 110 .

[0077] Specifically, a silicon epitaxial layer may be formed on the first supporting substrate 110 by epitaxy (EPI), and photodiodes, transistors and other components may be prepared in the silicon epitaxial layer by using process steps such as photolithography, ion implantation, and etching to prepare the optoelectronic active layer 200. The specific structure and preparation of the optoelectronic active layer 200 are not limited herein.

[0078] Next, see Figure 1 and Figure 2 , executing step S3 , forming a wiring layer 300 on the optoelectronic active layer 200 .

[0079] Specifically, the wiring layer 300 includes a dielectric layer and a metal layer stacked from bottom to top in the dielectric layer. The material of the dielectric layer can be polyimide (PI), silicon oxide, etc., and the material of the metal layer can be copper metal, etc. The wiring layer 300 can include a Damascus wiring layer prepared by a Damascus process to achieve high-density and high-precision wiring, but it is not limited thereto. The specific structure, material and preparation of the wiring layer 300 are not overly limited here.

[0080] For further information, see Figure 3In this embodiment, it is preferred to perform a process step of edge cutting on the wiring layer 300, the optoelectronic active layer 200 and the first support substrate 110, so as to reduce the probability of cracks or fragments in the wafer when the first support substrate 110 is subsequently removed by a grinding method. The edge cutting process may include one or a combination of mechanical cutting and laser cutting, which may be selected according to needs.

[0081] Next, see Figure 1 and Figure 4 , perform step S4, provide a second supporting substrate 120, and bond the second supporting substrate 120 to the wiring layer 300.

[0082] Specifically, the second supporting substrate 120 mainly functions to provide support for subsequent process steps after removing the first supporting substrate 110. The material of the second supporting substrate 120 is not excessively restricted, and it may be a glass substrate, a ceramic substrate, a semiconductor substrate, etc.

[0083] In this embodiment, Figure 4 An oxide layer such as a silicon oxide layer is formed on the surface of the second supporting substrate 120 and the wiring layer 300, and the second supporting substrate 120 and the wiring layer 300 are bonded by a low-temperature oxide-oxide fusion bonding method, and then a high-temperature annealing treatment is performed to convert the weaker bonding force (van der Waals force) into a stronger covalent bond form to form a bonding layer 400, but the bonding method of the second supporting substrate 120 and the wiring layer 300 is not limited to this.

[0084] Next, see Figure 1 and Figure 5 , perform step S5 to remove the first supporting substrate 110 to expose the optoelectronic active layer 200 .

[0085] Specifically, the method for removing the first support substrate 110 may include a grinding method, such as mechanical grinding, chemical mechanical polishing (CMP), etc. Wherein, when removing the first support substrate 110, a process step of edge cutting may also be included to reduce the probability of wafer cracks and fragments.

[0086] Next, see Figure 1 and Figure 5 , executing step S6, forming an isolation structure 210 arranged at intervals in the optoelectronic active layer 200 in the pixel area A.

[0087] Specifically, the isolation structure 210 may include a deep trench isolation (DTI) structure, and a method for forming the isolation structure 210 may include steps such as photolithography, etching, and deposition, so as to achieve isolation between photodiodes and / or transistors in the pixel area A through the prepared isolation structure 210. The structure, material, and preparation method of the isolation structure 210 are not limited herein.

[0088] Next, see Figure 1 and Figure 6 , executing step S7 to form a GND layer 500 on the optoelectronic active layer 200 .

[0089] Specifically, the GND layer 500 includes a dielectric layer and a patterned metal layer in the dielectric layer, and the GND layer 500 can effectively shield electromagnetic interference and improve circuit performance and reliability. The structure, material and preparation method of the GND layer 500 are not limited here.

[0090] Next, see Figure 1 and Figure 7 , executing step S8, patterning the GND layer 500 and the optoelectronic active layer 200, and forming a groove 600 in the logic area B.

[0091] Specifically, photolithography and etching may be used to pattern the GND layer 500 and the optoelectronic active layer 200 to form the groove 600 that exposes the metal layer in the wiring layer 300 for subsequent electrical connection. The size and distribution of the groove 600 are not limited herein.

[0092] Among them, Figure 7 In the process of preparing the trench 600, a silicon oxide layer is formed on the sidewall of the trench 600. However, since the silicon oxide layer has poor water barrier performance, when the back-illuminated CMOS image sensor is used, there is a problem of reduced device reliability due to water vapor intrusion.

[0093] In this embodiment, refer to Fig.11 A silicon nitride protection layer 800 is formed in the logic area B to cover the optoelectronic active layer 200 and the groove 600, so as to effectively reduce the entry of moisture into the back-illuminated CMOS image sensor through the silicon nitride protection layer 800, thereby improving the reliability of the device, which will not be introduced here.

[0094] Next, see Figure 1 and Figure 8 , executing step S9 to form a pad 700 electrically connected to the wiring layer 300 in the groove 600 .

[0095] Specifically, the pad 700 may be formed by electroplating and etching, wherein the material of the pad 700 may be aluminum metal, copper metal, etc., which is not limited here.

[0096] Next, see Figure 1 , Fig. 9 and Fig.10 , executing step S10 , forming a silicon nitride protection layer 800 in the logic region B, which covers the optoelectronic active layer 200 and the trench 600 and exposes the pad 700 .

[0097] Specifically, the silicon nitride protective layer 800 can be formed by deposition, and then a patterned photoresist layer 900 can be formed by photolithography. Then, etching can be performed using the photoresist layer 900 as a mask to prepare the patterned silicon nitride protective layer 800 that covers the optoelectronic active layer 200 and the groove 600 and exposes the pad 700.

[0098] The silicon nitride protection layer 800 may include, for example, a SiN layer and / or a Si 3 N 4 layer, so as to effectively reduce the entry of moisture into the back-illuminated CMOS image sensor through the silicon nitride protection layer 800, thereby improving device reliability.

[0099] The thickness of the silicon nitride protective layer 800 may include like wait.

[0100] Next, see Figure 1 and Fig.11 , executing step S11, forming a lens unit 100 in the pixel area A corresponding to the isolation structure 210.

[0101] Specifically, the lens unit 100 may include an anti-reflection layer, a color filter layer, a microlens layer, etc. The specific structure and distribution of the lens unit 100 and the method of forming the lens unit 100 are not limited herein.

[0102] Furthermore, when it is a wafer-level preparation process, it may also include a process step of cutting and separating, wherein the cutting and separating method includes one or a combination of mechanical cutting and laser cutting.

[0103] Furthermore, the step of removing the second supporting substrate 120 may be included as required, which is not limited here.

[0104] See also Figure 2 to Figure 11 The present embodiment further provides a back-illuminated CMOS image sensor, the back-illuminated CMOS image sensor comprising:

[0105] A second supporting substrate 120;

[0106] A wiring layer 300 , wherein the wiring layer 300 is located on the second supporting substrate 120 ;

[0107] A photoelectric active layer 200, wherein the photoelectric active layer 200 is located on the wiring layer 300;

[0108] An isolation structure 210, wherein the isolation structure 210 is located in the optoelectronic active layer 200 in the pixel region A and is arranged at intervals;

[0109] A GND layer 500, wherein the GND layer 500 is located on the optoelectronic active layer 200;

[0110] A groove 600, wherein the groove 600 penetrates the GND layer 500 and the optoelectronic active layer 200;

[0111] A pad 700, wherein the pad 700 is located in the groove 600 and is electrically connected to the wiring layer 300;

[0112] A silicon nitride protection layer 800, wherein the silicon nitride protection layer 800 is located in the logic region B, covers the optoelectronic active layer 200 and the trench 600, and exposes the pad 700;

[0113] The lens unit 100 is located in the pixel region and is disposed corresponding to the isolation structure 210 .

[0114] The back-illuminated CMOS image sensor may be prepared by the above-mentioned preparation method, but is not limited thereto. In this embodiment, the back-illuminated CMOS image sensor is directly prepared by the above-mentioned method, and thus the material, structure, preparation, etc. of the back-illuminated CMOS image sensor are not described in detail herein.

[0115] The silicon nitride protection layer 800 may include a SiN layer and / or a Si 3 N 4 layer, so as to effectively reduce the entry of moisture into the back-illuminated CMOS image sensor through the silicon nitride protection layer 800, thereby improving device reliability.

[0116] The thickness of the silicon nitride protective layer 800 may include like wait.

[0117] The wiring layer 300 may include a Damascus wiring layer 300 to achieve high-density and high-precision wiring.

[0118] In summary, the back-illuminated CMOS image sensor and the method for manufacturing the same of the present invention form a silicon nitride protection layer in the logic region that covers the optoelectronic active layer and the trench and exposes the pad, so that the silicon nitride protection layer effectively reduces the entry of moisture into the back-illuminated CMOS image sensor, thereby improving the reliability of the device.

[0119] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for preparing a back-illuminated CMOS image sensor, characterized in that: The following steps are involved: providing a first supporting substrate; forming a photoelectric active layer on the first supporting substrate; forming a wiring layer on the photoelectric active layer; Providing a second supporting substrate, and bonding the second supporting substrate to the wiring layer; removing the first supporting substrate to expose the optoelectronic active layer; forming an isolation structure disposed at intervals in the optoelectronic active layer in the pixel region; forming a GND layer on the photoelectric active layer; Patterning the GND layer and the optoelectronic active layer to form a groove in the logic area; forming a pad electrically connected to the wiring layer in the groove; forming a silicon nitride protection layer in the logic area, covering the optoelectronic active layer and the trench and exposing the pad; A lens unit is formed in the pixel region and is arranged corresponding to the isolation structure.

2. The method for preparing a back-illuminated CMOS image sensor according to claim 1, wherein: The silicon nitride protective layer includes a SiN layer and / or a Si3N4 layer; the thickness of the silicon nitride protective layer includes 3. The method for preparing a back-illuminated CMOS image sensor according to claim 1, wherein: Before bonding the second supporting substrate to the wiring layer, the method further includes a process step of cutting edges of the wiring layer, the optoelectronic active layer and the first supporting substrate.

4. The method for preparing a back-illuminated CMOS image sensor according to claim 1, wherein: A method of bonding the second support substrate to the wiring layer includes a low temperature oxide-oxide fusion bonding method.

5. The method for preparing a back-illuminated CMOS image sensor according to claim 1, wherein: The wiring layer includes a Damascus wiring layer prepared by a Damascus process.

6. The method for preparing a back-illuminated CMOS image sensor according to claim 1, wherein: The method for preparing the back-illuminated CMOS image sensor is a wafer-level preparation method, and further includes the process steps of removing the second supporting substrate and performing cutting and separation.

7. The method for preparing a back-illuminated CMOS image sensor according to claim 6, wherein: The cutting and separation method includes one or a combination of mechanical cutting and laser cutting.

8. A back-illuminated CMOS image sensor, characterized in that: The back-illuminated CMOS image sensor comprises: a second supporting substrate; a wiring layer, the wiring layer being located on the second supporting substrate; A photoelectric active layer, the photoelectric active layer is located on the wiring layer; An isolation structure, wherein the isolation structure is located in the photoelectric active layer in the pixel region and is arranged at intervals; A GND layer, wherein the GND layer is located on the photoelectric active layer; A groove, wherein the groove penetrates the GND layer and the photoelectric active layer; A pad, the pad being located in the groove and electrically connected to the wiring layer; A silicon nitride protection layer, wherein the silicon nitride protection layer is located in the logic area, covers the optoelectronic active layer and the trench, and exposes the pad; A lens unit is located in the pixel area and is arranged corresponding to the isolation structure.

9. The back-illuminated CMOS image sensor according to claim 8, wherein: The silicon nitride protective layer includes a SiN layer and / or a Si3N4 layer; the thickness of the silicon nitride protective layer includes 10. The back-illuminated CMOS image sensor according to claim 8, wherein: The wiring layer includes a Damascene wiring layer.

Images