Circuit arrangement for energizing large area capacitive load to be operated with AC voltage and method for operating such circuit arrangement

Abstract

A circuit arrangement for energizing a capacitive load that operates with an AC voltage and has a first connection and a second connection is described. The circuit arrangement is formed by a first excitation circuit and a second excitation circuit, each of which is designed to generate a first square-wave signal and a second square-wave signal, respectively, in which an output connection of the first excitation circuit is connected to a first connection of the capacitive load and an output connection of the second excitation circuit is connected to a second connection of the capacitive load. The output connection of the first excitation circuit is connected to the first connection of the capacitive load, and the output connection of the second excitation circuit is connected to the second connection of the capacitive load, and the circuit arrangement comprises a control circuit designed to excite the first excitation circuit and the second excitation circuit in such a way that the generated square wave signals are offset in time from each other. The first excitation circuit and the second excitation circuit are respectively formed by a first excitable square wave signal generator and a second excitable square wave signal generator, and the downstream of the signal generators is respectively connected with a first filter circuit and a second filter circuit.

Description

[0001] The invention relates to a circuit arrangement for exciting a large-area capacitive load, which capacitive load is to be operated with an AC voltage and has a first connection and a second connection, the behavior of the load being dependent on the RMS value of the applied voltage, the circuit arrangement comprising a first excitation circuit and a second excitation circuit, which are designed to generate a first signal and a second signal, respectively, which are optimized with respect to harmonics, wherein the output connection of the first excitation circuit is connected to the first connection of the large-area capacitive load and the output connection of the second excitation circuit is connected to the second connection of the large-area capacitive load, and the circuit arrangement comprises a control circuit, which is designed to excite the first excitation circuit and the second excitation circuit in such a way that the generated harmonically optimized signals are offset in time with respect to each other, thereby applying an AC voltage to the capacitive large-area load.

[0002] The invention also relates to a method for operating such a circuit arrangement.

[0003] DE 102017220749 A1 discloses such a circuit arrangement and such a method. In said document, a square wave signal or a trapezoidal signal is generated by means of a subcircuit in the form of a DC / DC converter or a DC / AC converter or a single converter circuit with a voltage divider connected downstream. However, such a converter circuit is very complex, generates many harmonics that must be filtered, and is therefore costly.

[0004] The large-area capacitive load can be, in particular, a PDLC (polymer dispersed liquid crystal) glass. Such switchable glazing units are already used in vehicles, for example for sunroofs. The electrically switchable glazing unit (smart glass or smart glass panel) can be switched between a "transparent" transparent state and a "darkened / clouded" transparent state by turning the AC voltage on and off. The AC voltage of the switchable glazing unit is referred to as the excitation voltage hereinafter. In the currently available switchable glazing units that can be excited by means of an excitation voltage, the following transparent states are possible: an excitation voltage of 0V corresponds to a "darkened" state, and a positive excitation voltage or a negative excitation voltage corresponds to a "transparent / transmissive" state. The periodically alternating excitation voltage can be an AC voltage in the range of 60V to 100V, 50Hz to 100Hz (PDLC) and 100V, 50Hz to 100Hz (SPD). In this case, the switchable glazing unit acts as a capacitive load in the circuit, and its capacitance value can be 20μF / m 2 .

[0005] The main behavior of such a switchable glass (eg the transparency of the PDLC glass) depends on the RMS voltage across this capacitor. In this case, if there is no DC component, an AC voltage optimized in terms of harmonics must be used.

[0006] In order to be able to control the effectiveness of the actuator (e.g. the opacity of the PDLC glass), the RMS value of the voltage must be controlled. This can be achieved by phase gate control or phase chopping control, or by controlling the amplitude. DE102017220749 A1 also discloses applying two DC voltages (positive and negative 60 V respectively) pulsed in a manner offset by up to 180° to a capacitive load, wherein they generate a pulsed AC voltage of up to 120 Veff; the voltage at the load is controlled by means of the offset of these individual voltages. All these solutions require harmonic filtering at the connection of the capacitive load.

[0007] Some actuators are not compatible with DC components, which is why if a DC component is present within each half cycle, the amplitude must additionally be controlled so that there is no DC component during the entire cycle. In the case of PDLC glass, for example, this prevents degradation of the active layer to the point where the glass no longer functions.

[0008] Such an actuator should be driven with minimal circuitry, power, and software complexity in order to implement the desired functionality with an economical product.

[0009] The object is achieved by a first excitation circuit and a second excitation circuit in a circuit arrangement of generic type, the first excitation circuit and the second excitation circuit being respectively formed in each case by:

[0010] a first activatable square wave signal generator and a second activatable square wave signal generator,

[0011] A first filter circuit and a second filter circuit are respectively connected to the downstream of the first square wave signal generator and the second square wave signal generator, and the gradient of the switching edge of the square wave signal is set by means of the filter circuit,

[0012] a first voltage follower and a second voltage follower connected downstream of the first filter circuit and the second filter circuit, respectively, the respective output connections of the voltage followers forming in each case the output connections of the first excitation circuit and the second excitation circuit, respectively, and the voltage followers having in each case a power supply connection, wherein the power supply connections are connected to the power supply voltage via at least one EMC filter,

[0013] Therein, the control circuit is designed to excite the first square wave signal generator and the second square wave signal generator in such a way that the generated square wave signals are offset in time from each other.

[0014] The object is also achieved by a method for operating the circuit arrangement, wherein the control circuit excites the first square wave signal generator and the second square wave signal generator in such a way that a positive voltage is continuously applied between a first connection and a second connection of the capacitive load(s) by means of the square wave signals offset in time from one another, the first connection and the second connection of the capacitive load(s) being connected to one another and to a low potential of a filtered supply voltage, a negative voltage is applied between the first connection and the second connection of the capacitive load(s), and the first connection and the second connection of the capacitive load(s) being connected to one another and to a high potential of the filtered supply voltage, thereby applying an AC voltage to the capacitive load.

[0015] The concept behind this circuit arrangement and method is that instead of the connections of the exciter being periodically alternately routed to a high potential and then back to ground potential, such that the exciter discharges if both terminals are connected to ground, the exciter discharges via the second connection that is routed to the potential of the first connection. Thus, positive direction charging is achieved by routing the first (in the case of a segmented exciter, common) connection to a high potential while the second connection remains connected to ground. The subsequent discharge of the exciter is then performed via the second connection that is also routed to a high potential. Then, negative direction charging is achieved instead by routing the second connection to a high potential, but rather by routing the first (in the case of a segmented exciter, common) connection to ground. Furthermore, the negative half cycle is then discharged by subsequently routing the second connection to ground.

[0016] In this case, routing the connection to the voltage is achieved with the aid of a non-switching output stage (voltage follower), so that at least one filter between the supply voltage and the excitation circuit is also sufficient to be able to excite large-area capacitive loads in an EMC-optimized manner, because the design of the non-switching output stage (voltage follower) means that the still relevant harmonics at radio frequencies no longer occur. This principle brings several advantages.

[0017] In case of variable loads (and therefore the conductivity of the PDLC glass varies greatly with temperature), controlling the output amplitude is always a critical issue and requires many SW resources in order to, for example, steer a half-wave generator (class D amplifier or switching regulator) in terms of time and correct amplitude. It is much simpler to use only a time-based excitation method. To achieve this, the invention solves the problem so that the output stage is a voltage follower, which is supplied by the EMC-filtered supply voltage and follows a simple square-wave signal (which in particular comes from a calculation unit) which is smoothed by a passive or active filter. This means that the rhythm of the charging and discharging process is determined by the calculation unit, while the circuit only determines the voltage curve. The voltage curve is therefore largely independent of the load and no harmonic filter is required at the output connection.

[0018] A first advantage is that, due to the filtered supply voltage which reduces the harmonics of the voltage source and the configuration as a non-switching output stage (i.e. as an analog voltage follower), no harmonic filter is required at the output, although capacitive loads are usually connected to the circuit via inappropriately long cables and, due to their physical size, they themselves constitute efficient antennas, transmitting the switching influences well to the environment as radio interference.

[0019] The second advantage is that the current for discharging the exciter does not have to come from the power supply, but from the exciter itself, which is why only half the energy is required. As a result, the efficiency is significantly increased and the function can be implemented not only more economically but also more ecologically.

[0020] A third advantage is that, for exciters which have to operate without a DC component, a compensation can be performed which changes only the pulse width of the square-wave signal without changing the amplitude. The compensation of the DC component is thus also corrected by the rhythm and not by the voltage curve, which makes it easy to implement, in particular in the calculation unit. The duty cycle of the first (or, for segmented exciters, the common) connection is always 50%. The frequency of both connections must be identical so that no floating effects occur. Thus, the DC component can also be set in a targeted manner, if desired.

[0021] Advantageously, the first square wave signal generator and the second square wave signal generator can be formed by a microcontroller. Many microcontrollers in the automotive field provide such square wave signals, which can sometimes also be pulse-width modulated.

[0022] In an advantageous embodiment of the first and second filter circuits, the first and second filter circuits are formed by a first and second switching unit, respectively, wherein each of these switching units can be activated by an assigned first and second square wave signal generator, respectively, and, depending on the level of the square wave signal, switches the filtered supply voltage to the first and second signal shaping filters, respectively. In this case, the first and second signal shaping filters can be formed by a series circuit including one or two RC filters, or can be in the form of activatable active filters.

[0023] This makes it possible to adjust the switching edges of the voltage applied to the connection of the capacitive load purely in terms of circuitry, without, for example, having to spend a lot of money on components to influence the current flow and without requiring subsequent harmonic filters.

[0024] In a refinement of the circuit arrangement, at least two capacitive loads can be excited, wherein first connections of these capacitive loads are connected to one another and to a first excitation circuit, wherein the circuit arrangement has a corresponding second excitation circuit for each capacitive load, wherein each second excitation circuit is connected to a second connection of the assigned capacitive load.

[0025] If the intention is to actuate a plurality of capacitive loads independently of one another (eg a smart glass segment of a plurality of segments), the circuit arrangement according to the invention can therefore be expanded in a simple manner and at little expense without having to use further filters.

[0026] The method according to the invention makes it possible to set or compensate for a DC voltage component in the generated AC voltage by making the duty cycles of the signals of the first square wave generator and the second square wave generator different.

[0027] In this way, on the one hand it can be ensured that, if no DC component is present in the excitation voltage of the large-area capacitive load, said DC component can be compensated by modulating the duty cycle of at least one of the two excitation signals. On the other hand, however, the desired DC voltage component can also be set in a targeted manner.

[0028] The invention is explained in more detail below based on exemplary embodiments with the aid of the accompanying drawings, in which:

[0029] Figure 1 shows a block diagram of an exemplary embodiment of a circuit arrangement according to the invention,

[0030] Figure 2 A more detailed circuit diagram showing an exemplary embodiment of a circuit arrangement according to the invention,

[0031] Figure 3 shows the possible voltage and current curves at the output of the voltage follower,

[0032] Figure 4 A first curve showing a square wave voltage and its differential voltage,

[0033] Figure 5 The second curve shows the square wave voltage and its differential voltage,

[0034] Figure 6 The third curve shows the square wave voltage and its differential voltage,

[0035] Figure 7 A fourth curve showing the square wave voltages and their differential voltage when the duty cycle of one of the square wave voltages is changed,

[0036] Figure 8 shows the output spectrum of a non-switching output stage when excited by a 50 Hz square wave voltage.

[0037] exist Figure 1 or Figure 2 In an exemplary embodiment of the present invention, the capacitive load KL has a first connection A1 and a second connection A2. The capacitive load KL is illustrated using an equivalent circuit diagram having a first capacitor C1, a seventh resistor R7 connected in parallel with the capacitor, and an eighth resistor R8 connected in series with the parallel circuit. The seventh resistor R7 and the eighth resistor R8 are parasitic resistances of the first capacitor C1, which substantially forms the capacitive load KL. In particular, the capacitive load may be an excitable glass, the opacity of which may be varied by the RMS value of the AC voltage.

[0038] The AC voltage is generated from two approximately trapezoidal voltages that are phase-shifted relative to each other and is applied to the connection of the capacitive load KL. The differential voltage of the two approximately trapezoidal voltages is then connected across the capacitive load KL.

[0039] This is Figures 4 to 6 , where for simplicity, only the square wave signal is shown here. The upper curve in each of these figures shows the first square wave signal, and the middle curve in each of these figures shows the second square wave signal. Figures 4 to 6 In each of the figures, the two square wave signals are phase-shifted in different ways relative to each other. The respective lower curve shows the differential signal which can be applied as an AC voltage to the capacitive load KL. The phase shift sets the duty cycle of the AC voltage and thus its RMS value.

[0040] according to Figure 1 and Figure 2 In an exemplary embodiment of a circuit arrangement of , the first square wave signal and the second square wave signal are generated by a first square wave signal generator RSG1 and a second square wave signal generator RSG2, respectively. Although the square wave signal generators RSG1, RSG2 are shown as voltage sources V2, V3, they can also be advantageously implemented by a microcontroller.

[0041] In the following, based on Figure 2 The first excitation circuit in the upper half of the diagram is used to explain the circuit arrangement S, and the second excitation circuit has the same design, which can be easily seen.

[0042] The first square wave signal generator RSG1 excites the first filter circuit FS1 via the first resistor R1. In the exemplary embodiment, the first filter circuit FS1 is formed by a series circuit including a second npn transistor Q2, a seventh diode D7 and a first npn transistor Q1, which is connected between the two poles of the power supply voltage VS. The base connection of the second transistor Q2 is connected to the collector connection of the second transistor Q2 via the second resistor R2 and directly to the collector connection of the first transistor Q1.

[0043] The emitter of the second transistor Q2 is connected to the low potential of the supply voltage VS via the series circuit of the ninth resistor R9 and the second capacitor C2. It is connected to the low potential of the supply voltage VS via the series circuit of the tenth resistor R10 and the third capacitor C3. The connection of the tenth resistor R10 and the third capacitor C3 forms the output connection of the first filter circuit FS1.

[0044] Depending on the level of the first square wave signal generator RSG1, the first filter circuit FS1 and the second filter circuit FS2 therefore switch the potential of the power supply voltage VS from the first npn transistor Q1 and the second npn transistor Q2 to the series circuit of the two RC filters by means of the first switching unit, so as to tilt the edge of the square wave signal. Therefore, the edge gradient can be set by selecting the values ​​of the resistor and capacitor of the first filter circuit FS1.

[0045] It is also possible to select an active filter, the filter properties of which can then be set, for example, by a microcontroller which also provides the square-wave signal.

[0046] A first voltage follower SF1 is connected downstream of the first filter circuit FS1. The voltage follower is formed by a series circuit comprising an n-channel field effect transistor M1 and a p-channel field effect transistor M2, which is connected between the two poles of the supply voltage VS filtered by the central filter ZF. The gate connections of the two field effect transistors M1, M2 are connected to the output connection of the first filter circuit FS1.

[0047] The connection point of the two field effect transistors M1 and M2 is connected via a fifteenth resistor R15 to an output connection of a first voltage follower SF1 , which in turn is connected to a first connection A1 of a capacitive load KL.

[0048] The gate connection of the n-channel field effect transistor M1 is connected to the output connection of the first voltage follower SF1 via a series circuit including a first forward biased diode D1 and an eleventh npn transistor Q11, and the gate connection of the p-channel field effect transistor M2 is connected to the output connection of the first voltage follower SF1 via a series circuit including a second reverse biased diode D2 and a twelfth pnp transistor Q12. The base connections of the eleventh and twelfth transistors are connected to the connection point of the two field effect transistors M1 and M2.

[0049] Thus, the first excitation circuit AS1 described is driven by a first square wave signal generator RSG1 which generates a first square wave signal, such as Figures 3 to 5 The duty cycle of the first square wave signal is preferably 50%. Figure 3 As shown, the edge of the square wave signal is tilted by the first filter circuit FS1 connected downstream. Therefore, the output signal of the first filter circuit FS1 has a trapezoidal shape.

[0050] This trapezoidal output signal of the first filter circuit FS1 is then supplied to the first voltage follower SF1 which performs only current amplification but retains the signal waveform and supplies the signal to the capacitive load KL.

[0051] In the same way, the second excitation circuit AS2 is formed by a second square wave signal generator RSG2, a second filter circuit FS2 and a second voltage follower SF2 having the same function. The second excitation circuit AS2 is connected to a second connection A2 of the capacitive load KL via the output of the second voltage follower SF2.

[0052] With the aid of a control circuit (not shown), two square wave signals are generated so as to be phase-shifted and supplied as trapezoidal signals to the capacitive load KL, whereby a desired AC voltage having a desired RMS value depending on the phase shift is applied thereto.

[0053] If a DC component is also required in the AC voltage, the positive DC component and the negative DC component can be set by changing the duty cycle of at least one square wave signal; Figure 7 shown.

[0054] In the same way, a possible DC component can also be compensated by adjusting the duty cycle.

[0055] The described circuit arrangement S is therefore a centrally filtered excitation stage or output stage for a capacitive load KL which must be operated with an AC voltage and controlled by its RMS value and can be implemented solely by means of a DC / DC converter or DC / AC converter of the connections A1, A2 which are not used for exciting the capacitive load KL.

[0056] The connection of the capacitive load KL is not routed alternately in half cycles, but is staggered in such a way that the energy required to discharge the load does not come from the circuit power supply but from the load itself.

[0057] The RMS value of the AC voltage is determined by the phase shift of the control signal and therefore by the voltage across the connection of the load. This means that there is no need to track the amplitude of the output voltage.

[0058] The DC component can be eliminated by changing the duty cycle of the excitation signal, or the DC component can be realized by changing the duty cycle of the excitation signal. The DC component can be positive or negative.

[0059] Subsequently, a central filter ZF can be formed jointly for all drive circuits with respect to the supply voltage VS, or a central filter ZF can be formed individually for each drive circuit, which can reduce the power required for filtering.

[0060] The driver stage or output stage can be formed by MOSFETs or bipolar transistors. It can also be formed by electromechanical actuators or amplifiers in general.

[0061] Current control through the output stage can be defined by means of passive or active filters or by means of a variable gain of the amplifier.

[0062] The controlled actuator can have capacitive or resistive behavior.

[0063] The controlled actuator can also be energized with AC current instead of AC voltage.

[0064] With suitable circuit design, attenuation of over 150 dB relative to the excitation voltage in the AM radio band can be easily achieved, which means that a filter at the output is no longer required.

Claims

1. A circuit arrangement (S) for exciting a large-area capacitive load (KL) which is operated with an AC voltage and has a first connection (A1) and a second connection (A2), the behavior of the large-area capacitive load being dependent on the RMS value of the applied voltage, The circuit arrangement comprises a first excitation circuit and a second excitation circuit (AS1, AS2) which are designed to generate a first signal and a second signal, respectively, which are optimized with respect to harmonics, wherein: The output connection of the first excitation circuit (AS1) is connected to the first connection (A1) of the capacitive load (KL), and the output connection of the second excitation circuit (AS2) is connected to the second connection (A2) of the capacitive load (KL), and the circuit arrangement comprises a control circuit which is designed to actuate the first and second actuation circuits (AS1, AS2) in such a way that the generated harmonically optimized signals are offset in time with respect to one another, thereby applying an AC voltage to the capacitive load (KL), in, The first excitation circuit and the second excitation circuit (AS1, AS2) are each formed by: a first excitable square wave signal generator (RSG1) and a second excitable square wave signal generator (RSG2), respectively, A first filter circuit and a second filter circuit (FS1, FS2) are respectively connected downstream of the first square wave signal generator and the second square wave signal generator (RSG1, RSG2), and the gradient of the switching edge of the square wave signal is set by means of the filter circuit, a first and a second voltage follower (SF1, SF2) connected downstream of the first and second filter circuits (FS1, FS2), respectively, the respective output connections of the voltage followers forming in each case the output connections of the first and second excitation circuits, respectively, and the voltage followers having in each case power connections, wherein the power connections are connected to a power supply voltage (VS) via at least one EMC filter (ZF), Therein, the control circuit is designed to excite the first square wave signal generator and the second square wave signal generator (RSG1, RSG2) in such a way that the generated square wave signals are offset in time from each other.

2. The circuit arrangement according to claim 1, wherein: The first square wave signal generator and the second square wave signal generator (RSG1, RSG2) are formed by a microcontroller.

3. The circuit arrangement according to claim 1 or 2, wherein: The first filtering circuit and the second filtering circuit (FS1, FS2) are respectively formed by a first switching unit (Q1, Q2) and a second switching unit (Q3, Q4), wherein these switching units (Q1, Q2; Q3, Q4) can each be excited by an assigned first square wave signal generator and a second square wave signal generator (RSG1, RSG2), respectively, and depending on the level of the square wave signal, the EMC filtered power supply voltage (VS) is switched to the first signal forming filter and the second signal forming filter (R3, C2, R10, C3; R5, C4, R6, C5), respectively.

4. The circuit arrangement of claim 3, wherein: The first signal shaping filter and the second signal shaping filter (R3, C2, R10, C3; R5, C4, R6, C5) are formed by a series circuit including two RC filters.

5. The circuit arrangement of claim 3, wherein: The first signal-shaping filter and the second signal-shaping filter are in the form of drivable active filters.

6. The circuit arrangement as claimed in claim 1, wherein: A separate EMC filter (ZF) is provided for each excitation circuit (AS1, AS2) connected to the output (A1, A2).

7. The circuit arrangement as claimed in one of the preceding claims, wherein: At least two capacitive loads (KL) are intended to be excited, wherein first connections (A1) of these capacitive loads (KL) are connected to one another and to the first excitation circuit, wherein the circuit arrangement has a corresponding second excitation circuit for each capacitive load (KL), wherein each second excitation circuit is connected to a second connection (A2) of the assigned capacitive load (KL).

8. A method for operating a circuit arrangement as claimed in one of claims 1 to 7, wherein: The control circuit excites the first square wave signal generator and the second square wave signal generator (RSG1, RSG2) in the following manner: a positive voltage is continuously applied between the first connection and the second connection of the (these) capacitive load (KL) by these square wave signals that are offset from each other in time, the first connection and the second connection of the (these) capacitive load (KL) are connected to each other and to the low potential of the filtered power supply voltage (VS), a negative voltage is applied between the first connection and the second connection (A1, A2) of the (these) capacitive load (KL), and the first connection and the second connection (A1, A2) of the (these) capacitive load (KL) are connected to each other and to the high potential of the filtered power supply voltage (VS), thereby applying an AC voltage to the capacitive load (KL).

9. The method of claim 8, wherein: The duration of the positive voltage and the negative voltage and therefore the RMS value of the AC voltage is determined by the degree of offset of the two square wave signals.

10. The method according to claim 8 or 9, wherein: By making the duty cycles of the signals of the first square wave generator and the second square wave generator different, the DC voltage component in the generated AC voltage is set or compensated.

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