Communication method and device, system-on-chip, storage medium and program product

Abstract

The invention relates to a communication method and device, a system-on-chip, a storage medium and a program product. The method is applied to a system-on-chip, and the system-on-chip comprises a plurality of functional modules. The method comprises the following steps: writing communication data initiated by a first functional module into a first-in first-out buffer of a communication address corresponding to a second functional module, generating an interrupt signal and sending the interrupt signal to the second functional module; the interrupt signal is used for prompting the second module that the first-in first-out buffer stores to-be-processed communication data; and controlling the second function module to read the communication data in the first-in first-out buffer based on the interrupt signal and a first-in first-out mode. By adopting the method, the instant communication among different functional modules in the system-on-chip can be ensured, and the communication capacity and flexibility are expanded.

Description

Technical Field

[0001] The present application relates to the field of chip technology, and in particular to a communication method, device, system-level chip, storage medium and program product. Background Art

[0002] A system or product formed by combining multiple integrated circuit modules with specific functions on a single chip is called a system-level chip. The system-level chip contains a complete hardware system and the embedded software it carries.

[0003] In traditional technology, communication between different functional modules within a system-level chip is achieved by the initiator configuring the registers of the destination or the memory with an address read-write control module, waiting for the destination to poll for updated information at a set time, and then triggering subsequent actions to complete closed-loop communication.

[0004] However, traditional technologies have the problem of insufficiently timely communication. Summary of the invention

[0005] Based on this, it is necessary to provide a communication method, device, system-level chip, storage medium and program product that can ensure timely communication between different functional modules within the system-level chip in order to address the above technical problems.

[0006] In a first aspect, the present application provides a communication method, the method being applied to a system-on-chip, the system-on-chip comprising a plurality of functional modules; the method comprising:

[0007] Writing the communication data initiated by the first functional module into a first-in-first-out buffer corresponding to the communication address of the second functional module, generating an interrupt signal and sending the interrupt signal to the second functional module; the interrupt signal is used to prompt the second functional module that the first-in-first-out buffer stores communication data to be processed;

[0008] The second functional module is controlled to read the communication data in the first-in-first-out buffer based on the interrupt signal and a first-in-first-out method.

[0009] In one embodiment, the controlling the second functional module to read the communication data in the first-in-first-out buffer based on the interrupt signal and the first-in-first-out method includes:

[0010] Determining a processing priority of each communication address of the second functional module;

[0011] The second functional module is controlled to read the communication data based on the interrupt signal, the processing priority and a first-in-first-out method.

[0012] In one embodiment, the method further comprises:

[0013] When the communication data in the first-in-first-out buffer is empty, the state flag of the first-in-first-out buffer is set to an empty state flag; the empty state flag is used to indicate that the first functional module has not initiated communication data to the second functional module, or that the communication data initiated by the first functional module has been completely read.

[0014] In one embodiment, the method further comprises:

[0015] When the communication data initiated by the first functional module fills up the FIFO buffer, the status flag of the FIFO buffer is set to a full status flag; the full status flag is used to instruct the first functional module to stop initiating communication data to the second functional module.

[0016] In one embodiment, the method further comprises:

[0017] When the FIFO buffer is full of communication data, if it is detected that the first functional module continues to write communication data, an abnormal state signal is generated and output; the abnormal state signal is used to indicate that the state of the FIFO buffer is abnormal.

[0018] In one embodiment, the method further comprises:

[0019] Determining a storage depth and a storage width of the first-in-first-out buffer according to communication requirements of the first functional module and the second functional module;

[0020] The first-in-first-out buffer is configured according to the storage depth and the storage width.

[0021] In a second aspect, the present application further provides a communication device, the device is applied to a system-level chip, the system-level chip includes multiple functional modules; the device includes:

[0022] A writing module, used for writing the communication data initiated by the first functional module into a first-in-first-out buffer corresponding to the communication address of the second functional module, generating an interrupt signal and sending the interrupt signal to the second functional module; the interrupt signal is used to prompt the second functional module that the first-in-first-out buffer stores communication data to be processed;

[0023] The reading module is used to control the second functional module to read the communication data in the first-in-first-out buffer based on the interrupt signal and the first-in-first-out method.

[0024] In a third aspect, the present application further provides a system-level chip, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:

[0025] Writing the communication data initiated by the first functional module into the first-in-first-out buffer corresponding to the communication address of the second functional module, generating an interrupt signal and sending the interrupt signal to the second functional module; the interrupt signal is used to prompt the second functional module that the first-in-first-out buffer stores communication data to be processed;

[0026] The second functional module is controlled to read the communication data in the first-in-first-out buffer based on the interrupt signal and a first-in-first-out method.

[0027] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the following steps are implemented:

[0028] Writing the communication data initiated by the first functional module into a first-in-first-out buffer corresponding to the communication address of the second functional module, generating an interrupt signal and sending the interrupt signal to the second functional module; the interrupt signal is used to prompt the second functional module that the first-in-first-out buffer stores communication data to be processed;

[0029] The second functional module is controlled to read the communication data in the first-in-first-out buffer based on the interrupt signal and a first-in-first-out method.

[0030] In a fifth aspect, the present application further provides a computer program product, including a computer program, which implements the following steps when executed by a processor:

[0031] Writing the communication data initiated by the first functional module into a first-in-first-out buffer corresponding to the communication address of the second functional module, generating an interrupt signal and sending the interrupt signal to the second functional module; the interrupt signal is used to prompt the second functional module that the first-in-first-out buffer stores communication data to be processed;

[0032] The second functional module is controlled to read the communication data in the first-in-first-out buffer based on the interrupt signal and a first-in-first-out method.

[0033] The communication method, device, system-level chip, storage medium and program product described above write the communication data initiated by the first functional module into the first-in-first-out buffer corresponding to the communication address of the second module, and directly identify it by using the empty and full status of the first-in-first-out buffer itself, and display the non-empty status of the first-in-first-out buffer when there is data storage, and display the full status of the first-in-first-out buffer when the data storage reaches the maximum storage depth, so that when there is communication data stored in the first-in-first-out buffer, an interrupt signal is generated and the interrupt signal is sent to the second functional module, and the second functional module can be prompted by the interrupt signal that the first-in-first-out buffer of the second functional module stores communication data to be processed, and the interrupt signal is sent to the second functional module. Signal and data transmission are combined into one, which shortens the communication delay, improves the timeliness of the communication process, and realizes a more efficient and concise communication process. In addition, by controlling the second functional module to read the communication data in the first-in-first-out buffer based on the interrupt signal and the first-in-first-out method, it is possible to avoid the communication data being overwritten due to the second functional module not processing the arrived communication data in time when new communication data arrives at the second functional module, thereby realizing the storage of multiple data at one address and increasing the amount of information in communication. In addition, the process does not need to add other complex functional devices, nor will it significantly increase the area and power consumption of the module, thereby expanding the communication capacity and flexibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0035] Figure 1 is a flow chart of a communication method in one embodiment;

[0036] Figure 2 is a flow chart of a communication method in another embodiment;

[0037] Figure 3 is a flow chart of a communication method in another embodiment;

[0038] Figure 4 is a schematic diagram of the architecture of a communication method in an embodiment;

[0039] Figure 5 FIG. 4 is a structural block diagram of a communication device in an embodiment. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0041] The communication method provided in the embodiment of the present application can be applied to a system-on-chip, wherein the system-on-chip is an integrated circuit with a dedicated purpose, which contains all the contents of a complete system and embedded software. Typically, the system-on-chip includes multiple functional modules, and the multiple functional modules interact with each other through communication to jointly process a certain instruction or task. More specifically, the communication method provided in the embodiment of the present application is specifically applied to a scenario in which multiple different functional modules communicate with each other.

[0042] In an exemplary embodiment, a communication method is provided, which is applied to a system-on-chip, wherein the system-on-chip includes a plurality of functional modules; Figure 1 As shown, the method comprises the following steps:

[0043] S201, write the communication data initiated by the first functional module into the first-in-first-out buffer of the second functional module corresponding to the communication address, generate an interrupt signal and send the interrupt signal to the second functional module; the interrupt signal is used to prompt the second functional module that the first-in-first-out buffer stores communication data to be processed.

[0044] Among them, the first functional module and the second functional module are both functional modules in the system-level chip. Optionally, the first functional module in this embodiment can be an initiator, and the second functional module can be a destination. Optionally, the first functional module and the second functional module can both include multiple different communication addresses. As an optional implementation, when the second functional module is the destination, each different communication address of the second functional module can use a first-in-first-out buffer to store received communication data, and use the empty and full status of the first-in-first-out buffer itself to directly identify whether communication data from the initiator has arrived, whether the arrived information has been completely acquired by the destination, etc.

[0045] Optionally, in this embodiment, the processor in the system-level chip can pre-configure a first-in-first-out buffer for the communication address corresponding to the second functional module. When the first functional module initiates communication data, the communication data initiated by the first functional module is written into the first-in-first-out buffer corresponding to the communication address of the second functional module, and then an interrupt signal is generated. The interrupt signal prompts the second functional module that there is communication data to be processed stored in its corresponding first-in-first-out buffer, and the second functional module can process the data stored in the first-in-first-out buffer. It can be understood that by combining the interrupt signal and data transmission into one, the communication delay can be shortened and the timeliness of the communication process can be improved. In addition, the interrupt signal can prompt the second functional module to process the communication data stored in the first-in-first-out buffer in a timely manner to prevent the communication data from being overwritten.

[0046] S202, controlling the second functional module to read the communication data in the first-in-first-out buffer based on the interrupt signal and the first-in-first-out method.

[0047] In this embodiment, after the interrupt processing module of the second functional module of the system-level chip generates an interrupt signal and sends the interrupt signal to the processor, the second functional module can be controlled to read the communication data in the first-in-first-out buffer based on the received interrupt signal and the first-in-first-out method. It can be understood that when the second functional module is controlled to read the communication data in the first-in-first-out buffer based on the first-in-first-out method, the communication data that enters first is read out first, which can effectively avoid the disorder of the order of multiple communication data when they are stored, and the multiple communication data are stored in the first-in-first-out buffer at the same address, and the storage of communication data also realizes the storage expansion from point to line.

[0048] In the above communication method, the communication data initiated by the first functional module is written into the first-in-first-out buffer corresponding to the communication address of the second module, and the empty and full states of the first-in-first-out buffer itself are used for direct identification. When there is data storage, the non-empty state of the first-in-first-out buffer is displayed, and when the data storage reaches the maximum storage depth, the full state of the first-in-first-out buffer is displayed, so that when there is communication data stored in the first-in-first-out buffer, an interrupt signal is generated and sent to the second functional module, and the interrupt signal can be used to prompt the second functional module that the first-in-first-out buffer stores communication data to be processed, and the interrupt signal and data transmission are combined into one, thereby shortening the communication delay, improving the timeliness of the communication process, and realizing a more efficient and concise communication process. In addition, by controlling the second functional module to read the communication data in the first-in-first-out buffer based on the interrupt signal and the first-in-first-out method, it is possible to avoid the communication data being overwritten due to the second functional module not processing the arrived communication data in time when new communication data arrives at the second functional module, so that one address can store multiple data and increase the amount of information in the communication; in addition, the process does not need to add other devices with complex functions, and will not significantly increase the area and power consumption of the module, thereby expanding the communication capacity and flexibility.

[0049] In this embodiment, the detailed process of the processor of the system-level chip controlling the second functional module to read the communication data is explained. Figure 2 As shown, the above S202 includes:

[0050] S301, determining the processing priority of each communication address of the second functional module.

[0051] Usually, each communication address of the second functional module corresponds to a processing priority, and the processor of the system-level chip can determine the processing priority of each communication address of the second functional module according to the task to be processed. Optionally, in this embodiment, the processor of the system-level chip can determine the processing priority of each communication address of the second functional module according to the type of communication data stored in the first-in-first-out buffer of each communication address of the second functional module, that is, the processing order in which the processor of the system-level chip reads the communication data stored in the first-in-first-out buffer of each communication address.

[0052] S302, controlling the second functional module to read communication data based on the interrupt signal, processing priority and first-in-first-out method.

[0053] Optionally, in this embodiment, after the processor of the system-level chip determines the processing priority of each communication address of the second functional module, it can determine the processing priority of the communication address corresponding to the first-in-first-out buffer storing communication data in the second functional module, and then control the second functional module to read the communication data stored in the first-in-first-out buffer of the second functional module based on the above-mentioned interrupt signal, the processing priority of each communication address of the second module and the first-in-first-out method.

[0054] In the present embodiment, by determining the processing priority of each communication address of the second functional module, the processor of the system-level chip can control the second functional module to read the communication data stored in the first-in-first-out buffer of the second functional module based on the interrupt signal, the processing priority of each communication address of the second functional module and the first-in-first-out method, which can effectively avoid the situation where the order of communication data is disordered when reading the communication data, resulting in the loss of communication data stored in the first-in-first-out buffer of the second functional module or the failure to read complete communication data.

[0055] This embodiment will describe in detail the processing performed by the processor of the system-level chip when the communication data in the first-in-first-out buffer of the second functional module is empty. Based on the above embodiment, in one embodiment, the above method also includes:

[0056] Step A, when the communication data in the FIFO buffer is empty, the state flag of the FIFO buffer is set to an empty state flag; the empty state flag is used to indicate that the first functional module has not initiated communication data to the second functional module, or that the communication data initiated by the first functional module has been read completely.

[0057] In this embodiment, when the processor of the system-level chip determines that the communication data stored in the first-in-first-out buffer corresponding to the second functional module is empty or not full, that is, when the communication data stored in the first-in-first-out buffer is not full, the processor of the system-level chip can set the state flag of the first-in-first-out buffer of the second functional module to an empty state or a non-full state. The empty state flag indicates that the first functional module has not initiated communication data to the second functional module, or the communication data initiated by the first functional module has been read in full; the non-full state flag indicates that the first-in-first-out buffer of the second functional module is not full, for the first functional module to query or identify, and both the empty state and the non-full state flag indicate that the first functional module can initiate communication data to the second functional module. It should be noted that when multiple communication data are stored in the first-in-first-out buffer, the non-empty state of the first-in-first-out buffer is valid until the second functional module reads the last communication data, and the second functional module can continuously obtain the received complete data until the empty state flag of the first-in-first-out buffer is set, so that the second functional module can avoid missing the normal delivery of complete information and ensure the accuracy of communication between the first functional module and the second functional module.

[0058] In the present embodiment, when the communication data in the first-in-first-out buffer is empty or not full, the empty or not full status mark of the first-in-first-out buffer can promptly instruct the first functional module to send the communication data to the second functional module, thereby ensuring the communication efficiency between the first functional module and the second functional module. In addition, by using the empty state when the first-in-first-out buffer has no data stored, it is indicated that the previously delivered data has been successfully taken away, thereby eliminating the process of the second functional module replying to the information acquisition status of the first functional module, thereby improving the management efficiency of the communication process by the second functional module and the first functional module.

[0059] This embodiment will describe in detail the processing performed by the processor of the system-level chip when the first-in-first-out buffer of the second functional module is full of communication data. Based on the above embodiment, in one embodiment, the above method also includes:

[0060] Step B, when the communication data initiated by the first functional module fills up the FIFO buffer, the status flag of the FIFO buffer is set to a full status flag; the full status flag is used to instruct the first functional module to stop initiating communication data to the second functional module.

[0061] Optionally, in the present embodiment, the processor of the system-level chip can determine whether the first-in-first-out buffer is full of communication data based on the storage depth of the first-in-first-out buffer. When the stored communication data reaches the storage depth of the first-in-first-out buffer, it is determined that the first-in-first-out buffer is full of communication data sent by the first functional module. At this time, the processor of the system-level chip can set the status flag of the first-in-first-out buffer to a full status flag, so as to instruct the first functional module to stop initiating communication data to the second functional module through the full status flag, so as to avoid the problem of communication data being overwritten due to too much communication data being written into the first-in-first-out buffer of the second functional module but the second functional module being unable to process it in time.

[0062] In addition, in this embodiment, as another optional implementation, when the first-in-first-out buffer of the second functional module is full of communication data, if the processor of the system-level chip detects that the first functional module is still continuing to write communication data, the processor can generate and output an abnormal status signal, which indicates that the status of the first-in-first-out buffer of the communication address corresponding to the first functional module and / or the second functional module is abnormal for query and subsequent processing.

[0063] In the present embodiment, when the communication data initiated by the first functional module fills up the first-in-first-out buffer of the second functional module, by setting the status flag of the first-in-first-out buffer of the second functional module to a full status flag, the first functional module can be instructed by the full status flag to stop initiating communication data to the second functional module, thereby avoiding the problem of communication data being overwritten due to excessive communication data being written to the first-in-first-out buffer of the second functional module but the second functional module being unable to process it in time.

[0064] In this embodiment, the configuration process of the first-in-first-out buffer corresponding to the communication address of the second functional module is explained. In one embodiment, Figure 3 As shown, the above method also includes:

[0065] S401, determining a storage depth and a storage width of a first-in-first-out buffer according to communication requirements of a first functional module and a second functional module.

[0066] Optionally, in this embodiment, the amount of communication data between the first functional module and the second functional module can be determined according to the communication requirements of the first functional module and the second functional module, and then the storage depth of the first-in-first-out buffer can be determined according to the amount of communication data, and the storage width of the first-in-first-out buffer can be determined according to the width of the communication data. It can be understood that if the amount of communication data between the first functional module and the second functional module is larger, the storage depth of the first-in-first-out buffer will be deeper; if the width of the communication data between the first functional module and the second functional module is wider, the storage width of the first-in-first-out buffer will be wider.

[0067] S402, configuring a first-in-first-out buffer according to a storage depth and a storage width.

[0068] Optionally, in this embodiment, the processor of the system-level chip can configure the first-in-first-out buffer of the second functional module according to the determined storage depth and storage width of the first-in-first-out buffer, so that the same communication address can continuously receive multiple communication data without affecting each other, and the storage is realized from point to line, which significantly increases the amount of communication information.

[0069] In this embodiment, the processor of the system-level chip can determine the storage depth and storage width of the first-in-first-out buffer of the second functional module according to the communication requirements of the first functional module and the second functional module, so that the first-in-first-out buffer of the second functional module can be configured according to the determined storage depth and storage width, so that the same communication address of the second functional module can continuously receive multiple communication data, and the multiple communication data do not affect each other, thereby increasing the communication information volume between the first functional module and the second functional module, and making the communication between the first functional module and the second functional module more efficient.

[0070] In order to facilitate understanding by those skilled in the art, the communication method provided by the present disclosure is described in detail below. Figure 4 As shown, the method may include:

[0071] S1, determining a storage depth and a storage width of a first-in-first-out buffer of the second functional module according to communication requirements of the first functional module and the second functional module.

[0072] S2, configuring a first-in-first-out buffer corresponding to the communication address of the second functional module according to the determined storage depth and storage width.

[0073] S3, when the communication data in the FIFO buffer is empty, the state flag of the FIFO buffer is set to an empty state flag; the empty state flag is used to indicate that the first functional module has not initiated communication data to the second functional module, or that the communication data initiated by the first functional module has been completely read.

[0074] S4, writing the communication data initiated by the first functional module into the first-in-first-out buffer corresponding to the communication address of the second functional module, generating an interrupt signal and sending the interrupt signal to the second functional module; the interrupt signal is used to prompt the second functional module that the first-in-first-out buffer stores communication data to be processed.

[0075] S5, determining the processing priority of each communication address of the second functional module.

[0076] S6, controlling the second functional module to read the communication data based on the interrupt signal, processing priority and first-in-first-out method.

[0077] S7, when the communication data initiated by the first functional module fills up the FIFO buffer, the status flag of the FIFO buffer is set to a full status flag; the full status flag is used to instruct the first functional module to stop initiating communication data to the second functional module.

[0078] S8, when the FIFO buffer is full of communication data, if it is detected that the first functional module continues to write communication data, an abnormal state signal is generated and output; the abnormal state signal is used to indicate that the state of the FIFO buffer is abnormal.

[0079] It should be understood that, although the steps in the flowcharts involved in the above embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above embodiments may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0080] Based on the same inventive concept, the embodiment of the present application also provides a communication device for implementing the communication method involved above. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme recorded in the above method, so the specific limitations in one or more communication device embodiments provided below can refer to the limitations on the communication method above, and will not be repeated here.

[0081] In an exemplary embodiment, Figure 5 As shown, a communication device is provided, which is applied to a system-level chip, and the system-level chip includes multiple functional modules, and the communication device includes: a writing module and a reading module, wherein:

[0082] A writing module, used to write the communication data initiated by the first functional module into a first-in-first-out buffer corresponding to the communication address of the second functional module, generate an interrupt signal and send the interrupt signal to the second functional module; the interrupt signal is used to prompt the second functional module that the first-in-first-out buffer stores communication data to be processed;

[0083] The reading module is used to control the second functional module to read the communication data in the first-in-first-out buffer based on the interrupt signal and the first-in-first-out method.

[0084] The communication device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0085] Based on the above embodiment, optionally, the above reading module includes: a determination unit and a reading unit, wherein:

[0086] The determining unit is used to determine the processing priority of each communication address of the second functional module.

[0087] The reading unit is used to control the second functional module to read the communication data based on the interrupt signal, processing priority and first-in-first-out method.

[0088] The communication device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0089] Based on the above embodiment, optionally, the above device further includes: a first setting module, wherein:

[0090] The first setting module is used to set the state flag of the first-in-first-out buffer to an empty state flag when the communication data in the first-in-first-out buffer is empty; the empty state flag is used to indicate that the first functional module has not initiated communication data to the second functional module, or that the communication data initiated by the first functional module has been read in full.

[0091] The communication device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0092] Based on the above embodiment, optionally, the above device further includes: a second setting module, wherein:

[0093] The second setting module is used to set the status flag of the first-in-first-out buffer to a full status flag when the communication data initiated by the first functional module fills the first-in-first-out buffer; the full status flag is used to instruct the first functional module to stop initiating communication data to the second functional module.

[0094] The communication device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0095] Based on the above embodiment, optionally, the above device further includes: a generating module, wherein:

[0096] The generating module is used for generating and outputting an abnormal state signal when it is detected that the first function module continues to write communication data when the first-in-first-out buffer is full of communication data; the abnormal state signal is used for indicating that the state of the first-in-first-out buffer is abnormal.

[0097] The communication device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0098] Based on the above embodiment, optionally, the above device further includes: a determination module and a configuration module, wherein:

[0099] The determination module is used to determine the storage depth and storage width of the first-in-first-out buffer according to the communication requirements of the first functional module and the second functional module.

[0100] The configuration module is used to configure the first-in-first-out buffer according to the storage depth and storage width.

[0101] The communication device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0102] Each module in the above communication device can be implemented in whole or in part by software, hardware or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to each module.

[0103] In an exemplary embodiment, a system-on-chip is provided, including multiple functional modules, a memory, and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the following steps are implemented:

[0104] Writing the communication data initiated by the first functional module into the first-in-first-out buffer corresponding to the communication address of the second functional module, generating an interrupt signal and sending the interrupt signal to the second functional module; the interrupt signal is used to prompt the second functional module that the first-in-first-out buffer stores the communication data to be processed;

[0105] The second functional module is controlled to read the communication data in the first-in-first-out buffer based on the interrupt signal and the first-in-first-out method.

[0106] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0107] Determining the processing priority of each communication address of the second functional module;

[0108] The second functional module is controlled to read the communication data based on the interrupt signal, the processing priority and the first-in-first-out method.

[0109] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0110] When the communication data in the FIFO buffer is empty, the state flag of the FIFO buffer is set to an empty state flag; the empty state flag is used to indicate that the first functional module has not initiated communication data to the second functional module, or that the communication data initiated by the first functional module has been completely read.

[0111] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0112] When the communication data initiated by the first functional module fills up the FIFO buffer, the status flag of the FIFO buffer is set to a full status flag; the full status flag is used to instruct the first functional module to stop initiating communication data to the second functional module.

[0113] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0114] When the FIFO buffer is full of communication data, if it is detected that the first functional module continues to write communication data, an abnormal state signal is generated and output; the abnormal state signal is used to indicate that the state of the FIFO buffer is abnormal.

[0115] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0116] Determine the storage depth and storage width of the first-in-first-out buffer according to the communication requirements of the first functional module and the second functional module;

[0117] Configure the first-in-first-out buffer according to the storage depth and storage width.

[0118] In one embodiment, a computer readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0119] Writing the communication data initiated by the first functional module into the first-in-first-out buffer corresponding to the communication address of the second functional module, generating an interrupt signal and sending the interrupt signal to the second functional module; the interrupt signal is used to prompt the second functional module that the first-in-first-out buffer stores the communication data to be processed;

[0120] The second functional module is controlled to read the communication data in the first-in-first-out buffer based on the interrupt signal and the first-in-first-out method.

[0121] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0122] Determining the processing priority of each communication address of the second functional module;

[0123] The second functional module is controlled to read the communication data based on the interrupt signal, the processing priority and the first-in-first-out method.

[0124] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0125] When the communication data in the FIFO buffer is empty, the state flag of the FIFO buffer is set to an empty state flag; the empty state flag is used to indicate that the first functional module has not initiated communication data to the second functional module, or that the communication data initiated by the first functional module has been completely read.

[0126] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0127] When the communication data initiated by the first functional module fills up the FIFO buffer, the status flag of the FIFO buffer is set to a full status flag; the full status flag is used to instruct the first functional module to stop initiating communication data to the second functional module.

[0128] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0129] When the FIFO buffer is full of communication data, if it is detected that the first functional module continues to write communication data, an abnormal state signal is generated and output; the abnormal state signal is used to indicate that the state of the FIFO buffer is abnormal.

[0130] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0131] Determine the storage depth and storage width of the first-in-first-out buffer according to the communication requirements of the first functional module and the second functional module;

[0132] Configure the first-in-first-out buffer according to the storage depth and storage width.

[0133] In one embodiment, a computer program product is provided, comprising a computer program, which, when executed by a processor, implements the following steps:

[0134] Writing the communication data initiated by the first functional module into the first-in-first-out buffer corresponding to the communication address of the second functional module, generating an interrupt signal and sending the interrupt signal to the second functional module; the interrupt signal is used to prompt the second functional module that the first-in-first-out buffer stores the communication data to be processed;

[0135] The second functional module is controlled to read the communication data in the first-in-first-out buffer based on the interrupt signal and the first-in-first-out method.

[0136] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0137] Determining the processing priority of each communication address of the second functional module;

[0138] The second functional module is controlled to read the communication data based on the interrupt signal, the processing priority and the first-in-first-out method.

[0139] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0140] When the communication data in the FIFO buffer is empty, the state flag of the FIFO buffer is set to an empty state flag; the empty state flag is used to indicate that the first functional module has not initiated communication data to the second functional module, or that the communication data initiated by the first functional module has been completely read.

[0141] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0142] When the communication data initiated by the first functional module fills up the FIFO buffer, the status flag of the FIFO buffer is set to a full status flag; the full status flag is used to instruct the first functional module to stop initiating communication data to the second functional module.

[0143] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0144] When the FIFO buffer is full of communication data, if it is detected that the first functional module continues to write communication data, an abnormal state signal is generated and output; the abnormal state signal is used to indicate that the state of the FIFO buffer is abnormal.

[0145] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0146] Determine the storage depth and storage width of the first-in-first-out buffer according to the communication requirements of the first functional module and the second functional module;

[0147] Configure the first-in-first-out buffer according to the storage depth and storage width.

[0148] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0149] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0150] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A communication method, characterized in that: The method is applied to a system-on-chip, and the system-on-chip includes a plurality of functional modules; the method includes: Writing the communication data initiated by the first functional module into a first-in-first-out buffer corresponding to the communication address of the second functional module, generating an interrupt signal and sending the interrupt signal to the second functional module; the interrupt signal is used to prompt the second functional module that the first-in-first-out buffer stores communication data to be processed; The second functional module is controlled to read the communication data in the first-in-first-out buffer based on the interrupt signal and a first-in-first-out method.

2. The method according to claim 1, characterized in that The controlling the second functional module to read the communication data in the first-in-first-out buffer based on the interrupt signal and the first-in-first-out method includes: Determining a processing priority of each communication address of the second functional module; The second functional module is controlled to read the communication data based on the interrupt signal, the processing priority and a first-in-first-out method.

3. The method according to claim 2, characterized in that The method further comprises: When the communication data in the first-in-first-out buffer is empty, the state flag of the first-in-first-out buffer is set to an empty state flag; the empty state flag is used to indicate that the first functional module has not initiated communication data to the second functional module, or that the communication data initiated by the first functional module has been completely read.

4. The method according to claim 1, characterized in that: The method further comprises: When the communication data initiated by the first functional module fills up the FIFO buffer, the status flag of the FIFO buffer is set to a full status flag; the full status flag is used to instruct the first functional module to stop initiating communication data to the second functional module.

5. The method according to claim 4, characterized in that The method further comprises: When the FIFO buffer is full of communication data, if it is detected that the first functional module continues to write communication data, an abnormal state signal is generated and output; the abnormal state signal is used to indicate that the state of the FIFO buffer is abnormal.

6. The method according to any one of claims 1 to 5, characterized in that: The method further comprises: Determining a storage depth and a storage width of the first-in-first-out buffer according to communication requirements of the first functional module and the second functional module; The first-in-first-out buffer is configured according to the storage depth and the storage width.

7. A communication device, characterized in that: The device is applied to a system-on-chip, and the system-on-chip includes multiple functional modules; the device includes: A writing module, used for writing the communication data initiated by the first functional module into a first-in-first-out buffer corresponding to the communication address of the second functional module, generating an interrupt signal and sending the interrupt signal to the second functional module; the interrupt signal is used to prompt the second functional module that the first-in-first-out buffer stores communication data to be processed; The reading module is used to control the second functional module to read the communication data in the first-in-first-out buffer based on the interrupt signal and the first-in-first-out method.

8. A system-on-chip, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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