Interactive exchange chip debugging graphical interface construction method, device and equipment

Abstract

The invention provides an interactive exchange chip debugging graphical interface construction method, device and equipment, and the method comprises the steps: obtaining a basic chip flow chart drawn based on an automatic flow chart drawing tool, and generating a visual SVG format file according to the basic chip flow chart, the SVG format file comprises a logic function module and a register of the chip; based on the SVG format file and the background data of the register, dynamically rendering each logic function module of the chip, binding the corresponding background data in real time, and realizing display and updating; and displaying detailed information of a specific logic function module or a register on an application interface according to a click operation of a user, and displaying an abnormal point of an assembly line in the chip in real time. According to the method, the development cycle and the labor cost of developing the graphical interface can be remarkably reduced.

Description

Technical Field

[0001] The present invention relates to the field of chip debugging, and in particular to a method, device and equipment for constructing an interactive exchange chip debugging graphical interface. Background Art

[0002] With the development of the Internet, big data and artificial intelligence technologies, the amount of data has increased dramatically, and the demand for data exchange and processing has increased day by day. Modern switching chips have made great improvements in data transmission and processing performance, and their internal logical function modules and table capacity have become more complex. Therefore, during chip design and debugging, it is necessary to quickly locate and analyze the performance of logical modules and the processing of internal data.

[0003] In the prior art, during the debugging process of the switching chip, the command line terminal is mainly used to read and analyze the data information of the register. Specifically, engineers manually enter commands through the command line to query the registers and table items of the chip one by one to troubleshoot and locate chip functional abnormalities. However, in the face of huge logic modules and register table items, the existing debugging interface development method requires close cooperation between the graphical interface engineer and the chip development engineer to convert the chip logic function block diagram into a graphical interface display. This method is not only time-consuming and labor-intensive, but also prone to deviations in the details of the graphical interface and the debugging process, resulting in extended chip debugging cycles and low development efficiency. It is mainly reflected in:

[0004] 1. Complicated operation: The method of reading registers one by one makes the debugging process very cumbersome. Engineers need to manually input commands and query the values ​​of specific registers repeatedly, and frequently perform data verification and cross-comparison during the debugging process, which greatly increases the workload.

[0005] 2. Low efficiency: For complex switching chips, the number of internal registers and logic modules is huge, and the speed of manually querying and analyzing register information is slow, resulting in a long debugging cycle. For scenarios where problems need to be quickly located, the command line debugging method is difficult to meet the needs of efficient development.

[0006] 3. Information display is not intuitive: The command line terminal only displays text and numerical information, lacking graphical and intuitive display. It is difficult for engineers to quickly understand the status of each module inside the chip, data flow and abnormal location through these monotonous data, which is not conducive to locating and solving problems in a short time.

[0007] 4. Weak data correlation: During debugging, the correlation between logic modules such as registers, table entries, and pipelines is difficult to fully display through the command line. Engineers cannot view the overall information of related modules in the same interface, which creates obstacles in data flow and anomaly detection. Summary of the invention

[0008] In view of this, an object of the present invention is to provide a method, device and equipment for constructing an interactive switching chip debugging graphical interface to improve the above-mentioned problem.

[0009] The present invention provides a method for constructing an interactive switching chip debugging graphical interface, which comprises:

[0010] Obtain a basic chip flow chart drawn based on an automated flow chart drawing tool, and generate a visualized SVG format file according to the basic chip flow chart, wherein the SVG format file includes a logic function module and registers of the chip;

[0011] Based on the SVG format file and the background data of the register, the various logic function modules of the chip are dynamically rendered, and the corresponding background data are bound in real time to realize display and update;

[0012] According to the user's click operation, the detailed information of specific logic function modules or registers is displayed on the application interface, and the abnormal points of the chip internal pipeline are displayed in real time.

[0013] Preferably, the automated flowchart drawing tool includes python Diagrams, drawio.

[0014] Preferably, the basic chip flow chart is used to actually reflect the module connection relationship, data flow path and key register location of the chip.

[0015] Preferably, the background data based on the SVG format file and the register dynamically renders each logic function module of the chip, binds the corresponding background data in real time, and realizes display and update, specifically including:

[0016] Use SVG parsing tools to read and parse SVG format files, identify the module and register node information, combine it with the chip's background data, and store the parsed single element ID into the register and table database;

[0017] During dynamic rendering, the SVG graphics are loaded and displayed in the main view of the application interface, and the status and data of each module are associated through the graphic element ID;

[0018] An SSL channel is established with the switch through the syncd module to update the switch register data to the background database, and then the background real-time data is bound to the SVG graphics through the interface so that the display can be updated in real time according to data changes.

[0019] Preferably, it also includes:

[0020] In response to the update of register values ​​and the change of pipeline status, the color, status or graphic effect of the corresponding module will be dynamically refreshed in the application interface to intuitively display the working status inside the chip.

[0021] Preferably, the application interface provides interactive functions for users to zoom and drag arbitrarily, click on specific modules and register elements, view detailed information, operation status and log information of the module, and realize fast and accurate debugging operations.

[0022] Preferably, the method further includes: comparing the application interface display content with the actual data, and automatically adjusting the node information of the graphical interface when the data is inconsistent, so as to ensure that the interface display is synchronized with the actual state of the chip.

[0023] The embodiment of the present invention also provides a device for constructing an interactive switching chip debugging graphical interface, which includes:

[0024] A pre-drawing unit, used to obtain a basic chip flow chart drawn based on an automated flow chart drawing tool, and generate a visualized SVG format file according to the basic chip flow chart, wherein the SVG format file includes a logic function module and registers of the chip;

[0025] Dynamic rendering unit, used to dynamically render various logic function modules of the chip based on SVG format files and register background data, bind the corresponding background data in real time, and realize display and update;

[0026] The interactive unit is used to display detailed information of a specific logic function module or register on the application interface according to the user's click operation, and to display the abnormal points of the chip internal pipeline in real time.

[0027] An embodiment of the present invention also provides an interactive switching chip debugging graphical interface construction device, which includes a memory and a processor, wherein the memory stores a computer program, and the computer program can be executed by the processor to implement the interactive switching chip debugging graphical interface construction method as described above.

[0028] The present invention parses the SVG format file generated by the chip design document, identifies the module and register node information therein, and stores it in a database. Then, the real-time data of the chip is obtained, dynamically bound to the graphic element identifier in the database, and dynamic rendering of the SVG format file is realized to generate an interactive debugging interface. The user can operate on the interface to view the detailed information of the selected module or node.

[0029] In addition, the present invention can also compare the interface display with the actual chip data in real time, automatically correct inconsistencies, and ensure that the interface and chip status are synchronized.

[0030] In summary, the present invention can significantly reduce the development cycle and labor cost of developing a graphical interface through the above technical solution. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 The present invention is a flowchart of a method for constructing an interactive switching chip debugging graphical interface provided in the first embodiment of the present invention.

[0032] Figure 2 Schematic diagram of the basic chip flow chart.

[0033] Figure 3 This is a detailed flowchart of the DIS module of a switching chip in an SVG format file.

[0034] Figure 4 It is a functional module block diagram of the graphical interface.

[0035] Figure 5 This is a complete pipeline view of a switching chip's graphical debugging interface.

[0036] Figure 6 This is a magnified partial view of the DIS module in the graphical debugging interface window of a switching chip.

[0037] Figure 7 A schematic diagram of the structure of a device for constructing an interactive switching chip debugging graphical interface provided by a second embodiment of the present invention. DETAILED DESCRIPTION

[0038] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0039] See also Figure 1 The first embodiment of the present invention provides a method for constructing an interactive switching chip debugging graphical interface, which comprises the following steps:

[0040] S101, obtaining a basic chip flowchart drawn based on an automated flowchart drawing tool, and generating a visualized SVG format file according to the basic chip flowchart, wherein the SVG format file includes logic function modules and registers of the chip.

[0041] Specifically, in this embodiment, Figure 2As shown in the figure, firstly, the basic chip flow chart drawn by the chip development engineer using basic drawing tools (such as python Diagrams, drawio, etc.) is obtained, and then the first-line chip engineer checks and fine-tunes the basic chip flow chart drawn, and exports the final flow chart file as an SVG format file containing logic modules and registers. The SVG file contains the logic function module and register node information, such as Figure 3 and Figure 4 As shown.

[0042] S102, based on the SVG format file and the background data of the register, dynamically render each logic function module of the chip, bind the corresponding background data in real time, and realize display and update.

[0043] In this embodiment, the SVG format file is parsed by an SVG parsing tool to identify the logic function module and register node information therein. According to the parsed logic function module and register node information, a unique identifier of each node, such as an id attribute value, is extracted. Each extracted node identifier is stored in a register and table entry database, and a mapping relationship between the node identifier and the register and table entry is established.

[0044] When rendering the graphical interface:

[0045] First, load the SVG format file of the chip pipeline diagram and display the SVG graphic in the main view of the application. Use node identifiers to associate the graphic elements on the interface with the corresponding items in the register and table entry database.

[0046] Then, an SSL channel is established between the APP and the switch, and the real-time register data of the switch is updated to the background database through the syncd module. The background real-time data is bound to the graphical interface through the interface, and the interface display is dynamically updated according to the data changes. Determine whether the register value or pipeline status has changed. If so, dynamically refresh the color, status or graphic effect of the corresponding module. Continuously monitor the changes in register values ​​and pipeline status, update the graphical interface in real time, and intuitively display the working status inside the chip, such as Figure 5 shown.

[0047] Specifically, the SVG file of the chip pipeline diagram is read through Python's xml.etree.ElementTree module, and its parse() function is used to parse the SVG file, traverse the DOM tree of SVG, and identify the <g> 、 <rect>The nodes representing modules and registers are extracted from the id attribute value of each node as a unique identifier. For example, the identifier of the DIS module is "module-dis-1". The extracted node identifiers are stored in the register and table_entry tables of the MySQL database, and a mapping relationship between node identifiers and registers and table entries is established. For example, the register address corresponding to "module-dis-1" is 0x1000. When rendering the graphical interface, use the D3.js library of JavaScript to load the SVG file and display the SVG graphics on the Web application. Element. The SVG node on the interface is selected through the select() function of D3.js, and the graphic element is dynamically associated with the register and table item according to the mapping relationship between the node identifier and the database. The APP establishes an SSL connection with the switch through the OpenSSL library of C++, periodically obtains real-time register data from the switch through the gRPC interface, and updates the data to the Redis database through the syncd process. The Web backend reads real-time data from Redis through the redis module of Node.js, pushes the data to the front-end interface through WebSocket, and realizes dynamic binding and real-time update of data. If the register value changes by more than the threshold (such as 5%), the file attribute of the corresponding SVG node is modified through D3.js to change the color of the module; if the pipeline status becomes abnormal, the module border is changed to a dotted line by modifying the stroke-dasharray attribute. The backend uses the setInterval() function to check the register value and pipeline status every 500 milliseconds. Once a change occurs, the front-end is notified to update the interface immediately to ensure that the working status of the chip is reflected in real time.

[0048] S103, according to the user's click operation, detailed information of a specific logic function module or register is displayed on the application interface, and abnormal points of the chip internal pipeline are displayed in real time.

[0049] In this embodiment, the application interface provides interactive functions for users to zoom and drag at will, click on a specific module or register element, view the detailed information, operation status and log information of the module, and implement fast and accurate debugging operations, such as Figure 6 shown.

[0050] Specifically, in the interactive graphical debugging interface, the coordinate position information of the module or register node clicked or selected by the user can be obtained to determine the target object of the user's operation. According to the obtained coordinate position information, the corresponding module or register node is found in the pre-drawn SVG chip pipeline functional block diagram to obtain the unique identifier of the node. Through the unique identifier of the node, the relevant detailed information is retrieved in the register and table item data dynamically bound to the SVG graphic file to obtain the properties, status, current value and other data of the node. The obtained node detailed information is formatted and visualized to generate a data structure and style suitable for display in the graphical interface. The interface elements that display the node detailed information are dynamically created or updated at the corresponding position of the interactive graphical debugging interface, such as pop-up windows, floating boxes or property panels. The formatted node detailed information is filled into the interface elements to realize real-time display and update of information.

[0051] Then, the system monitors the user's further interactive operations on the interface elements, such as clicking, hovering, or scrolling, and dynamically adjusts the displayed detailed information according to the operation type. If the user modifies the properties or status of the node, the modified value is written back to the register and table data, and the corresponding update operation is triggered to ensure data consistency. The system continues to monitor the user's operation instructions on the interactive graphical debugging interface and repeats the above steps to achieve real-time and dynamic node information acquisition and display, providing a smooth interactive debugging experience.

[0052] In addition, it is also possible to compare the application interface display content with the actual data, and automatically adjust the node information of the graphical interface when data inconsistencies are found, to ensure that the interface display is synchronized with the actual status of the chip.

[0053] Specifically, the actual data of the chip, including register values, table item contents, etc., is obtained, and compared with the display content of the interactive graphical debugging interface. Through the comparison algorithm, it is determined whether the interface display content is consistent with the actual data. If not, the automatic correction mechanism is triggered. According to the comparison results, the primitive nodes that need to be corrected are determined, and the position information in the corresponding SVG pre-drawn file is obtained. The SVG parsing engine is used to parse the obtained SVG format file to obtain the attribute information of the primitive node, such as coordinates, size, text, etc. According to the actual data, the attribute values ​​that need to be updated in the primitive node, such as text content, color, etc., are calculated to generate the corrected attribute information. Through the SVG rendering engine, the corrected attribute information is applied to the primitive node to update its display status on the interface.

[0054] During the correction process, record the correction log, including the corrected primitive nodes, attribute changes, etc., to facilitate subsequent analysis and optimization. After the correction is completed, re-render the interactive graphical debugging interface to ensure that the interface display is synchronized with the actual state of the chip. Continuously monitor chip data changes, and when changes are detected, repeat the above steps to achieve real-time automatic correction and keep the interface and data synchronized.

[0055] In summary, the embodiment of the present invention parses the SVG format file generated by the chip design document, identifies the module and register node information therein, and stores it in the database. Then, the real-time data of the chip is obtained, dynamically bound to the primitive identifier in the database, and the dynamic rendering of the SVG format file is realized to generate an interactive debugging interface. The user can operate on the interface to view the detailed information of the selected module or node.

[0056] In addition, the embodiment of the present invention can also compare the interface display with the actual chip data in real time, automatically correct the inconsistencies, and ensure that the interface and chip status are synchronized.

[0057] In summary, the embodiments of the present invention can significantly reduce the development cycle and labor cost of developing a graphical interface through the above technical solution.

[0058] like Figure 7 As shown, the second embodiment of the present invention further provides a device for constructing an interactive switching chip debugging graphical interface, which includes:

[0059] The pre-drawing unit 210 is used to obtain a basic chip flow chart drawn based on an automated flow chart drawing tool, and generate a visualized SVG format file according to the basic chip flow chart, wherein the SVG format file includes a logic function module and a register of the chip;

[0060] The dynamic rendering unit 220 is used to dynamically render various logic function modules of the chip based on the background data of the SVG format file and the register, and bind the corresponding background data in real time to realize display and update;

[0061] The interactive unit 230 is used to display detailed information of a specific logic function module or register in the application interface according to the user's click operation, and to display abnormal points of the chip internal pipeline in real time.

[0062] The third embodiment of the present invention also provides an interactive switching chip debugging graphical interface construction device, which includes a memory and a processor, wherein the memory stores a computer program, and the computer program can be executed by the processor to implement the interactive switching chip debugging graphical interface construction method as described above.

[0063] The technical features of the above-described embodiments may be arbitrarily combined, and the execution order of the method steps is not limited. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0064] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims. < / rect> < / g>

Claims

1. A method for constructing an interactive switching chip debugging graphical interface, characterized in that: include: Obtain a basic chip flow chart drawn based on an automated flow chart drawing tool, and generate a visualized SVG format file according to the basic chip flow chart, wherein the SVG format file includes a logic function module and registers of the chip; Based on the SVG format file and the background data of the register, the various logic function modules of the chip are dynamically rendered, and the corresponding background data are bound in real time to realize display and update; According to the user's click operation, the detailed information of specific logic function modules or registers is displayed on the application interface, and the abnormal points of the chip internal pipeline are displayed in real time.

2. The method for constructing an interactive switching chip debugging graphical interface according to claim 1, characterized in that: The automated flowchart drawing tools include python Diagrams and drawio.

3. The method for constructing an interactive switching chip debugging graphical interface according to claim 1, characterized in that: The basic chip flow chart is used to actually reflect the chip's module connection relationship, data flow path and key register locations.

4. The method for constructing an interactive switching chip debugging graphical interface according to claim 1, characterized in that: The background data based on the SVG format file and the register dynamically renders each logic function module of the chip, binds the corresponding background data in real time, and realizes display and update, specifically including: Use SVG parsing tools to read and parse SVG format files, identify the module and register node information, combine it with the chip's background data, and store the parsed single element ID into the register and table database; During dynamic rendering, the SVG graphics are loaded and displayed in the main view of the application interface, and the status and data of each module are associated through the graphic element ID; An SSL channel is established with the switch through the syncd module to update the switch register data to the background database, and then the background real-time data is bound to the SVG graphics through the interface so that the display can be updated in real time according to data changes.

5. The method for constructing an interactive switching chip debugging graphical interface according to claim 4, characterized in that: Also includes: In response to the update of register values ​​and the change of pipeline status, the color, status or graphic effect of the corresponding module will be dynamically refreshed in the application interface to intuitively display the working status inside the chip.

6. The method for constructing an interactive switching chip debugging graphical interface according to claim 1, wherein: The application interface provides interactive functions for users to zoom and drag at will, click on specific modules and register elements, view detailed information, operation status and log information of the module, and realize fast and accurate debugging operations.

7. The method for constructing an interactive switching chip debugging graphical interface according to claim 1, characterized in that: Also includes: Compare the application interface display content with the actual data, and automatically adjust the node information of the graphical interface when data inconsistency is found to ensure that the interface display is synchronized with the actual status of the chip.

8. A device for constructing an interactive switching chip debugging graphical interface, characterized in that: include: A pre-drawing unit, used to obtain a basic chip flow chart drawn based on an automated flow chart drawing tool, and generate a visualized SVG format file according to the basic chip flow chart, wherein the SVG format file includes a logic function module and registers of the chip; Dynamic rendering unit, used to dynamically render various logic function modules of the chip based on SVG format files and register background data, bind the corresponding background data in real time, and realize display and update; The interactive unit is used to display detailed information of a specific logic function module or register on the application interface according to the user's click operation, and to display the abnormal points of the chip internal pipeline in real time.

9. An interactive switching chip debugging graphical interface construction device, characterized in that: It comprises a memory and a processor, wherein the memory stores a computer program, and the computer program can be executed by the processor to implement the method for constructing an interactive switching chip debugging graphical interface as described in any one of claims 1 to 7.

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