Driving method, driving circuit, display panel and display device

Abstract

The invention discloses a driving method, a driving circuit, a display panel and a display device.The driving method is used for driving the display panel and comprises the steps that a low-voltage differential signal is received, and a first data signal is generated; generating a data clock signal according to the first data signal and the crystal oscillator signal; performing spread spectrum based on the data clock signal to generate a second data signal; generating a latch signal and a clock signal based on the data clock signal; analyzing the data latch signal, the clock signal and the second data signal, and outputting the data latch signal, the clock signal and the second data signal to the display panel for driving; the duration of each gate driving signal is the same, and the spacing between the falling edge of the corresponding data latch signal and the falling edge of the gate driving signal is the same. According to the invention, spread spectrum is only started for the data signal, and the transmission frequency of the data signal changes all the time, so that the problem of signal interference caused by invariable transmission rate is avoided, and meanwhile, the conditions of excessive or insufficient charging and water ripples of adjacent rows of pixels after the spread spectrum is started are avoided.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a driving method, a driving circuit, a display panel and a display device. Background Art

[0002] OLED (Organic Light-Emitting Diode), also known as organic electroluminescence display and organic light-emitting semiconductor (Organic Electroluminescence Display, OLED), is a current-type organic light-emitting device that emits light through the injection and recombination of carriers. The reason why OLED technology can be widely used is that it has many advantages compared with other technologies.

[0003] Display devices on the market all pursue higher resolution and require the transmission of a large amount of image data. The data transmission speed of the display device increases with the increase of data volume. When the data signal is transmitted at a higher frequency, the regular data signal usually causes electromagnetic interference (EMI). Among the various methods of reducing EMI, the spread spectrum clock generation method is more commonly used. When the spread spectrum clock generation method is used to adjust the transmission frequency of the data signal, since the data signal transmission frequency changes regularly between greater than the normal frequency and less than the normal frequency, adjacent rows of pixels will appear to be fully charged or insufficiently charged, which will cause water ripples to appear when the image is displayed, thereby affecting the display effect. Summary of the invention

[0004] The purpose of the embodiments of the present application is to provide a driving method, a driving circuit, a display panel and a display device that can improve the situation where adjacent rows of pixels are overcharged or undercharged and water ripples occur after the spread spectrum is turned on.

[0005] The present application discloses a driving method for driving a display panel, the driving method comprising: receiving a low voltage differential signal and generating a first data signal; generating a data clock signal according to the first data signal and the crystal oscillator signal; Performing spectrum spreading based on the data clock signal to generate a second data signal; generating a latch signal and a clock signal based on the data clock signal; and After analyzing the data latch signal, the clock signal and the second data signal, the signals are output to the display panel to drive the display panel; The duration of each gate driving signal parsed from the clock signal is the same, and the interval between the falling edge of the corresponding data latch signal and the falling edge of the gate driving signal is the same.

[0006] Optionally, the step of performing spectrum spreading based on the data clock signal to generate the second data signal includes the following steps: Spreading the spectrum during the generation phase of the second data signal so that the transmission frequency of the second data signal changes periodically around the original frequency; The change value of the transmission frequency of the second data signal is ±3% of the original frequency, and the cycle time of the transmission frequency of the second data signal is the scanning time of 3N scanning lines, where N is a natural number greater than or equal to 2.

[0007] Optionally, the step of performing spectrum spreading based on the data clock signal to generate the second data signal includes: When the data signal is spread, a compensation time is added to the idle time of each row of pixels so that the total duration of the display time and the idle time of each row of pixels is the same; The idle time includes a first time period, a second time period and a third time period in sequence, the first time period is a time period in which the amount of data does not change, the second time period is a spread spectrum time period, and the third time period is a reset time period; or the first time period is a spread spectrum time period, the second time period is a time period in which the amount of data does not change, and the third time period is a reset time period; Among them, during the spread spectrum time period in the idle time, a preset amount of non-display data is transmitted to the display panel to compensate for the idle time; in each row scan line cycle, after the spread spectrum is turned on, the transmission frequency of the second data signal gradually changes, and the transmission frequency of the latch signal and the clock signal remains unchanged.

[0008] Optionally, the maximum transmission frequency of the second data signal is the first frequency, the minimum transmission frequency is the second frequency, the first frequency is greater than the original frequency, the second frequency is less than the original frequency, and the step of spreading the spectrum in the generation stage of the second data signal so that the transmission frequency of the second data signal changes around the original frequency includes: In the spectrum spreading stage, the transmission frequency of the second data signal is divided into a first change band and a second change band; In the first variation band, the transmission frequency of the second data signal increases from the original frequency to the first frequency and then decreases to the original frequency; and In the second variation band, the transmission frequency of the second data signal decreases from the original frequency to the second frequency and then increases to the original frequency.

[0009] Optionally, in the step of increasing the transmission frequency of the second data signal from the original frequency to the first frequency and then decreasing to the original frequency within the first change band, the transmission frequency of the second data signal increases from the original frequency to the first frequency in a step-like or linear manner and then decreases to the original frequency; In the step where the transmission frequency of the second data signal decreases from the original frequency to the second frequency and then increases to the original frequency within the second variation band, the transmission frequency of the second data signal decreases from the original frequency to the second frequency in a stepwise or linear manner and then increases to the original frequency.

[0010] Optionally, the step of generating a latch signal and a clock signal based on the data clock signal and the step of parsing the data latch signal, the clock signal and the second data signal and outputting them to the display panel to drive the display panel include the following steps: A reference value is set for the idle time of each row of pixels, and the number of rows whose corresponding idle time is higher than the reference value is uniformly set at the reference value, so as to control the opening period of the scan line corresponding to each row of pixels and the refresh rate of the display panel; When insufficient charging occurs, the scan lines with short open cycle time are over-driven.

[0011] The present application also discloses a driving circuit, which drives a display panel using any of the driving methods described above, wherein the driving circuit includes a timing control module, a data driving module and a gate driving module, wherein the timing control module outputs a second data signal including a spread spectrum generated data signal to the data driving module according to the spread spectrum setting of the host computer, and outputs a latch signal and a clock signal that are not spread spectrum to the data driving module and the gate driving module respectively.

[0012] Optionally, the timing control module includes a frequency synthesizer, a spread spectrum unit, a second data signal parsing unit and an input / output port, the frequency synthesizer generates a data clock signal according to the first data signal and the crystal oscillator signal, the input end of the spread spectrum unit is connected to the output end of the frequency synthesizer, and the output end is connected to the input end of the second data signal parsing unit, the spread spectrum unit performs spread spectrum based on the data clock signal to generate a second data signal and outputs it to the second data signal parsing unit, the input / output port is connected to the output end of the frequency synthesizer, and generates a latch signal and a clock signal according to the data clock signal; wherein the timing control module includes a reset unit and a compensation unit, the reset unit and the compensation unit are respectively connected to the spread spectrum unit, the reset unit is used to control the spread spectrum unit to reset the transmission frequency of the data signal to the original frequency before the start of each frame, and the compensation unit compensates for the idle time before the rising edge of the latch signal, so that the display time of each row of pixels and the total duration of the idle time are the same.

[0013] The present application also discloses a display panel, which includes multiple data lines and multiple scanning lines, and multiple pixels formed by the multiple data lines and the multiple scanning lines, the data lines are connected to a data driving module in a driving circuit, the scanning lines are connected to a gate driving module of the driving circuit, and the display panel is driven by any of the driving circuits described above and using any of the driving methods described above.

[0014] The present application also discloses a display device, which includes a display panel and any of the driving circuits described above, wherein the driving circuit drives the display panel using any of the driving methods described above.

[0015] Compared with the scheme of spreading the data signal, latch signal and clock signal together, the present application turns on the spread spectrum for the data signal, and the transmission frequency of the data signal keeps changing to avoid the problem of signal interference caused by the unchanged transmission rate. The frequencies of the latch signal and the clock signal can remain unchanged. The duration of each gate drive signal analyzed from the clock signal is the same, and the interval between the falling edge of the corresponding data latch signal and the falling edge of the gate drive signal is the same, ensuring the charging time to avoid the change of charging time caused by the jitter of the gate drive signal, thereby generating water ripples. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation methods of the present application, and together with the text description, explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings: Figure 1 is a schematic flow chart of a driving method according to a first embodiment of the present application; Figure 2 is a schematic flow chart of a driving method according to a second embodiment of the present application; Figure 3 is a schematic diagram of frequency variation of a data signal according to a second embodiment of the present application; Figure 4 is another schematic diagram of frequency variation of a data signal according to the second embodiment of the present application; Figure 5 is another schematic diagram of data signal frequency variation according to the second embodiment of the present application; Figure 6 is a schematic flow chart of a driving method according to a third embodiment of the present application; Figure 7 is a schematic diagram of idle time partitions according to the third embodiment of the present application; Figure 8is a schematic flow chart of a driving method according to a fourth embodiment of the present application; Fig. 9 is a schematic structural diagram of a driving circuit of a fifth embodiment of the present application; Fig.10 is a schematic diagram of a timing control module of a sixth embodiment of the present application; Fig.11 is a schematic structural diagram of a display panel according to a seventh embodiment of the present application; Fig.12 It is a schematic structural diagram of a display device of the eighth embodiment of the present application.

[0017] Among them, 100, driving circuit; 110, timing control module; 111, frequency synthesizer; 112, spread spectrum unit; 113, second data signal analysis unit; 114, input and output port; 115, reset unit; 116, compensation unit; 120, data driving module; 130, gate driving module; 200, display panel; 210, data line; 220, scan line; 230, pixel; 300, host computer; 400, display device; TP-latch signal; DCLK data clock signal; CLK / CKV-clock signal; Max-maximum transmission frequency; Min-minimum transmission frequency; MF-change period; w1-first change band; w2-second change band. DETAILED DESCRIPTION

[0018] It should be understood that the terms used herein, the specific structures and functional details disclosed are only for describing specific embodiments and are representative, but the present application can be implemented in many alternative forms and should not be construed as being limited to only the embodiments described herein.

[0019] The present application is described in detail below with reference to the accompanying drawings and optional embodiments.

[0020] Considering that commonly used display panels have a very high data signal transmission rate, fixed-rate and high-speed signals are prone to EMI (signal interference) problems. In order to solve this problem, spread spectrum technology is added. Although the interference problem is solved after spread spectrum, when the data signal frequency changes, the corresponding clock signal and latch signal also change synchronously, which eventually causes the frequency corresponding to the gate drive signal to change continuously, sometimes high and sometimes low, resulting in insufficient charging in some areas and overcharging in some areas, resulting in obvious differences in brightness and darkness.

[0021] refer to Figure 1 As shown, as the first embodiment of the present application, a driving method is disclosed, which solves the problem of signal interference and does not cause the problem of uneven charging in some areas of the display panel. The driving method is used to drive the display panel, and the driving method includes the following steps: S1: receiving a low voltage differential signal and generating a first data signal; S2: Generate a data clock signal according to the first data signal and the crystal oscillator signal; S3: Perform spectrum spreading based on the data clock signal to generate a second data signal; S4: Generate a latch signal and a clock signal based on the data clock signal; S5: analyzing the data latch signal, the clock signal and the second data signal and outputting the signals to the display panel to drive the display panel; The duration of each gate driving signal parsed from the clock signal is the same, and the interval between the falling edge of the corresponding data latch signal and the falling edge of the gate driving signal is the same.

[0022] In this embodiment, in step S1, a low voltage differential signal is received and a first data signal is generated. The first data signal is the original data signal before spectrum spreading, and the transmission frequency is fixed. The differential signal has the characteristics of strong anti-interference ability and can effectively suppress common mode noise. In step S2, a data clock signal is generated according to the first data signal and the crystal oscillator signal. The crystal oscillator signal has high stability and accuracy, and provides a stable time reference for subsequent signal processing, which helps to reduce jitter and interference of the signal during transmission and processing. In step S3, a second data signal is generated by performing spectrum spreading based on the data clock signal. The spectrum spreading technology can expand the bandwidth of the signal. , reducing the power density of the signal, thereby reducing mutual interference between signals; in step S4, a latch signal and a clock signal are generated based on the data clock signal, the latch signal is used to temporarily store and stabilize the data, and the clock signal is used to synchronize the operations of various signals to ensure the correct transmission and processing of the signal, further reducing the possibility of signal interference; in step S5, the data latch signal, the clock signal and the second data signal are parsed and output to the display panel for driving. Through precise parsing and synchronization, the timing relationship between the various signals is strictly controlled, avoiding conflicts and interference between signals, and ensuring the normal driving of the display panel.

[0023] Generally, in step S4, the duration of each gate drive signal analyzed according to the clock signal is the same, and the spacing between the falling edge of the corresponding data latch signal and the falling edge of the gate drive signal is the same, ensuring that during the charging process of the display panel, each pixel has the same charging time and stable charging conditions; the gate drive signal is used to control the switching of the pixel points, and its same duration ensures that the charging time of each pixel is consistent, and the fixed spacing between the falling edge of the data latch signal and the falling edge of the gate drive signal further ensures the stability and uniformity of the charging process, avoiding the problem of uneven charging caused by inconsistent charging time.

[0024] This embodiment improves the spread spectrum output mode and eliminates the charging difference between sub-pixels by adopting a series of measures such as differential signals, stable clock signals, spread spectrum technology, precise latching and drive signal control, thereby improving the uniformity of the display brightness difference, eliminating the brightness difference of fluidity, improving water ripples, and improving the display effect.

[0025] like Figure 2 As shown, as the second embodiment of the present application, it is a further refinement and improvement of the above first embodiment. In the step S3, the following steps are included: S321: performing spectrum spreading in a generation phase of the second data signal so that a transmission frequency of the second data signal changes periodically around an original frequency; The definition of spread spectrum indicates the frequency change of the data signal transmitted from the timing control module to the data driving module. The original frequency indicates the actual transmission frequency when the spread spectrum is not performed. The change value of the transmission frequency of the second data signal is ±3% of the original frequency. ±3% indicates the amplitude of the frequency change, which can be set by the timing control module. Generally, refer to Figure 3 As shown, the transmission frequency of the second data signal, that is, the period time of the spread spectrum frequency is the scanning time of 3N scanning lines, N is a natural number greater than or equal to 2, assuming that the frequency of the spread spectrum (SSCG) SSCG=30K, for a display screen with a 1920-line resolution and dual scanning lines, the total number of all lines in an actual frame image V-total is 2250*2, and the frame rate is 60Hz, and the corresponding line frequency is 270KHz (1*60*2250*2), then it can be seen that the line frequency is 9 times the spread spectrum, that is, one spread spectrum cycle for every 9 lines, and the corresponding water ripples caused by insufficient or excessive charging can be seen to be 9 lines per cycle of bright and dark rolling changes in the periodic number of lines, so generally the period time of the transmission frequency of the second data signal is the scanning time of 3N scanning lines, but it can also be other relationships, such as the period time of the transmission frequency of the second data signal is the scanning time of 1 scanning line.

[0026] Further, the maximum transmission frequency of the second data signal is the first frequency, the minimum transmission frequency is the second frequency, the first frequency is greater than the original frequency, the second frequency is less than the original frequency, and the step of spreading the second data signal in the generation stage so that the transmission frequency of the second data signal changes around the original frequency includes: In the spectrum spreading stage, the transmission frequency of the second data signal is divided into a first change band and a second change band; In the first change band, the transmission frequency of the second data signal increases from the original frequency to the first frequency and then decreases to the original frequency; In the second variation band, the transmission frequency of the second data signal decreases from the original frequency to the second frequency and then increases to the original frequency.

[0027] In the display panel, the charging process of the pixel is closely related to the transmission frequency of the data signal. The dynamic change characteristics of the transmission frequency of the second data signal in this embodiment can enable the pixel to receive a more uniform and stable signal drive during the charging process; when the transmission frequency of the data signal varies around the original frequency, the pixel can receive the appropriate charging signal strength and duration in different time periods, avoiding the problem of over- or under-charging of some pixels due to constant or single frequency changes, thereby effectively improving the uniformity of charging and improving the overall display effect of the display panel.

[0028] Generally, in the step in which the transmission frequency of the second data signal in the first change band increases from the original frequency to the first frequency and then decreases to the original frequency, the transmission frequency of the second data signal increases from the original frequency to the first frequency in a step-like manner and then decreases to the original frequency in a step-like manner; in the step in which the transmission frequency of the second data signal in the second change band decreases from the original frequency to the second frequency and then increases to the original frequency, the transmission frequency of the second data signal decreases from the original frequency to the second frequency in a step-like manner and then increases to the original frequency in a step-like manner, wherein Max represents the maximum transmission frequency of the data signal after the spread spectrum is turned on, Min represents the minimum transmission frequency of the data signal after the spread spectrum is turned on, MR represents the variation amplitude of the transmission frequency, that is, the amplitude, and MF represents the variation period, that is, how fast the data signal changes from the maximum transmission frequency Max to the minimum transmission frequency Min, as shown in Figure 4 As shown; or in the step in which the transmission frequency of the second data signal rises from the original frequency to the first frequency and then drops to the original frequency within the first change band, the transmission frequency of the second data signal rises linearly from the original frequency to the first frequency and then drops linearly to the original frequency; in the step in which the transmission frequency of the second data signal drops from the original frequency to the second frequency and then rises to the original frequency within the second change band, the transmission frequency of the second data signal drops linearly from the original frequency to the second frequency and then rises linearly to the original frequency, specifically as Figure 5 shown.

[0029] By precisely controlling the change mode of the second data signal transmission frequency, such as step-like or straight-line rise / fall, the pixels of the display panel can respond to the change of the data signal more accurately; avoiding unstable or irregular data transmission frequency, which may cause the pixels to respond untimely or excessively, resulting in ghosting and blurring; through frequency change control, the switching of pixels can be smoother and more accurate, reducing the generation of ghosting and blurring, and improving the clarity and sharpness of the displayed image; and data signals with different frequency characteristics can meet the needs of different types of display panels. For some high-resolution, high-refresh rate display panels, the higher first frequency and flexible frequency change range can provide sufficient data transmission speed and accuracy; and for some panels with low power consumption and simple display requirements, the lower second frequency and the change mode around the original frequency can reduce energy consumption while ensuring basic display functions.

[0030] like Figure 6 As shown, as the third embodiment of the present application, it is a further improvement of the above first embodiment, and the step S3 includes: S361: When performing spectrum spreading on the data signal, a compensation time is added to the idle time of each row of pixels so that the total duration of the display time and the idle time of each row of pixels is the same; The idle time includes a first time period, a second time period and a third time period in sequence, the first time period is a time period in which the amount of data does not change, the second time period is a spread spectrum time period, and the third time period is a reset time period; or the first time period is a spread spectrum time period, the second time period is a time period in which the amount of data does not change, and the third time period is a reset time period; Among them, during the spread spectrum time period within the idle time (H-Blanking), a preset amount of non-display data is transmitted to the display panel to compensate for the idle time; within each row scan line cycle, after the spread spectrum is turned on, the transmission frequency of the second data signal gradually changes, and the transmission frequency of the latch signal and the clock signal remains unchanged.

[0031] Specifically, refer to Figure 7As shown, the H-Blanking area is divided into three parts, namely, the area where the data volume does not change, that is, the time period where the data volume does not change, the spread spectrum compensation area, that is, the spread spectrum time period, and the RST area, that is, the reset time period. The first two areas can be interchanged, and all areas except the RST area can be spread spectrum compensation areas. This design greatly increases the flexibility of the system. In different application scenarios, the functions and positions of each area can be adjusted according to specific needs. For example, for some applications with extremely high display quality requirements, such as medical imaging, high-end games, etc., more areas can be set as spread spectrum compensation areas to ensure the best display effect; for some applications that are more sensitive to cost and power consumption, the scope of the spread spectrum compensation area can be appropriately narrowed to reduce the complexity and cost of the system; in the area where the data volume does not change, a stable data transmission speed and frequency can be maintained to reduce unnecessary adjustments and changes; and in the reset time period, the system initialization and reset operations can be concentrated to improve the system's operating efficiency. The purpose of the spread spectrum compensation area is to compensate for the situation where the time of each line is different. It can accurately adjust the amount of data transmission according to the actual pixel response time of each line to ensure that each pixel can obtain the appropriate charging time and display brightness. For example, in the case of spread spectrum of this line, the number of CLKs required for LV+, LV- transmission is 1W (display data + non-display data), while non-spread spectrum requires 9999. In this case, one more LV+, LV- and other non-display data needs to be transmitted in the spread spectrum compensation area. In the spread spectrum compensation area, the difference in the time of each line is compensated by transmitting more non-display data, avoiding problems such as screen flickering and jitter caused by inaccurate time.

[0032] like Figure 8 As shown, as the fourth embodiment of the present application, it is a further refinement of the above-mentioned first embodiment, and the steps between steps S4 and S5 further include the following steps: S41: setting a reference value for the idle time of each row of pixels, and uniformly setting the number of rows whose corresponding idle time is higher than the reference value at the reference value, so as to control the opening period of the scan line corresponding to each row of pixels and the refresh rate of the display panel; S42: When insufficient charging occurs, overvoltage driving is performed on the scan line with a short open cycle time.

[0033] Considering that the H-Active (display time) is short because the clock frequency of the mini-clock signal, that is, the data signal transmission, is high, if the method of compensating the H-Blanking time is used, the H-Blanking time will increase, which will waste time and affect the refresh rate. In this embodiment, all those H-Blanking times that are higher than a certain threshold are benchmarked so that the H-Blanking time does not need to be so long, reducing the waste of H-Blanking time and shortening the display cycle of each frame. Because the H-Blanking time occupies a part of the entire display cycle, an excessively long H-Blanking time will cause the refresh rate to drop. Through optimization, more frames can be displayed per unit time, thereby increasing the refresh rate. For example, in some high-speed dynamic image display scenes, such as games or video playback, a higher refresh rate can make the picture smoother, reduce stuttering and smearing, and greatly improve the visual experience; due to the reasonable control of H-Blanking time, the corresponding gate cycle can be shortened, the refresh rate can be increased, and the display effect can be better; when the Gate cycle, that is, the scan line opening cycle is shortened, insufficient charging occurs during charging. Overvoltage drive can be performed for the short gate cycle part, and a separate overvoltage drive table can be used to correct its insufficient charging problem to ensure the display effect; in this way, even when the Gate cycle is shortened, it can ensure that the pixel obtains enough charge to maintain normal brightness and display effect. It avoids problems such as uneven pixel brightness and color distortion caused by insufficient charging, ensuring high-quality display output. For example, when displaying high-resolution images or low-grayscale images, overvoltage drive can ensure that each pixel can accurately reach the required brightness level, making the details and colors of the image more accurate.

[0034] By setting thresholds or benchmark values ​​to determine which H-Blanking times need to be adjusted, and using specific overvoltage drive tables for different short Gate cycle conditions, precise control of the display process is achieved. This precise control also helps to extend the service life of the display panel because a stable working state can reduce damage to pixels caused by overcharging or discharging.

[0035] like Fig. 9As shown, as the fifth embodiment of the present application, a driving circuit 100 is disclosed, and the driving circuit 100 drives the display panel 200 using the driving method described in any of the above embodiments. The driving circuit 100 includes a timing control module 110, a data driving module 120 and a gate driving module 130. The timing control module 110 outputs a second data signal generated by spreading to the data driving module 120 according to the spread spectrum setting of the host computer 300, and outputs a latch signal TP and a clock signal CLK that are not spread to the data driving module 120 and the gate driving module 130, respectively.

[0036] In this embodiment, the spread spectrum setting of the host computer 300 can reasonably adjust the spread spectrum parameters according to the actual needs and working conditions of the display panel 200. Through the precise spread spectrum setting, the timing control module 110 can output accurate data signals DATA, latch signals TP and clock signals CLK, so that the parameters such as the frequency and phase of the signal can match the characteristics of the display panel 200, reducing interference phenomena such as signal reflection and superposition caused by signal mismatch; the timing control module 110 transmits different types of signals to corresponding modules according to established rules. The second data signal generated by the spread spectrum is transmitted to the data driving module 120, and the latch signal and clock signal that are not spread spectrum are transmitted to the data driving module 120 and the gate driving module 130 respectively.

[0037] The present application turns on spread spectrum for data signals, and the transmission frequency of the data signal keeps changing to avoid the problem of signal interference caused by unchanged transmission rate. The frequencies of the latch signal and the clock signal can remain unchanged, and the duration of each gate drive signal analyzed from the clock signal is the same, and the corresponding falling edge of the data latch signal is the same as the spacing between the falling edge of the gate drive signal, thereby ensuring the charging time to avoid changes in the charging time caused by jitter of the gate drive signal, thereby generating water ripples.

[0038] For further reference, Fig.10 As shown, as the sixth embodiment of the present application, it is a further refinement and improvement of the above-mentioned fifth embodiment. The timing control module 110 includes a frequency synthesizer 111, a spread spectrum unit 112, a second data signal analysis unit 113 and an input-output port 114. The frequency synthesizer 111 generates a data clock signal according to the first data signal and the crystal oscillator signal. The input end of the spread spectrum unit 112 is connected to the output end of the frequency synthesizer 111, and the output end is connected to the input end of the second data signal analysis unit 113. The spread spectrum unit 112 performs spread spectrum based on the data clock signal to generate a second data signal and outputs it to the second data signal analysis unit 113. The input-output port 114 is connected to the output end of the frequency synthesizer 111, and generates a latch signal and a clock signal according to the data clock signal.

[0039] Because the spread spectrum of the data transmission signal changes regularly, when the data of the current row (such as the first row) is sent and enters the H-Blanking area, it is possible to know how many mini-clocks are sent in the H-Blanking area according to the spread spectrum change trend. If the spread spectrum frequency is larger than when it is closed, the number of mini-clocks needs to be increased, and the number of mini-clocks in the corresponding spread spectrum change area becomes larger; if the spread spectrum frequency is smaller than when it is closed, the number of mini-clocks needs to be reduced, and the number of mini-clocks in the corresponding spread spectrum change area becomes smaller, because data is collected according to the mini-clock and will automatically change with the change of the mini-clock; for TP and CLK (GOA gate generates source signal), only the data clock signal DCLK will be referenced, and DCLK will not pass through the spread spectrum unit 112, so there will be no spread spectrum function, and it will only be related to the front-end refresh rate and resolution, that is, it is stable and does not change, and the charging time is only related to these two signals, so it can be known that the charging time is locked, so that water ripples will not appear due to the difference in charging time, and the problem is solved.

[0040] It should also be noted that the timing control module 110 also includes a reset unit 115 and a compensation unit 116, and the reset unit 115 and the compensation unit 116 are respectively connected to the spread spectrum unit 112, and the spread spectrum unit 112 includes a phase-locked loop PLL. The reset unit 115 is used to control the spread spectrum unit 112 to reset the transmission frequency of the data signal to the original frequency before the start of each frame, and the compensation unit 116 compensates for the idle time before the rising edge of the latch signal, so that the display time of each row of pixels is the same as the total duration of the idle time.

[0041] The frequency synthesizer 111 receives a data signal with a frequency A, i.e., DATA Fre A, and an oscillation signal oscD with a frequency D, and generates a data clock signal DCLK. The phase-locked loop performs spectrum spreading on the data signal according to the data clock signal DCLK to obtain a data signal with a frequency B, i.e., DATA Fre B, which is then parsed by the second data signal parsing unit 113 for output. For TP and CLK (source signal generated by the GOA gate), only DCLK is referenced, and DCLK does not pass through the phase-locked loop PLL of the spectrum spreading unit 112, so there is no spectrum spreading function, and it is only related to the front-end refresh rate and resolution, that is, it is stable and does not change. The charging time is only related to these two signals, so it can be seen that the charging time is locked, so that water ripples will not appear due to differences in charging time.

[0042] After turning on spread spectrum, refer to Figure 4 and Figure 5As shown, the transmission frequency of the second data signal is divided into a first change band and a second change band; in the first change band, the transmission frequency of the second data signal increases from the original frequency to the first frequency and then decreases to the original frequency; in the second change band, the transmission frequency of the second data signal decreases from the original frequency to the second frequency and then increases to the original frequency. When the transmission frequency of the data signal varies around the original frequency, the pixels can receive appropriate charging signal strength and duration in different time periods, avoiding the problem of over- or under-charging of some pixels due to constant frequency or single change, thereby effectively improving the uniformity of charging and improving the overall display effect of the display panel 200.

[0043] like Fig.11 As shown, as the seventh embodiment of the present application, the present application further discloses a display panel 200, wherein the display panel 200 includes a plurality of data lines 210 and a plurality of scan lines 220, and a plurality of pixels 230 formed by the plurality of data lines 210 and the plurality of scan lines 220, wherein the data lines 210 are connected to a data driving module 120 in a driving circuit, and the scan lines 220 are connected to a gate driving module 130 of a driving circuit 100, and the display panel is driven by a driving circuit 100 as described in any of the above embodiments, using a driving method as described in any of the above embodiments; two gate driving modules 130 are shown in the figure, which are generally used in large-size panels, and scanning can be performed on the left and right sides, but one gate driving module 130 can also realize scanning of the scan lines 220 in the entire display panel 200.

[0044] like Fig.12 As shown, as the eighth embodiment of the present application, the present application further discloses a display device 400, wherein the display device 400 includes a display panel 200 and a driving circuit 100 as described in any of the above embodiments, and the driving circuit 100 drives the display panel 200 using a driving method as described in any of the above embodiments.

[0045] The spread spectrum setting of the host computer 300 can reasonably adjust the spread spectrum parameters according to the actual needs and working conditions of the display panel 200. Through the accurate spread spectrum setting, the timing control module 110 can output accurate data signals DATA, latch signals TP and clock signals CLK to the data driving module 120 and the gate driving module 130; the timing control module 110 includes a frequency synthesizer 111, a spread spectrum unit 112, a second data signal parsing unit 113 and an input / output port 114. The frequency synthesizer 111 outputs the first data signal and the crystal signal CLK to the data driving module 120 and the gate driving module 130. The frequency synthesizer 111 generates a data clock signal based on the frequency signal, the input end of the frequency spreading unit 112 is connected to the output end of the frequency synthesizer 111, and the output end is connected to the input end of the second data signal parsing unit 113. The frequency spreading unit 112 performs frequency spreading based on the data clock signal to generate a second data signal and outputs it to the second data signal parsing unit 113. The input / output port 114 is connected to the output end of the frequency synthesizer 111, and generates a latch signal and a clock signal according to the data clock signal. The frequency synthesizer 111 receives a data signal with a frequency A, i.e., DATA Fre A and an oscillation signal osc D with a frequency of D generate a data clock signal DCLK. The phase-locked loop performs spectrum spreading on the data signal according to the data clock signal DCLK to obtain a data signal with a frequency of B, namely DATA Fre B, which is then parsed by the second data signal parsing unit 113 for output. For TP and CLK (source signal generated by the GOA gate), only DCLK is referenced, and DCLK does not pass through the phase-locked loop PLL of the spectrum spreading unit 112, so there is no spectrum spreading function, and it is only related to the front-end refresh rate and resolution, that is, it is stable and does not change. The charging time is only related to these two signals, so it can be seen that the charging time is locked, so that water ripples will not appear due to the difference in charging time.

[0046] It should be noted that the limitations of the various steps involved in this scheme, without affecting the implementation of the specific scheme, are not considered to limit the order of the steps, that is, the steps written in front can be executed first, or can be executed later, or even simultaneously. As long as this scheme can be implemented, it should be considered to belong to the scope of protection of this application. The inventive concept of this application can form a lot of embodiments, but the length of the application document is limited and cannot be listed one by one. Therefore, under the premise of no conflict, the various embodiments or technical features described above can be arbitrarily combined to form a new embodiment. After the various embodiments or technical features are combined, the original technical effect will be enhanced.

[0047] The above contents are further detailed descriptions of the present application in combination with specific optional implementation methods, and it cannot be determined that the specific implementation of the present application is limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, several simple deductions or substitutions can be made without departing from the concept of the present application, which should be deemed to fall within the scope of protection of the present application.

Claims

1. A driving method for driving a display panel, characterized in that: The driving method comprises: receiving a low voltage differential signal and generating a first data signal; generating a data clock signal according to the first data signal and the crystal oscillator signal; Performing spectrum spreading based on the data clock signal to generate a second data signal; generating a latch signal and a clock signal based on the data clock signal; and After analyzing the data latch signal, the clock signal and the second data signal, the signals are output to the display panel to drive the display panel; The duration of each gate driving signal parsed from the clock signal is the same, and the interval between the falling edge of the corresponding data latch signal and the falling edge of the gate driving signal is the same.

2. The driving method according to claim 1, characterized in that: The step of performing spectrum spreading based on the data clock signal to generate the second data signal includes the following steps: Spreading the spectrum during the generation phase of the second data signal so that the transmission frequency of the second data signal changes periodically around the original frequency; The change value of the transmission frequency of the second data signal is ±3% of the original frequency, and the cycle time of the transmission frequency of the second data signal is the scanning time of 3N scanning lines, where N is a natural number greater than or equal to 2.

3. The driving method according to claim 1, characterized in that: The step of performing spectrum spreading based on the data clock signal to generate a second data signal comprises: When the data signal is spread, a compensation time is added to the idle time of each row of pixels so that the total duration of the display time and the idle time of each row of pixels is the same; The idle time includes a first time period, a second time period and a third time period in sequence, the first time period is a time period in which the amount of data does not change, the second time period is a spread spectrum time period, and the third time period is a reset time period; or the first time period is a spread spectrum time period, the second time period is a time period in which the amount of data does not change, and the third time period is a reset time period; Among them, during the spread spectrum time period in the idle time, a preset amount of non-display data is transmitted to the display panel to compensate for the idle time; in each row scan line cycle, after the spread spectrum is turned on, the transmission frequency of the second data signal gradually changes, and the transmission frequency of the latch signal and the clock signal remains unchanged.

4. The driving method according to claim 2, characterized in that: The maximum transmission frequency of the second data signal is the first frequency, the minimum transmission frequency is the second frequency, the first frequency is greater than the original frequency, the second frequency is less than the original frequency, and the step of spreading the spectrum in the generation stage of the second data signal so that the transmission frequency of the second data signal changes around the original frequency includes: In the spectrum spreading stage, the transmission frequency of the second data signal is divided into a first change band and a second change band; In the first variation band, the transmission frequency of the second data signal increases from the original frequency to the first frequency and then decreases to the original frequency; and In the second variation band, the transmission frequency of the second data signal decreases from the original frequency to the second frequency and then increases to the original frequency.

5. The driving method according to claim 4, characterized in that: In the step of increasing the transmission frequency of the second data signal from the original frequency to the first frequency and then decreasing to the original frequency within the first change band, the transmission frequency of the second data signal increases from the original frequency to the first frequency in a step-like or straight line manner and then decreases to the original frequency; In the step where the transmission frequency of the second data signal decreases from the original frequency to the second frequency and then increases to the original frequency within the second variation band, the transmission frequency of the second data signal decreases from the original frequency to the second frequency in a stepwise or linear manner and then increases to the original frequency.

6. The driving method according to claim 2, characterized in that: The step of generating a latch signal and a clock signal based on the data clock signal and the step of analyzing the data latch signal, the clock signal and the second data signal and outputting them to the display panel to drive the display panel include the following steps: A reference value is set for the idle time of each row of pixels, and the number of rows whose corresponding idle time is higher than the reference value is uniformly set at the reference value, so as to control the opening period of the scan line corresponding to each row of pixels and the refresh rate of the display panel; When insufficient charging occurs, the scan lines with short open cycle time are over-driven.

7. A driving circuit, characterized in that: The display panel is driven using the driving method described in any one of claims 1 to 6, wherein the driving circuit includes a timing control module, a data driving module and a gate driving module, and the timing control module outputs a second data signal including a spread spectrum generated number to the data driving module according to the spread spectrum setting of the host computer, and outputs a latch signal and a clock signal that are not spread spectrum to the data driving module and the gate driving module respectively.

8. The driving circuit according to claim 7, characterized in that: The timing control module includes a frequency synthesizer, a spectrum spreading unit, a second data signal analysis unit and an input / output port. The frequency synthesizer generates a data clock signal according to a first data signal and a crystal oscillator signal. The input end of the spectrum spreading unit is connected to the output end of the frequency synthesizer, and the output end is connected to the input end of the second data signal analysis unit. The spectrum spreading unit performs spectrum spreading based on the data clock signal to generate a second data signal and outputs the second data signal to the second data signal analysis unit. The input / output port is connected to the output end of the frequency synthesizer, and generates a latch signal and a clock signal according to the data clock signal. Among them, the timing control module includes a reset unit and a compensation unit, the reset unit and the compensation unit are respectively connected to the spread spectrum unit, the reset unit is used to control the spread spectrum unit to reset the transmission frequency of the data signal to the original frequency before the start of each frame, and the compensation unit compensates for the idle time before the rising edge of the latch signal, so that the display time of each row of pixels is the same as the total duration of the idle time.

9. A display panel, characterized in that: The display panel includes a plurality of data lines and a plurality of scan lines, and a plurality of pixels formed by the plurality of data lines and the plurality of scan lines, the data lines are connected to a data driving module in a driving circuit, the scan lines are connected to a gate driving module of the driving circuit, and the display panel is driven by a driving circuit as described in any one of claims 7 to 8 and using a driving method as described in any one of claims 1 to 6.

10. A display device, characterized in that: The display device comprises the display panel according to claim 9 and the driving circuit according to any one of claims 7 to 8, and the driving circuit drives the display panel using the driving method according to any one of claims 1 to 6.

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