Reworking method for back process abnormity of power device

Abstract

The invention provides a reworking method for a power device with an abnormal back process. The reworking method comprises the following steps: providing a semiconductor structure with an abnormal back process; removing the first back metal combination layer through a wet cleaning process to expose the back of the substrate; performing a laser annealing process on the substrate from the back surface of the substrate; etching and removing the first ion implantation region in the substrate from the back surface of the substrate; performing an ion implantation process on the substrate from the back surface of the substrate to form a second ion implantation region in the substrate; and forming a second back metal combination layer on the back of the substrate. After the first back metal combination layer is removed through wet cleaning and before the first ion implantation region in the substrate is removed through etching, the back laser annealing process is executed on the substrate, so that the surface of the substrate is subjected to the melting-solidification process after the first back metal combination layer is corroded; and the surface roughness of the substrate formed in the metal corrosion process is reduced, so that the problem of poor appearance of the back surface of the substrate after back etching of the substrate is solved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a rework method for abnormal back-side process of a power device. Background Art

[0002] If a power device product has an abnormality caused by the back-side process, the power device product can be reworked by back-side gold pulling, where the back-side process includes but is not limited to: back-side ion implantation process, metallization process and other processes.

[0003] The rework plan for 8-inch wafers is usually to corrode the metal layer on the back of the wafer by pickling with concentrated nitric acid and / or HF acid, then wet-etch the ion implantation layer in the substrate with Spin-D solution, and finally re-perform the ion implantation process and back metallization process on the back of the substrate. The Spin-D solution mainly includes hydrofluoric acid, nitric acid, sulfuric acid, phosphoric acid and other components.

[0004] However, since the back-side process of 12-inch wafers is different from that of 8-inch wafers, when the back-side process of 12-inch wafers is abnormal, directly using the rework solution of 8-inch wafers will result in poor appearance of the back side of the 12-inch wafer after rework, mainly manifested as large-area white spot defects. Summary of the invention

[0005] The present application provides a rework method for abnormal back-side process of a power device, which can solve the problem of poor back-side appearance after rework of a 12-inch wafer using a conventional wafer back-side process rework solution.

[0006] The embodiment of the present application provides a rework method for abnormal backside process of a power device, comprising: A semiconductor structure with a backside process abnormality is provided, the semiconductor structure at least comprising: a substrate and a first backside metal combination layer, the first backside metal combination layer covers the backside of the substrate, wherein a first ion implantation region is formed in the substrate near the backside of the substrate; removing the first back metal combination layer by a wet cleaning process to expose the back side of the substrate; performing a laser annealing process on the substrate from the back side of the substrate; From the back side of the substrate, etching and removing a certain thickness of the substrate to remove the first ion implantation area; From the back side of the substrate, performing an ion implantation process on the substrate to form a second ion implantation region in the substrate; A second back metal combination layer is formed, wherein the second back metal combination layer covers the back side of the substrate.

[0007] Optionally, in the rework method for the back side process abnormality of the power device, during the laser annealing process performed on the substrate from the back side of the substrate, the laser energy is 1.5J~1.8J, the spot size is 3mm*0.1mm±20%, the laser frequency is 4500Hz~7000Hz, the scanning overlap rate is 50%~60%, and the scanning speed is 80mm / s~110mm / s.

[0008] Optionally, in the rework method for the back side process abnormality of the power device, after performing a laser annealing process on the substrate from the back side of the substrate, the roughness Ra of the back side of the substrate is less than 4000 angstroms.

[0009] Optionally, in the rework method for back-side process abnormality of the power device, the first back-side metal combination layer includes: an aluminum layer 1, a titanium layer 1, a nickel-vanadium alloy layer 1 and a silver layer 1 stacked in sequence, and the aluminum layer 1 covers the back side of the substrate.

[0010] Optionally, in the rework method for back side process abnormality of the power device, the step of removing the first back side metal combination layer by a wet cleaning process to expose the back side of the substrate includes: removing the silver layer 1 and the nickel-vanadium alloy layer 1 by a wet cleaning process; The titanium layer 1 and the aluminum layer 1 are removed by a wet cleaning process.

[0011] Optionally, in the rework method for the back side process abnormality of the power device, a certain thickness of the substrate is etched away from the back side of the substrate by a wet etching process to remove the first ion implantation area.

[0012] Optionally, in the rework method for the back side process abnormality of the power device, the substrate having a thickness of 4 μm to 5 μm is removed by etching from the back side of the substrate to remove the first ion implantation region.

[0013] Optionally, in the rework method for the back side process abnormality of the power device, the step of forming a second back side metal combination layer, wherein the second back side metal combination layer covers the back side of the substrate comprises: forming a second aluminum layer, wherein the second aluminum layer covers the back side of the substrate; forming a second titanium layer, wherein the second titanium layer covers the second aluminum layer; forming a second nickel-vanadium alloy layer, wherein the second nickel-vanadium alloy layer covers the second titanium layer; A second silver layer is formed, wherein the second silver layer covers the second nickel-vanadium alloy layer.

[0014] Optionally, in the rework method for back side process abnormality of the power device, the diameter of the substrate is at least 12 inches.

[0015] The technical solution of this application has at least the following advantages: In the rework method for the back process abnormality of the power device provided in the present application, when the back process of the device is abnormal, the first back metal combination layer is first removed by a wet cleaning process to expose the back of the substrate, and then a laser annealing process is performed on the substrate from the back of the substrate, and then the first ion implantation area in the substrate is etched and removed from the back of the substrate, and then an ion implantation process is performed on the substrate from the back of the substrate to form a second ion implantation area in the substrate, and finally a second back metal combination layer is formed on the back of the substrate. The present application performs a back laser annealing process on the substrate after the first back metal combination layer is removed by wet cleaning and before the first ion implantation area in the substrate is etched and removed, so that the surface of the substrate after the first back metal combination layer is etched undergoes a melting-solidification process, reduces the substrate surface roughness formed during the metal corrosion process, improves the substrate damage caused by the mutual dissolution of the metal and the substrate (Si substrate), can improve the uniformity of the substrate thickness in the subsequent substrate back etching process to remove the first ion implantation area, and can also eliminate the contamination on the back of the substrate, thereby improving the problem of poor appearance of the back of the substrate after the substrate back etching process. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0017] Figure 1 It is a flow chart of a method for reworking a back side process abnormality of a power device according to an embodiment of the present invention; Figure 2-Figure 8 It is a schematic diagram of a semiconductor structure in each process step of reworking a power device with abnormal back-side process according to an embodiment of the present invention; 10-substrate, 101-front side of substrate, 102-back side of substrate, 11-first ion implantation region, 12-second ion implantation region; 20-a first back metal composite layer, 21-an aluminum layer, 22-a titanium layer, 23-a nickel-vanadium alloy layer, 24-a silver layer; 30 - second back metal combination layer, 21 - second aluminum layer, 22 - second titanium layer, 23 - second nickel-vanadium alloy layer, 24 - second silver layer. DETAILED DESCRIPTION

[0018] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in this application. Obviously, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0019] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0020] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0021] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0022] The present application embodiment provides a method for reworking a back side process abnormality of a power device, referring to Figure 1 , Figure 1 The present invention is a flowchart of a method for reworking a back side process abnormality of a power device according to an embodiment of the present invention. The method for reworking a back side process abnormality of a power device comprises: First, perform step S1: refer to Figure 2 , Figure 2 It is a schematic diagram of a semiconductor structure after a first back metal combination layer is formed in an embodiment of the present application, and provides a semiconductor structure with an abnormal back process, wherein the semiconductor structure at least includes: a substrate 10 and a first back metal combination layer 20, wherein the first back metal combination layer 20 covers the back side of the substrate 10, wherein the substrate 10 includes: a front side 101 of a substrate and a back side 102 of a substrate, and a first ion implantation region 11 is formed in the substrate 10 near the back side 102 of the substrate.

[0023] In this embodiment, the substrate 10 is a silicon substrate.

[0024] The diameter of the substrate 10 is at least 12 inches.

[0025] In this embodiment, the substrate 10 is a 12-inch wafer.

[0026] Then, execute step S2: refer to Figure 3 and Figure 4 , Figure 3 is a schematic diagram of the semiconductor structure after the silver layer 1 and the nickel-vanadium alloy layer 1 are removed according to an embodiment of the present application, Figure 4 1 is a schematic diagram of the semiconductor structure after the titanium layer 1 and the aluminum layer 1 are removed according to an embodiment of the present application. The first back metal combination layer 20 is removed by a wet cleaning process to expose the back side 102 of the substrate.

[0027] Preferably, the first back metal composite layer 20 comprises: an aluminum layer 21, a titanium layer 22, a nickel-vanadium alloy layer 23 and a silver layer 24 stacked in sequence, and the aluminum layer 21 covers the back side 102 of the substrate.

[0028] In this embodiment, the step of removing the first back metal combination layer 20 through a wet cleaning process to expose the back side 102 of the substrate may specifically include: refer to Figure 3 , removing the silver layer 1 (silver metal layer) 24 and the nickel-vanadium alloy layer 1 23 by etching through a wet cleaning process; refer to Figure 4 , the titanium layer 22 and the aluminum layer 21 are removed by etching through a wet cleaning process.

[0029] The solution used in the wet cleaning process includes, but is not limited to, one or more of concentrated nitric acid and HF acid.

[0030] It is worth noting that after the first back metal combination layer 20 is removed through a wet cleaning process to expose the back side 102 of the substrate, the surface roughness of the back side 102 of the substrate is too large. During the apparent measurement process, it was found that compared with the back side of the substrate before the wet cleaning process, there is a difference in the mass transfer rate of the back side of the substrate after the wet cleaning process, and the difference between the trough / peak becomes larger, resulting in the apparent abnormality of the back side of the substrate.

[0031] Next, step S3 is performed: performing a laser annealing process on the substrate 10 from the back side 102 of the substrate.

[0032] Preferably, during the laser annealing process performed on the substrate 10 from the back side 102 of the substrate, the laser energy is 1.5J~1.8J, the spot size is 3mm*0.1mm±20%, the laser frequency is 4500Hz~7000Hz, the scanning overlap rate is 50%~60%, and the scanning speed is 80mm / s~110mm / s.

[0033] Preferably, after the laser annealing process is performed on the substrate 10 from the back side 102 of the substrate, the surface roughness Ra of the back side 102 of the substrate is less than 4000 angstroms.

[0034] In the present application, after wet cleaning to remove the first back metal combination layer 20 and before etching to remove the first ion implantation area 11 in the substrate 10, a laser annealing process is performed on the back side of the substrate, so that the surface of the substrate after the first back metal combination layer is corroded can undergo a melting-solidification process, thereby reducing the surface roughness of the substrate formed during the metal corrosion process, improving the substrate damage caused by the mutual dissolution of the metal and the substrate (Si substrate), and improving the uniformity of the substrate thickness in the subsequent substrate back-etching to remove the first ion implantation area. At the same time, the contamination on the back side of the substrate can also be eliminated, and the problem of poor appearance of the back side of the substrate after the substrate back-etching process is improved, thereby improving the reliability of device rework and the device yield.

[0035] Further, step S4 is performed: refer to Figure 5 , Figure 5 1 is a schematic diagram of a semiconductor structure after the first ion implantation region is removed according to an embodiment of the present application. A certain thickness of the substrate 10 is removed by etching from the back side 102 of the substrate to remove the first ion implantation region 11 .

[0036] Preferably, a wet etching process is used to etch away a certain thickness of the substrate 10 from the back side 102 of the substrate to remove the first ion implantation region 11 .

[0037] In this embodiment, the substrate 10 having a thickness of 4 μm to 5 μm is removed by etching from the back side 102 of the substrate to remove the first ion implantation region 11 .

[0038] Furthermore, in this embodiment, in the process of removing a certain thickness of the substrate 10 by a wet etching process to remove the first ion implantation region 11 , the solution used may be a Spin-D solution.

[0039] Next, execute step S5: refer to Figure 6 , Figure 61 is a schematic diagram of a semiconductor structure after forming a second ion implantation region according to an embodiment of the present application. An ion implantation process is performed on the substrate 10 from the back side 102 of the substrate to form a second ion implantation region 12 in the substrate 10 .

[0040] Finally, execute step S6: reference Figure 7 and Figure 8 , Figure 7 is a schematic diagram of a semiconductor structure after forming a second aluminum layer and a second titanium layer according to an embodiment of the present application, Figure 8 It is a schematic diagram of the semiconductor structure after forming the second nickel-vanadium alloy layer and the second silver layer according to an embodiment of the present application, forming a second back metal combination layer 30, and the second back metal combination layer 30 covers the back side 102 of the substrate.

[0041] Preferably, the step of forming the second back metal combination layer 30, wherein the second back metal combination layer 30 covers the back side 102 of the substrate may specifically include: refer to Figure 7 , forming a second aluminum layer 31, wherein the second aluminum layer 31 covers the back side 102 of the substrate; Continue to refer Figure 7 , forming a second titanium layer 32, wherein the second titanium layer 32 covers the second aluminum layer 31; refer to Figure 8 , forming a second nickel-vanadium alloy layer 33, wherein the second nickel-vanadium alloy layer 33 covers the second titanium layer 32; Continue to refer Figure 8 , forming a second silver layer 34 , wherein the second silver layer 34 covers the second nickel-vanadium alloy layer 33 .

[0042] In this embodiment, the thickness of the aluminum layer 31 re-formed on the back side 102 of the substrate is 1000 angstroms to 2000 angstroms; the thickness of the titanium layer 32 is 1000 angstroms to 2000 angstroms; the thickness of the nickel-vanadium alloy layer 33 is 2000 angstroms to 3000 angstroms; and the thickness of the silver layer 34 is 4000 angstroms to 8000 angstroms.

[0043] In the present application, after the first back metal combination layer 20 is removed by wet cleaning and before the first ion implantation region 11 in the substrate 10 is etched away, a laser annealing process is performed on the back side of the substrate, so that the substrate surface can be subjected to a melting-solidification process, thereby reducing the surface roughness of the substrate formed during the metal corrosion process, improving the substrate damage caused by the mutual dissolution of the metal-substrate (Si substrate), improving the uniformity of the substrate thickness during the back-etching process to remove the first ion implantation region, and eliminating the contamination on the back side of the substrate, improving the problem of poor appearance of the back side of the substrate after the back-etching process of the substrate, and improving the thickness uniformity and flatness of the re-deposited second back metal combination layer, reducing the surface roughness of the second back metal combination layer, thereby improving the reliability of device rework and the device yield.

[0044] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection created by this application.

Claims

1. A method for reworking a back surface process abnormality of a power device, characterized in that: include: A semiconductor structure with a backside process abnormality is provided, the semiconductor structure at least comprising: a substrate and a first backside metal combination layer, the first backside metal combination layer covers the backside of the substrate, wherein a first ion implantation region is formed in the substrate near the backside of the substrate; removing the first back metal combination layer by a wet cleaning process to expose the back side of the substrate; performing a laser annealing process on the substrate from the back side of the substrate; From the back side of the substrate, etching and removing a certain thickness of the substrate to remove the first ion implantation area; From the back side of the substrate, performing an ion implantation process on the substrate to form a second ion implantation region in the substrate; A second back metal combination layer is formed, wherein the second back metal combination layer covers the back side of the substrate.

2. The rework method for abnormal back surface process of a power device according to claim 1, characterized in that: During the laser annealing process performed on the substrate from the back side of the substrate, the laser energy is 1.5J~1.8J, the spot size is 3mm*0.1mm±20%, the laser frequency is 4500Hz~7000Hz, the scanning overlap rate is 50%~60%, and the scanning speed is 80mm / s~110mm / s.

3. The rework method for backside process abnormality of a power device according to claim 1, characterized in that: After a laser annealing process is performed on the substrate from the back side of the substrate, the roughness Ra of the back side of the substrate is less than 4000 angstroms.

4. The rework method for backside process abnormality of a power device according to claim 1, characterized in that: The first back metal composite layer includes: an aluminum layer 1, a titanium layer 1, a nickel-vanadium alloy layer 1 and a silver layer 1 stacked in sequence, and the aluminum layer 1 covers the back side of the substrate.

5. The method for reworking a backside process abnormality of a power device according to claim 4, characterized in that: The step of removing the first back metal combination layer by a wet cleaning process to expose the back side of the substrate comprises: removing the silver layer 1 and the nickel-vanadium alloy layer 1 by a wet cleaning process; The titanium layer 1 and the aluminum layer 1 are removed by a wet cleaning process.

6. The rework method for backside process abnormality of a power device according to claim 1, characterized in that: A wet etching process is used to etch away a certain thickness of the substrate from the back side of the substrate to remove the first ion implantation region.

7. The rework method for abnormal back surface process of a power device according to claim 1, characterized in that: The substrate having a thickness of 4 μm to 5 μm is removed by etching from the back side of the substrate to remove the first ion implantation region.

8. The rework method for backside process abnormality of a power device according to claim 1, characterized in that: The step of forming a second back metal combination layer, wherein the second back metal combination layer covers the back side of the substrate comprises: forming a second aluminum layer, wherein the second aluminum layer covers the back side of the substrate; forming a second titanium layer, wherein the second titanium layer covers the second aluminum layer; forming a second nickel-vanadium alloy layer, wherein the second nickel-vanadium alloy layer covers the second titanium layer; A second silver layer is formed, wherein the second silver layer covers the second nickel-vanadium alloy layer.

9. The method for reworking a backside process abnormality of a power device according to claim 1, characterized in that: The substrate has a diameter of at least 12 inches.

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