Method for processing silicon carbide wafer

Abstract

The invention provides a silicon carbide wafer processing method, which comprises the following steps: providing a plurality of silicon carbide wafers, each silicon carbide wafer having a carbon surface and a silicon surface; placing the plurality of silicon carbide wafers in a boat such that the plurality of silicon carbide wafers are stacked at intervals in one direction, two surfaces of two adjacent silicon carbide wafers facing each other being the same; and putting the wafer boat into a furnace tube and then carrying out thermal oxidation treatment. According to the invention, the uniformity of the thickness of the SiC gate oxide layer can be improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor production and manufacturing, and in particular to a method for processing a silicon carbide wafer. Background Art

[0002] With the rapid development of power electronics technology, silicon carbide (SiC), as a wide bandgap semiconductor material, has shown incomparable advantages over traditional silicon-based devices under extreme conditions such as high frequency, high voltage, and high temperature due to its excellent physical and chemical properties, such as high breakdown field strength, high thermal conductivity, and high saturation drift velocity. It has gradually become the preferred material for the new generation of power electronic devices. Among them, SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) have become one of the research hotspots due to their excellent switching performance and voltage resistance.

[0003] The quality of the gate oxide layer, the core of SiC MOSFET, directly affects the reliability and performance of the device. As we all know, for SiC MOSFET, its gate oxide layer is usually formed by high-temperature oxidation of SiC material itself to form an oxide layer as the gate of the device, so as to ensure the quality of the gate.

[0004] Figure 1 A schematic diagram of the placement of multiple SiC wafers 10 during thermal oxidation treatment in the prior art is shown, each SiC wafer 10 has a silicon (Si) surface 11 and a carbon (C) surface 12, and the silicon (Si) surface 11 of each SiC wafer 10 faces upward, while the carbon (C) surface 12 faces downward. Since SiC material has a high melting point and a low surface mobility, its oxidation rate at high temperature is particularly slow, and due to the special characteristics of SiC material, SiC wafer 10 will be affected by the wafers 10 during high-temperature oxidation growth and there will be a serious uneven oxide film layer. This phenomenon will cause the threshold voltage of the final semiconductor device to fluctuate, the leakage current to increase, and will also accelerate the aging of the semiconductor device and shorten the service life. Therefore, how to improve the uniformity of the SiC gate oxide layer has become one of the key technical problems that restrict the performance improvement of SiC MOSFET. Summary of the invention

[0005] The present invention provides a method for processing a silicon carbide wafer, the processing method comprising:

[0006] Providing a plurality of silicon carbide wafers, wherein each silicon carbide wafer has a carbon side and a silicon side;

[0007] Placing the plurality of silicon carbide wafers in a wafer boat so that the plurality of silicon carbide wafers are stacked with spacing from each other in one direction, wherein two surfaces facing each other of two adjacent silicon carbide wafers are the same;

[0008] The wafer boat is placed in a furnace tube and then subjected to thermal oxidation treatment.

[0009] Preferably, two surfaces facing each other in two adjacent silicon carbide wafers are both carbon surfaces or silicon surfaces.

[0010] Preferably, the material of the wafer boat is any one of quartz material, silicon carbide material and silicon material.

[0011] Preferably, the furnace tube is a vertical oxidation furnace tube or a horizontal oxidation furnace tube.

[0012] Preferably, the size of the silicon carbide wafer is any one of 4 inches, 6 inches, and 8 inches.

[0013] In the present invention, during the thermal oxidation process, the silicon surface of any silicon carbide wafer will not be oxidized due to the gas generated by the carbon surface of other silicon carbide wafers, thereby suppressing the fluctuation of the thickness of the oxide layer of the silicon surface. Since the oxide layer of the silicon surface is used as the gate oxide layer of the device, the present invention can suppress the fluctuation of the thickness of the gate oxide layer, improve the uniformity of the thickness of the SiC gate oxide layer, and thus improve the parameter performance and reliability of the threshold voltage of the SiC MOSFET. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A schematic diagram of placing multiple silicon carbide wafers according to the prior art is shown;

[0015] Figure 2 A flow chart showing a method for processing a silicon carbide wafer according to an embodiment of the present invention is shown;

[0016] Figure 3 A schematic diagram showing placement of multiple silicon carbide wafers according to an embodiment of the present invention is shown;

[0017] Figure 4 Another schematic diagram of placing multiple silicon carbide wafers according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0018] The following specific embodiments illustrate the implementation of the present invention, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. Although the description of the present invention will be introduced in conjunction with the preferred embodiment, this does not mean that the features of this invention are limited to this implementation. On the contrary, the purpose of introducing the invention in conjunction with the implementation is to cover other options or modifications that may extend based on the claims of the present invention. In order to provide a deep understanding of the present invention, the following description will include many specific details. The present invention can also be implemented without using these details. In addition, in order to avoid confusion or blurring the focus of the present invention, some specific details will be omitted in the description. It should be noted that the embodiments of the present invention and the features in the embodiments can be combined with each other without conflict.

[0019] It should be noted that in this specification, similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0020] In order to make the objectives, technical solutions and advantages of the present invention more clear, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0021] Figure 2 A flow chart showing a method for processing a silicon carbide wafer according to an embodiment of the present invention is shown. Figure 3 FIG. 4 is a schematic diagram showing a plurality of silicon carbide wafers placed according to an embodiment of the present invention. Figure 4 Another schematic diagram of placing multiple silicon carbide wafers according to an embodiment of the present invention is shown.

[0022] See also Figure 2 , Figure 3 and Figure 4 In step S21 , a plurality of silicon carbide wafers 302 are provided, wherein each silicon carbide wafer 302 has a carbon surface 41 and a silicon surface 42 .

[0023] In step S22 , a plurality of silicon carbide wafers 302 are placed in the wafer boat 103 so that the plurality of silicon carbide wafers 302 are stacked with a distance therebetween in one direction.

[0024] Specifically, in the wafer boat 301, along one direction, for example, along the longitudinal direction of the wafer boat 301 (ie, Figure 3 A plurality of support plates (not shown) spaced apart from each other are provided, and a silicon carbide wafer 302 is placed on each support plate, so that the silicon carbide wafers 302 are stacked spaced apart from each other in the longitudinal direction of the wafer boat 301.

[0025] The two surfaces facing each other in two adjacent silicon carbide wafers 302 are identical. Figure 4 As shown, the two surfaces facing each other in two adjacent silicon carbide wafers 302 are both carbon surfaces 41 or silicon surfaces 42. For example, the silicon surface 42 of the first silicon carbide wafer 302 located at the top is opposite to the silicon surface 42 of the adjacent second silicon carbide wafer 302, that is, the two surfaces facing each other in the first silicon carbide wafer 302 and the second silicon carbide wafer 302 are both silicon surfaces 42. Similarly, the two surfaces facing each other in the second silicon carbide wafer 302 and the third silicon carbide wafer 302 are both carbon surfaces 41.

[0026] In step S23, the wafer boat 301 is placed in the furnace tube 303 and then subjected to thermal oxidation treatment.

[0027] In the case of Figure 4 During the thermal oxidation process of the multiple silicon carbide wafers 302 placed as shown, for example, the diffusion of the gas generated from the carbon surface 41 of the second silicon carbide wafer 302 is blocked by the carbon surface 41 of the third silicon carbide wafer 302 disposed thereunder, and thus the amount of gas that reaches the silicon surface 42 of the third silicon carbide wafer 302 thereunder by diffusion is reduced. Similarly, the diffusion of the gas generated from the carbon surface 41 of the third silicon carbide wafer 302 is blocked by the carbon surface 41 of the second silicon carbide wafer 302 disposed thereover, and thus the amount of gas that reaches the silicon surface 42 of the second silicon carbide wafer 302 thereover by diffusion is also reduced.

[0028] In the present invention, during the thermal oxidation process, the silicon surface of any silicon carbide wafer will not be oxidized due to the gas generated by the carbon surface of other silicon carbide wafers, thereby suppressing the fluctuation of the thickness of the oxide layer of the silicon surface. Since the oxide layer of the silicon surface is used as the gate oxide layer of the device, the present invention can suppress the fluctuation of the thickness of the gate oxide layer, improve the uniformity of the thickness of the SiC gate oxide layer, and thus improve the parameter performance and reliability of the threshold voltage of the SiC MOSFET.

[0029] Table 1 shows the oxide layer thickness and uniformity of the silicon carbide wafer surface after the silicon carbide wafer placed using the prior art is subjected to thermal oxidation process. Table 2 shows the oxide layer thickness and uniformity of the silicon carbide wafer surface after the silicon carbide wafer placed using the present invention is subjected to thermal oxidation process.

[0030] Table 1

[0031]

[0032] Table 2

[0033]

[0034] It can be seen that under the same process conditions, the present invention can significantly improve the uniformity of the thickness of the SiC oxide layer, and the intra-wafer uniformity of the silicon carbide wafer is less than 1.5% (an average increase of about 4 percentage points).

[0035] Preferably, the material of the wafer boat 301 can be any one of quartz material, silicon carbide material and silicon material.

[0036] Preferably, the furnace tube 303 can be a vertical oxidation furnace tube or a horizontal oxidation furnace tube. The present invention has wide applicability to the silicon carbide oxidation process, not only to the vertical oxidation furnace tube, but also to the horizontal oxidation furnace tube, and can significantly improve the uniformity of the silicon carbide oxidation process.

[0037] Preferably, the size of the silicon carbide wafer 302 is any one of 4 inches, 6 inches, and 8 inches, so it has wide applicability to different sizes of silicon carbide wafers.

[0038] Preferably, the present invention is also widely applicable to different silicon carbide oxidation process conditions, such as different process temperatures, different gas flow rates, etc.

[0039] In the description provided herein, a large number of specific details are described. However, it is understood that embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0040] Similarly, it should be understood that in order to streamline the present invention and aid in understanding one or more of the various inventive aspects, in the above description of exemplary embodiments of the present invention, various features of the present invention are sometimes grouped together into a single embodiment, figure, or description thereof. However, this disclosed method should not be interpreted as reflecting the intention that the claimed invention requires more features than those expressly recited in each claim. Rather, as reflected in the claims, inventive aspects lie in less than all of the features of the individual embodiments previously disclosed. Therefore, the claims that follow the detailed description are hereby expressly incorporated into the detailed description, with each claim itself serving as a separate embodiment of the present invention.

[0041] In addition, those skilled in the art will appreciate that, although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present invention and form different embodiments. For example, in the claims, any one of the claimed embodiments may be used in any combination.

Claims

1. A method for processing a silicon carbide wafer, characterized in that: The processing method comprises: Providing a plurality of silicon carbide wafers, wherein each silicon carbide wafer has a carbon side and a silicon side; Placing the plurality of silicon carbide wafers in a wafer boat so that the plurality of silicon carbide wafers are stacked with spacing from each other in one direction, wherein two surfaces facing each other of two adjacent silicon carbide wafers are the same; The wafer boat is placed in a furnace tube and then subjected to thermal oxidation treatment.

2. The processing method according to claim 1, characterized in that: The two surfaces facing each other in two adjacent silicon carbide wafers are both carbon surfaces or silicon surfaces.

3. The processing method according to claim 1, characterized in that: The material of the wafer boat is any one of quartz material, silicon carbide material and silicon material.

4. The processing method according to claim 1, characterized in that: The furnace tube is a vertical oxidation furnace tube or a horizontal oxidation furnace tube.

5. The processing method according to claim 1, characterized in that: The size of the silicon carbide wafer is any one of 4 inches, 6 inches, and 8 inches.

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