Soft switching implementation method for parallel connection of even number of converters, controller and storage medium
By using a soft switch implementation method in parallel with even numbers of converters in the parallel converter, signal processing is performed using phase shift angles and special-shaped carriers to generate a time-delay pulse signal to control the switching device, the problems of poor universality and high switching losses in the prior art are solved, and efficient soft switching effect is achieved.
Patent Information
- Application Number
- CN202510219189.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-26
- Publication Date
- 2025-05-16
AI Technical Summary
The existing soft switching technology is poorly universal in parallel converters, and cannot effectively reduce switching losses and improve switching efficiency.
A soft switch implementation method is adopted in parallel with even converters. By obtaining the DC bus voltage, phase current and number of bridge arm complementary units of each phase current output module, determining the phase shift angle, constructing a special-shaped carrier, performing signal delay processing, and generating a delay pulse signal to control the switching device to realize the soft switch.
The full range of soft switches is realized, which improves the universality of soft switch technology in converters, reduces hardware costs, and solves the problem of excessive zero-crossing harmonics in traditional methods, and improves the state conversion efficiency of switching devices.
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Figure CN120016857A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of soft switching technology, and in particular to a soft switching implementation method, a controller and a storage medium for connecting an even number of converters in parallel. Background Art
[0002] In recent years, wide bandgap semiconductor materials have been widely used in converters due to their excellent parameter performance. However, for switching devices made of wide bandgap semiconductor materials, their turn-on loss accounts for the main part of the switching loss. In order to reduce the switching loss, converters using wide bandgap semiconductor materials need to implement soft switching technology.
[0003] Existing soft switching technologies include soft switching methods based on hysteresis control, soft switching methods based on current ripple prediction, and soft switching methods based on four-corner current mode, etc. However, when the switching device starts to conduct in the soft switching method based on hysteresis control, the current of the switching device cannot undergo a reverse recovery process, and an additional zero-crossing detection hardware circuit needs to be connected, which increases the hardware cost of implementing soft switching. The soft switching method based on current ripple prediction cannot simultaneously achieve critical soft switching of three-phase currents, will generate too much current ripple, and cannot reduce the switching loss of the converter. In order to ensure that all three phases can achieve soft switching, the soft switching method based on the four-corner current mode will cause the zero-crossing harmonics of the bridge arm current to be too large, and cannot reduce the switching loss of the converter. In addition, the existing soft switching method cannot be simply and conveniently applied to any even number of parallel converters, has poor universality, and cannot reduce the switching loss of multiple parallel converters and improve the switching efficiency of parallel converters.
[0004] Accordingly, a new solution is needed in the art to solve the above problems. Application Contents
[0001] The present application aims to solve the above technical problem, that is, to solve the problem of how to improve the universality of soft switching technology in parallel converters.
[0005] In a first aspect, the present application provides a soft switching implementation method for an even number of converters in parallel, the method being applicable to a converter parallel system consisting of an even number of converters connected in parallel, the converter parallel system comprising a three-phase current output module, each phase of the current output module comprising an even number of bridge arms connected in parallel, and each two of the bridge arms being used as a bridge arm complementary unit, so that each of the bridge arm complementary units comprises a first bridge arm and a second bridge arm, and each of the bridge arms comprises two complementary switch devices; the method comprising:
[0006] For each phase current output module, the DC bus voltage of the converter parallel system in the current switching cycle, the phase current corresponding to the current output module and the number of the bridge arm complementary units contained in the current output module are obtained to determine the phase shift angle of the current output module in the current switching cycle, where the phase shift angle is the angle of the special-shaped carrier used to construct the current output module;
[0007] According to the phase shift angle, a phase difference between a first carrier and a second carrier is obtained, and a special-shaped carrier is constructed according to the first carrier and the second carrier, wherein the first carrier is a carrier for obtaining a pulse signal for controlling a switching device of the first bridge arm, and the second carrier is a carrier for obtaining a pulse signal for controlling a switching device of the second bridge arm;
[0008] According to the special-shaped carrier, an original pulse signal of the current output module is obtained, and a signal delay process is performed on the original pulse signal to obtain a delayed pulse signal of each bridge arm complementary unit in the current output module, so as to control all switching devices in the corresponding bridge arm complementary unit to realize soft switching of the converter parallel system;
[0009] The signal delay time length of the time delay pulse signal corresponding to each bridge arm complementary unit is different from the signal delay time lengths of the time delay pulse signals of other bridge arm complementary units.
[0010] In a technical solution of the soft switching implementation method of the above-mentioned even number of converters in parallel, the original pulse signal includes a first pulse signal and a second pulse signal, the first pulse signal is a pulse width modulation signal for controlling the switching state of all switching devices on the first bridge arm, and the second pulse signal is a pulse width modulation signal for controlling the switching state of all switching devices on the second bridge arm;
[0011] The step of obtaining the delayed pulse signal of each bridge arm complementary unit in the current output module comprises:
[0012] For each of the bridge arm complementary units, randomly obtaining a signal delay length;
[0013] According to the signal delay length, adjusting the position of the first pulse signal on the time axis to perform a signal delay on the first pulse signal to obtain a first delayed pulse signal;
[0014] According to the signal delay time length, adjusting the position of the second pulse signal on the time axis to perform a signal delay on the second pulse signal to obtain a second delayed pulse signal;
[0015] The delayed pulse signal of the bridge arm complementary unit is obtained according to the first delayed pulse signal and the second delayed pulse signal.
[0016] In one technical solution of the soft switching implementation method of the above-mentioned even number of converters in parallel,
[0017] The randomly acquiring signal delay time length comprises:
[0018] Randomly numbering each bridge arm complementary unit in the current output module to obtain a numbering result of each bridge arm complementary unit;
[0019] Based on the numbering result of the bridge arm complementary unit, the signal delay length of the bridge arm complementary unit is determined according to the following formula:
[0020]
[0021] Wherein, t is the signal delay time, n is the numbering result of the bridge arm complementary unit, T s is the cycle length of the current switching cycle, and N is the number of bridge arm complementary units contained in the current output module.
[0022] In one technical solution of the soft switching implementation method of the above-mentioned even number of converters in parallel,
[0023] The bridge arm complementary unit of each phase further includes two auxiliary inductors, one end of each of the auxiliary inductors is connected to the output side of the current output module, and the other end of each of the auxiliary inductors is respectively connected to the series connection point between the two switch devices on the bridge arm;
[0024] The step of obtaining the DC bus voltage of the converter parallel system, the phase current of each phase current output module and the number of the bridge arm complementary units contained in each phase current output module in the current output module of the current switching cycle to determine the phase shift angle includes:
[0025] The phase shift angle is determined according to the following formula:
[0026]
[0027] Among them, V dc is the DC bus voltage of the converter parallel system in the current switching cycle, i x is the phase current of the x-phase current output module, N is the number of the bridge arm complementary units contained in each phase current output module, I bias is the bias current of the switching device, T s is the duration of the current switching cycle, L m is the inductance value of the auxiliary inductor.
[0028] In one technical solution of the soft switching implementation method of the above-mentioned even number of converters in parallel,
[0029] The method further comprises obtaining a formula for determining the phase shift angle according to the following steps:
[0030] According to the following formula, a first quantitative relationship between the interphase circulating current ripple of each bridge arm complementary unit and the phase current of the current output module is determined:
[0031]
[0032] Among them, ΔI rp is the fluctuation range of the interphase circulating current ripple, I bias is the bias current of the switching device, N is the number of the bridge arm complementary units contained in each phase current output module, i x is the phase current of the current output module of the xth phase; wherein the interphase circulating current ripple is the ripple of the interphase circulating current flowing through the auxiliary inductor of the bridge arm complementary unit;
[0033] The second quantitative relationship between the interphase circulating current ripple of the bridge arm complementary unit and the phase shift angle is determined according to the following formula:
[0034]
[0035] Among them, ΔI rp is the fluctuation range of the interphase circulating current ripple, V dc is the DC bus voltage of the converter parallel system, is the phase shift angle, T s is the duration of the current switching cycle, L m is the inductance value of the auxiliary inductor;
[0036] Based on the critical soft switching realization condition, the formula for determining the phase shift angle is obtained according to the first quantitative relationship and the second quantitative relationship.
[0037] In one technical solution of the soft switching implementation method of the above-mentioned even number of converters in parallel,
[0038] The step of obtaining a phase difference between the first carrier and the second carrier according to the phase shift angle to construct a special-shaped carrier comprises:
[0039] Acquire a first triangular carrier and a second triangular carrier, and use the phase shift angle as a phase difference between the first triangular carrier and the second triangular carrier, wherein the first triangular carrier and the second triangular carrier have the same amplitude and shape;
[0040] Determining initial positions of the first triangular carrier and the second triangular carrier at a start time of the current switching cycle according to the phase shift angle;
[0041] Determine the first carrier and the second carrier according to the first triangular carrier and the second triangular carrier after determining the initial position;
[0042] The heterogeneous carrier is constructed according to the first carrier and the second carrier.
[0043] In one technical solution of the soft switching implementation method of the above-mentioned even number of converters in parallel,
[0044] Determining initial positions of the first triangular carrier and the second triangular carrier at the start time of the current switching cycle includes:
[0045] According to one half of the phase shift angle, the first triangular carrier and the second triangular carrier are phase-shifted simultaneously to obtain a phase shift result of the first triangular carrier and the second triangular carrier;
[0046] According to the phase shift angle, setting initial values of the first triangular carrier and the second triangular carrier at the start time of the current switching cycle;
[0047] The initial position is determined according to the initial value and the phase shift result.
[0048] In one technical solution of the soft switching implementation method of the above-mentioned even number of converters in parallel,
[0049] Setting initial values of the first triangular carrier and the second triangular carrier at the start time of the current switching cycle includes:
[0050] The initial value of the first triangular carrier at the start time of the current switching cycle is determined according to the following formula:
[0051]
[0052] Among them, Init cr1 is the initial value of the first triangular carrier, V ref is the modulated wave, is the phase shift angle;
[0053] The initial value of the second triangular carrier at the start time of the current switching cycle is determined according to the following formula:
[0054]
[0055] Among them, Init cr2 is the initial value of the second triangular carrier, V ref is the modulated wave, is the phase shift angle.
[0056] In a second aspect, a controller is provided, comprising at least one processor; and a memory communicatively connected to the at least one processor; wherein a computer program is stored in the memory, and when the computer program is executed by the at least one processor, the method described in any one of the technical solutions for the soft switching implementation method of the above-mentioned even number of converters in parallel is implemented.
[0057] In a third aspect, a computer-readable storage medium is provided, wherein a plurality of program codes are stored therein, wherein the program codes are suitable for being loaded and run by a processor to execute the method described in any one of the technical solutions of the above-mentioned soft switching implementation method of an even number of converters in parallel.
[0058] The above one or more technical solutions of the present application have at least one or more of the following beneficial effects:
[0002] In the case of adopting the above-mentioned technical solution, the present application includes: for each phase current output module, obtaining the DC bus voltage of the converter parallel system in the current switching cycle, the phase current of the current output module and the number of bridge arm complementary units contained in the current output module to determine the phase shift angle of the current output module in the current switching cycle, according to the phase shift angle, obtaining the phase difference between the first carrier and the second carrier, and constructing a special-shaped carrier according to the first carrier and the second carrier, according to the special-shaped carrier, obtaining the original pulse signal of the current output module, and performing signal delay processing on the original pulse signal to obtain the delayed pulse signal of each bridge arm complementary unit in the current output module, so as to control all switching devices in the corresponding bridge arm complementary unit to realize soft switching of the converter parallel system.
[0003] Through the above configuration, the present application can generate multiple groups of different delayed pulse signals by delaying the original pulse signal of each phase current output module to control the switching state of all switching devices of each bridge arm complementary unit in the phase current output module to achieve full-range soft switching, and realize the promotion from a single converter to any even number of converters in parallel, thereby improving the universality of soft switching technology in converters. At the same time, the constructed heterogeneous carrier can be adjusted in position according to the phase shift angle determined in each switching cycle to obtain a pulse signal to achieve fixed-frequency control of the switching devices of the converter parallel system, which is not only beneficial to the stability of the system, but also does not require the connection of the zero-crossing detection hardware circuit, reducing the hardware cost of realizing soft switching.
[0004] Moreover, in each switching cycle, it is only necessary to calculate the phase shift angle according to the real-time data of the converter parallel system to construct a special-shaped carrier, so as to obtain a pulse signal so that the converter parallel system can generate an inter-phase circulating current ripple that meets the critical soft switching conditions, which solves the problem of excessive zero-crossing harmonics in traditional soft switching methods, reduces the switching loss of switching devices, and greatly improves the state conversion efficiency of switching devices. BRIEF DESCRIPTION OF THE DRAWINGS
[0059] The disclosure of the present application will become easier to understand with reference to the accompanying drawings. It is easy for those skilled in the art to understand that these drawings are only for illustrative purposes and are not intended to limit the scope of protection of the present application. Among them:
[0060] Figure 1 It is a flowchart of main steps of a method for realizing soft switching of an even number of converters in parallel according to an embodiment of the present application;
[0061] Figure 2 is a circuit topology diagram of a converter parallel system in an embodiment of the present application;
[0062] Figure 3 is a schematic diagram of current waveforms of two bridge arm currents of a bridge arm complementary unit within a fundamental wave period in an embodiment of the present application;
[0063] Figure 4 is a waveform diagram of a special-shaped carrier in an embodiment of the present application;
[0064] Figure 5 It is a flow chart of a method for controlling a converter parallel system to realize soft switching according to an embodiment of the present application. DETAILED DESCRIPTION
[0065] Some embodiments of the present application are described below with reference to the accompanying drawings. Those skilled in the art should understand that these embodiments are only used to explain the technical principles of the present application and are not intended to limit the protection scope of the present application.
[0066] In the description of the present application, "module" and "processor" may include hardware, software or a combination of the two. A module may include hardware circuits, various suitable sensors, communication ports, memory, and may also include software parts, such as program code, or a combination of software and hardware. The processor may be a central processing unit, a microprocessor, an image processor, a digital signal processor or any other suitable processor. The processor has data and / or signal processing functions. The processor may be implemented in software, hardware or a combination of the two. Computer-readable storage media include any suitable medium that can store program code, such as a disk, a hard disk, an optical disk, a flash memory, a read-only memory, a random access memory, etc. The term "A and / or B" means all possible combinations of A and B, such as only A, only B or A and B. The term "at least one A or B" or "at least one of A and B" has a similar meaning to "A and / or B" and may include only A, only B or A and B. The singular terms "one" and "the" may also include plural forms.
[0067] Here we first explain some terms involved in this application.
[0068] Soft switching is a technology that reduces the overlapping area of voltage and current during the switching process through specific circuit design and control strategies, thereby reducing switching losses and electromagnetic interference. It can introduce resonance before and after the switching process so that the voltage of the switch tube drops to zero before it is turned on, thereby eliminating the overlap of voltage and current during the switching process and significantly reducing or even eliminating switching losses.
[0069] See attached Figure 1 , Figure 1 FIG. 1 is a flow chart of the main steps of a method for implementing soft switching of an even number of converters in parallel according to an embodiment of the present application. Figure 1 As shown, the soft switching implementation method of an even number of converters in parallel in the embodiment of the present application mainly includes the following steps S101 to S103.
[0070] Step S101: For each phase current output module, obtain the DC bus voltage of the converter parallel system in the current switching cycle, the phase current corresponding to the phase current output module and the number of bridge arm complementary units contained in the phase current output module to determine the phase shift angle of the current output module in the current switching cycle.
[0071] In this embodiment, the phase shift angle is the angle of the special-shaped carrier used to construct the current output module.
[0072] In this embodiment, this method is applicable to a converter parallel system composed of an even number of converters connected in parallel. The converter parallel system includes a three-phase current output module, each phase current output module includes an even number of bridge arms connected in parallel, and every two bridge arms are used as a bridge arm complementary unit, so that each bridge arm complementary unit includes a first bridge arm and a second bridge arm, and each bridge arm includes two complementary switch devices.
[0073] In an application scenario according to an embodiment of the present application, please refer to the attached Figure 2 , attached Figure 2 is a circuit topology diagram of a converter parallel system in an embodiment of the present application. Figure 2 As shown, the converter parallel system can be a converter including any even number of parallel bridge arms.
[0074] in, Figure 2 V dc is the DC side voltage of the converter parallel system (i.e. DC bus voltage), Figure 2 The converter parallel system in the embodiment includes a phase current output module, b phase current output module and c phase current output module. Among them, the phase current corresponding to the a phase current output module is i a , the phase current corresponding to the b-phase current output module is i b , the phase current corresponding to the c-phase current output module is i c The a-phase current output module passes through the filter inductor L ao Connected to the grid or load, the b-phase current output module passes through the filter inductor L bo Connected to the grid or load, the c-phase current output module passes through the filter inductor L co Connect to the grid or load.
[0075] In this embodiment, Figure 2 Taking phase a in the example, the phase a current output module may include N groups of bridge arm complementary units, and the bridge arm complementary units of groups Group#1 to Group#N constitute the phase a current output module.
[0076] In this embodiment, Figure 2 Taking phase a in the a-phase as an example, each group of bridge arm complementary units includes two first bridge arms and second bridge arms connected in parallel. Taking the bridge arm complementary units of Group#1 in phase a as an example, the switching device S a1 and S' a1 The bridge arm and switch device S a2 and S' a2 The bridge arms where they are located constitute a bridge arm complementary unit.
[0077] In one embodiment, a switching device S is included. a1and S' a1 The bridge arm can be used as the first bridge arm, including a switching device S a2 and S' a2 The bridge arm of can be used as the second bridge arm. Among them, the switch device S a1 and S' a1 The bridge arm complementary tube, the switch device S a2 and S' a2 It is a complementary tube of staggered interconnected bridge arms.
[0078] In this embodiment, the switching period of the converter refers to the time required for the switch to switch from one state to another state. In the field of power electronics, the switching period is usually measured in microseconds (μs) or nanoseconds (ns).
[0079] In one implementation, in each switching cycle, each phase current output module may correspond to a different phase shift angle to construct different shaped carriers.
[0080] In this embodiment, the DC bus voltage refers to the carrier used to transmit electric energy in the DC power transmission system. Since the DC bus voltage usually has a higher voltage level, the DC bus voltage can be used as the input voltage of the converter parallel system to reduce the resistance and inductance of the transmission line and improve the efficiency of power transmission.
[0081] In one embodiment, each bridge arm complementary unit may further include two auxiliary inductors, one end of each auxiliary inductor is connected to the output side of the current output module, and the other end is connected to the series connection point of two switch devices on one bridge arm. The auxiliary inductor may be any one of a coupled inductor and a differential mode inductor. The inductance of the auxiliary inductor is much smaller than the inductance of the filter inductor.
[0082] In this embodiment, the Figure 2 As shown, taking phase a as an example, the auxiliary inductance can be Figure 2 L am1 , L am2 ,......,L amn Wherein, n is the number of all bridge arm complementary units in the a-phase current output unit.
[0083] In one embodiment, each bridge arm complementary unit further includes two auxiliary inductors, one end of each auxiliary inductor is connected to the output side of the current output module, and the other end of each auxiliary inductor is respectively connected to the series connection point between the two switching devices on the bridge arm.
[0084] In this implementation, step S101 may further include:
[0085] According to the following formula (1), the phase shift angle is determined:
[0086]
[0087] Among them, V dc is the DC bus voltage of the converter parallel system in the current switching cycle, i x is the phase current of the x-phase current output module, N is the number of bridge arm complementary units contained in each phase current output module, I bias is the bias current of the switching device, T s is the duration of the current switching cycle, L m is the inductance value of the auxiliary inductor.
[0088] In one implementation, the formula for determining the phase shift angle may be obtained according to the following steps S1011 to S1013:
[0089] Step S1011: Determine a first quantitative relationship between the interphase circulating current ripple of each bridge arm complementary unit and the phase current of the current output module according to the following formula (2):
[0090]
[0091] Among them, ΔI rp is the interphase circulating current ripple flowing through the auxiliary inductor, I bias is the bias current of the switching device, N is the number of bridge arm complementary units contained in each phase current output module, i x is the phase current of the current output module of phase x.
[0092] The interphase circulating current ripple is the ripple of the interphase circulating current flowing through the auxiliary inductor of the bridge arm complementary unit. N can be used to represent the total number of bridge arm complementary units included in the converter parallel system.
[0093] In this embodiment, please refer to the attached Figure 3 , attached Figure 3 Schematic diagram of current waveforms of two bridge arm currents of a bridge arm complementary unit in a fundamental wave cycle in an embodiment of the present application. Figure 3 As shown, x1 and i x2 are used to represent the bridge arm current value of the first bridge arm and the bridge arm current value of the second bridge arm in the bridge arm complementary unit, i x / N is used to represent the output current value in the bridge arm complementary unit. To ensure that all switching devices achieve soft switching, the minimum current value of the bridge arm current in all bridge arm complementary units should be less than or equal to the bias current I bias .like, Figure 3 i x1 and i x2 In the positive and negative half cycles, the bias current Ibias or -I bias .
[0094] In one implementation, in order to minimize the conduction loss of the interphase circulating current ripple and ensure that all switching devices operate in a critical soft switching mode, the first quantitative relationship may be set to: To make the phase shift angle Get the minimum value.
[0095] Step S1012: Determine the second quantitative relationship between the interphase circulating current ripple and the phase shift angle of the bridge arm complementary unit according to the following formula (3):
[0096]
[0097] Among them, ΔI rp is the interphase circulating current ripple flowing through the auxiliary inductor, V dc is the DC bus voltage of the converter parallel system, is the phase shift angle, T s is the duration of the current switching cycle, L m is the inductance value of the auxiliary inductor.
[0098] In this embodiment, L m It can be the inductance value of the auxiliary inductor in the corresponding bridge arm complementary unit. Among them, the inductance values of the auxiliary inductors in different bridge arm complementary units are the same, such as Figure 2 For example, the inductance value of the auxiliary inductor in the bridge arm complementary unit of Group#1 is L am1 , the inductance value L of the auxiliary inductor in the bridge arm complementary unit of Group#2 am2 The inductance value L of the auxiliary inductor in the bridge arm complementary unit of Group#N amn Therefore, the L in the second quantitative relationship can be determined according to the inductance value of the auxiliary inductor in any group of bridge arm complementary units. m The value of does not affect the normal implementation of the embodiments of the present application.
[0099] Step S1013: Based on the critical soft switching realization condition, according to the first quantitative relationship and the second quantitative relationship, a formula for determining the phase shift angle is obtained.
[0100] In this embodiment, the second quantity formula can be set to set the minimum current value of the bridge arm current of each bridge arm to be less than or equal to the bias current I bias and other methods to obtain critical soft switching conditions.
[0101] Step S102: obtaining a phase difference between a first carrier and a second carrier according to a phase shift angle, and constructing a special-shaped carrier according to the first carrier and the second carrier.
[0102] In this embodiment, the carrier wave is usually a radio wave of a specific frequency, measured in Hertz (Hz), which can be modulated in frequency, amplitude modulation or phase to transmit information. The shaped carrier wave is a carrier wave used to obtain a pulse width modulation signal for controlling a switching device in a parallel converter system.
[0103] In this embodiment, a carrier composed of a first carrier and a second carrier can be used as a constructed heterogeneous carrier, wherein the first carrier is a carrier for obtaining a pulse signal for controlling a switch device of the first bridge arm, and the second carrier is a carrier for obtaining a pulse signal for controlling a switch device of the second bridge arm.
[0104] In one implementation, the first carrier and the second carrier may be obtained using a pair of triangular carriers having the same shape and amplitude and a phase difference.
[0105] In one implementation, step S102 may further include:
[0106] Step S1021: Acquire a first triangular carrier and a second triangular carrier, and use the phase shift angle as the phase difference between the first triangular carrier and the second triangular carrier.
[0107] In this embodiment, the first triangular carrier and the second triangular carrier have the same amplitude and shape. The first triangular carrier and the second triangular carrier are a pair of triangular carriers with a phase difference, and the shape is an isosceles triangle, and the horizontal width and height are linearly related and symmetrical.
[0108] In one implementation, after determining the relative positions of the first triangular carrier and the second triangular carrier and the initial positions on the horizontal axis, the first triangular carrier can be determined as the first carrier, and the second triangular carrier can be determined as the second carrier, and the first carrier and the second carrier constitute an alien carrier.
[0109] Step S1022: determining the initial positions of the first triangular carrier and the second triangular carrier at the start time of the current switching cycle according to the phase shift angle.
[0110] Step S1023: Determine the first carrier and the second carrier according to the first triangular carrier and the second triangular carrier after the initial position is determined.
[0111] Step S1024: construct a heterogeneous carrier according to the first carrier and the second carrier.
[0112] In one implementation, step S1022 may further include steps S10221 to S10223:
[0113] Step S10221: According to half of the phase shift angle, the first triangular carrier and the second triangular carrier are phase-shifted simultaneously to obtain the phase shift results of the first triangular carrier and the second triangular carrier.
[0114] Step S10222: according to the phase shift angle, set the initial values of the first triangular carrier and the second triangular carrier at the start time of the current switching cycle.
[0115] Step S10223: Determine the initial position according to the initial value and the phase shift result.
[0116] In this implementation, the initial positions of the first triangular carrier and the second triangular carrier in each switching cycle can be adjusted in real time according to the phase shift angle corresponding to the switching cycle.
[0117] In one embodiment, in order to make the bridge arm current of each bridge arm in the bridge arm complementary unit reach the bias current I bias Step S10221 may specifically include shifting the first triangular carrier and the second triangular carrier relative to the start time of the current switching cycle by
[0118] In this embodiment, the initial values of the first triangular carrier and the second triangular carrier at the start time of each switching cycle can be adjusted along with the modulation wave V ref changes dynamically.
[0119] In one implementation, step S10222 may further include steps S102221 to S102222:
[0120] Step S102221: Determine the initial value of the first triangular carrier at the start time of the current switching cycle according to the following formula (4):
[0121]
[0122] Among them, Init cr1 is the initial value of the first triangular carrier, V ref is the modulated wave, is the phase shift angle.
[0123] Step S102222: Determine the initial value of the second triangular carrier at the start time of the current switching cycle according to the following formula (5):
[0124]
[0125] Among them, Init cr2 is the initial value of the second triangular carrier, V ref is the modulated wave, is the phase shift angle.
[0126] In an application scenario according to an embodiment of the present application, please refer to the attached Figure 4 , attached Figure 4is a waveform diagram of a special-shaped carrier in an embodiment of the present application. Figure 4 As shown, the first carrier C r1 The initial position at the beginning of the current switching cycle is The second carrier C r2 The initial position at the beginning of the current switching cycle is
[0127] In this embodiment, the first carrier C r1 and the second carrier C r2 Together they form a heterogeneous carrier. Figure 4 As shown, the first carrier C r1 and the second carrier C r2 All are triangular carriers, the first carrier C r1 The shape and amplitude of the second carrier C r2 The shape and amplitude of can be the same as the second triangular carrier.
[0128] In this embodiment, since the operation principle of each bridge arm complementary unit is the same in the stable operation state, the output current of each bridge arm complementary unit is equal to i x / N.
[0129] In this embodiment, if Figure 4 As shown, the voltage V on the first bridge arm in each bridge arm complementary unit can be x1 and the voltage V on the second bridge arm x2 , and obtain the voltage difference V generated between the two bridge arms x12 , in order to trigger the trapezoidal phase-to-phase circulation. Among them, V x12 =V x1 -V x2 .
[0130] In this embodiment, it can be assumed that the initial state of the interphase circulating current generated in each bridge arm complementary unit is a steady state, and the phase difference is adopted. The special-shaped carrier can generate enough inter-phase circulating current to put all switching devices in critical soft switching mode.
[0131] In this embodiment, since the bridge arm currents of the two bridge arms in each bridge arm complementary unit are determined by the output current i of each bridge arm complementary unit, x / N and the interphase circulating current. Therefore, when the interphase circulating current is a trapezoidal current, the current i x1 and the current i of the second bridge arm x2 Also a trapezoidal current.
[0132] In one embodiment, since the time for the phase-to-phase circulating current to maintain the maximum value and the minimum value is not equal in two adjacent switching cycles, and considering the inevitable error factors such as dead time and parasitic parameters in actual operation, the bridge arm current i x1 and i x2 Therefore, step S1024 may specifically include: horizontally flipping the first triangular carrier and the second triangular carrier in the latter switching cycle of two adjacent switching cycles to obtain the final first carrier and the second carrier.
[0133] Step S103: According to the special-shaped carrier, the original pulse signal of the current output module is obtained, and the original pulse signal is subjected to signal delay processing to obtain the delayed pulse signal of each bridge arm complementary unit in the current output module to control all switching devices in the corresponding bridge arm complementary unit to realize soft switching of the converter parallel system.
[0134] The signal delay time length of the time delay pulse signal corresponding to each bridge arm complementary unit is different from the signal delay time lengths of the time delay pulse signals of other bridge arm complementary units.
[0135] In this embodiment, the original pulse signal is a pulse width modulation signal obtained according to the shaped carrier and the modulation wave. Among them, pulse width modulation (PWM) is a method of converting analog signal levels into digital codes. The duty cycle of the pulse width modulation signal can be adjusted by changing the width of the pulse, thereby realizing the control of the analog circuit. The modulation wave refers to a non-sinusoidal wave used to obtain the pulse width modulation signal.
[0136] In this embodiment, in order to ensure the cancellation of the harmonics of the bridge arm current, it is necessary to use synchronous modulation in each group of bridge arm complementary units and to use asynchronous modulation between different groups of bridge arm complementary units. Therefore, it is necessary to perform signal delay processing with different signal delay lengths on the original pulse signal to obtain a delayed pulse signal corresponding to each group of bridge arm complementary units.
[0137] In one embodiment, the original pulse signal may include a first pulse signal and a second pulse signal, the first pulse signal being a pulse width modulation signal for controlling the switching state of all switching devices on the first bridge arm, and the second pulse signal being a pulse width modulation signal for controlling the switching state of all switching devices on the second bridge arm.
[0138] In one embodiment, the Figure 4 As shown, using the modulation wave V ref and the shaped carrier C r1 and C r2 Obtain the original pulse signal, including:
[0139] In the modulation wave V ref The amplitude is greater than the first carrier C r1 When the amplitude of the first pulse signal is high, the modulation wave V ref The amplitude is smaller than the first carrier C r1 When the amplitude of the first pulse signal is greater than or equal to 1, the first pulse signal is determined to be at a low level.
[0140] In the modulation wave V ref The amplitude is greater than the second carrier C r2 When the amplitude of the second pulse signal is high, the modulation wave V ref The amplitude is smaller than the second carrier C r2 When the amplitude of the second pulse signal is greater than or equal to , the second pulse signal is determined to be at a low level.
[0141] In one embodiment, the step of “obtaining the time-delay pulse signal of each bridge arm complementary unit in the current output module” in step S103 may further include steps S1031 to S1034:
[0142] Step S1031: For each bridge arm complementary unit, randomly obtain the signal delay time length.
[0143] Step S1032: adjusting the position of the first pulse signal on the time axis according to the signal delay length to delay the first pulse signal and obtain a first delayed pulse signal.
[0144] Step S1033: adjusting the position of the second pulse signal on the time axis according to the signal delay length to delay the second pulse signal and obtain a second delayed pulse signal.
[0145] Step S1034: Obtaining a delayed pulse signal of the bridge arm complementary unit according to the first delayed pulse signal and the second delayed pulse signal.
[0146] In this embodiment, different bridge arm complementary units in the same current output module may correspond to different signal delay lengths, such as: Figure 2 The signal delay time length corresponding to the bridge arm complementary unit of Group#1 can be 0, and the signal delay time length corresponding to the bridge arm complementary unit of Group#2 can be Among them, T s is the switching cycle length, and N is the number of bridge arm complementary units included in the current output module.
[0147] In one implementation, the signal delay lengths corresponding to different bridge arm complementary units in the same current output module may be obtained according to the following steps S10311 to S10312:
[0148] Step S10311: randomly number each bridge arm complementary unit in the current output module to obtain a numbering result of each bridge arm complementary unit.
[0149] Step S10312: Based on the numbering result of the bridge arm complementary unit, the signal delay length of the bridge arm complementary unit is determined according to the following formula (6):
[0150]
[0151] Among them, t is the signal delay time, n is the number of the bridge arm complementary unit, T s is the cycle length of the current switching cycle, and N is the number of bridge arm complementary units contained in the current output module.
[0152] In this embodiment, the time-delay pulse signal of each bridge arm complementary unit may include a first time-delay pulse signal and a second time-delay pulse signal. The first time-delay pulse signal is used to control the switching state of all switching devices on the first bridge arm, and the second time-delay pulse signal is used to control the switching state of all switching devices on the second bridge arm.
[0153] As an example, Figure 2 For example, the first bridge arm in a bridge arm complementary unit may include a switch device S a1 and S' a1 , the second bridge arm may include a switching device S a2 and S' a2 When the first time-delay pulse signal is at a high level, the switch device S a1 Set to the on state, the switch device S' a1 Set to the off state; when the first delayed pulse signal is at a low level, the switch device S a1 Set to the off state, the switch device S' a1 When the second time delay pulse signal is at a high level, the switch device S a2 Set to the on state, the switch device S' a2 Set to the off state; when the second delay pulse signal is at a low level, the switch device S a2 Set to the off state, the switch device S' a2 Set to the on state.
[0154] In this embodiment, the first delayed pulse signal and the second delayed pulse signal can be used to realize soft switching of all switch devices on the first bridge arm and the second bridge arm at any time, thereby realizing full-range soft switching of the converter parallel system.
[0155] In an application scenario according to an embodiment of the present application, please refer to the attached Figure 5 , attached Figure 5 FIG. 1 is a flow chart of a method for controlling a converter parallel system to realize soft switching according to an embodiment of the present application. Figure 5 As shown, the method may specifically include:
[0156] Step S201: Obtain the phase current i of each phase current output unit x , DC bus voltage V of the converter parallel system dc and the switching cycle frequency f s , and according to the obtained phase current i x , DC bus voltage V dc and the switching cycle frequency f s , determine the phase shift angle
[0157] Step 202: Obtain the modulation wave V ref , and the phase shift angle is obtained according to and modulation wave V ref , construct a special-shaped carrier to output the original pulse signal.
[0158] Step S203: performing signal delay processing on the original pulse signal to obtain a delayed pulse signal corresponding to each bridge arm complementary unit, and controlling the switching state of all switch devices in each bridge arm complementary unit according to the delayed pulse signal of each bridge arm complementary unit.
[0159] In this embodiment, if Figure 5 As shown, in step S203, each bridge arm complementary unit corresponds to a signal delay time length, and the signal delay time lengths of different bridge arm complementary units are different. After signal delay processing is performed according to the corresponding signal delay time length, a delay pulse signal corresponding to the bridge arm complementary unit can be obtained.
[0160] As an example, Figure 5 Taking group #1 in the example, the signal delay length of the bridge arm complementary unit of group #1 is 0, then step S203 may specifically include: directly adjusting the switch device S according to the original pulse signal x1 , S' x1 , S x2 and S' x2 The switch status. Figure 5 Taking group #2 in the example, the signal delay length of the bridge arm complementary unit of group #2 is Then step S203 may specifically include: according to the signal delay time length The original pulse signal is subjected to signal delay processing to obtain the delayed pulse signal corresponding to group #2, and the switch device S is adjusted according to the delayed pulse signal. x3 , S' x3 , S x4 and S' x4Similarly, the delay pulse signal corresponding to group #n can be based on the signal delay time length It is obtained by performing signal delay processing on the original pulse signal.
[0161] In this embodiment, if Figure 5 As shown, a synchronous modulation method is adopted in the same bridge arm complementary unit, and an asynchronous modulation method is adopted in different bridge arm complementary units.
[0162] Based on the method described in the above steps S101 to S103, the present application generates multiple groups of different delayed pulse signals by delaying the original pulse signal of each phase current output module to control the switching state of all switching devices of each bridge arm complementary unit in the phase current output module, thereby realizing the promotion from a single converter to any even number of converters in parallel, and improving the universality of soft switching technology in converters. At the same time, the constructed heterogeneous carrier can be adjusted in position according to the phase shift angle determined in each switching cycle to obtain a pulse signal to realize fixed frequency control of the switching devices of the converter parallel system, which is not only beneficial to the stability of the system, but also does not need to connect the zero-crossing detection hardware circuit, reducing the hardware cost of realizing soft switching.
[0163] Moreover, in each switching cycle, it is only necessary to calculate the phase shift angle according to the real-time data of the converter parallel system to construct a special-shaped carrier, so as to obtain a pulse signal so that the converter parallel system can generate an inter-phase circulating current ripple that meets the critical soft switching conditions, which solves the problem of excessive zero-crossing harmonics in traditional soft switching methods, reduces the switching loss of switching devices, and greatly improves the state conversion efficiency of switching devices.
[0164] It should be pointed out that although the various steps in the above embodiments are described in a specific order, those skilled in the art can understand that in order to achieve the effect of the present application, different steps do not have to be executed in such an order. They can be executed simultaneously (in parallel) or in other orders. These adjusted schemes are equivalent to the technical schemes described in this application, and therefore will also fall within the scope of protection of this application.
[0165] It is understood by those skilled in the art that all or part of the processes in the method for implementing the above-mentioned embodiment of the present application can also be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable storage medium may include: any entity or device, medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory, random access memory, electrical carrier signal, telecommunication signal and software distribution medium, etc. that can carry the computer program code.
[0166] Another aspect of the present application also provides a computer-readable storage medium.
[0167] In an embodiment of a computer-readable storage medium according to the present application, the computer-readable storage medium may be configured to store a program for executing the soft switching implementation method of the even number of converters in parallel of the above method embodiment, and the program may be loaded and run by a processor to implement the soft switching implementation method of the even number of converters in parallel. For ease of explanation, only the parts related to the embodiment of the present application are shown. For specific technical details not disclosed, please refer to the method part of the embodiment of the present application. The computer-readable storage medium may be a storage device formed by various electronic devices. Optionally, the computer-readable storage medium in the embodiment of the present application is a non-temporary computer-readable storage medium.
[0168] Another aspect of the present application also provides a controller.
[0169] In an embodiment of a controller according to the present application, the controller may include at least one processor; and a memory connected to the at least one processor in communication; wherein a computer program is stored in the memory, and when the computer program is executed by the at least one processor, the method described in any of the above embodiments is implemented. The controller described in the present application may include a driving device, a smart car, a robot, and other devices.
[0170] In some embodiments of the present application, the controller may further include at least one sensor for sensing information. The sensor is communicatively connected to any type of processor mentioned in the present application. Optionally, the controller may further include an autonomous driving system for guiding the controller to drive itself or assist driving. The processor communicates with the sensor and / or the autonomous driving system to complete the method described in any of the above embodiments.
[0171] So far, the technical solution of the present application has been described in conjunction with an embodiment shown in the accompanying drawings, but it is easy for those skilled in the art to understand that the protection scope of the present application is obviously not limited to these specific embodiments. Without departing from the principles of the present application, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present application.
Claims
1. A method for realizing soft switching of an even number of converters in parallel, characterized in that: The method is applicable to a converter parallel system composed of an even number of converters connected in parallel, wherein the converter parallel system comprises a three-phase current output module, wherein each phase of the current output module comprises an even number of bridge arms connected in parallel, and each two of the bridge arms are used as a bridge arm complementary unit, so that each of the bridge arm complementary units comprises a first bridge arm and a second bridge arm, and each of the bridge arms comprises two complementary switch devices; the method comprises: For each phase current output module, the DC bus voltage of the converter parallel system in the current switching cycle, the phase current corresponding to the current output module and the number of the bridge arm complementary units contained in the current output module are obtained to determine the phase shift angle of the current output module in the current switching cycle, where the phase shift angle is the angle of the special-shaped carrier used to construct the current output module; According to the phase shift angle, a phase difference between a first carrier and a second carrier is obtained, and a special-shaped carrier is constructed according to the first carrier and the second carrier, wherein the first carrier is a carrier for obtaining a pulse signal for controlling a switching device of the first bridge arm, and the second carrier is a carrier for obtaining a pulse signal for controlling a switching device of the second bridge arm; According to the special-shaped carrier, an original pulse signal of the current output module is obtained, and a signal delay process is performed on the original pulse signal to obtain a delayed pulse signal of each bridge arm complementary unit in the current output module, so as to control all switching devices in the corresponding bridge arm complementary unit to realize soft switching of the converter parallel system; The signal delay time length of the time delay pulse signal corresponding to each bridge arm complementary unit is different from the signal delay time lengths of the time delay pulse signals of other bridge arm complementary units.
2. The soft switching implementation method of an even number of converters in parallel according to claim 1, characterized in that: The original pulse signal includes a first pulse signal and a second pulse signal, the first pulse signal is a pulse width modulation signal for controlling the switching state of all switching devices on the first bridge arm, and the second pulse signal is a pulse width modulation signal for controlling the switching state of all switching devices on the second bridge arm; The step of obtaining the delayed pulse signal of each bridge arm complementary unit in the current output module comprises: For each of the bridge arm complementary units, randomly obtaining a signal delay length; According to the signal delay time length, adjusting the position of the first pulse signal on the time axis to perform a signal delay on the first pulse signal to obtain a first delayed pulse signal; According to the signal delay time length, adjusting the position of the second pulse signal on the time axis to perform a signal delay on the second pulse signal to obtain a second delayed pulse signal; The delayed pulse signal of the bridge arm complementary unit is obtained according to the first delayed pulse signal and the second delayed pulse signal.
3. The soft switching implementation method of an even number of converters in parallel according to claim 2, characterized in that: The randomly acquiring signal delay time length comprises: Randomly numbering each bridge arm complementary unit in the current output module to obtain a numbering result of each bridge arm complementary unit; Based on the numbering result of the bridge arm complementary unit, the signal delay length of the bridge arm complementary unit is determined according to the following formula: Wherein, t is the signal delay time, n is the numbering result of the bridge arm complementary unit, T s is the cycle length of the current switching cycle, and N is the number of bridge arm complementary units contained in the current output module.
4. The soft switching implementation method of an even number of converters in parallel according to claim 1, characterized in that: The bridge arm complementary unit of each phase further includes two auxiliary inductors, one end of each of the auxiliary inductors is connected to the output side of the current output module, and the other end of each of the auxiliary inductors is respectively connected to the series connection point between the two switch devices on the bridge arm; The step of obtaining the DC bus voltage of the converter parallel system in the current switching cycle, the phase current of each phase current output module, and the number of the bridge arm complementary units contained in each phase current output module to determine the phase shift angle includes: The phase shift angle is determined according to the following formula: Among them, V dc is the DC bus voltage of the converter parallel system in the current switching cycle, i x is the phase current of the x-phase current output module, N is the number of the bridge arm complementary units contained in each phase current output module, I bias is the bias current of the switching device, T s is the duration of the current switching cycle, L m is the inductance value of the auxiliary inductor.
5. The soft switching implementation method of an even number of converters in parallel according to claim 4, characterized in that: The method further comprises obtaining a formula for determining the phase shift angle according to the following steps: According to the following formula, a first quantitative relationship between the interphase circulating current ripple of each bridge arm complementary unit and the phase current of the current output module is determined: Among them, ΔI rp is the fluctuation range of the interphase circulating current ripple, I bias is the bias current of the switching device, N is the number of the bridge arm complementary units contained in each phase current output module, i x is the phase current of the current output module of the xth phase; wherein the interphase circulating current ripple is the ripple of the interphase circulating current flowing through the auxiliary inductor of the bridge arm complementary unit; The second quantitative relationship between the interphase circulating current ripple of the bridge arm complementary unit and the phase shift angle is determined according to the following formula: Among them, ΔI rp is the fluctuation range of the interphase circulating current ripple, V dc is the DC bus voltage of the converter parallel system, is the phase shift angle, T s is the duration of the current switching cycle, L m is the inductance value of the auxiliary inductor; Based on the critical soft switching realization condition, the formula for determining the phase shift angle is obtained according to the first quantitative relationship and the second quantitative relationship.
6. The soft switching implementation method of an even number of converters in parallel according to claim 1, characterized in that: The step of obtaining a phase difference between the first carrier and the second carrier according to the phase shift angle to construct a special-shaped carrier comprises: Acquire a first triangular carrier and a second triangular carrier, and use the phase shift angle as a phase difference between the first triangular carrier and the second triangular carrier, wherein the first triangular carrier and the second triangular carrier have the same amplitude and shape; Determining initial positions of the first triangular carrier and the second triangular carrier at a start time of the current switching cycle according to the phase shift angle; Determine the first carrier and the second carrier according to the first triangular carrier and the second triangular carrier after determining the initial position; The heterogeneous carrier is constructed according to the first carrier and the second carrier.
7. The method for realizing soft switching of an even number of converters in parallel according to claim 6, characterized in that: Determining initial positions of the first triangular carrier and the second triangular carrier at the start time of the current switching cycle includes: According to one half of the phase shift angle, the first triangular carrier and the second triangular carrier are phase-shifted simultaneously to obtain a phase shift result of the first triangular carrier and the second triangular carrier; According to the phase shift angle, setting initial values of the first triangular carrier and the second triangular carrier at the start time of the current switching cycle; The initial position is determined according to the initial value and the phase shift result.
8. The method for realizing soft switching of an even number of converters in parallel according to claim 7, characterized in that: Setting initial values of the first triangular carrier and the second triangular carrier at the start time of the current switching cycle includes: The initial value of the first triangular carrier at the start time of the current switching cycle is determined according to the following formula: Among them, Init cr1 is the initial value of the first triangular carrier, V ref is the modulated wave, is the phase shift angle; The initial value of the second triangular carrier at the start time of the current switching cycle is determined according to the following formula: Among them, Init cr2 is the initial value of the second triangular carrier, V ref is the modulated wave, is the phase shift angle.
9. A controller, characterized in that: include: at least one processor; and, a memory communicatively coupled to the at least one processor; The memory stores a computer program, and when the computer program is executed by the at least one processor, the soft switching implementation method for connecting an even number of converters in parallel as described in any one of claims 1 to 8 is implemented.
10. A computer-readable storage medium storing a plurality of program codes, characterized in that: The program code is suitable for being loaded and run by a processor to execute the soft switching implementation method for connecting an even number of converters in parallel according to any one of claims 1 to 8.