Dsgi phase-locked loop control method, system, device and storage medium

Abstract

The application discloses a DSOGI phase-locked loop control method, system, device and storage medium. The DSOGI phase-locked loop control method converts the obtained three-phase power grid voltage signal into a two-phase quadrature voltage signal, processes the two-phase quadrature voltage signal by using SOGI, generates a plurality of quadrature components, and separates the quadrature components into positive and negative sequences to obtain separated positive and negative sequence components. Then, a positive and negative phase sequence switching selection unit receives the two-phase quadrature voltage signal, the positive sequence component, the negative sequence component and the angular velocity of the DSOGI phase-locked loop. Based on a preset judgment condition, the unit selects one from the two-phase quadrature voltage signal, the positive sequence component and the negative sequence component to perform a closed-loop phase-locked operation, realizes adaptive positive and negative phase sequences, can adapt to a wide frequency range, and can adapt to the case that the power grid voltage is unbalanced and contains high-order harmonics.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power electronic converter control, and particularly relates to a DSOGI phase-locked loop control method, system, device and storage medium. BACKGROUND

[0002] In single-phase and three-phase alternating current systems, in order to simplify control, closed-loop control is usually carried out in a dq coordinate system, which requires accurate grid phase information, and the accuracy of phase locking affects the accuracy of loop control, which also puts forward higher requirements for the phase-locked loop.

[0003] A commonly used three-phase phase-locked loop structure is a synchronous coordinate system software phase-locked loop (SRF-PLL), which has simple control and fast response speed and can adapt to a wide frequency range, but when the grid voltage is unbalanced and the grid voltage contains high-order harmonics, the phase-locked loop result of the SRF-PLL has a large error.

[0004] In order to overcome the problem of inaccurate phase locking of the SRF-PLL when the grid voltage is unbalanced and the grid voltage contains high-order harmonics, a double second-order generalized integrator phase-locked loop (DSOGI-PLL) is usually used to realize phase locking. This phase-locked loop method based on SOGI separates the positive and negative sequence voltage vectors in the grid voltage, extracts the positive sequence component, and thus removes the influence of grid voltage imbalance and high-order harmonics. However, this phase-locked loop structure cannot be applied to the case where the phase sequence of the grid voltage is negative, and the second-order generalized integrator structure is equivalent to a band-pass filter with a variable center frequency for the loop, which has a certain influence on the bandwidth. SUMMARY

[0005] The present application aims to solve the technical problems in the background art and provides a DSOGI phase-locked loop control method, system, device and storage medium.

[0006] To achieve the above technical purpose, the technical solution adopted by the present application is as follows:

[0007] The first implementation manner of the first aspect of the present application provides a DSOGI phase-locked loop control method, which comprises a SOGI and a positive and negative phase sequence switching selection unit, and the DSOGI phase-locked loop control method comprises the following steps:

[0008] S101, acquiring a three-phase grid voltage signal and converting the three-phase grid voltage signal into a two-phase quadrature voltage signal;

[0009] S102, receiving and processing the two-phase quadrature voltage signal by using the SOGI to obtain a plurality of quadrature components;

[0010] S103, separating the quadrature components into positive and negative sequences to obtain a positive sequence component and a negative sequence component;

[0011] S104, receiving the two-phase quadrature voltage signal, the positive sequence component, the negative sequence component and the angular velocity of the DSOGI phase-locked loop by the positive and negative phase sequence switching selection unit, and selecting one of the two-phase quadrature voltage signal, the positive sequence component and the negative sequence component based on a preset judgment condition to perform closed-loop phase locking.

[0012] Optionally, in the second implementation manner of the first aspect of the present application, the method further comprises a collection circuit and a Clark transformation unit, and S101 comprises:

[0013] acquiring the three-phase power grid voltage signal by the collection circuit, wherein the three-phase power grid voltage signal comprises a voltage signal Ua, a voltage signal Ub and a voltage signal Uc;

[0014] transmitting the three-phase power grid voltage signal to the Clark transformation unit, and transforming by the Clark transformation unit to obtain the two-phase quadrature voltage signal, wherein the two-phase quadrature voltage signal comprises a voltage signal V α and a voltage signal V β .

[0015] Optionally, in the third implementation manner of the first aspect of the present application, S102 comprises:

[0016] receiving and processing the voltage signal V α and the voltage signal V β by the two SOGI respectively to obtain four quadrature components, wherein the four quadrature components are , , and , a first-order voltage lag signal of the voltage signal V α , a quadrature signal of the voltage signal V , a first-order voltage lag signal of the voltage signal V β , a quadrature signal of the voltage signal V .

[0017] Optionally, in the fourth implementation manner of the first aspect of the present application, S103 comprises:

[0018] separating , , and into positive and negative sequences respectively to obtain the positive sequence component and the negative sequence component, wherein the positive sequence component comprises a positive phase sequence component and a positive phase sequence component , and the negative sequence component comprises a negative phase sequence component and a negative phase sequence component .

[0019] Optionally, in a fifth implementation form of the first aspect of the application, the SOGI is further configured to receive and process an angular speed of the DSOGI phase-locked loop, wherein the angular speed of the DSOGI phase-locked loop entering the SOGI for processing is taken as an absolute value.

[0020] Optionally, in a sixth implementation form of the first aspect of the application, the transfer function of the SOGI is:

[0021] ;

[0022] ;

[0023] wherein k is a damping factor, ω' is an estimated value of the grid voltage, and s is a Laplace operator.

[0024] Optionally, in a seventh implementation form of the first aspect of the application, the judging condition in S104 comprises:

[0025] whether the angular speed of the DSOGI phase-locked loop is stable;

[0026] if the angular speed of the DSOGI phase-locked loop is stable, directly selecting the voltage signal V α and the voltage signal V β to perform closed-loop phase locking and returning to the judging of whether the angular speed of the DSOGI phase-locked loop is stable;

[0027] if the angular speed of the DSOGI phase-locked loop is not stable, judging whether the angular speed of the DSOGI phase-locked loop is greater than 0;

[0028] if the angular speed of the DSOGI phase-locked loop is greater than 0, judging whether a phase error between the voltage signal V α and the positive phase sequence component is lower than a stable value;

[0029] if the phase error between the voltage signal V α and the positive phase sequence component is lower than the stable value, selecting the voltage signal V α and the voltage signal V β to perform closed-loop phase locking and returning to the judging of whether the angular speed of the DSOGI phase-locked loop is stable;

[0030] if the phase error between the voltage signal V α and the positive phase sequence component is higher than the stable value, selecting the positive phase sequence component and the positive phase sequence component to perform closed-loop phase locking;

[0031] If the angular velocity of the DSOGI phase-locked loop is less than 0, it is determined whether the phase error between the voltage signal V α and the negative phase sequence component V is lower than a stable value.

[0032] If the phase error between the voltage signal V α and the negative phase sequence component V is lower than the stable value, the voltage signal V α and the voltage signal V β are selected to perform closed-loop phase-locked loop, and the determination of whether the angular velocity of the DSOGI phase-locked loop is stable is returned.

[0033] If the phase error between the voltage signal V α and the negative phase sequence component V is higher than the stable value, the negative phase sequence component V and the negative phase sequence component V are selected to perform closed-loop phase-locked loop.

[0034] The first implementation manner of the second aspect of the present application provides a DSOGI phase-locked loop control system, which comprises a SOGI and a positive and negative phase sequence switching selection unit, and further comprises:

[0035] a transformation module, configured to obtain a three-phase power grid voltage signal and transform the three-phase power grid voltage signal into a two-phase quadrature voltage signal;

[0036] a SOGI processing module, configured to receive and process the two-phase quadrature voltage signal by using the SOGI to obtain a plurality of quadrature components;

[0037] a separation module, configured to separate the quadrature components into positive and negative sequence components to obtain a positive sequence component and a negative sequence component;

[0038] a closed-loop module, configured to receive the two-phase quadrature voltage signal, the positive sequence component, the negative sequence component and the angular velocity of the DSOGI phase-locked loop by using the positive and negative phase sequence switching selection unit, and select one of the two-phase quadrature voltage signal, the positive sequence component and the negative sequence component to perform closed-loop phase-locked loop based on a preset determination condition.

[0039] The first implementation manner of the third aspect of the present application provides a DSOGI phase-locked loop control device, which comprises a memory and at least one processor, the memory stores instructions, and the memory and the at least one processor are interconnected by a circuit;

[0040] The at least one processor invokes the instructions in the memory, so that the DSOGI phase-locked loop control device performs the DSOGI phase-locked loop control method as described in any one of the first aspect of the present application.

[0041] The first implementation manner of the fourth aspect of the present application provides a computer readable storage medium, and the computer readable storage medium stores a computer program, and the computer program is executed by a processor to implement the DSOGI phase-locked loop control method according to any one of the first aspect of the present application.

[0042] Compared with the prior art, the present application has the following beneficial technical effects: the three-phase power grid voltage signals are converted into two-phase orthogonal voltage signals, the two-phase orthogonal voltage signals are processed by SOGI to generate a plurality of orthogonal components, and the orthogonal components are separated into positive and negative sequence components. Then, the two-phase orthogonal voltage signals, the positive sequence component, the negative sequence component and the angular velocity of the DSOGI phase-locked loop are received by the positive and negative phase sequence switching selection unit. Based on the preset judgment condition, the unit selects one of the two-phase orthogonal voltage signals, the positive sequence component and the negative sequence component to perform closed-loop phase-locked operation, realizes adaptive positive and negative phase sequence, can adapt to a wide frequency range, and can adapt to the case of power grid voltage imbalance containing high-order harmonics. BRIEF DESCRIPTION OF DRAWINGS

[0043] Figure 1 The first embodiment of the DSOGI phase-locked loop control method in the embodiment of the present application is shown in the figure.

[0044] Figure 2 The second embodiment of the DSOGI phase-locked loop control method in the embodiment of the present application is shown in the figure.

[0045] Figure 3 The seventh embodiment of the DSOGI phase-locked loop control method in the embodiment of the present application is shown in the figure.

[0046] Figure 4 The embodiment of the DSOGI phase-locked loop control system in the embodiment of the present application is shown in the figure.

[0047] Figure 5 The embodiment of the DSOGI phase-locked loop control device in the embodiment of the present application is shown in the figure.

[0048] Figure 6 The overall control block diagram to which the DSOGI phase-locked loop control method in the embodiment of the present application is applied is shown in the figure.

[0049] Figure 7 The structure of SOGI in the embodiment of the present application is shown in the figure. DETAILED DESCRIPTION

[0050] It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict.

[0051] In the description of the present application, it needs to be understood that the terms "center", "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or component referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second" and the like are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined with "first", "second" and the like can be explicitly or implicitly included one or more features. In the description of the present application, unless otherwise specified, the meaning of "a plurality of" is two or more.

[0052] In the description of the present application, it needs to be understood that unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connection" should be understood broadly, for example, it can be fixed connection, or it can be detachable connection, or a specific connection; it can be mechanical connection, or it can be electrical connection; it can be directly connected, or it can be indirectly connected through intermediate medium, it can be the communication inside two components. For those skilled in the art, the specific meaning of the above terms in the present application can be understood through specific circumstances.

[0053] For the convenience of understanding, the specific process of the embodiments of the present application is described below. Please refer to Figures 1-3 The DSOGI phase-locked loop control method in the embodiments of the present application includes SOGI and positive and negative phase sequence switching selection unit, and the DSOGI phase-locked loop control method includes:

[0054] S101, acquiring three-phase grid voltage signals and transforming the three-phase grid voltage signals into two-phase orthogonal voltage signals;

[0055] Further, it also includes an acquisition circuit and a Clark transformation unit, and S101 can also perform specifically:

[0056] S1011, acquiring three-phase grid voltage signals by using the acquisition circuit, wherein the three-phase grid voltage signals include voltage signal Ua, voltage signal Ub and voltage signal Uc;

[0057] S1012, transmitting the three-phase grid voltage signals to the Clark transformation unit, and transforming by the processing of the Clark transformation unit to obtain two-phase orthogonal voltage signals, wherein the two-phase orthogonal voltage signals include voltage signal V α and voltage signal V β .

[0058] In the embodiment, the transformation matrix used by the Clark transformation unit is:

[0059] ;

[0060] The three-phase grid voltage signals are acquired by the system controller through the acquisition circuit, and the three voltage signals Ua, Ub and Uc are sent into the Clark transformation unit for transformation processing to obtain two-phase orthogonal voltage signals, i.e., voltage signal V α and voltage signal V β .

[0061] S102, using SOGI to receive and process the two-phase orthogonal voltage signals to obtain a plurality of orthogonal components;

[0062] Further, two SOGIs are provided, and S102 can further perform:

[0063] using two SOGIs to respectively receive and process voltage signal V α and voltage signal V β to obtain four orthogonal components, wherein the four orthogonal components are , , and , is the first-order voltage lag signal of voltage signal V α , is the orthogonal signal of , is the first-order voltage lag signal of voltage signal V β , is the orthogonal signal of .

[0064] In the embodiment, the exchanged voltage signal V α and voltage signal V β are respectively sent into two SOGIs for transmission processing, and the transfer function of the existing SOGI is:

[0065] ;

[0066] ;

[0067] However, when the grid phase sequence is negative, the angular velocity ω of the DSOGI phase-locked loop is negative, while ω must be positive in frequency to be meaningful. Therefore, to ensure that the frequency characteristics of the second-order generalized integrator are the same as those of the positive sequence, the angular velocity ω of the DSOGI phase-locked loop must be taken as an absolute value. The SOGI is also used to receive and process the angular velocity of the DSOGI phase-locked loop. The angular velocity of the DSOGI phase-locked loop entering the SOGI for processing is taken as an absolute value. Therefore, the transfer function of the SOGI in this DSOGI phase-locked loop control method is:

[0068] ;

[0069] ;

[0070] Where k is the damping factor, ω' is the estimated grid voltage, and s is the Laplace operator. This ensures that when the grid phase sequence is negative and ω' is negative, it possesses the same frequency characteristics as the positive sequence, as detailed in the appendix. Figure 7 The control block diagram shown.

[0071] S103. Separate the positive and negative orders of the orthogonal components to obtain the positive order components and the negative order components.

[0072] Furthermore, S103 can also specifically perform:

[0073] Will , , as well as The positive and negative sequences are separated to obtain positive sequence components and negative sequence components, where the positive sequence components include positive phase sequence components. and positive phase sequence components Negative sequence components include negative phase sequence components. and negative phase sequence components .

[0074] In this embodiment, for the positive-negative sequence separation stage, the expression for the positive phase sequence is:

[0075]

[0076] The expression for negative phase sequence is:

[0077]

[0078] Where α and β represent the two output axes of the Clark transform unit, namely the α-axis and β-axis, respectively. and These are the positive-sequence components of the α-axis and β-axis, respectively. and These represent the negative order components of the α-axis and β-axis, respectively, as detailed in the appendix. Figure 6The positive and negative sequence separation control block diagram shown, since ω' takes the absolute value, equivalent to the second-order generalized integrator always follow the positive sequence filtering. Therefore, the judgment of ω' is processed, in order to select the corresponding component for closed loop.

[0079] S104, the positive and negative phase sequence switching selection unit receives two-phase quadrature voltage signal, positive sequence component, negative sequence component and DSOGI phase-locked loop angular velocity, and based on the preset judgment condition, select one of the two-phase quadrature voltage signal, positive sequence component and negative sequence component for closed loop phase-locked loop.

[0080] Further, as shown in the accompanying Figure 3 The judgment condition in S104 specifically includes:

[0081] S1041, judge whether the angular velocity of the DSOGI phase-locked loop is stable;

[0082] S1042, if the angular velocity of the DSOGI phase-locked loop is stable, directly select the voltage signal V α And voltage signal V β Perform closed loop phase-locked loop and return to judge whether the angular velocity of the DSOGI phase-locked loop is stable;

[0083] S1043, if the angular velocity of the DSOGI phase-locked loop is not stable, judge whether the angular velocity of the DSOGI phase-locked loop is greater than 0;

[0084] S1044, if the angular velocity of the DSOGI phase-locked loop is greater than 0, judge whether the phase error between the voltage signal V α And positive sequence component Is lower than the stable value;

[0085] If the phase error between the voltage signal V α And positive sequence component Is lower than the stable value, select the voltage signal V α And voltage signal V β Perform closed loop phase-locked loop and return to judge whether the angular velocity of the DSOGI phase-locked loop is stable;

[0086] S1045, if the phase error between the voltage signal V α And positive sequence component Is higher than the stable value, select the positive sequence component And positive sequence component Perform closed loop phase-locked loop;

[0087] S1046, if the angular velocity of the DSOGI phase-locked loop is less than 0, judge whether the phase error between the voltage signal V α And negative sequence component Is lower than the stable value;

[0088] If the voltage signal V α With negative phase sequence components If the phase error between them is lower than the stable value, then the voltage signal V is selected. α and voltage signal V β Execute closed-loop phase-locked loop and return to the judgment of whether the angular velocity of the DSOGI phase-locked loop is stable;

[0089] S1047, If the voltage signal V α With negative phase sequence components If the phase error between components is higher than the stable value, then the negative phase sequence component is selected. and negative phase sequence components Execute closed-loop phase-locked loop.

[0090] In this embodiment, when the phase-locked loop angular velocity ω' is unstable and the phase error is large, V is used. α and V β Closed-loop control is implemented. After the angular velocity ω' is initially determined, the positive and negative phase sequence is determined based on the sign of ω'. If ω' > 0, then the phase sequence is determined based on V... α and The overlap determines the use and Perform a closed-loop operation to complete the switching. If ω' < 0, then according to V... α and The overlap determines the use and Perform a closed-loop operation to complete the switchover.

[0091] See appendix Figure 6 It is important to note that after completing this process, the angular velocity of the DSOGI phase-locked loop needs to be reused in each structural unit of the process. To ensure that the angular velocity of the DSOGI phase-locked loop has minimal error before and after the process execution, its stability needs to be assessed. Here, ω is the original value of the DSOGI phase-locked loop's angular velocity, while ω' is the angular velocity of the DSOGI phase-locked loop after at least one complete process execution. The stability of the DSOGI phase-locked loop's angular velocity is determined by comparing ω' with ω. If the error after comparison is very small, even negligible, the angular velocity of the DSOGI phase-locked loop can be considered stable. This error is determined based on the user's actual application scenario or requirements. The voltage signal V... α Respectively with positive phase sequence components and negative phase sequence components The phase error between them is determined by the stable value obtained, which is the same as the one mentioned above. This stable value is also determined based on the user's actual application scenario or needs.

[0092] For example: take the absolute value of the error of the original value valpha and valphaP, abs(valpha-valphaP), detect the sliding average filter = 0.9*fliter+0.1*abs(valpha-valphaP) of this absolute value, lower than 15V (stable value), it is considered to have been stable.

[0093] Specifically, by converting the obtained three-phase grid voltage signal into two-phase orthogonal voltage signal, using SOGI to process the two-phase orthogonal voltage signal, generating a plurality of orthogonal components, and separating the positive and negative sequence components, the separated positive and negative sequence components are obtained. Then, the two-phase orthogonal voltage signal, the positive sequence component, the negative sequence component and the angular velocity of the DSOGI phase-locked loop are received by the positive and negative phase sequence switching selection unit. Based on the preset judgment condition, the unit will select one of the two-phase orthogonal voltage signal, the positive sequence component and the negative sequence component to perform closed-loop phase-locked operation, realize adaptive positive and negative phase sequence, and adapt to wide frequency range and grid voltage imbalance with high harmonic.

[0094] The DSOGI phase-locked loop control method in the embodiment of the application is described above, and the DSOGI phase-locked loop control system in the embodiment of the application is described below, please refer to Figure 4 , the DSOGI phase-locked loop control system comprises:

[0095] SOGI and positive and negative phase sequence switching selection unit,

[0096] The transformation module 201 is used for obtaining three-phase grid voltage signal and transforming the three-phase grid voltage signal into two-phase orthogonal voltage signal;

[0097] The SOGI processing module 202 is used for receiving and processing the two-phase orthogonal voltage signal by SOGI to obtain a plurality of orthogonal components;

[0098] The separation module 203 is used for separating the positive and negative sequence of the orthogonal components to obtain the positive sequence component and the negative sequence component;

[0099] The closed-loop module 204 is used for receiving the two-phase orthogonal voltage signal, the positive sequence component, the negative sequence component and the angular velocity of the DSOGI phase-locked loop by the positive and negative phase sequence switching selection unit, and based on the preset judgment condition, selecting one of the two-phase orthogonal voltage signal, the positive sequence component and the negative sequence component to perform closed-loop phase-locked operation.

[0100] Specifically, the three-phase grid voltage signals are converted into two-phase orthogonal voltage signals, the two-phase orthogonal voltage signals are processed by SOGI to generate a plurality of orthogonal components, and the orthogonal components are separated into positive and negative sequence components. Then, the two-phase orthogonal voltage signals, the positive sequence component, the negative sequence component and the angular velocity of the DSOGI phase-locked loop are received by the positive and negative phase sequence switching selection unit. Based on the preset judgment condition, the unit selects one of the two-phase orthogonal voltage signals, the positive sequence component and the negative sequence component to perform closed-loop phase-locked operation, realizes adaptive positive and negative phase sequence, can adapt to wide frequency range, and adapts to grid voltage imbalance with high-order harmonics.

[0101] The method further comprises collecting the three-phase grid voltage signals by the collecting circuit and converting the three-phase grid voltage signals into two-phase orthogonal voltage signals by the Clark conversion unit.

[0102] The three-phase grid voltage signals are obtained by the collecting circuit, wherein the three-phase grid voltage signals include voltage signal Ua, voltage signal Ub and voltage signal Uc.

[0103] The three-phase grid voltage signals are transmitted to the Clark conversion unit, and the two-phase orthogonal voltage signals are obtained by processing the three-phase grid voltage signals by the Clark conversion unit, wherein the two-phase orthogonal voltage signals include voltage signal V α and voltage signal V β .

[0104] The SOGI has two SOGIs, and the SOGI processing module 202 can be specifically used for:

[0105] The two SOGIs respectively receive and process voltage signal V α and voltage signal V β to obtain four orthogonal components, wherein the four orthogonal components are , , and , is the first-order voltage lag signal of voltage signal V α , is the orthogonal signal of , is the first-order voltage lag signal of voltage signal V β , is the orthogonal signal of .

[0106] The separation module 203 can be specifically used for:

[0107] The four orthogonal components are separated into , , and The positive sequence component includes a positive phase sequence component and the positive phase sequence component The negative sequence component includes a negative phase sequence component and the negative phase sequence component ;

[0108] The SOGI is also used to receive and process the angular velocity of the DSOGI phase-locked loop, wherein the angular velocity of the DSOGI phase-locked loop processed into the SOGI is taken as an absolute value;

[0109] The transfer function of the SOGI is:

[0110] ;

[0111] ;

[0112] wherein k is a damping factor, ω' is an estimated value of the grid voltage, and s is a Laplace operator.

[0113] The judgment condition in the closed-loop module 204 includes:

[0114] whether the angular velocity of the DSOGI phase-locked loop is stable;

[0115] If the angular velocity of the DSOGI phase-locked loop is stable, the voltage signal V α and the voltage signal V β are directly selected to perform closed-loop phase locking, and the process returns to the judgment of whether the angular velocity of the DSOGI phase-locked loop is stable;

[0116] If the angular velocity of the DSOGI phase-locked loop is not stable, it is judged whether the angular velocity of the DSOGI phase-locked loop is greater than 0;

[0117] If the angular velocity of the DSOGI phase-locked loop is greater than 0, it is judged whether the phase error between the voltage signal V α and the positive phase sequence component is lower than a stable value;

[0118] If the phase error between the voltage signal V α and the positive phase sequence component is lower than the stable value, the voltage signal V α and the voltage signal V β are selected to perform closed-loop phase locking, and the process returns to the judgment of whether the angular velocity of the DSOGI phase-locked loop is stable;

[0119] If the phase error between the voltage signal V α and the positive phase sequence component is higher than the stable value, the positive phase sequence component and the positive phase sequence component Perform closed-loop phase-locked loop;

[0120] If the angular velocity of the DSOGI phase-locked loop is less than 0, then the voltage signal V is determined. α With negative phase sequence components Is the phase error between them lower than the stable value?

[0121] If the voltage signal V α With negative phase sequence components If the phase error between them is lower than the stable value, then the voltage signal V is selected. α and voltage signal V β Execute closed-loop phase-locked loop and return to the judgment of whether the angular velocity of the DSOGI phase-locked loop is stable;

[0122] If the voltage signal V α With negative phase sequence components If the phase error between components is higher than the stable value, then the negative phase sequence component is selected. and negative phase sequence components Execute closed-loop phase-locked loop.

[0123] above Figure 4 The DSOGI phase-locked loop control system in this embodiment of the invention is described in detail from the perspective of modular functional entities. The DSOGI phase-locked loop control device in this embodiment of the invention is described in detail from the perspective of hardware processing.

[0124] Figure 5 This is a schematic diagram of a DSOGI phase-locked loop control device 300 provided in an embodiment of the present invention. The DSOGI phase-locked loop control device 300 can vary significantly due to different configurations or performance characteristics. It may include one or more central processing units (CPUs) 310 (e.g., one or more processors) and a memory 320, and one or more storage media 330 (e.g., one or more mass storage devices) for storing application programs 333 or data 332. The memory 320 and storage media 330 can be temporary or persistent storage. The program stored in the storage media 330 may include one or more modules (not shown in the diagram), each module including a series of instruction operations on the DSOGI phase-locked loop control device 300. Furthermore, the processor 310 may be configured to communicate with the storage media 330 and execute the series of instruction operations in the storage media 330 on the DSOGI phase-locked loop control device 300.

[0125] The DSOGI phase-locked loop control device 300 can also include one or more power supplies 340, one or more wired or wireless network interfaces 350, one or more input / output interfaces 360, and / or one or more operating systems 331, such as Windows Server, Mac OS X, Unix, Linux, FreeBSD, etc. Those skilled in the art will appreciate that, Figure 5 The illustrated DSOGI phase-locked loop control device structure is not intended to limit the communication protocol device based on local area network screen projection, and can include more or fewer components than illustrated, or combine certain components, or different component arrangements.

[0126] The application also provides a computer readable storage medium, which can be a non-volatile computer readable storage medium, or a volatile computer readable storage medium, and the computer readable storage medium stores instructions, which, when executed on a computer, cause the computer to perform the steps of the DSOGI phase-locked loop control method.

[0127] The integrated unit, if implemented in the form of a software functional unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the application or the entire or part of the technical solutions that essentially contribute to the prior art can be embodied in the form of a software product, which is stored in a storage medium and includes a number of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in various embodiments of the application. The aforementioned storage medium includes a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various program code storage media.

[0128] The above is a DSOGI phase-locked loop control method or a plurality of embodiments provided in combination with specific content, and it is not intended that the specific implementation of the application is limited to these descriptions. Any approximation, similarity, or replacement of the method and structure of the application, or any technical deduction or replacement under the premise of the concept of the application, should be considered within the protection scope of the application.

Claims

1. A DSOGI phase-locked loop control method, characterized in that, This method is applied in a DSOGI phase-locked loop control system, which includes a SOGI and a positive / negative phase sequence switching selection unit. The DSOGI phase-locked loop control method includes: S101. Acquire the three-phase grid voltage signal and convert the three-phase grid voltage signal into a two-phase quadrature voltage signal; S102. The SOGI is used to receive and process the two-phase quadrature voltage signals to obtain multiple quadrature components; S103. Separate the positive and negative orders of the orthogonal components to obtain positive order components and negative order components; S104. The positive and negative phase sequence switching selection unit receives the two-phase quadrature voltage signal, the positive sequence component, the negative sequence component, and the angular velocity of the DSOGI phase-locked loop, and selects one of the two-phase quadrature voltage signal, the positive sequence component, and the negative sequence component to perform closed-loop phase locking based on preset judgment conditions. The SOGI is also used to receive and process the angular velocity of the DSOGI phase-locked loop, wherein the angular velocity of the DSOGI phase-locked loop processed within the SOGI is taken as an absolute value. The transfer function of SOGI is: ； ； Wherein, k is the damping factor, ω' is the grid voltage estimate, and s is the Laplace operator; The judgment conditions in S104 include: Determine if the angular velocity of the DSOGI phase-locked loop is stable; If the angular velocity of the DSOGI phase-locked loop is stable, then the voltage signal V is directly selected. α and voltage signal V β Perform closed-loop phase-locked loop and return to the judgment of whether the angular velocity of the DSOGI phase-locked loop is stable; If the angular velocity of the DSOGI phase-locked loop is not stable, then determine whether the angular velocity of the DSOGI phase-locked loop is greater than 0. If the angular velocity of the DSOGI phase-locked loop is greater than 0, then the voltage signal V is determined. α With positive phase sequence components Is the phase error between them lower than the stable value? If the voltage signal V α With positive phase sequence components If the phase error between them is lower than the stable value, then the voltage signal V is selected. α and voltage signal V β Perform closed-loop phase-locked loop and return to the judgment of whether the angular velocity of the DSOGI phase-locked loop is stable; If the voltage signal V α With positive phase sequence components If the phase error between components is higher than the stable value, then the positive phase sequence component is selected. and positive phase sequence components Perform closed-loop phase-locked loop; If the angular velocity of the DSOGI phase-locked loop is less than 0, then the voltage signal V is determined. α With negative phase sequence components Is the phase error between them lower than the stable value? If the voltage signal V α With negative phase sequence components If the phase error between them is lower than the stable value, then the voltage signal V is selected. α and voltage signal V β Execute closed-loop phase-locked loop and return to the judgment of whether the angular velocity of the DSOGI phase-locked loop is stable; If the voltage signal V α With negative phase sequence components If the phase error between components is higher than the stable value, then the negative phase sequence component is selected. and negative phase sequence components Execute closed-loop phase-locked loop.

2. The DSOGI phase-locked loop control method according to claim 1, characterized in that, The DSOGI phase-locked loop control system also includes a data acquisition circuit and a Clark change unit, wherein S101 includes: The acquisition circuit is used to acquire three-phase grid voltage signals, wherein the three-phase grid voltage signals include voltage signals Ua, Ub, and Uc. The three-phase grid voltage signal is transmitted to the Clark transformation unit, where it is processed and transformed to obtain a two-phase quadrature voltage signal, wherein the two-phase quadrature voltage signal includes a voltage signal V. α and voltage signal V β .

3. The DSOGI phase-locked loop control method according to claim 2, characterized in that, The SOGI is provided in two forms, and S102 includes: The voltage signals Vα and Vβ are received and processed by the two SOGIs respectively to obtain four orthogonal components, wherein the four orthogonal components are respectively , , as well as The The voltage signal V α The first-order voltage hysteresis signal, the For the orthogonal signals, the The voltage signal V β The first-order voltage hysteresis signal, the For the Orthogonal signals.

4. The DSOGI phase-locked loop control method according to claim 3, characterized in that, S103 includes: The The above The above and the Separating the positive and negative sequences separately yields positive-sequence components and negative-sequence components, wherein the positive-sequence components include positive-phase-sequence components. and positive phase sequence components The negative sequence component includes the negative phase sequence component. and negative phase sequence components .

5. A DSOGI phase-locked loop control system, characterized in that, The DSOGI phase-locked loop control system, including SOGI and a positive / negative phase sequence switching selection unit, further includes: The conversion module is used to acquire the three-phase grid voltage signal and convert the three-phase grid voltage signal into a two-phase quadrature voltage signal; The SOGI processing module is used to receive and process the two-phase quadrature voltage signals using the SOGI to obtain multiple quadrature components; A separation module is used to separate the orthogonal components into positive and negative orders to obtain positive and negative order components. The closed-loop module is used to receive the two-phase quadrature voltage signal, the positive sequence component, the negative sequence component, and the angular velocity of the DSOGI phase-locked loop using the positive and negative phase sequence switching selection unit, and select one of the two-phase quadrature voltage signal, the positive sequence component, and the negative sequence component to perform closed-loop phase locking based on preset judgment conditions. The SOGI is also used to receive and process the angular velocity of the DSOGI phase-locked loop, wherein the angular velocity of the DSOGI phase-locked loop processed within the SOGI is taken as an absolute value. The transfer function of SOGI is: ； ； Wherein, k is the damping factor, ω' is the grid voltage estimate, and s is the Laplace operator; The judgment conditions in the closed-loop module include: Determine if the angular velocity of the DSOGI phase-locked loop is stable; If the angular velocity of the DSOGI phase-locked loop is stable, then the voltage signal V is directly selected. α and voltage signal V β Perform closed-loop phase-locked loop and return to the judgment of whether the angular velocity of the DSOGI phase-locked loop is stable; If the angular velocity of the DSOGI phase-locked loop is not stable, then determine whether the angular velocity of the DSOGI phase-locked loop is greater than 0. If the angular velocity of the DSOGI phase-locked loop is greater than 0, then the voltage signal V is determined. α With positive phase sequence components Is the phase error between them lower than the stable value? If the voltage signal V α With positive phase sequence components If the phase error between them is lower than the stable value, then the voltage signal V is selected. α and voltage signal V β Perform closed-loop phase-locked loop and return to the judgment of whether the angular velocity of the DSOGI phase-locked loop is stable; If the voltage signal V α With positive phase sequence components If the phase error between components is higher than the stable value, then the positive phase sequence component is selected. and positive phase sequence components Perform closed-loop phase-locked loop; If the angular velocity of the DSOGI phase-locked loop is less than 0, then the voltage signal V is determined. α With negative phase sequence components Is the phase error between them lower than the stable value? If the voltage signal V α With negative phase sequence components If the phase error between them is lower than the stable value, then the voltage signal V is selected. α and voltage signal V β Execute closed-loop phase-locked loop and return to the judgment of whether the angular velocity of the DSOGI phase-locked loop is stable; If the voltage signal V α With negative phase sequence components If the phase error between components is higher than the stable value, then the negative phase sequence component is selected. and negative phase sequence components Execute closed-loop phase-locked loop.

6. A DSOGI phase-locked loop control device, characterized in that, The DSOGI phase-locked loop control device includes: a memory and at least one processor, wherein the memory stores instructions, and the memory and the at least one processor are interconnected via a line; The at least one processor invokes the instructions in the memory to cause the DSOGI phase-locked loop control device to perform the DSOGI phase-locked loop control method as described in any one of claims 1-4.

7. A computer-readable storage medium storing a computer program thereon, characterized in that, When the computer program is executed by the processor, it implements the DSOGI phase-locked loop control method as described in any one of claims 1-4.

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