Method for improving radio frequency electrical performance of HBT device

Abstract

The invention provides a method for improving radio frequency electrical performance of an HBT (Heterojunction Bipolar Transistor) device, which comprises the following steps of: providing a substrate, forming shallow trench isolation on the substrate to define an active region of the HBT device, and forming a collector region and a pseudo buried layer of the HBT device on the substrate by utilizing ion implantation; forming an isolation dielectric layer on the substrate, forming a base region window, and forming a monocrystalline silicon layer in the base region window; forming an opening pattern on the polycrystalline silicon layer to define an emitter window; a dielectric layer is formed through deposition and etching, the part, extending to the opening pattern, of the dielectric layer serves as an emitting electrode isolation layer, and an emitting electrode side wall is formed on the emitting electrode isolation layer; interval time exists between the monocrystalline silicon layer and the emitter epitaxial layer after the monocrystalline silicon layer is pre-cleaned, a natural oxide layer is formed on the monocrystalline silicon layer, and the natural oxide layer is removed before the emitter epitaxial layer is formed; and forming an emitter epitaxial layer which is located on the dielectric layer and fills the residual opening pattern. And the radio-frequency electrical performance of the device can be recovered to normal.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for improving the radio frequency electrical performance of a HBT device. Background Art

[0002] Pre-cleaning before epitaxial growth has an important impact on the quality and morphology of the epitaxial layer. Pre-cleaning is generally done by removing the natural oxide layer formed at the interface through chemical solutions such as HF acid to ensure the normal deposition of subsequent film layers;

[0003] The emitter of the HBT device in the prior art is grown epitaxially. HF pre-cleaning is used before epitaxial growth. There is still a certain amount of time between the wafer being pre-cleaned and the epitaxial growth. The specific process is as follows:

[0004] Step 1, providing a substrate 101, forming a shallow trench isolation 102 on the substrate 101 to define an active region of the HBT device, and forming a collector region 107 and a pseudo buried layer 106 of the HBT device on the substrate 101 by ion implantation;

[0005] An isolation dielectric layer 103 is formed on the substrate 101, a base window is formed on the isolation dielectric layer 103 by photolithography and etching, and a single crystal silicon layer 110 is formed in the base window by epitaxy;

[0006] Depositing a polysilicon layer 104, and forming an opening pattern on the polysilicon layer 104 to define an emitter window;

[0007] A dielectric layer 105 is formed by deposition and etching. The portion of the dielectric layer 105 extending to the opening pattern serves as an emitter isolation layer. An emitter sidewall 109 is formed on the emitter isolation layer. Figure 1 The structure shown;

[0008] Step 2: After pre-cleaning, the emitter epitaxial layer 108 is deposited.

[0009] The device formed by this method has abnormal radio frequency performance.

[0010] In order to solve the above problems, it is necessary to propose a new method for improving the radio frequency electrical performance of HBT devices. Summary of the invention

[0011] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a method for improving the radio frequency electrical performance of an HBT device, so as to solve the problem of abnormal radio frequency performance of the device in the prior art.

[0012] To achieve the above objectives and other related objectives, the present invention provides a method for improving the radio frequency electrical performance of a HBT device, comprising:

[0013] Step 1, providing a substrate, on which shallow trench isolation is formed to define an active area of ​​the HBT device, and on which a collector region and a pseudo buried layer of the HBT device are formed by ion implantation;

[0014] An isolation dielectric layer is formed on the substrate, a base window is formed on the isolation dielectric layer by photolithography and etching, and a single crystal silicon layer is formed in the base window by epitaxy;

[0015] Depositing a polysilicon layer, and forming an opening pattern on the polysilicon layer to define an emitter window;

[0016] Forming a dielectric layer by deposition and etching, wherein the portion of the dielectric layer extending to the opening pattern serves as an emitter isolation layer, and an emitter sidewall is formed on the emitter isolation layer;

[0017] Step 2: There is an interval between pre-cleaning and forming the emitter epitaxial layer, a natural oxide layer is formed on the single crystal silicon layer, and the natural oxide layer is removed before the emitter epitaxial layer is formed;

[0018] Step three: forming an emitter epitaxial layer located on the dielectric layer and filling the remaining opening pattern.

[0019] Preferably, the substrate in step one is a silicon substrate.

[0020] Preferably, the size of the base region window in step one is greater than or equal to the size of the active region.

[0021] Preferably, in step 2, the natural oxide layer is removed by using a SiCoNi process.

[0022] Preferably, the SiCoNi process in step 2 utilizes a remote plasma generator to excite NF3 and NH3 to convert them into ammonium fluoride NH4F and ammonium difluoride NH4F.HF, and then NH4F and NH4F.HF react with the natural oxide layer to perform etching.

[0023] Preferably, the thickness of the natural oxide layer removed by the SiCoNi process in step 2 is in the range of 0 to 36 angstroms.

[0024] Preferably, the emitter epitaxial layer in step three is a SiAs epitaxial layer.

[0025] Preferably, the As concentration in the SiAs epitaxial layer in step three is 6E20-1E21.

[0026] Preferably, the thickness of the SiAs epitaxial layer in step three is 500 to 1200 angstroms.

[0027] Preferably, the method further comprises: step 4, patterning the isolation dielectric layer, the polysilicon layer, the dielectric layer and the emitter epitaxial layer to form a base, an external base region and an emitter, and then forming a metal interconnect structure for leading out the HBT device.

[0028] As described above, the method of improving the radio frequency electrical performance of the HBT device of the present invention has the following beneficial effects:

[0029] The present invention removes the natural oxide layer before the emitter epitaxial layer is formed, which is beneficial to the subsequent growth of the emitter epitaxial layer. At the same time, after the natural oxide layer is cleanly removed, it will not cause, for example, As interface aggregation, and the barrier effect on electron transition is greatly reduced, so the RF electrical performance of the device can be restored to normal. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a schematic diagram of a device structure before forming an emitter epitaxial layer in the prior art;

[0031] Figure 2 The device structure schematic diagram after the emitter epitaxial layer of the prior art is shown;

[0032] Figure 3 Shown is a schematic diagram of the process flow of the present invention;

[0033] Figure 4 A schematic diagram showing a natural oxide layer formed according to the present invention;

[0034] Figure 5 Shown is a schematic diagram of removing the natural oxide layer according to the present invention;

[0035] Figure 6 It is a schematic diagram of the device structure after the emitter epitaxial layer is formed according to the present invention;

[0036] Figure 7 It is a schematic diagram of the device structure after the base, collector and emitter are formed according to the present invention;

[0037] Figure 8 It is a schematic diagram showing the abnormality of the radio frequency curve of the device caused by a small amount of natural oxide layer of the present invention;

[0038] Fig. 9 Shown is a schematic diagram of the device verification results of the present invention. DETAILED DESCRIPTION

[0039] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0040] See also Figure 8 The inventors verified through the device that the small amount of natural oxide layer 111 caused the abnormal RF curve of the device. The Ft (operating frequency) / Ftmax (maximum oscillation frequency) did not reach the peak value within the test range. The SIMS (secondary ion mass spectrometry) test results showed that the As concentration at the emitter and base junctions increased, which was attributed to the presence of the natural oxide layer 111, which caused As to aggregate at the interface.

[0041] See also Figure 3 The present invention provides a method for improving the radio frequency electrical performance of an HBT device, comprising:

[0042] Step 1, providing a substrate 101, forming a shallow trench isolation 102 on the substrate 101 to define an active region of the HBT device, and forming a collector region 107 and a pseudo buried layer 106 of the HBT device on the substrate 101 by ion implantation;

[0043] An isolation dielectric layer 103 is formed on the substrate 101. The isolation dielectric layer 103 may be a single-layer structure such as an oxide layer, or may be a stacked oxide layer or a germanium-silicon epitaxial layer structure. A base window is formed on the isolation dielectric layer 103 by photolithography and etching methods, and a single crystal silicon layer 110 is formed in the base window by epitaxy.

[0044] Depositing a polysilicon layer 104, and forming an opening pattern on the polysilicon layer 104 to define an emitter window; the deposition method may be atomic layer deposition or chemical vapor deposition, and the etching method may be dry etching;

[0045] The dielectric layer 105 is formed by deposition and etching. The deposition method may be atomic layer deposition or chemical vapor deposition. The etching method is dry etching. The portion of the dielectric layer 105 extending to the opening pattern serves as an emitter isolation layer. An emitter sidewall 109 is formed on the emitter isolation layer.

[0046] In an embodiment of the present invention, the substrate 101 in step 1 is a silicon substrate 101 .

[0047] In an embodiment of the present invention, the size of the base region window in step 1 is greater than or equal to the size of the active region.

[0048] In an embodiment of the present invention, the material of the dielectric layer 105 in step 1 is silicon dioxide.

[0049] In an embodiment of the present invention, the material of the emitter isolation layer in step 1 is silicon dioxide.

[0050] In an embodiment of the present invention, the material of the emitter spacer 109 in step 1 is silicon nitride.

[0051] Step 2: There is a time interval between pre-cleaning and forming the emitter epitaxial layer 108. A natural oxide layer 111 is formed on the single crystal silicon layer 110. Figure 4 In the structure shown, the natural oxide layer 111 is removed before the emitter epitaxial layer 108 is formed, which is beneficial to the subsequent growth of the emitter epitaxial layer 108. At the same time, after the natural oxide layer 111 is cleanly removed, it will not cause, for example, As interface aggregation, and the barrier effect on the electron crossing is greatly reduced, so the RF electrical performance of the device can be restored to normal;

[0052] In an embodiment of the present invention, the natural oxide layer 111 is removed by using a SiCoNi process in step 2. SiCoNi is a dry chemical cleaning technology used in semiconductor manufacturing. The SiCoNi technology forms a defect-free silicide / Si interface by performing chemical cleaning in situ, thereby improving the quality of semiconductor devices.

[0053] In an embodiment of the present invention, the SiCoNi process in step 2 uses a remote plasma generator to excite NF3 and NH3 to convert them into ammonium fluoride NH4F and ammonium difluoride NH4F.HF, and then NH4F and NH4F.HF react with the natural oxide layer 111 to etch. The removal principle is: NH4F+NH4F.HF+SiO2→(NH4)2SiF6(solid)+H2O, and the decomposition and gasification of the by-products: (NH4)2SiF6(solid)→SiF4(gas)+NH3(gas)+HF(gas).

[0054] In the embodiment of the present invention, the thickness of the natural oxide layer 111 removed by the SiCoNi process in step 2 ranges from 0 to 36 angstroms. Correspondingly, the thickness of the natural oxide layer 111 formed on the single crystal silicon layer 110 should be no greater than 36 angstroms.

[0055] Step 3: forming an emitter epitaxial layer 108 on the dielectric layer 105 and filling the remaining opening pattern.

[0056] In an embodiment of the present invention, the emitter epitaxial layer 108 in step three is a SiAs epitaxial layer.

[0057] In an embodiment of the present invention, the As concentration in the SiAs epitaxial layer in step three is 6E20-1E21 (cm-3).

[0058] In an embodiment of the present invention, the thickness of the SiAs epitaxial layer in step three is 500-1200 angstroms.

[0059] In an embodiment of the present invention, the method further includes: step four, patterning the isolation dielectric layer 103, the polysilicon layer 104, the dielectric layer 105 and the emitter epitaxial layer 108, that is, etching and removing the stacked layers outside the base region to form a base, a collector and an emitter, and then forming a metal interconnection structure for leading out the HBT device.

[0060] For example, an interlayer dielectric layer 112 may be formed, and then contact holes with the pseudo buried layer 106, the emitter, and the polysilicon layer 104 may be formed on the interlayer dielectric layer, and then a filling metal is formed to fill the contact hole, and then the filling metal is led out using a metal wire.

[0061] See also Fig. 9 The device prepared by the present invention has been verified to have normal RF electrical properties after using SiCoNi, and the SIMS test results show that there is no increase in As concentration at the emitter and base junctions after adding SiCoNi, indicating that the present invention has a significant effect in removing the natural oxide layer 111 and can effectively improve the RF electrical properties of the device.

[0062] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner. Therefore, the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0063] In summary, the present invention removes the natural oxide layer before the emitter epitaxial layer is formed, which is beneficial to the subsequent growth of the emitter epitaxial layer. At the same time, after the natural oxide layer is cleanly removed, it will not cause, for example, As interface aggregation, and the barrier effect on the electron crossing is greatly reduced, so the RF electrical performance of the device can be restored to normal. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0064] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for improving the radio frequency electrical performance of a HBT device, characterized in that: At least: Step 1, providing a substrate, on which shallow trench isolation is formed to define an active area of ​​the HBT device, and on which a collector region and a pseudo buried layer of the HBT device are formed by ion implantation; An isolation dielectric layer is formed on the substrate, a base window is formed on the isolation dielectric layer by photolithography and etching, and a single crystal silicon layer is formed in the base window by epitaxy; Depositing a polysilicon layer, and forming an opening pattern on the polysilicon layer to define an emitter window; Forming a dielectric layer by deposition and etching, wherein the portion of the dielectric layer extending to the opening pattern serves as an emitter isolation layer, and an emitter sidewall is formed on the emitter isolation layer; Step 2: There is an interval between pre-cleaning and forming the emitter epitaxial layer, a natural oxide layer is formed on the single crystal silicon layer, and the natural oxide layer is removed before the emitter epitaxial layer is formed; Step three: forming an emitter epitaxial layer located on the dielectric layer and filling the remaining opening pattern.

2. The method for improving the radio frequency electrical performance of a HBT device according to claim 1, characterized in that: The substrate in step one is a silicon substrate.

3. The method for improving the radio frequency electrical performance of a HBT device according to claim 1, characterized in that: The size of the base region window in step 1 is greater than or equal to the size of the active region.

4. The method for improving the radio frequency electrical performance of a HBT device according to claim 1, characterized in that: In step 2, the natural oxide layer is removed by using a SiCoNi process.

5. The method for improving the radio frequency electrical performance of a HBT device according to claim 4, characterized in that: The SiCoNi process in step 2 utilizes a remote plasma generator to excite NF3 and NH3 to convert them into ammonium fluoride NH4F and ammonium difluoride NH4F.HF, and then NH4F and NH4F.HF react with the natural oxide layer to perform etching.

6. The method for improving the radio frequency electrical performance of a HBT device according to claim 4, characterized in that: The thickness of the natural oxide layer removed by the SiCoNi process in step 2 ranges from 0 to 36 angstroms.

7. The method for improving the radio frequency electrical performance of a HBT device according to claim 1, characterized in that: The emitter epitaxial layer in step three is a SiAs epitaxial layer.

8. The method for improving the radio frequency electrical performance of a HBT device according to claim 1, characterized in that: The As concentration in the SiAs epitaxial layer in step three is 6E20-1E21.

9. The method for improving the radio frequency electrical performance of a HBT device according to claim 1, characterized in that: The thickness of the SiAs epitaxial layer in step three is 500 to 1200 angstroms.

10. The method for improving the radio frequency electrical performance of a HBT device according to claim 1, characterized in that: The method further includes: step 4, patterning the isolation dielectric layer, the polysilicon layer, the dielectric layer and the emitter epitaxial layer to form a base, an external base region and an emitter, and then forming a metal interconnection structure for leading out the HBT device.

Images