Suppression oxide deposition for refilling shallow trench isolation

By using inhibitors to control the growth thickness of the silicon oxide layer in the semiconductor equipment manufacturing process, the problem of mismatch in the thickness of the silicon oxide layer in the prior art is solved, and higher equipment performance and lower damage risk are achieved.

CN120019471APending Publication Date: 2025-05-16LAM RES CORP
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Patent Information

Application Number
CN202380071914.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-10-12
Filing Date
2023-09-08
Publication Date
2025-05-16

AI Technical Summary

Technical Problem

In the existing semiconductor equipment manufacturing process, it is difficult to effectively control the growth thickness of the silicon oxide layer in different regions of the substrate, resulting in a mismatch between the thickness of the silicon oxide layer on the gate structure and the recessed STI region, affecting the performance of the equipment.

Method used

By depositing inhibitors on the substrate, the difference in their concentration between the gate structure and the recessed STI region is controlled, and the growth of the silicon oxide layer is inhibited, making it thicker on the recessed STI region and thinner on the gate structure.

Benefits of technology

Accurate control of the thickness of the silicon oxide layer on different regions is achieved, equipment performance is improved, and damage to the gate structure surface is reduced through a short-term etching process.

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Abstract

Disclosed examples relate to refilling recesses in STI regions with a silicon oxide ALD deposition process using an inhibitor. An example provides a method of processing a substrate. A method includes depositing an inhibitor on a substrate, wherein a concentration of the inhibitor on a gate structure of the substrate is greater than a concentration of the inhibitor on a recessed shallow trench isolation (STI) region of the substrate. The method further includes depositing a layer of silicon oxide on the substrate, the inhibitor inhibiting growth of the layer of silicon oxide such that the layer of silicon oxide is thicker over the recessed STI region and thinner over the gate structure.
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Description

Background Art

[0001] Semiconductor device manufacturing processes may involve many steps of material deposition, patterning, and removal to form an integrated circuit on a substrate. A film having a material may be deposited onto a substrate using a variety of methods. As an example, atomic layer deposition (ALD) forms a film using one or more deposition cycles. In an ALD deposition cycle, a film precursor gas is adsorbed onto the surface of a substrate placed in a processing chamber. Excess film precursors in the chamber are purged, and the adsorbed film precursors are chemically converted to a film on the substrate, for example, by oxidation. A highly conformal film of a target thickness may be grown via one or more deposition cycles. Summary of the invention

[0002] This summary is provided to introduce a selection of concepts in a simplified form, which will be further described in the specific implementation schemes below. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. Furthermore, the claimed subject matter is not limited to implementations that address any or all of the disadvantages mentioned in any part of this disclosure.

[0003] An example provides a method of processing a substrate. The method includes depositing an inhibitor on the substrate, wherein a concentration of the inhibitor on a gate structure of the substrate is greater than a concentration of the inhibitor on a recessed shallow trench isolation (STI) region of the substrate. The method further includes depositing a silicon oxide layer on the substrate, the inhibitor inhibiting growth of the silicon oxide layer such that the silicon oxide layer is thicker on the recessed STI region and thinner on the gate structure.

[0004] In certain such examples, the inhibitor may alternatively or additionally include one or more of hydrogen, a fluorine-containing inhibitor, a carbon-containing inhibitor, or a nitrogen-containing inhibitor.

[0005] In some such examples, the inhibitor may alternatively or additionally include one or more of hydrogen (H2), fluorine (F2), nitrogen (N2), nitrogen trifluoride (NF3), carbon tetrafluoride (CF4), sulfur hexafluoride (SF6), hydrogen fluoride (HF), xenon difluoride (XeF2), ammonia (NH3), amines, diamines, aminoalcohols, alkanes, alkenes, alkynes, cyclic hydrocarbons, alcohols, diols, aldehydes, esters, ethers, ketones, halides, alkylamines, or alkyldiamines.

[0006] In some such examples, the method may alternatively or additionally include performing a passivation cycle to remove the inhibitor from the substrate.

[0007] In some such examples, performing a passivation cycle may alternatively or additionally include performing a passivation cycle after completing a plurality of oxide deposition cycles.

[0008] In some such examples, a passivation cycle may alternatively or additionally be performed after completing the first portion of the oxide deposition cycle and before completing the second portion of the oxide deposition cycle.

[0009] In some such examples, the inhibitor may alternatively or additionally be deposited at a first pressure and the silicon oxide may be deposited at a second, different pressure.

[0010] In some such examples, the inhibitor and the silicon oxide may alternatively or additionally be deposited at the same pressure. In some such examples, depositing the inhibitor may alternatively or additionally include depositing the inhibitor using plasma enhanced atomic layer deposition (PEALD).

[0011] In some such examples, depositing the inhibitor using PEALD may alternatively or additionally include depositing the inhibitor using radio frequency energy having a first frequency component and a second frequency component, wherein the first frequency component has a higher frequency than the second frequency component.

[0012] In some such examples, the substrate includes a terminal structure within the recessed STI region, and the method may alternatively or additionally further include performing a post-deposition etch of the silicon oxide layer to expose at least a portion of the terminal structure.

[0013] Another example provides a method of processing a substrate. The method includes depositing an inhibitor on the substrate, wherein a concentration of the inhibitor on a hard mask and gate structure of the substrate is greater relative to a concentration of the inhibitor on a recessed STI region of the substrate. The method further includes depositing a silicon oxide layer on the substrate, the inhibitor inhibiting growth of the silicon oxide layer so that the silicon oxide layer is thicker on the recessed STI region than on the hard mask and gate structure. The silicon oxide layer overfills the recessed STI region to cover a terminal structure located within the recessed STI region of the substrate and extending above the recessed STI region. The method further includes performing a post-deposition etching of the silicon oxide layer to expose at least a portion of the terminal structure.

[0014] In certain such examples, the inhibitor may alternatively or additionally include one or more of a fluorine-containing inhibitor, a carbon-containing inhibitor, or a nitrogen-containing inhibitor.

[0015] In some such examples, the inhibitor may alternatively or additionally include one or more of H2, F2, N2, NF3, CF4, SF6, HF, XeF2, NH3, aminoalcohols, thiols, alkanes, olefins, alkynes, cycloalkanes, alcohols, diols, aldehydes, esters, ethers, ketones, halides, alkylamines, or alkyldiamines.

[0016] In some such examples, the method may alternatively or additionally include performing a passivation cycle to remove the inhibitor from the substrate.

[0017] In some such examples, depositing the inhibitor may alternatively or additionally include using PEALD including using a plasma having RF energy having a first frequency component and a second frequency component, wherein the first frequency component has a higher frequency than the second frequency component.

[0018] Another example provides a method for processing a substrate. The method includes depositing an inhibitor on the substrate, wherein the concentration of the inhibitor on the hard mask and gate structure of the substrate is greater than the concentration of the inhibitor on the recessed shallow trench isolation (STI) region of the substrate. The method further includes depositing a layer of silicon oxide on the substrate. The inhibitor inhibits the growth of the layer of silicon oxide so that the silicon oxide layer is thicker on the recessed STI region than on the hard mask and gate structure. The silicon oxide layer fills the recessed STI region to a partial height of the terminal structure and also coats the upper portion of the terminal structure, which is located in the recessed STI region of the substrate and extends above the recessed STI region. The method further includes performing a post-deposition etching of the silicon oxide layer to expose at least a portion of the terminal structure.

[0019] In certain such examples, the inhibitor may alternatively or additionally include one or more of a fluorine-containing inhibitor, a carbon-containing inhibitor, or a nitrogen-containing inhibitor.

[0020] In some such examples, the inhibitor may alternatively or additionally include one or more of H2, F2, N2, NF3, CF4, SF6, HF, XeF2, NH3, amines, diamines, aminoalcohols, alkanes, olefins, alkynes, cyclic hydrocarbons, alcohols, diols, aldehydes, esters, ethers, ketones, halides, alkylamines, or alkyldiamines.

[0021] In some such examples, the method may alternatively or additionally include performing a passivation cycle to remove the inhibitor from the substrate.

[0022] In some such examples, depositing the inhibitor may alternatively or additionally include using PEALD including using a plasma using RF energy having a first frequency component and a second frequency component, wherein the first frequency component has a higher frequency than the second frequency component. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figures 1A to 1C An exemplary structure formed in an exemplary shallow trench isolation (STI) refill process using a conformal deposition technique is schematically shown.

[0024] Figure 2 A flow chart illustrating an exemplary process for refilling STI regions using suppressed silicon oxide deposition is shown.

[0025] Figure 3A flow chart illustrating another exemplary process for refilling recessed STI regions using suppressed silicon oxide deposition is shown.

[0026] Figures 4A to 4H Schematically shown in Figure 3 An exemplary structure formed in an exemplary implementation of a process.

[0027] Figure 5 A flow chart illustrating another exemplary process for refilling a recessed STI region using inhibited oxide deposition is shown.

[0028] Figures 6A to 6H Schematically shown in Figure 5 An exemplary structure formed in an exemplary implementation of a process.

[0029] Figure 7 A flow chart illustrating an exemplary method of performing an ALD process using multiple ALD cycles and an equal number of inhibition and passivation cycles is shown.

[0030] Figure 8 A flow chart illustrating an exemplary method of performing an ALD process using multiple ALD cycles and varying numbers of inhibition and passivation cycles is shown.

[0031] Fig. 9 A flow chart illustrating an exemplary method of performing an ALD process using multiple ALD cycles and an inhibition cycle without passivation is shown.

[0032] Fig.10 A flow chart illustrating an exemplary method of performing an ALD process using multiple ALD cycles and an inhibition cycle and a final passivation cycle is shown.

[0033] Fig.11 A flow chart illustrating an exemplary sequence for performing an ALD process using multiple ALD cycles, inhibition cycles, and passivation cycles performed at one or more of the same pressure or the same gas flow rate is shown.

[0034] Fig.12 A flow chart illustrating an exemplary sequence for performing an ALD process using multiple ALD cycles performed at one or more of the same pressure or the same gas flow rate and multiple inhibition cycles without passivation is shown.

[0035] Fig.13 A flow chart illustrating an exemplary sequence for performing an ALD process using multiple ALD cycles without passivation, and using cycles combining oxidation and inhibition is shown.

[0036] Fig.14 A block diagram of an exemplary processing tool is shown.

[0037] Fig.15A block diagram of an exemplary computing device is shown. DETAILED DESCRIPTION

[0038] The term "alcohol" may generally refer to a hydrocarbon comprising the general formula R-OH, wherein R is an aromatic or aliphatic group. An alcohol may have more than one OH group (polyol). For example, a diol having two OH functional groups. Exemplary alcohols include methanol, ethanol, and propanol.

[0039] The term "aldehyde" may generally refer to a hydrocarbon containing a terminal carbonyl group. Aldehydes contain the general formula R-CHO, wherein R is an aromatic or aliphatic group. Exemplary aldehydes include formaldehyde and acetaldehyde.

[0040] The term "aliphatic" may generally refer to an organic compound that lacks aromatic groups.

[0041] The term "alkane" may generally refer to a hydrocarbon having the general formula C n H 2n+2 and substituted variants thereof. Exemplary alkanes include methane, ethane, propane, and butane.

[0042] The term "olefin" may generally refer to a hydrocarbon containing at least one carbon-carbon double bond. Alkanes containing one carbon-carbon double bond may be represented by the general formula C n H 2n and substituted variants thereof. Exemplary olefins include ethylene, propylene, and butene. Olefins may have more than one carbon-carbon double bond, such as dienes, allenes, and cumulenes.

[0043] The term "alkylamine" may generally refer to a hydrocarbon containing nitrogen having 1 to 3 alkyl substituents and 0 to 2 H substituents. Alkylamines include primary amines, secondary amines, tertiary amines, and cyclic amines. Examples of alkylamines include methylamine, dimethylamine, trimethylamine, and piperidine.

[0044] The term "haloalkane" may generally refer to a hydrocarbon containing a halogen. Examples of halogens include ethyl fluoride (fluoroethane), isopropyl bromide (2-bromopropane), and tert-butyl chloride (2-chloro-2-methylpropane). Halogens may contain two or more halogen groups, such as 1,2-dichlorobutane.

[0045] The term "alkyne" may generally refer to a hydrocarbon containing at least one carbon-carbon triple bond. Alkynes containing one carbon-carbon triple bond may be represented by the general formula C n H 2n-2 and substituted variants thereof. An alkyne may have more than one carbon-carbon triple bond, such as a diyne having two carbon-carbon triple bonds.

[0046] The term "aromatic" may generally refer to a planar cyclic compound containing a π bond in resonance. The term "aromatic" includes homocyclic compounds in which all atoms in the ring structure are carbon, and also includes heterocyclic rings in which one or more atoms in the ring structure are elements other than carbon (e.g., nitrogen).

[0047] The term "atomic layer deposition" (ALD) may generally refer to a process that forms a film (e.g., an oxide film) on a substrate in the form of one or more separate layers by sequentially adsorbing precursors to a substrate, followed by chemically converting the adsorbed precursors to form film layers. Examples of ALD processes include plasma enhanced ALD (PEALD) and thermal ALD (TALD). PEALD and TALD utilize plasma of a reactive gas and heat, respectively, to promote chemical conversion of the adsorbed precursors to a film on the substrate. The terms "growth" and "deposition" and variations thereof may also be used to refer to film formation.

[0048] The terms "atomic layer deposition cycle" and "ALD cycle" may generally refer to a single cycle of adsorbing a chemical precursor on a substrate surface and then chemically converting the adsorbed chemical precursor to form a film layer on the substrate.

[0049] The term "ALD cycle including a suppressant" may generally refer to an ALD cycle that includes introducing a suppressant into a processing chamber during the cycle.

[0050] The term "cyclic hydrocarbon" can generally refer to saturated and unsaturated hydrocarbon molecules containing a closed ring structure, as well as substituted variants thereof. Exemplary cyclic hydrocarbons include cyclopropane and cyclobutene. Exemplary cyclic hydrocarbons also include aromatics, such as benzene, toluene, and xylene.

[0051] The terms "etch", "etching", and variations thereof may generally refer to a process of removing material from a substrate surface. An etching process may encompass chemical and / or physical material removal mechanisms. A "dry etch" or "dry etching" process is an etching process that utilizes a gas phase etchant. A "wet etch" or "wet etching" process is an etching process that utilizes a liquid phase etchant.

[0052] The term "ether" may generally refer to hydrocarbons comprising the general formula RO-R', wherein R and R' are independently aryl or aliphatic. Exemplary ethers include diethyl ether, methyl phenyl ether, and cyclic ethers such as furan.

[0053] The term "ester" may generally refer to hydrocarbons comprising the general formula RC(O)OR', wherein R and R' are independently any aromatic or aliphatic group and wherein R may alternatively comprise H. Exemplary esters include ethyl formate, methyl acetate, and ethyl acetate.

[0054] The term "gate structure" may generally refer to a non-planar transistor gate in a metal oxide semiconductor (MOS) device. An example of a gate structure is a gate formed on a fin of a fin field effect transistor (FinFET).

[0055] The term "hard mask" may generally refer to a film that is more etch-resistant than a polymer photoresist. Examples of hard mask materials may include silicon nitride films, silicon oxynitride films, silicon carbon nitride films, and silicon oxycarbide films.

[0056] The term "inhibition cycle" may generally refer to a process that involves introducing an inhibitor onto a substrate.

[0057] The term "inhibitor" may generally refer to a compound that may be introduced into a processing chamber that may non-conformally deposit on a substrate surface and inhibit ALD growth of an oxide film. Suitable inhibitors include nitrogen-containing inhibitors, fluorine-containing inhibitors, and carbon-containing inhibitors.

[0058] Examples of suitable nitrogen-containing inhibitors may include nitrogen (N2), ammonia (NH3), amines, diamines, and amino alcohols. In some examples, the nitrogen-containing inhibitor may include a mixture of H2 and another gas. An example of such a mixture includes a H2 / N2 mixture.

[0059] Examples of suitable fluorine-containing inhibitors may include F2, NF3, SF6, HF, XeF2, and fluorocarbons such as CF4 or C2F6.

[0060] Examples of suitable carbon-containing inhibitors may include alkanes, alkenes, alkynes, cyclic hydrocarbons, aromatics, alcohols, aldehydes, esters, ethers, ketones, aldehydes, halogenated alkyls, alkylamines, and alkyldiamines. In certain examples, the carbon-containing inhibitor may include a hydrocarbon having the general formula C n H 2n+2 An alkane wherein n=1 to 10. Examples of suitable alkanes may include methane, ethane, propane, butane, pentane, hexane, and substituted variants thereof. Other examples of carbon-containing inhibitors may include olefins, alkynes, cyclic hydrocarbons, aromatics, alcohols, diols, aldehydes, esters, ethers, ketones, halogenated hydrocarbons, alkylamines, or alkyldiamines, including substituted variants thereof. In still other examples, the carbon-containing inhibitor may include a mixture of carbon-containing inhibitors. Suitable olefins (for olefins having a single carbon-carbon double bond, wherein n=2 to 10 C n H 2n Examples of suitable alkynes (for alkynes having a single carbon-carbon triple bond, wherein n=2 to 10 C n H2 n-2Examples of suitable hydrocarbons may include acetylene, propyne, butyne, and substituted variants thereof. Examples of suitable cyclic hydrocarbons may include cyclobutene, cyclopentane, cyclohexane, and substituted variants thereof. Examples of suitable aromatics may include benzene, toluene, pyridine, pyrimidine, and substituted variants thereof. Examples of suitable alcohols may include methanol, ethanol, propanol, and substituted variants thereof. Examples of suitable diols may include ethylene glycol, propylene glycol, hydroquinone, and substituted variants thereof. Examples of suitable aldehydes may include formaldehyde, acetaldehyde, and substituted variants thereof. Examples of suitable esters may include ethyl formate, methyl acetate, and ethyl acetate, and substituted variants thereof. Examples of suitable ethers may include ethyl ether, methyl phenyl ether, aromatic ethers such as furan, and substituted variants thereof. Examples of suitable ketones may include acetone, methyl ethyl ketone, and substituted variants thereof. Examples of suitable halogenated hydrocarbons may include ethyl fluoride, isopropyl bromide, tert-butyl chloride, and substituted variants thereof. Examples of suitable alkylamines may include methylamine, dimethylamine, trimethylamine, piperidine, and substituted variants thereof. Examples of suitable alkane diamines can include ethylene diamine, 1,3-diaminopropane, and substituted variations thereof.

[0061] The term "ketone" may generally refer to a hydrocarbon containing a non-terminal carbonyl group. Ketones have the general formula RC(O)-R', where R and R' are independently aromatic or aliphatic. Exemplary ketones include acetone and methyl ethyl ketone.

[0062] The term "oxidant" may generally refer to a gaseous substance containing oxygen that can be used to react with a film precursor to form an oxide film. Examples of oxidants include molecular oxygen (O2), water vapor (H2O), hydrogen peroxide (H2O2), and ozone (O3).

[0063] The term "oxide deposition cycle" may generally refer to a sequence of processes used to form an oxide layer. An exemplary oxide layer is a silicon oxide layer.

[0064] The term "oxide film" includes a film of a doped or undoped oxide. An exemplary oxide film is silicon oxide (SiO2).

[0065] The term "passivation" may generally refer to a process cycle used to remove remaining inhibitors from the substrate surface.

[0066] The term "passivation cycle" may generally denote a single passivation step.

[0067] The term "wet etching after silicon oxide layer deposition" may generally refer to performing wet etching after the silicon oxide layer deposition is completed. Wet etching is isotropic and may be performed using any suitable etchant. An exemplary etchant may include diluted HF.

[0068] The term "processing chamber" may generally refer to an enclosure in which a chemical and / or physical process is performed on a substrate. The pressure, temperature, and atmospheric composition within the processing chamber may be controllable to perform the chemical and / or physical process.

[0069] The term "processing tool" may generally refer to a machine that includes a processing chamber and other hardware configured to enable a process to be performed in the processing chamber.

[0070] The term "sweep" and variations thereof may generally refer to the process of removing unwanted material from a processing chamber.

[0071] The term "recessed STI region" may generally refer to a portion of an STI region that includes a groove formed in an etching process, such as a gate etching process. The groove may have a relatively narrow opening and a relatively wide region deeper within the groove.

[0072] The term "remote plasma" may generally refer to a plasma used to generate chemicals at a location remote from the surface being processed by the chemicals. Remote plasma may be used to generate chemicals used to process substrates located outside the plasma. Remote plasma may also be used to generate chemicals for cleaning processing chamber surfaces located outside the plasma.

[0073] The term "remote plasma enhanced atomic layer deposition" (remote PEALD) may generally represent an ALD process that utilizes a remote plasma to generate reactive gas species.

[0074] The terms "shallow trench isolation," "STI," "STI region," and variations thereof may generally refer to a structure that separates and isolates adjacent transistors or memory cells. STI includes trenches that are etched and filled with insulating material.

[0075] The term "silicon-containing precursor" may generally refer to any material that can be introduced into a processing chamber in a vapor phase to form a silicon-containing film on a substrate. An exemplary silicon-containing precursor for forming a silicon-containing film using PEALD may include a material having the following general structure: Among them, R1, R2 and R3 can be the same or different substituents and can include silane, siloxy, amine, halide, hydrogen or organic groups such as alkylamine, alkoxy, alkyl, alkenyl, alkynyl and aromatic groups.

[0076] More specific examples of silicon-containing precursors include polysilane (H3Si-(SiH2) n -SiH3), where n≥1, such as monosilane, disilane, trisilane, tetrasilane and trisilylamine.

[0077] In some examples, the silicon-containing precursor is an alkoxysilane. Alkoxysilanes that can be used include the following: x -Si-(OR) y , wherein x=1-3, x+y=4 and each R is a substituted or unsubstituted alkyl, alkenyl, alkynyl or aromatic group; H x (RO) y -Si-Si-(OR) y H x , is a substituted or unsubstituted alkyl, alkenyl, alkynyl or aromatic group.

[0078] Other examples of silicon-containing precursors include tetraethyl orthosilicate (TEOS), tetramethoxysilane (TMOS), methylsilane, trimethylsilane (3MS), ethylsilane, butylsilane, pentylsilane, octylsilane, heptylsilane, hexylsilane, cyclobutylsilane, cycloheptylsilane, cyclohexylsilane, cyclooctylsilane, cyclopentylsilane, 1,4-dioxy-2,3,5,6-tetrasilcyclohexane, diethoxymethylsilane (DEMS), diethoxysilane (DES), dimethoxymethylsilane, dimethoxysilane (DMOS), methyldiethoxysilane (MDES), methyldimethoxysilane (MDMS), tert-butoxydisilane, triethoxysilane (TES), and trimethoxysilane (TMS or TriMOS).

[0079] In some examples, the silicon-containing precursor can include a siloxane. Example siloxanes include octamethylcyclotetrasiloxane (OMCTS), octamethoxydodecylsiloxane (OMODDS), tetramethylcyclotetrasiloxane (TMCTS), triethoxysiloxane (TRIES), and tetraoxymethylcyclotetrasiloxane (TOMCTS).

[0080] In addition, in some examples, the silicon-containing precursor may be an aminosilane, such as bisdiethylaminosilane, diisopropylaminosilane, bis(tert-butylamino)silane (BTBAS), di(sec-butylamino)silane, or tris(dimethylamino)silane (3DMAS). Aminosilane precursors include the following: x -Si-(NR) y , wherein x=1-3, x+y=4, and R is a substituted or unsubstituted alkyl, alkenyl, alkynyl or aromatic group or hydride group.

[0081] In some examples, a halogen-containing silane may be used, such that the silane contains at least one hydrogen atom. Such a silane may have a chemical formula of SiX a H y , where y ≥ 1. For example, dichlorosilane (H2SiCl2) may be used in some examples.

[0082] The term "silicon oxide deposition cycle" may generally refer to an ALD cycle that deposits a layer of silicon oxide deposit.

[0083] The term "substrate" may generally refer to any object on which a film may be deposited.

[0084] The term "substrate support" may generally refer to any structure used to support a substrate in a processing chamber. Examples include chucks, pedestals, and showerhead pedestals for backside deposition processing.

[0085] The term "terminal structure" may generally refer to one or more of a source structure or a drain structure of a transistor.

[0086] Semiconductor devices may use non-planar gate structures. Non-planar gate structures include fin field effect transistors (FinFETs). FinFETs include gate structures located on two or more sides of a channel. The gate structure is formed on a portion of a raised fin structure. The gate structure is adjacent to an STI region. The terminal structure (source and drain structure) is located in the STI region.

[0087] The processing of the non-planar gate structure involves an etching step that can etch a groove in the STI region adjacent to the non-planar gate structure. This results in the formation of a recessed STI region. In some semiconductor device manufacturing processes, it may be necessary to refill the recessed STI region with an oxide. Figures 1A to 1C Schematically illustrates an exemplary structure formed in an exemplary shallow trench isolation (STI) refill process using a conformal deposition technique. For example, Figure 1A Schematically shows a substrate 100 including a gate structure 101 having a top surface 106 and side edges 104A, 104B. The gate structure 101 is adjoined to a recessed STI region 102. The recessed STI region 102 is formed on the underlying substrate. The recessed STI region 102 has been etched. Thus, the recessed STI region 102 includes a recess 108. The recess 108 includes an entry region 109 that is narrower than an inner region 110.

[0088] A dielectric material may be used to fill the groove 108 in the recessed STI region 110. Any suitable dielectric material may be used. In some examples, the dielectric material may be the same as the STI material. As a more specific example, the dielectric material may include silicon oxide. Figure 1B , a dielectric material is deposited by ALD to form a conformal film 112 for filling the groove 108. However, the depicted conformal film 112 fills the entry region 109 before filling the inner region 110, thereby causing the opening of the groove 108 to be blocked. Figure 1B As shown in , the inner region 110 may still not be filled with silicon oxide.

[0089] In addition, conformal deposition also deposits film 112 on surfaces 104A, 104B, and 106 of gate structure 101. Thus, film 112 may be removed from gate structure surfaces 104A, 104B, and 106 using an etching process. Figure 1C , extending the etching time may potentially damage the surfaces 104A, 104B, and 106. Such damage may reduce device performance. Extending the etching time may also form an opening 114. The opening 114 may affect device reliability.

[0090] Thus, examples are disclosed for refilling a recessed STI region adjacent to a non-planar gate structure. In short, the disclosed examples deposit an inhibitor on a substrate, wherein the concentration of the inhibitor on the gate structure of the substrate is greater relative to the concentration of the inhibitor on the recessed STI region of the substrate. The disclosed examples additionally deposit a silicon oxide layer on the substrate. The inhibitor inhibits the growth of the silicon oxide layer such that the silicon oxide layer is thicker on the recessed STI region than on the gate structure. The thinner silicon oxide on the gate structure can be removed by a relatively short duration etch, such as a wet etch. Relatively short duration etching reduces the likelihood of damaging the surface of the gate structure compared to relatively long duration etching.

[0091] Figure 2 A flow chart depicting an exemplary method 200 for processing a substrate is shown. At step 202, method 200 includes depositing an inhibitor on a substrate, wherein a concentration of the inhibitor on a gate structure of the substrate is greater relative to a concentration of the inhibitor on a recessed STI region of the substrate. Within the recessed STI region, the concentration of the inhibitor is higher at an entry region of the recessed STI region and lower deeper within the recessed STI region. Continuing with step 202, method 200 also includes depositing a silicon oxide layer on the substrate. The inhibitor inhibits the growth of the silicon oxide layer such that the silicon oxide layer is thicker on the recessed STI region than on the gate structure. This can facilitate the removal of silicon oxide in the gate region by a subsequent etching process. In addition, by depositing a higher concentration of the inhibitor on the entry region compared to the recessed STI region, the recessed STI region can be filled without forming pores.

[0092] Any suitable inhibitor may be used. In some examples, as shown in step 204, the inhibitor may include one or more of a fluorine-containing inhibitor, a carbon-containing inhibitor, or a nitrogen-containing inhibitor. In various examples, the inhibitor may be physically adsorbed and / or chemically adsorbed on the substrate surface. For example, the fluorine-containing inhibitor may be chemically adsorbed on the substrate surface. More particularly, a plasma deposition process may be used to deposit the fluorine-containing inhibitor. The plasma produces a reactive fluorine species from the fluorine-containing inhibitor. The reactive fluorine species reacts with the hydroxyl (OH) groups on the silicon oxide surface to replace H and form a fluorine-terminated surface. Exemplary fluorine-containing inhibitors may include one or more of F2, NF3, CF4, SF6, HF, or XeF2. Nitrogen-containing inhibitors may also be chemically adsorbed on the substrate surface. For example, a nitrogen-containing inhibitor may be deposited by plasma to form a reactive nitrogen species that reacts with the -OH groups on the silicon oxide surface to bond to the silicon oxide surface. Exemplary nitrogen-containing inhibitors may include one or more of N2, NH3, amines, diamines, or amino alcohols. In some examples, the inhibitor may include a mixture of hydrogen (H2) and another substance such as N2. Fluorine-containing inhibitors and nitrogen-containing inhibitors can function by inhibiting the nucleation of silicon oxide films on the inhibited surface.

[0093] The carbon-containing inhibitor may be primarily physically adsorbed on the substrate surface. The carbon-containing inhibitor competes with the silicon-containing precursor or other silicon oxide film precursor for oxygen. Thus, the carbon-containing precursor reduces the amount of oxygen available for oxidation of the silicon oxide film precursor. This slows down the rate of silicon oxide film growth. Exemplary carbon-containing inhibitors may include one or more of alkanes, alkenes, alkynes, cyclic hydrocarbons, alcohols, diols, aldehydes, esters, ethers, ketones, alkyl halides, alkylamines, or alkyl diamines, including substituted variants of such molecules. In certain examples, the carbon-containing inhibitor may include a molecule having the general formula C n H 2n+2 alkane, wherein n=1 to 10. Examples of suitable alkanes may include methane, ethane, propane, butane, pentane, hexane, and substituted alkanes. Other examples of carbon-containing inhibitors may include olefins, alkynes, cyclic hydrocarbons, aromatics, alcohols, diols, aldehydes, esters, ethers, ketones, halogenated alkyls, alkylamines, or alkyldiamines. In still other examples, the carbon-containing inhibitor may include a mixture of carbon-containing inhibitors. Suitable olefins (for olefins having a single carbon-carbon double bond, wherein n=2 to 10 C n H 2n Examples of suitable alkynes (for alkynes having a single carbon-carbon triple bond, wherein n=2 to 10 C n H 2n-2Examples of suitable hydrocarbons may include acetylene, propyne, and butyne. Examples of suitable cyclic hydrocarbons may include cyclobutene, cyclopentane, and cyclohexane. Examples of suitable aromatics may include benzene, toluene, pyridine, and pyrimidine. Examples of suitable alcohols may include methanol, ethanol, and propanol. Examples of suitable diols may include ethylene glycol, propylene glycol, and hydroquinone. Examples of suitable aldehydes may include formaldehyde and acetaldehyde. Examples of suitable esters may include ethyl formate, methyl acetate, and ethyl acetate. Examples of suitable ethers may include ethyl ether, methyl phenyl ether, and aromatic ethers such as furan. Examples of suitable ketones may include acetone and methyl ethyl ketone. Examples of suitable halogenated hydrocarbons may include ethyl fluoride, isopropyl bromide, and tert-butyl chloride. Examples of suitable alkylamines may include methylamine, dimethylamine, trimethylamine, and piperidine. Examples of suitable alkyldiamines may include ethylenediamine and 1,3-diaminopropane. Suitable carbon-containing inhibitors may also include substituted variants of such molecules.

[0094] The inhibitor may be placed (deposed) in any suitable manner. In some examples, as shown in step 206, a PEALD deposition inhibitor may be used. PEALD may provide sufficient activation to form a reaction inhibitor species from the inhibitor molecules. In some examples, as shown in step 208, a PEALD process for inhibitor deposition may use RF energy having a higher frequency component and a lower frequency component. The higher frequency component may provide activation energy for forming the desired reaction inhibitor species adsorbed to the substrate. The lower frequency (LF) component may be used to guide the reaction inhibitor species to the substrate. The term "inhibitor" is used herein to refer to inhibitor molecules introduced into the chamber, reaction inhibitor species formed in the plasma, and inhibitor species adsorbed to the substrate surface.

[0095] In some examples, the higher frequency RF energy component may include a power in the range of 50 to 1500 W. Increasing the power of the higher frequency component may result in a stronger suppression effect. The lower frequency component may be used to guide the inhibitor to the substrate. The lower frequency RF power may include a power in the range of 0 to 1500 W. Increasing the power of the lower frequency component may drive the inhibitor further down the gate structure and / or further into the groove. Increasing the suppression time, the inhibitor partial pressure, and the inhibitor flow rate may also result in a stronger suppression effect. In some examples, the suppression time may vary in the range of 0.1 to 30 s. In other examples, any other suitable suppression time may be used. In the example where NF3 is used as the inhibitor, the inhibitor flow rate may vary between 5 sccm and 250 sccm. In other examples, any other suitable inhibitor flow rate may be used. In addition, in some examples, the inhibitor may be deposited at a pressure between 0.1 to 30 Torr. In other examples, the inhibitor may be deposited at any other suitable pressure outside this range.

[0096] In some examples, the inhibitor may be deposited at a pressure different from the silicon oxide deposition pressure, as shown in step 210. In other examples, the inhibitor and silicon oxide may be deposited at the same pressure, as shown in step 212. In examples where the inhibitor and silicon oxide are deposited at the same pressure, the processing time of the processing tool may be reduced. This may result in higher throughput.

[0097] In some examples, the inhibitor may be removed by a passivation cycle, as shown in step 214. The passivation cycle, silicon oxide deposition cycle, and inhibition cycle may be performed in different permutations and combinations. Examples of different orders and combinations of these cycles are discussed below. In other examples, the inhibitor may be removed without a passivation cycle. For example, the carbon-containing inhibitor may be removed by oxidation during oxidation of the film precursor.

[0098] In some examples, as shown in step 216, a passivation cycle may be performed after completing multiple silicon oxide deposition cycles. As one such example, a passivation cycle may be performed after the silicon oxide deposition is completed to remove inhibitors from the gate and other surfaces. In other examples, as shown in step 218, a passivation cycle may be performed after the first portion of the silicon oxide deposition but before the second portion of the silicon oxide deposition cycle is completed. Such an example may include removing the inhibitor from the entrance of the groove in the recessed STI region. This example may be performed to allow the subsequent silicon oxide deposition to seal the groove. When a fluorine-containing inhibitor or a nitrogen-containing inhibitor is used, the passivation cycle may include exposing the inhibitor adsorbed to the substrate surface to one or more of H2 or O2. Heat and / or plasma energy may be used to promote passivation. In some examples, the passivation cycle may be performed at a pressure different from the deposition pressure. In other examples, in step 219, passivation may be performed at the same pressure as one or more deposition cycles. Performing passivation at the same pressure as one or more deposition cycles may help improve production capacity. This is because the time between deposition and passivation can be reduced.

[0099] As shown in step 220, after the silicon oxide is deposited on the substrate, etching is performed. The etching removes the silicon oxide so that at least a portion of the terminal structure is exposed. Any suitable etching process can be used. Examples include wet etching processes and dry etching processes. In some examples, the wet etching chemistry can include diluted HF.

[0100] The silicon oxide layer used to refill the recessed STI region can be deposited with any suitable thickness. In some examples, the silicon oxide layer is overfilled to cover the terminal structure. Then, the silicon oxide layer is etched back to expose at least a portion of the terminal structure.

[0101] Figure 3An exemplary method 300 for processing a substrate is depicted. The substrate includes a hard mask disposed on a gate structure. The substrate also includes a recessed STI region adjacent to the gate structure and a terminal structure located within the recessed STI region. The terminal structure extends above the recessed STI region. The terminal structure may include a source structure and / or a drain structure.

[0102] Figure 4A and 4B An orthographic view of a substrate 400 is shown, which includes a hard mask 402 disposed on gate structures 403A, 403B. Figure 4A and 4B Further depicted are a recessed STI region 404 and terminal structures 406A, 406B disposed on doped polysilicon structures 407A, 407B, respectively. The recessed STI region 404 includes a groove 408.

[0103] Return to reference Figure 3 At step 302 , the method 300 includes depositing an inhibitor on a substrate under conditions where a higher concentration of the inhibitor is deposited on the hard mask and the gate structure and a lower concentration of the inhibitor is deposited on the recessed STI region. Figure 4C and 4D The inhibitor 412 is schematically shown for an orthographic view of the substrate 400. The inhibitor 412 is deposited at a higher concentration on the top surface of the gate structures 403A, 403B compared to lower areas. Figure 4D It is shown that the inhibitor 412 is deposited at a higher concentration on the entry region of the recess 408 compared to the deeper region of the recess 408. In addition, the terminal structures 406A, 406B contain a higher concentration of the inhibitor 412 compared to the recessed STI region 404 and the recess 408.

[0104] Any suitable inhibitor may be used. In some examples, as in Figure 3 As shown in step 304, the inhibitor may include one or more of a fluorine-containing inhibitor, a carbon-containing inhibitor, or a nitrogen-containing inhibitor. The inhibitor may be deposited on the substrate under processing conditions such that the concentration of the inhibitor is higher on surfaces where silicon oxide deposition is not desired.

[0105] In some examples, as in Figure 3 As shown in step 306 of FIG. 1 , the inhibitor may be removed by a passivation cycle. As discussed below, the passivation cycle, silicon oxide deposition, and inhibitor deposition cycle may be performed in various permutations and combinations. In other examples, the inhibitor may be removed without a passivation cycle. For example, a carbon-containing inhibitor may be removed by oxidation during oxidation of the film precursor.

[0106] The inhibitor deposition conditions may depend on the properties of the substrate, the properties of the inhibitor, and the silicon oxide deposition conditions. In some examples, as shown in step 308, a PEALD deposition inhibitor comprising a plasma having a higher frequency RF energy component and a lower frequency RF energy component may be used. In some examples, the higher frequency RF energy component may include a power in the range of 50W to 1500W. Increasing the energy of the higher frequency component may result in a stronger inhibition. The lower frequency component may be used to direct the inhibitor to the substrate. In some examples, the lower frequency RF energy component may include a power in the range of 0W to 1500W. Increasing the energy of the lower frequency component may result in a stronger inhibition.

[0107] Increasing the inhibition time, inhibitor partial pressure, and inhibitor flow rate may also result in stronger inhibition. In some examples, the inhibitor exposure time may include a value in the range of 0.1 s to 30 s. Additionally, in some examples, the inhibitor may include a flow rate having a value in the range of 5 to 250 sccm. In other examples, any of these parameters may have a value outside of the exemplary range for that parameter.

[0108] In step 310, method 300 also includes depositing a silicon oxide layer on the substrate. The inhibitor inhibits the growth of the silicon oxide layer so that the silicon oxide layer is thicker on the recessed STI region and thinner on the hard mask and gate structure. In addition, the silicon oxide layer overfills the recessed STI region to cover the terminal structure. Taking into account the variation in the recessed STI region across the substrate, overfilling helps to ensure that the recessed STI region is filled with silicon oxide. The silicon oxide layer also covers the terminal structure on the substrate.

[0109] Orthographic projection Figure 4E and 4F An example of overfilling of silicon oxide 410 is shown. The overfilling of silicon oxide 410 causes the top surfaces of terminal structures 406A and 406B to be Figure 4E and 4F Due to the inhibitor, a thinner layer of silicon oxide 410 is deposited on the surface of gate structures 403A and 403B and hard mask 402.

[0110] continue Figure 3 At step 312, the method 300 further includes performing a post-wet etch of the silicon oxide layer to expose at least a portion of the terminal structure. Figure 4G and 4HThis step is schematically shown in . Any suitable wet etching process may be used. In some examples, the wet etching process may use diluted HF. The wet etching process may be performed for a sufficient time to expose the surfaces of the terminal structures 406A, 406B. Similarly, silicon oxide may be removed from the surfaces of the hard mask 402 and the gate structures 403A, 403B. For larger overfills, a longer and / or more aggressive wet etching process may be used. The hard mask deposited on the surface of the gate structure may prevent damage to the gate structure during the wet etching process. Although Figure 4G and 4H All oxide is shown removed from the gate structure and terminal structure, but in some examples a thin oxide layer may remain. In some examples, such a layer may be 1 nm or less thick.

[0111] Figure 5 A flow chart depicting an exemplary method 500 for processing a substrate is shown, the substrate comprising a hard mask disposed on a gate structure. The substrate further comprises a recessed STI region adjacent to the gate structure. The substrate further comprises a terminal structure located within the recessed STI region. The terminal structure extends above the recessed STI region.

[0112] Fig. 6A and 6B A cross-sectional view of an exemplary substrate 600 is shown. Fig. 6A and 6B The cross-sectional view in FIG. 6 is an orthographic view of substrate 600 . Substrate 600 includes a hard mask 602 disposed on gate structures 603A and 603B. Substrate 600 also includes a recessed STI region 604 and terminal structures 606A and 606B formed on polysilicon 607A and 607B, respectively. Recessed STI region 604 includes a groove 608 .

[0113] At step 502, method 500 includes depositing an inhibitor on a substrate, wherein a concentration of the inhibitor on a hard mask and gate structure of the substrate is greater than a concentration of the inhibitor on a recessed STI region of the substrate 604. Figure 6C and 6D This step is schematically shown in . The inhibitor 612 is deposited in a higher concentration on the top surface of the gate compared to lower areas near the terminal structures 606A, 606B. Fig.6D It is shown that the inhibitor 612 comprises a higher concentration on the entry region of the recess 608 as compared to deeper within the recess 608. In addition, as compared to the recessed STI region 604, the terminal structures 606A, 606B comprise a higher concentration of the inhibitor.

[0114] Any suitable inhibitor may be used. In some examples, as in Figure 5As shown in step 504, the inhibitor may include one or more of a fluorine-containing inhibitor, a carbon-containing inhibitor, or a nitrogen-containing inhibitor. In some examples, the inhibitor may include H2 mixed with another substance such as N2.

[0115] In some examples, as in Figure 5 As shown in step 506 of FIG. 1 , the inhibitor may be removed by a passivation cycle. As discussed below, the passivation cycle, silicon oxide deposition, and inhibitor deposition cycle may be performed in various permutations and combinations. In other examples, the inhibitor may be removed without a passivation cycle. For example, a carbon-containing inhibitor may be removed by oxidation during oxidation of the film precursor.

[0116] As described above, the inhibitor may be deposited on the substrate under processing conditions such that the concentration of the inhibitor is higher on surfaces where less or no silicon oxide deposition is desired. In some examples, the inhibitor may be deposited using PEALD. In some such examples, as shown in step 508, the PEALD process may include a plasma having a higher frequency RF energy component and a lower frequency RF energy component as described above.

[0117] At step 510, the method 500 further includes depositing a silicon oxide layer on the substrate. The inhibitor inhibits the growth of the silicon oxide layer so that the silicon oxide layer is thicker on the recessed STI region and thinner on the hard mask and gate structure. Fig. 6E and 6F , the process can be controlled so that the silicon oxide deposition fills the groove in the recessed STI region 604. The top surface of the terminal structure 606A, 606B has a silicon oxide coating. Compared with the groove in the recessed STI region 604, the gate structure 603A, 603B has less silicon oxide deposition. The groove 608 is filled with silicon oxide. And, the surface of the terminal structure 606A, 606B and the gate structure 603A, 603B has a less amount of silicon oxide deposition 610.

[0118] At step 512, the method 500 further includes performing a post-wet etch of the silicon oxide layer to expose at least a portion of the terminal structure. Figure 6G and 6H This step is schematically shown in , with the upper portion of the terminal structures 606A, 606B exposed. Any suitable wet etching process may be used. In some examples, the wet etching chemistry may include diluted HF. The wet etching may be performed for a sufficient time to expose the surface of the terminal structures 606A, 606B. Similarly, silicon oxide may be removed from the sides of the gate structures 603A, 603B.

[0119] As discussed earlier, the passivation cycle, silicon oxide deposition, and inhibition cycle can be performed in various permutations and combinations. The selected deposition process can depend on factors such as the substrate, the choice of inhibitor, and the silicon oxide deposition conditions. In some examples, processing time and throughput can also be factors. Figures 7 to 13 Various examples of arrangements of inhibition, silicon oxide deposition, and passivation cycles are shown.

[0120] Figure 7 A flow chart depicting an exemplary method 700 for performing ALD silicon oxide deposition with an inhibition cycle 702 and a passivation cycle 706 is shown. The method 700 includes an inhibition cycle 702 and X number of ALD cycles 704 to facilitate non-conformal silicon oxide film deposition. X represents an integer greater than or equal to one. The inhibition cycle 702 may include the introduction of any suitable inhibitor. Examples include nitrogen-containing inhibitors, fluorine-containing inhibitors, or carbon-containing inhibitors. In some examples, the inhibitor may include H2 mixed with another substance such as N2. More detailed examples of inhibitors are given above. The inhibition cycle deposits a relatively large concentration of inhibitor on the hard mask and gate structures and a lower concentration of inhibitor on the recessed STI regions.

[0121] Inhibitors may be deposited using a PEALD process in suppression cycle 702. In some examples, the PEALD process may include a higher frequency energy component and a lower frequency energy component. In some examples, the higher frequency RF energy component may vary in the range of 50 to 1500 W. Increasing the energy of the higher frequency component may result in a stronger suppression effect. The lower frequency component may be used to guide the inhibitor to the substrate. In some examples, the lower frequency RF energy component may vary in the range of 0 to 1500 W. Increasing the energy of the lower frequency component may result in a stronger suppression effect. Increasing the suppression time, the inhibitor partial pressure, and the inhibitor flow rate may also result in a stronger suppression effect. In some examples, the suppression time may include a time in the range of 0.1 to 30 s. In addition, in some examples, the inhibitor flow rate may include a flow rate in the range of 5 to 250 sccm. In other examples, one or more suitable values ​​outside the range may be used for one or more of the above-described parameters.

[0122] At 704, method 700 performs X number of ALD cycles. Any suitable number X of ALD cycles may be performed at 1204. After performing the inhibition cycle at 702 and the X number of ALD cycles at 704, method 700 includes performing a passivation cycle at 706. As described above, the passivation cycle may be performed to remove remaining inhibitor from the substrate.

[0123] As shown at 708, the inhibition cycle performed at 702, the ALD cycle(s) performed at 704, and the passivation cycle performed at 706 may be repeated any suitable number of times Y. Y is an integer greater than or equal to one. Thus, method 700 includes one passivation cycle for X ALD cycles. A greater ratio of ALD cycles to inhibition cycles may result in a greater degree of conformality of the silicon oxide film. Thus, the degree of conformality of the silicon oxide deposition may be adjusted throughout the entire silicon oxide deposition process. This applies to all of methods 700, 800, 900, 1100, 1200, and 1300. Once the target oxide film has been deposited, method 700 may terminate.

[0124] In some examples, passivation may be performed at a different time interval than inhibition. Figure 8 An exemplary method 800 is shown for performing a sequence including sub-cycles including an inhibit cycle 802 and X ALD cycles 804. As shown at 808, Y sub-cycles are performed, followed by Z passivation cycles 806. The numbers X, Y, and Z may each independently be integers equal to or greater than one.

[0125] In some examples, the inhibitor may be removed by a silicon oxide deposition process. In such examples, the passivation cycle may be omitted. Fig. 9 A flow chart of an exemplary method 900 is shown including performing Y inhibition cycles 902 and X ALD cycles 904 as shown in 906. The method 900 omits the passivation cycle. As an example, during the oxidation cycle of silicon oxide deposition, carbon may be oxidized along with the adsorbed silicon-containing species. The numbers X and Y may each independently be an integer equal to or greater than one.

[0126] A greater ratio of ALD cycles to inhibition cycles can result in a greater degree of conformality of the silicon oxide film. The degree of conformality of the silicon oxide deposition can thus be adjusted throughout the silicon oxide deposition process. Once the target oxide film has been obtained, method 900 can terminate.

[0127] In some examples, a single passivation cycle may be performed at the end of the silicon oxide deposition so that the surface of the terminal structure may be free of any physisorbed and / or chemisorbed inhibitors. Fig.10 An exemplary method 1000 for performing an ALD process with a final passivation cycle is shown.

[0128] The method 1000 includes performing an inhibition cycle 1002 followed by X ALD cycles 1004. This step is repeated Y times, as shown at 1008. The numbers X and Y may each independently be integers equal to or greater than one. A greater ratio of ALD cycles to inhibition cycles may result in a greater degree of conformality of the silicon oxide film. Thus, the degree of conformality of the silicon oxide deposition may be adjusted throughout the silicon oxide deposition process.

[0129] Once the target oxide film has been deposited, method 1000 may continue to 1006 and perform a passivation cycle. After performing the passivation cycle at 1006, method 1000 may terminate.

[0130] Various process variables may be adjusted to affect the degree of film conformality. As described above, the ratio of ALD cycles to inhibition cycles may be adjusted to control the degree of non-conformal growth. As another example, varying the exposure time to the inhibitor may change the conformality of the silicon oxide film. Additionally, one or more passivation cycles may be performed during the ALD process to remove residual inhibitor from the substrate. In some examples, when performing ALD using a fluorine-containing inhibitor, one or more passivation cycles may help avoid fluorine incorporation into the oxide film. In some examples, a passivation cycle may be performed at the end of the ALD process. In some examples, a passivation cycle may additionally or alternatively be performed between ALD cycles.

[0131] In some examples, the inhibition cycle, ALD deposition cycle, and passivation cycle may be performed at the same pressure, temperature, and / or gas flow rate. Figures 11 to 13 Depicted are exemplary methods in which inhibition cycles, ALD cycles, and passivation cycles are performed at one or more of the same process pressure, temperature, or gas flow rates.

[0132] Fig.11 An exemplary method 1100 for performing an ALD process having an inhibition cycle 1102 and a passivation cycle 1112 is shown, which may be performed at the same pressure and / or flow rate. The method 1100 includes an inhibition cycle 1102, a dosing cycle 1104, a sweep cycle 1106, an oxidation cycle 1108, and another sweep cycle 1110. These cycles are repeated a number of times X. The number X comprises an integer greater than or equal to one.

[0133] The dosing cycle 1104 includes flowing a silicon-containing precursor over the substrate. In the silicon oxide deposition process, any suitable silicon-containing precursor may be used. Examples include those given above. In some examples, a plasma may be used to deposit the silicon-containing material on the substrate.

[0134] Excess silicon-containing precursor and any byproducts may be purged during purge cycle 1106. A purge gas may be used during this cycle. The purge gas may include any suitable inert gas. Examples include one or more of argon, nitrogen, krypton, or xenon. In some examples, multiple purge gases may be used.

[0135] The oxidation cycle at 1108 includes introducing an oxidant to oxidize the physically adsorbed and / or chemically adsorbed silicon-containing precursor to form silicon oxide. Any suitable oxidant may be used. Exemplary oxidants include one or more of oxygen (O2), ozone (O3), one or more oxides of nitrogen (e.g., N2O), water vapor (H2O), or hydrogen peroxide (H2O2). In certain examples, a plasma may be used to excite the oxidant to ensure proper oxidation of the adsorbed silicon-containing species.

[0136] Any byproducts and excess oxygen formed during the oxidation cycle may be removed from the system during the purge cycle 1110. This may include flowing a purge gas through the system. The purge gas may include one or more of any suitable inert gases. Excess oxygen and byproducts as well as the purge gas may be continuously removed from the system during the purge cycle.

[0137] After performing processes 1104-1110 X times, method 1100 includes performing Y passivation cycles, where Y is an integer greater than or equal to 1. After Y passivation cycles, inhibition 1102 and ALD deposition processes 1104-1110 may be performed again if necessary. Once the target oxide film has been obtained, method 1100 may terminate.

[0138] In some examples, the substrate is heated during processing via a substrate heater. In some examples, the substrate heater can be heated to a temperature in the range of 150° C. to 400° C. In general, the inhibition cycle, the different steps of the ALD process, and the passivation cycle can be performed at the same temperature. In addition, as mentioned above, the process pressure and / or gas flow rate during the inhibition cycle, the silicon oxide deposition process, and the passivation cycle can remain the same.

[0139] Fig.12 Another exemplary method 1200 for performing inhibited ALD is shown, wherein inhibition, ALD deposition, and passivation may be performed at the same pressure, temperature, and / or gas flow rate. The method 1200 omits the passivation cycle. Thus, the method 1200 may be suitable for use with an inhibitor, such as carbon, that is removed during an oxidation cycle. The method 1200 includes performing an inhibition cycle 1202. The method 1200 further includes performing silicon oxide deposition using the ALD process. The ALD process includes a dosing cycle 1204, a sweep cycle 1206, an oxidation cycle 1208, and another sweep cycle 1210. The method 1200 may be performed as described above with respect to Fig.11The dosing cycle 1204, the sweep cycle 1206, the oxidation cycle 1208, and the sweep cycle 1210 may be performed X times, where X is an integer greater than or equal to one. In addition, after X cycles, the method 1200 may again apply the inhibitor at 1202. The cycle 1212 followed by X cycles 1204 to 1210 is repeated Y times, where Y is an integer greater than or equal to one.

[0140] Fig.13 Another exemplary method 1300 for performing inhibited ALD is shown, where inhibition, ALD deposition, and passivation may be performed at the same pressure, temperature, and / or gas flow rate. In the method 1300, inhibition and oxidation are performed at the same stage. More specifically, the method 1300 performs X number of ALD cycles, the ALD cycle comprising a dosing cycle 1304, a sweep cycle 1306, an oxidation and inhibition cycle 1308, and another sweep cycle 1310.

[0141] In the oxidation and inhibition cycle 1308, an oxidant and an inhibitor are introduced. The oxidant oxidizes the silicon oxide precursor introduced in the dosing cycle 1304. The inhibitor may include one or more of a fluorine-containing inhibitor, a carbon-containing inhibitor, or a nitrogen-containing inhibitor. In some examples, the inhibitor may include H2 mixed with another substance such as N2. In some examples, the inhibitor may be deposited on the substrate using the plasma that is also used to oxidize the silicon oxide precursor.

[0142] Any byproducts, excess inhibitors, and excess oxygen formed during the oxidation cycle may be removed from the system during the purge cycle 1310. This may include flowing a purge gas through the system. The purge gas may include any suitable inert gas or gases.

[0143] As shown at 1314, a continuous X number of ALD cycles may be performed. Any suitable number X of ALD cycles may be performed at 1314. Once a sufficient silicon oxide film thickness has been obtained, method 1200 may terminate. In some examples, the substrate is heated via a substrate heater during processing. In some examples, the substrate heater may be heated to a temperature in the range of 150° C. to 400° C. In other examples, temperatures outside of this range may be used. In general, different steps of the ALD cycle may be performed at the same temperature. By performing a combined inhibition / oxidation, the overall processing time may be reduced. This may result in higher throughput.

[0144] Fig.14A schematic diagram of an exemplary processing tool 1400 for performing an ALD process to deposit a silicon oxide film using an inhibitor is shown. The processing tool 1400 includes a processing chamber 1402. The processing tool 1400 further includes a substrate support 1404 for supporting a substrate 1406 within the processing chamber. The substrate support 1404 may include a pedestal, a chuck, and / or any other suitable structure. The substrate support 1404 may further include a substrate heater 1408.

[0145] The processing tool 1400 also includes one or more process gas inlets for introducing process gases into the processing chamber 1402. One example process gas inlet shown is a process gas inlet 1414 that allows flow of one or more process gases.

[0146] In the depicted example, a process gas inlet 1414 directs process gas to the showerhead 1410. In other examples, a nozzle and / or other suitable inlet hardware may be used. The processing tool 1400 also includes flow control hardware 1416 for controlling the introduction of process gas into the processing chamber 1402. The flow control hardware is connected to a silicon-containing precursor source 1418, an oxidant source A 1420, a passivation source 1422, an inhibitor source 1424, and a purge gas source 1425.

[0147] The silicon-containing precursor source 1418 includes any suitable silicon-containing precursor. An exemplary silicon-containing precursor may include a material having the following general structure: Wherein R1, R2 and R3 can be the same or different substituents and can include silane, silane alkoxy, amine, halide, hydrogen or organic groups such as alkylamine, alkoxy, alkyl, alkenyl, alkynyl and aromatic groups. More specific examples of silicon-containing precursors include polysilane (H3Si-(SiH2) n -SiH3), where n ≥ 1, such as monosilane, disilane, trisilane, tetrasilane, and trisilylamine. In some examples, the silicon-containing precursor is an alkoxysilane. Available alkoxysilanes include the following: H x -Si-(OR) y , wherein x=1-3, x+y=4 and each R is a substituted or unsubstituted alkyl, alkenyl, alkynyl or aromatic group; H x (RO) y -Si-Si-(OR) y H x, is a substituted or unsubstituted alkyl, alkenyl, alkynyl or aromatic group. Further examples of silicon-containing precursors include tetraethyl orthosilicate (TEOS), tetramethoxysilane (TMOS), methylsilane, trimethylsilane (3MS), ethylsilane, butylsilane, pentylsilane, octylsilane, heptylsilane, hexylsilane, cyclobutylsilane, cycloheptylsilane, cyclohexylsilane, cyclooctylsilane, cyclopentylsilane, 1,4-dioxy-2,3,5,6-tetrasilylcyclohexane, diethoxymethylsilane (DEMS), diethoxysilane (DES), dimethoxymethylsilane, dimethoxysilane (DMOS), methyldiethoxysilane (MDES), methyldimethoxysilane (MDMS), tert-butoxydisilane, triethoxysilane (TES) and trimethoxysilane (TMS or TriMOS). In some examples, the silicon-containing precursor may include siloxane. Exemplary siloxanes include octamethylcyclotetrasiloxane (OMCTS), octamethoxydodecylsiloxane (OMODDS), tetramethylcyclotetrasiloxane (TMCTS), triethoxysiloxane (TRIES), and tetraoxymethylcyclotetrasiloxane (TOMCTS). In addition, in some examples, the silicon-containing precursor can be an aminosilane, such as bisdiethylaminosilane, diisopropylaminosilane, bis(tert-butylamino)silane (BTBAS), di(sec-butylamino)silane, or tris(dimethylamino)silane (3DMAS). Aminosilane precursors include the following: x -Si-(NR) y , wherein x=1-3, x+y=4, and R is a substituted or unsubstituted alkyl, alkenyl, alkynyl or aromatic group or hydride group. In some examples, a halogen-containing silane may be used, such that the silane contains at least one hydrogen atom. Such a silane may have the chemical formula SiX a H y , where y ≥ 1. For example, dichlorosilane (H2SiCl2) may be used in some examples.

[0148] Likewise, the inhibitor source 1424 may include one or more of a fluorine-containing inhibitor, a carbon-containing inhibitor, or a nitrogen-containing inhibitor. Exemplary fluorine-containing inhibitors may include one or more of F2, NF3, CF4, SF6, HF, or XeF2. Exemplary nitrogen-containing inhibitors may include one or more of N2, NH3, amines, diamines, or aminoalcohols. In some examples, the inhibitor may include H2 mixed with another substance such as N2. Exemplary carbon-containing inhibitors may include one or more of alkanes, olefins, alkynes, cycloalkanes, alcohols, diols, aldehydes, esters, ethers, ketones, alkyl halides, alkylamines, or alkyl diamines. More detailed examples of inhibitors have been given above.

[0149] The oxidant source A1420 may include any suitable oxidant that can be used to oxidize the silicon-containing precursor adsorbed on the substrate during the silicon oxide deposition cycle. In some examples, the oxidant source A1420 may be used to oxidize the metal-containing precursor adsorbed on the substrate during the metal oxide deposition cycle. Exemplary oxidants include one or more of oxygen (O2), ozone (O3), one or more oxides of nitrogen (e.g., N2O), water vapor (H2O), or hydrogen peroxide (H2O2).

[0150] The purge gas source 1425 may include any suitable inert gas. Examples include one or more of argon, nitrogen, krypton, or xenon. In some examples, one or more additional purge gas sources may be included, each providing a different purge gas.

[0151] The processing tool 1400 also includes an exhaust system 1434. The exhaust system 1434 is configured to remove gases from the processing chamber 1402. The exhaust system 1434 can include any suitable hardware. Exemplary hardware includes one or more rough vacuum pumps and / or one or more high vacuum pumps.

[0152] In some examples, substrate heater 1408 is used to provide thermal energy to facilitate the ALD process. In other examples, a plasma for facilitating the ALD process may alternatively or additionally be generated within processing chamber 1402 using a radio frequency (RF) power source A 1432A and matching network A 1430A. The plasma may be used to provide energy to generate chemically active species in a gas phase. In other examples, a remote plasma generator 1428 may be used to provide reactive species for one or more of an ALD process, an inhibition cycle, or a passivation cycle.

[0153] In other examples, in addition to or in lieu of heating the substrate, a remote plasma is generated via an optional remote plasma generator 1428 to produce reactive species. The remote plasma may form reactive and / or intermediate species that drive one or more of the ALD reaction, the inhibition cycle, or the passivation cycle. The remote plasma generator 1428 may be omitted in some examples. Chemicals from the remote plasma generator 1428 may be introduced into the processing chamber 1402 via the gas inlet 1431. In other examples, the remote plasma generator 1428 may be configured to introduce chemicals into the processing chamber 1402 via the gas inlet 1414 and the showerhead 1410.

[0154] When the optional remote plasma generator 1428 is used, the processing tool 1400 may also include a RF power source B 1432B electrically connected to the remote plasma generator 1428. The processing tool 1400 may also include a matching network B 1430B for impedance matching of the RF power source 232B.

[0155] RF power source A 1432A and RF power source B 1432B can be configured for any suitable frequency and power. Examples of suitable frequencies include 400kHz, 13.56MHz, 27MHz, 60Mz, and 90MHz. Examples of suitable powers include powers between 50W (watts) and 50kW. In some examples, RF power sources 1432A and 1432B can be configured to operate at multiple different frequencies and / or powers.

[0156] The flow control hardware 1416 can be controlled to flow process chemicals from sources 1418, 1420, 1422, 1424, and 1425 into the process chamber 1402 via the gas inlet 1414. In some examples, the flow control hardware 1416 can also be configured to control the flow of one or more chemicals into the remote plasma generator 1428. The flow control hardware 1416 schematically represents any suitable components associated with flowing gases into the process chamber 1402 (and in some examples, the remote plasma generator 1428). For example, the flow control hardware 1416 can include one or more mass flow controllers and / or valves that can be controlled to fluidly connect selected chemical sources to the process chamber 1402.

[0157] The controller 1436 is operably coupled to the substrate heater 1408, the flow control hardware 1416, the remote plasma generator 1428, the exhaust system 1434, the RF power source A 1432A, and the RF power source B 1432B. The controller 1436 may also be operably coupled to any other suitable component of the processing tool 1400. The controller 1436 may also be operably coupled to any other suitable component of the processing tool 1400. The controller 1436 is configured to control various functions of the processing tool 1400 to perform a layered film deposition process. The controller 1436 is also configured to control various functions of the processing tool 1400 to perform a chamber cleaning process.

[0158] For example, the controller 1436 is configured to operate the substrate heater 1408 to heat the substrate. The controller 1436 is also configured to operate the flow control hardware 1416 to flow the selected chemical or chemical mixture into the processing chamber 1402 at a selected rate. The controller 1436 is also configured to operate the exhaust system 1434 to remove gases from the processing chamber 1402. The controller 1436 is also configured to operate the flow control hardware 1416 and the exhaust system 1434 to maintain a selected pressure within the processing chamber 1402. The controller 1436 is also configured to control the power supply 1432A to control the plasma generated in the chamber. In addition, the controller 1436 is configured to operate the optional remote plasma generator 1428 and / or the RF power supply 1432B to form a remote plasma.

[0159] In some embodiments, the methods and processes described herein may be incorporated into a computing system of one or more computing devices. Specifically, such methods and processes may be implemented as a computer application or service, an application programming interface (API), a library, and / or other computer program products.

[0160] Fig.15 An example of a computing system 1500 that can perform one or more of the above methods and processes is schematically shown. The computing system 1500 is shown in a simplified form. For example, the computing system 1500 can take the form of one or more personal computers, server computers, desktop computers, home entertainment computers, network computing devices, gaming devices, mobile computing devices, mobile communication devices (e.g., smart phones), and / or other computing devices. Fig.14 Controller 1436 in FIG. 1 is an example of computing system 1500 .

[0161] The computing system 1500 includes a logic machine 1502 and a storage machine 1504. The computing system 1500 may optionally include a display subsystem 1508, an input subsystem 1510, a communication subsystem 1512, and / or Fig.15 Other parts not shown.

[0162] Logic machine 1502 includes one or more physical devices configured to execute instructions 1506. For example, the logic machine may be configured to execute instructions that are part of one or more applications, services, programs, routines, libraries, objects, components, data structures, or other logical constructs. Such instructions may be implemented to perform a task, implement a data type, transform the state of one or more components, achieve a technical effect, or otherwise reach a desired result.

[0163] The logic machine may include one or more processors configured to execute software instructions. Additionally or alternatively, the logic machine may include one or more hardware or firmware logic machines configured to execute hardware or firmware instructions. The processor of the logic machine may be single-core or multi-core, and the instructions executed thereon may be configured for sequential, parallel and / or distributed processing. The various components of the logic machine may optionally be distributed in two or more separate devices that may be remotely located and / or configured for coordinated processing. Various aspects of the logic machine may be virtualized and executed by a remotely accessible networked computing device configured in a cloud computing configuration.

[0164] The storage machine 1504 includes one or more physical devices configured to store instructions 1506 that can be executed by a logic machine to implement the methods and processes described herein. When such methods and processes are implemented, the state of the storage machine 1504 can be transformed—for example, to store different data.

[0165] Storage 1504 may include removable and / or built-in devices. Storage 1504 may include optical storage (e.g., CD, DVD, HD-DVD, Blu-ray disc, etc.), semiconductor storage (e.g., RAM, EPROM, EEPROM, etc.), and / or magnetic storage (e.g., hard disk drive, floppy disk drive, tape drive, MRAM, etc.). Storage 1504 may include volatile, non-volatile, dynamic, static, read / write, read-only, random access, sequential access, location addressable, file addressable, and / or content addressable devices.

[0166] It should be understood that storage 1504 includes one or more physical devices. However, alternatively, aspects of the instructions described herein may be propagated via a communication medium (eg, electromagnetic signals, optical signals, etc.) that is not held for a finite duration by a physical device.

[0167] Aspects of the logic machine 1502 and the storage machine 1504 may be integrated together into one or more hardware logic components. For example, such hardware logic components may include field programmable gate arrays (FPGAs), program and application specific integrated circuits (PASIC / ASIC), program and application specific standard products (PSSP / ASSP), systems on chips (SOCs), and complex programmable logic devices (CPLDs).

[0168] When included, display subsystem 1508 can be used to present a visual representation of the data stored by storage machine 1504. This visual representation can take the form of a graphical user interface (GUI). Since the methods and processes described herein change the data held by the storage machine, and therefore change the state of the storage machine, the state of display subsystem 1508 can also be converted to visually represent the change of the underlying data. Display subsystem 1508 can include one or more display devices using almost any type of technology. Such a display device can be combined with a logical machine 1502 and / or storage machine 1504 in a shared cabinet (a shared enclosure), or such a display device can be a peripheral display device.

[0169] When included, the input subsystem 1510 may include or may interact with one or more user input devices (e.g., a keyboard, mouse, or touch screen). In some embodiments, the input subsystem may include or interact with selected natural user input (NUI) components. Such components may be integrated or peripheral, and the conversion and / or processing of input actions may be handled on-board or off-board. Exemplary NUI components may include microphones for speech and / or voice recognition, and infrared, color, stereo, and / or depth cameras for machine vision and / or gesture recognition; head trackers, eye trackers, accelerometers, and / or gyroscopes for motion detection and / or intent recognition; and electric field sensing components for assessing brain activity.

[0170] When included, the communication subsystem 1512 can be configured to communicatively couple the computing system 1500 with one or more other computing devices. The communication subsystem 1512 can include wired and / or wireless communication devices compatible with one or more different communication protocols. As an example, the communication subsystem can be configured to communicate using a wireless telephone network, or a wired or wireless local area network or wide area network. In some embodiments, the communication subsystem can allow the computing system 1500 to send messages to other devices and / or receive messages from other devices through a network such as the Internet.

[0171] It should be understood that the configuration and / or method described herein is exemplary in nature, and these specific one or more embodiments or examples should not be considered restrictive, because many variations are possible. The specific routine or method described herein can represent one or more of any number of processing strategies. Therefore, the various actions shown and / or described can be performed in the order shown and / or described, in other orders, in parallel or omitted. Similarly, the order of the above-mentioned process can be changed.

[0172] The subject matter of the present disclosure includes all novel and nonobvious combinations and subcombinations of the various processes, systems and configurations, and other features, functions, acts, and / or properties disclosed herein, as well as any and all equivalents thereof.

Claims

1. A method for processing a substrate, the method comprising: depositing an inhibitor on the substrate, wherein a concentration of the inhibitor on a gate structure of the substrate is greater relative to a concentration of the inhibitor on a recessed shallow trench isolation (STI) region of the substrate; and A silicon oxide layer is deposited on the substrate, and the inhibitor inhibits the growth of the silicon oxide layer so that the silicon oxide layer is thicker on the recessed shallow trench isolation region than on the gate structure.

2. The method of claim 1, wherein the inhibitor comprises one or more of hydrogen, a fluorine-containing inhibitor, a carbon-containing inhibitor, or a nitrogen-containing inhibitor.

3. The method of claim 2, wherein the inhibitor comprises one or more of hydrogen, fluorine, nitrogen, nitrogen trifluoride, carbon tetrafluoride, sulfur hexafluoride, hydrogen fluoride, xenon difluoride, ammonia, amines, diamines, aminoalcohols, alkanes, alkenes, alkynes, cyclic hydrocarbons, alcohols, diols, aldehydes, esters, ethers, ketones, alkyl halides, alkylamines, or alkyldiamines.

4. The method of claim 1, further comprising performing a passivation cycle to remove the inhibitor from the substrate. 5 . The method of claim 4 , wherein performing the passivation cycle comprises performing the passivation cycle after completing a plurality of oxide deposition cycles.

6. The method of claim 4, wherein the passivation cycle is performed after completing a first portion of an oxide deposition cycle and before completing a second portion of an oxide deposition cycle.

7. The method of claim 1, wherein the inhibitor is deposited at a first pressure and the silicon oxide is deposited at a second, different pressure.

8. The method of claim 1, wherein the inhibitor and the silicon oxide are deposited at the same pressure.

9. The method of claim 1, wherein depositing the inhibitor comprises depositing the inhibitor using plasma enhanced atomic layer deposition.

10. The method of claim 9, wherein depositing the inhibitor using plasma enhanced atomic layer deposition comprises depositing the inhibitor using radio frequency energy having a first frequency component and a second frequency component, wherein the first frequency component has a higher frequency than the second frequency component.

11. The method of claim 1, wherein the substrate includes a terminal structure within the recessed shallow trench isolation region, and wherein the method further includes performing a silicon oxide layer post-deposition etch to expose at least a portion of the terminal structure.

12. A method for processing a substrate, the method comprising: depositing an inhibitor on the substrate, wherein a concentration of the inhibitor on a hard mask and gate structure of the substrate is greater relative to a concentration of the inhibitor on a recessed shallow trench isolation (STI) region of the substrate; as well as Depositing a silicon oxide layer on the substrate, wherein the inhibitor inhibits the growth of the silicon oxide layer so that the silicon oxide layer is thicker on the recessed shallow trench isolation region than on the hard mask and the gate structure, and the silicon oxide layer overfills the recessed shallow trench isolation region to cover a terminal structure located within the recessed shallow trench isolation region on the substrate and extending above the recessed shallow trench isolation region; as well as A post-deposition etching of the silicon oxide layer is performed to expose at least a portion of the terminal structure.

13. The method of claim 12, wherein the inhibitor comprises one or more of a fluorine-containing inhibitor, a carbon-containing inhibitor, or a nitrogen-containing inhibitor.

14. The method of claim 12, further comprising performing a passivation cycle to remove the inhibitor from the substrate.

15. The method of claim 12, wherein depositing the inhibitor comprises depositing the inhibitor using a plasma enhanced atomic layer deposition method containing a plasma, the plasma enhanced atomic layer deposition method using radio frequency energy having a first frequency component and a second frequency component, wherein the first frequency component has a higher frequency than the second frequency component.

16. A method for processing a substrate, the method comprising: depositing an inhibitor on the substrate, wherein a concentration of the inhibitor on a hard mask and gate structure of the substrate is greater relative to a concentration of the inhibitor on a recessed shallow trench isolation (STI) region of the substrate; as well as Depositing a silicon oxide layer on the substrate, wherein the inhibitor inhibits the growth of the silicon oxide layer so that the silicon oxide layer is thicker on the recessed shallow trench isolation region than on the hard mask and the gate structure, the silicon oxide layer fills the recessed shallow trench isolation region to reach a partial height of a terminal structure, and also coats an upper portion of the terminal structure, wherein the terminal structure is located within the recessed shallow trench isolation region of the substrate and extends above the recessed shallow trench isolation region; as well as A post-deposition etching of the silicon oxide layer is performed to expose at least a portion of the terminal structure.

17. The method of claim 16, wherein the inhibitor comprises one or more of a fluorine-containing inhibitor, a carbon-containing inhibitor, or a nitrogen-containing inhibitor.

18. The method of claim 16, wherein the inhibitor comprises one or more of hydrogen, fluorine, nitrogen, nitrogen trifluoride, carbon tetrafluoride, sulfur hexafluoride, hydrogen fluoride, xenon difluoride, ammonia, amines, diamines, aminoalcohols, alkanes, alkenes, alkynes, cyclic hydrocarbons, alcohols, diols, aldehydes, esters, ethers, ketones, alkyl halides, alkylamines, or alkyldiamines.

19. The method of claim 16, further comprising performing a passivation cycle to remove the inhibitor from the substrate.

20. The method of claim 16, wherein depositing the inhibitor comprises: The inhibitor is deposited using a plasma enhanced atomic layer deposition method including a plasma using radio frequency energy having a first frequency component and a second frequency component, wherein the first frequency component has a higher frequency than the second frequency component.