Tracker circuit, high-frequency communication system, and tracking method

Abstract

A tracker circuit (1A) is connected to a preregulator circuit (11) configured to convert an input voltage into a regulated voltage, and is provided with: a switched capacitor circuit (20) configured to generate a plurality of discrete voltages on the basis of the regulated voltage; and an output switching circuit (31) configured to selectively output at least one of the plurality of discrete voltages to the power amplifier (2A), the preregulator circuit (11) being configured to output the regulated voltage to the switched capacitor circuit (20) and to output the regulated voltage to the power amplifier (2B) without passing through the switched capacitor circuit (20).

Description

Technical Field

[0001] The invention relates to a tracker circuit, a high frequency communication system and a tracking method. Background Art

[0002] In recent years, the power added efficiency has been improved by applying an envelope tracking (ET) mode to a power amplifier circuit. Patent Document 1 discloses a technology related to a digital ET mode for supplying a plurality of discrete voltages.

[0003] Patent Document 1: U.S. Patent No. 9755672

[0004] However, in the above-mentioned conventional technology, the power added efficiency may decrease. Summary of the invention

[0005] Therefore, the present invention provides a tracker circuit, a high-frequency communication system, and a tracking method capable of improving power added efficiency.

[0006] A tracker circuit of one embodiment of the present invention is a tracker circuit connected to a first converter circuit configured to convert an input voltage into a first adjustment voltage, and comprises: a second converter circuit configured to generate a plurality of discrete voltages based on the first adjustment voltage; and a first output switching circuit configured to selectively output at least one of the plurality of discrete voltages to a first power amplifier, the first converter circuit being configured to output the first adjustment voltage to the second converter circuit, and outputting the first adjustment voltage to the second power amplifier without passing through the second converter circuit.

[0007] A tracker circuit of one embodiment of the present invention comprises: a first external connection terminal connected to a first pre-regulator circuit including a first power inductor; a second external connection terminal connected to a first power amplifier; a switched capacitor circuit including a first input terminal connected to the first external connection terminal and a plurality of first output terminals; and a first output switch circuit including a plurality of second input terminals respectively connected to the plurality of first output terminals and a second output terminal connected to the second external connection terminal, and the first pre-regulator circuit is further connected to the second power amplifier without passing through the switched capacitor circuit and the first output switch circuit.

[0008] A high-frequency communication system according to one aspect of the present invention includes the tracker circuit, the first converter circuit, the first power amplifier, and the second power amplifier.

[0009] A tracking method according to one aspect of the present invention uses a power inductor to convert an input voltage into an adjustment voltage, generates multiple discrete voltages based on the adjustment voltage, selectively supplies at least one of the multiple discrete voltages to a first power amplifier, skips the generation of the multiple discrete voltages, and supplies the adjustment voltage to a second power amplifier.

[0010] According to the tracker circuit and the like according to one aspect of the present invention, it is possible to improve the power added efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1A This is a graph showing an example of transition of the power supply voltage in the average power tracking (APT: Average Power Tracking) mode.

[0012] Figure 1B This is a graph showing an example of transition of the power supply voltage in the analog envelope tracking (A-ET: Analog Envelope Tracking) mode.

[0013] Figure 1C This is a graph showing an example of transition of the power supply voltage in the digital envelope tracking (D-ET: Digital Envelope Tracking) mode.

[0014] Figure 2 This is a circuit configuration diagram of a communication device according to Embodiment 1.

[0015] Figure 3 This is a circuit configuration diagram of a switched capacitor circuit, an output switch circuit, a filter circuit, and a pre-regulator circuit included in the tracker circuit of the first embodiment.

[0016] Figure 4 This is a circuit configuration diagram of a digital control circuit included in the tracker circuit of the first embodiment.

[0017] Figure 5 This is a flowchart showing the tracking method of implementation mode 1.

[0018] Figure 6 This is a top view of the tracker module according to Embodiment 1.

[0019] Figure 7 This is a top view of the tracker module according to Embodiment 1.

[0020] Figure 8 This is a cross-sectional view of the tracker module according to Embodiment 1.

[0021] Fig. 9 This is a diagram showing the configuration of modules within the communication device of the first embodiment.

[0022] Fig.10 This is a circuit configuration diagram of a communication device according to the second embodiment.

[0023] Fig.11 This is a circuit configuration diagram of a communication device according to the third embodiment.

[0024] Fig.12 This is a partial circuit configuration diagram of a communication device according to another embodiment. DETAILED DESCRIPTION

[0025] Hereinafter, the embodiments of the present invention will be described in detail using the accompanying drawings. In addition, the embodiments described below all show general or specific examples. The values, shapes, materials, components, configurations of components, and connection methods shown in the following embodiments are examples and do not limit the present invention.

[0026] In addition, each figure is a schematic diagram that appropriately emphasizes, omits, or adjusts the ratio in order to illustrate the present invention, and is not necessarily strictly illustrated, and may differ from the actual shape, positional relationship, and ratio. In each figure, the same reference numeral is sometimes added to substantially the same structure, and repeated descriptions are omitted or simplified.

[0027] In the following figures, the x-axis and the y-axis are axes that are orthogonal to each other on a plane parallel to the main surface of the module substrate. Specifically, when the module substrate has a rectangular shape in a plan view, the x-axis is parallel to the first side of the module substrate, and the y-axis is parallel to the second side of the module substrate that is orthogonal to the first side. In addition, the z-axis is an axis perpendicular to the main surface of the module substrate, and its positive direction indicates the upward direction, and its negative direction indicates the downward direction.

[0028] In the circuit structure of the present invention, "connection" includes not only direct connection through connecting terminals and / or wiring conductors, but also electrical connection through other circuit elements. "Direct connection" means direct connection through connecting terminals and / or wiring conductors without passing through other circuit elements. "Connected between A and B" means connected between A and B and both A and B, and refers to a path connected in series between A and B. "Path between A and B" refers to a path formed by a conductor that electrically connects A and B. "In series with a path" means connected in series on the path, and refers to connection between one end of the path and the other end of the path. "Divided connection with the path" means connection between the path and the ground wire.

[0029] In the component configuration of the present invention, "components are configured on a substrate" includes components configured on the main surface of a substrate, and components configured inside a substrate. "Components are configured on the main surface of a substrate" includes not only the case where components are configured to contact the main surface of a substrate, but also the case where components are not in contact with the main surface but are configured above the main surface (for example, components are stacked on other components configured to contact the main surface). In addition, "components are configured on the main surface of a substrate" may also include components configured in recesses formed on the main surface. "Components are configured inside a substrate" includes not only the case where components are encapsulated in a module substrate, but also the case where all components are configured between the two main surfaces of a substrate but part of the components are not covered by the substrate, and the case where only part of the components are configured inside a substrate.

[0030] In addition, in the component configuration of the present invention, "a top view of the module substrate" means observing an object by orthogonally projecting it onto the xy plane from the positive side of the z-axis. "A overlaps with B when viewed from above" means that at least a portion of the area of ​​A orthogonally projected onto the xy plane overlaps with at least a portion of the area of ​​B orthogonally projected onto the xy plane. In addition, "A is configured between B and C" means that at least one of the multiple line segments connecting an arbitrary point in B and an arbitrary point in C passes through A.

[0031] In addition, in the component configuration of the present invention, "A and B are adjacently configured" means that A and B are close to each other, specifically, it means that there are no other circuit components in the space opposite to A and B. In other words, "A and B are adjacently configured" means that any of the multiple line segments from any point on the surface of A opposite to B along the normal direction of the surface to B does not pass through circuit components other than A and B. Here, circuit components refer to components including active components and / or passive components. In other words, circuit components include active components including transistors or diodes, and passive components including inductors, converters, capacitors or resistors, but do not include electrical mechanical components including terminals, connectors or wiring. The distance between two objects refers to the shortest distance between the two objects. In other words, the distance between two objects refers to the length of the shortest line segment among the multiple line segments connecting an arbitrary point on one side of the two objects with an arbitrary point on the other side of the two objects.

[0032] In the present invention, a "terminal" refers to a point where a conductor in an element ends. In addition, when the resistance of the conductor between elements is sufficiently low, the terminal can be interpreted not only as a single point but also as an arbitrary point on the conductor between elements or the entire conductor.

[0033] In addition, phrases such as "parallel" and "perpendicular" that indicate the relationship between elements, phrases such as "rectangular" that indicate the shape of an element, and numerical ranges do not necessarily have strict meanings but also include substantially equivalent ranges, such as errors of several %.

[0034] First, as a technique for efficiently amplifying high-frequency signals, a tracking mode for supplying a power amplifier with a power supply voltage dynamically adjusted over time based on the high-frequency signal will be described. The tracking mode refers to a mode for dynamically adjusting the power supply voltage applied to the power amplifier circuit. There are several types of tracking modes, but here, reference is made to the following. Figure 1A to Figure 1C The APT mode and ET mode (including the analog ET mode and the digital ET mode) are described. Figure 1A to Figure 1C In FIG. 1 , the horizontal axis represents time and the vertical axis represents voltage. In addition, the thick solid line represents the power supply voltage and the thin solid line (waveform) represents the modulation wave.

[0035] Figure 1A : is a graph showing an example of the transition of the power supply voltage in the APT mode. In the APT mode, the power supply voltage is changed to a plurality of discrete voltage levels in units of one frame based on the average power. As a result, the power supply voltage signal forms a rectangular wave.

[0036] A frame is a unit that constitutes a high-frequency signal (modulated wave). For example, in 5GNR (5th Generation New Radio) and LTE (Long Term Evolution), a frame consists of ten subframes, each of which consists of multiple time slots, and each time slot consists of multiple symbols. The subframe length is 1ms and the frame length is 10ms.

[0037] In addition, a mode in which the voltage level is varied in units of one frame or larger than one frame based on average power is called an APT mode, and is distinguished from a mode in which the voltage level is varied in units smaller than one frame (e.g., a subframe, a time slot, or a symbol). For example, a mode in which the voltage level is varied in units of a symbol is called a symbol power tracking (SPT: Symbol Power Tracking) mode, and is distinguished from the APT mode.

[0038] Figure 1B : is a graph showing an example of the change of the power supply voltage in the analog ET mode. In the analog ET mode, the envelope of the modulation wave is tracked by continuously changing the power supply voltage based on the envelope signal.

[0039] The envelope signal is a signal representing the envelope of the modulated wave. The envelope value is, for example, given by (I 2 +Q 2 ). Here, (I, Q) represents a constellation point. A constellation point refers to a point on a constellation diagram that represents a signal modulated by digital modulation. For example, (I, Q) is determined based on transmission information, such as by a BBIC (Baseband Integrated Circuit).

[0040] Figure 1C This is a graph showing an example of the transition of the power supply voltage in the digital ET mode. In the digital ET mode, the power supply voltage is varied to a plurality of discrete voltage levels within one frame based on the envelope signal to track the envelope of the modulation wave. As a result, the power supply voltage signal forms a rectangular wave.

[0041] (Implementation Method 1)

[0042] Implementation 1 is described below. The communication device 7A of this implementation is an example of a high-frequency communication system, which is equivalent to a user terminal (UE: User Equipment) in a cellular network, typically a mobile phone, a smart phone, a tablet computer, a wearable device, etc. In addition, the communication device 7A can also be an IoT (Internet of Things) sensor device, a medical / health care device, a car, an unmanned aerial vehicle (UAV: Unmanned Aerial Vehicle) (so-called drone), an automatic guided vehicle (AGV: Automated Guided Vehicle). In addition, the communication device 7A can also function as a BS (Base Station: base station) in a cellular network.

[0043] Reference Figure 2 The circuit configurations of a communication device 7A and a tracker circuit 1A according to the present embodiment will be described. Figure 2 It is a circuit configuration diagram of the communication device 7A according to the present embodiment.

[0044] also, Figure 2 The circuit configurations are illustrative, and the communication device 7A and the tracker circuit 1A can be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 7A and the tracker circuit 1A provided below should not be interpreted in a limiting sense.

[0045] [1.1 Circuit Configuration of Communication Device 7A]

[0046] First, refer to Figure 2 The communication device 7A of the present embodiment is described below and includes a tracker circuit 1A, power amplifiers 2A and 2B, filters 3A and 3B, an RFIC (Radio Frequency Integrated Circuit) 5 , antennas 6A and 6B, a pre-regulator circuit 11 , and a DC power supply 50 .

[0047] The tracker circuit 1A can supply the power supply voltage V to the power amplifier 2A based on the digital ET mode. DET1In addition, a symbol power tracking (SPT: Symbol Power Tracking) mode or the like may be used instead of the digital ET mode.

[0048] like Figure 2 As shown, the tracker circuit 1A includes a switched capacitor circuit 20 , an output switch circuit 31 , a filter circuit 41 , a digital control circuit 60 , and external connection terminals 101 a to 101 d and 102 .

[0049] The external connection terminals 101a to 101d are each an example of a first external connection terminal, and are terminals for receiving an adjustment voltage (an example of a first adjustment voltage) from the pre-regulator circuit 11. Each of the external connection terminals 101a to 101d is connected to the pre-regulator circuit 11 outside the tracker circuit 1A, and is connected to the switch capacitor circuit 20 inside the tracker circuit 1A. In addition, as long as the tracker circuit 1A includes at least one of the external connection terminals 101a to 101d, it is not necessary to include all of the external connection terminals 101a to 101d. In the following, if the external connection terminals 101a to 101d do not need to be distinguished from each other, they may also be recorded as external connection terminals 101.

[0050] The external connection terminal 102 is an example of a second external connection terminal, and is connected to the power amplifier 2A outside the tracker circuit 1A, and is connected to the filter circuit 41 inside the tracker circuit 1A. The external connection terminal 102 is used to supply the power supply voltage V DET1 Terminals.

[0051] The switched capacitor circuit 20 is an example of a second converter circuit, and includes a plurality of capacitors and a plurality of switches. The switched capacitor circuit 20 can generate a plurality of discrete voltages each having a plurality of discrete voltage levels based on the adjustment voltage received from the pre-regulator circuit 11. The switched capacitor circuit 20 is also referred to as a switched-capacitor voltage balancer.

[0052] The output switch circuit 31 is an example of a first output switch circuit, and is configured to selectively output at least one of a plurality of discrete voltages generated by the switch capacitor circuit 20 to the power amplifier 2A. In other words, the output switch circuit 31 can select at least one voltage from a plurality of discrete voltages and output the selected at least one voltage to the power amplifier 2A. At this time, the output switch circuit 31 can change the level of the voltage output to the power amplifier 2A discretely over time by repeatedly selecting operations. Such an output switch circuit 31 is controlled based on a digital control signal.

[0053] The filter circuit 41 is connected between the output switch circuit 31 and the power amplifier 2A, and is configured to attenuate noise components from a signal (a plurality of discrete voltages) from the output switch circuit 31 .

[0054] The digital control circuit 60 can control the pre-regulator circuit 11 , the switched capacitor circuit 20 , the output switch circuit 31 , and the filter circuit 41 based on the digital control signal from the RFIC 5 .

[0055] In addition, the tracker circuit 1A may not include at least one of the switched capacitor circuit 20, the output switch circuit 31, the filter circuit 41, and the digital control circuit 60. For example, the tracker circuit 1A may not include the digital control circuit 60. In addition, any combination of the switched capacitor circuit 20, the output switch circuit 31, and the filter circuit 41 may be integrated into a single circuit.

[0056] The pre-regulator circuit 11 is an example of a first converter circuit and a first pre-regulator circuit, and is configured to convert an input voltage into an adjustment voltage. Moreover, the pre-regulator circuit 11 can output the adjustment voltage to the switched capacitor circuit 20, and can also output the adjustment voltage to the power amplifier 2B without passing through the switched capacitor circuit 20. Specifically, the pre-regulator circuit 11 includes a power inductor and a switch. The power inductor is an inductor used for boosting and / or reducing a direct current (DC: Direct Current) voltage. The power inductor is connected in series to a DC path. In addition, the power inductor can also be connected in a shunt to the series path. Such a pre-regulator circuit 11 is also called a magnetic regulator or a DC / DC converter.

[0057] The DC power source 50 can supply a DC voltage to the pre-regulator circuit 11. As the DC power source 50, for example, a rechargeable battery can be used, but the present invention is not limited thereto.

[0058] The power amplifier 2A is an example of a first power amplifier, and is connected between the RFIC 5 and the filter 3A. The power amplifier 2A is connected to the tracker circuit 1A and can receive a power supply voltage V based on the digital ET mode. DET1 The power amplifier 2A can use the power supply voltage V received from the tracker circuit 1A. DET1 , amplifies the high frequency signal RF of band A received from RFIC5 A In other words, the power amplifier 2A can operate in the digital ET mode.

[0059] The power amplifier 2B is an example of a second power amplifier, and is connected between the RFIC 5 and the filter 3B. The power amplifier 2B is connected to the pre-regulator circuit 11, and can receive the power supply voltage V based on the APT mode. APT1 The power amplifier 2B can use the power supply voltage V received from the pre-regulator circuit 11. APT1 , amplifies the high frequency signal RF of band B received from RFIC5 B In other words, the power amplifier 2B can operate in the APT mode.

[0060] The filter 3A is connected between the power amplifier 2A and the antenna 6A. The filter 3A is a bandpass filter having a passband including a transmission frequency band of the frequency band A. The filter 3A may not be included in the communication device 7A.

[0061] The filter 3B is connected between the power amplifier 2B and the antenna 6B. The filter 3B is a bandpass filter having a passband including the transmission frequency band of the frequency band B. In addition, the filter 3B may not be included in the communication device 7A.

[0062] Frequency bands A and B are frequency bands used for communication systems built using radio access technology (RAT), and are predefined by standardization organizations such as 3GPP (registered trademark) (3rd Generation Partnership Project) and IEEE (Institute of Electrical and Electronics Engineers). Examples of communication systems include 5GNR (5th Generation New Radio) systems, 4GLTE (4th Generation Long Term Evolution) systems, 3G (3rd Generation) systems, 2G (2nd Generation) systems, and WLAN (Wireless Local Area Network) systems.

[0063] The frequency band A is an example of the first frequency band, and in the present embodiment, is included in the ultra-high frequency group (3300 to 5000 MHz). In addition, the frequency band A is not limited to the frequency band included in the ultra-high frequency group.

[0064] Band B is an example of the second band, and in this embodiment, is included in the mid-high frequency group (1427-2690 MHz) or the low frequency group (698-960 MHz). Band B is not limited to the frequency band included in the mid-high frequency group or the low frequency group.

[0065] In addition, the transmission band refers to a frequency band used for transmission in a communication device. For example, in a frequency division duplex (FDD) band, a frequency band different from a receiving band is used as a transmission band. On the other hand, in a time division duplex (TDD) band, a frequency band the same as a receiving band is used as a transmission band. In particular, in a case where the communication device functions as a UE of a cellular network, in the FDD band, an uplink operation band is used as a transmission band. On the contrary, in a case where the communication device functions as a BS of a cellular network, in the FDD band, a downlink operation band is used as a transmission band.

[0066] RFIC5 is an example of a signal processing circuit that processes a high-frequency signal. Specifically, RFIC5 performs signal processing on an input transmission signal by up-conversion, etc., and supplies the high-frequency transmission signal generated by the signal processing to power amplifiers 2A and 2B. In addition, RFIC5 may also have a control unit that controls the tracker circuit 1A. In addition, part or all of the functions of the control unit of RFIC5 may also be installed outside RFIC5.

[0067] The antenna 6A outputs a transmission signal of the frequency band A input from the power amplifier 2A via the filter 3A. The antenna 6A may not be included in the communication device 7A.

[0068] The antenna 6B outputs a transmission signal of the frequency band B input from the power amplifier 2B via the filter 3B. The antenna 6B may not be included in the communication device 7A.

[0069] also, Figure 2 The circuit configuration of the communication device 7A shown is an example and is not limited thereto. For example, the communication device 7A may also include a circuit that uses a higher frequency signal RF A And RF B The communication device 7A may also include a receiving path. In addition to the power amplifier 2A, the communication device 7A may also include one or more power amplifiers connected to the tracker circuit 1A.

[0070] [1.2 Circuit Structure of Tracker Circuit 1A and Pre-regulator Circuit 11]

[0071] Next, refer to Figure 3 as well as Figure 4 The circuit configurations of the tracker circuit 1A and the pre-regulator circuit 11 will be described. Figure 3 1 is a circuit configuration diagram of the switched capacitor circuit 20 , the output switch circuit 31 , the filter circuit 41 , and the pre-regulator circuit 11 included in the tracker circuit 1A of the present embodiment. Figure 4 1 is a circuit configuration diagram of a digital control circuit 60 included in the tracker circuit 1A of the present embodiment.

[0072] also, Figure 3 as well as Figure 4 The circuit configuration is an example, and the pre-regulator circuit 11, the switched capacitor circuit 20, the output switch circuit 31, the filter circuit 41, and the digital control circuit 60 can be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of each circuit provided below should not be interpreted in a limiting sense.

[0073] [1.2.1 Circuit Structure of Switched Capacitor Circuit 20]

[0074] First, the circuit structure of the switched capacitor circuit 20 is described. Figure 3 As shown, the switched capacitor circuit 20 includes capacitors C11 to C16 , capacitors C10 , C20 , C30 , and C40 , switches S11 to S14 , S21 to S24 , S31 to S34 , and S41 to S44 , input terminals 120 a to 120 d , and output terminals 121 to 124 .

[0075] Input terminals 120a to 120d are examples of first input terminals. Input terminals 120a to 120d are connected to external connection terminals 101a to 101d of the tracker circuit 1A outside the switched capacitor circuit 20, and are connected to nodes N4 to N1 inside the switched capacitor circuit 20. In addition, in the following, when a part or all of input terminals 120a to 120d are indicated, there is a case where they are recorded as input terminals 120.

[0076] The output terminals 121 to 124 are examples of a plurality of first output terminals and are connected to the input terminals 131 to 134 of the output switch circuit 31 outside the switched capacitor circuit 20 , respectively, and are connected to the nodes N4 to N1 inside the switched capacitor circuit 20 , respectively.

[0077] Energy and charge are input from the pre-regulator circuit 11 to the switched capacitor circuit 20 via the input terminals 120 a to 120 d , and are taken out from the switched capacitor circuit 20 to the output switch circuit 31 via the output terminals 121 to 124 .

[0078] The capacitors C11 to C16 function as flying capacitors (also called cross-circuit capacitors). In other words, each capacitor C11 to C16 is used to step up or step down the adjustment voltage supplied from the pre-regulator circuit 11. More specifically, the capacitors C11 to C16 move charges between the capacitors C11 to C16 and the nodes N1 to N4 to maintain voltages V1 to V4 (voltage relative to the ground potential) that satisfy V1: V2: V3: V4 = 1: 2: 3: 4 at the four nodes N1 to N4. The voltages V1 to V4 correspond to a plurality of discrete voltages each having a plurality of discrete voltage levels.

[0079] The capacitor C11 has two electrodes. One of the two electrodes of the capacitor C11 is connected to one end of the switch S11 and one end of the switch S12. The other of the two electrodes of the capacitor C11 is connected to one end of the switch S21 and one end of the switch S22.

[0080] The capacitor C12 has two electrodes. One of the two electrodes of the capacitor C12 is connected to one end of the switch S21 and one end of the switch S22. The other of the two electrodes of the capacitor C12 is connected to one end of the switch S31 and one end of the switch S32.

[0081] The capacitor C13 has two electrodes. One of the two electrodes of the capacitor C13 is connected to one end of the switch S31 and one end of the switch S32. The other of the two electrodes of the capacitor C13 is connected to one end of the switch S41 and one end of the switch S42.

[0082] The capacitor C14 has two electrodes. One of the two electrodes of the capacitor C14 is connected to one end of the switch S13 and one end of the switch S14. The other of the two electrodes of the capacitor C14 is connected to one end of the switch S23 and one end of the switch S24.

[0083] The capacitor C15 has two electrodes. One of the two electrodes of the capacitor C15 is connected to one end of the switch S23 and one end of the switch S24. The other of the two electrodes of the capacitor C15 is connected to one end of the switch S33 and one end of the switch S34.

[0084] The capacitor C16 has two electrodes. One of the two electrodes of the capacitor C16 is connected to one end of the switch S33 and one end of the switch S34. The other of the two electrodes of the capacitor C16 is connected to one end of the switch S43 and one end of the switch S44.

[0085] The group of capacitors C11 and C14 , the group of capacitors C12 and C15 , and the group of capacitors C13 and C16 can be charged and discharged complementarily by repeating the first stage and the second stage.

[0086] Specifically, in the first stage, switches S12, S13, S22, S23, S32, S33, S42, and S43 are turned on. As a result, for example, one of the two electrodes of capacitor C12 is connected to node N3, the other of the two electrodes of capacitor C12 and one of the two electrodes of capacitor C15 are connected to node N2, and the other of the two electrodes of capacitor C15 is connected to node N1.

[0087] On the other hand, in the second phase, switches S11, S14, S21, S24, S31, S34, S41, and S44 are turned on. As a result, for example, one of the two electrodes of capacitor C15 is connected to node N3, the other of the two electrodes of capacitor C15 and one of the two electrodes of capacitor C12 are connected to node N2, and the other of the two electrodes of capacitor C12 is connected to node N1.

[0088] By repeating the first and second stages, for example, when one of the capacitors C12 and C15 is charged by the node N2, the other of the capacitors C12 and C15 can be discharged to the capacitor C30. In other words, the capacitors C12 and C15 can be charged and discharged complementarily.

[0089] The group of capacitors C11 and C14 and the group of capacitors C13 and C16 can also be charged and discharged complementarily similarly to the group of capacitors C12 and C15 by repeating the first stage and the second stage.

[0090] The capacitors C10 , C20 , C30 , and C40 function as smoothing capacitors, respectively. In other words, the capacitors C10 , C20 , C30 , and C40 are used to hold and smooth the voltages V1 to V4 at the nodes N1 to N4 , respectively.

[0091] The capacitor C10 is connected between the node N1 and the ground. Specifically, one of the two electrodes of the capacitor C10 is connected to the node N1. On the other hand, the other of the two electrodes of the capacitor C10 is connected to the ground.

[0092] The capacitor C20 is connected between the nodes N2 and N1. Specifically, one of the two electrodes of the capacitor C20 is connected to the node N2. On the other hand, the other of the two electrodes of the capacitor C20 is connected to the node N1.

[0093] The capacitor C30 is connected between the nodes N3 and N2. Specifically, one of the two electrodes of the capacitor C30 is connected to the node N3. On the other hand, the other of the two electrodes of the capacitor C30 is connected to the node N2.

[0094] The capacitor C40 is connected between the nodes N4 and N3. Specifically, one of the two electrodes of the capacitor C40 is connected to the node N4. On the other hand, the other of the two electrodes of the capacitor C40 is connected to the node N3.

[0095] The switch S11 is connected between one of the two electrodes of the capacitor C11 and the node N3. Specifically, one end of the switch S11 is connected to one of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S11 is connected to the node N3.

[0096] The switch S12 is connected between one of the two electrodes of the capacitor C11 and the node N4. Specifically, one end of the switch S12 is connected to one of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S12 is connected to the node N4.

[0097] The switch S21 is connected between one of the two electrodes of the capacitor C12 and the node N2. Specifically, one end of the switch S21 is connected to one of the two electrodes of the capacitor C12 and the other of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S21 is connected to the node N2.

[0098] The switch S22 is connected between one of the two electrodes of the capacitor C12 and the node N3. Specifically, one end of the switch S22 is connected to one of the two electrodes of the capacitor C12 and the other of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S22 is connected to the node N3.

[0099] The switch S31 is connected between the other of the two electrodes of the capacitor C12 and the node N1. Specifically, one end of the switch S31 is connected to the other of the two electrodes of the capacitor C12 and one of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S31 is connected to the node N1.

[0100] The switch S32 is connected between the other of the two electrodes of the capacitor C12 and the node N2. Specifically, one end of the switch S32 is connected to the other of the two electrodes of the capacitor C12 and one of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S32 is connected to the node N2. In other words, the other end of the switch S32 is connected to the other end of the switch S21.

[0101] The switch S41 is connected between the other of the two electrodes of the capacitor C13 and the ground line. Specifically, one end of the switch S41 is connected to the other of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S41 is connected to the ground line.

[0102] The switch S42 is connected between the other of the two electrodes of the capacitor C13 and the node N1. Specifically, one end of the switch S42 is connected to the other of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S42 is connected to the node N1. In other words, the other end of the switch S42 is connected to the other end of the switch S31.

[0103] The switch S13 is connected between one of the two electrodes of the capacitor C14 and the node N3. Specifically, one end of the switch S13 is connected to one of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S13 is connected to the node N3. In other words, the other end of the switch S13 is connected to the other end of the switch S11 and the other end of the switch S22.

[0104] The switch S14 is connected between one of the two electrodes of the capacitor C14 and the node N4. Specifically, one end of the switch S14 is connected to one of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S14 is connected to the node N4. In other words, the other end of the switch S14 is connected to the other end of the switch S12.

[0105] The switch S23 is connected between one of the two electrodes of the capacitor C15 and the node N2. Specifically, one end of the switch S23 is connected to one of the two electrodes of the capacitor C15 and the other of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S23 is connected to the node N2. In other words, the other end of the switch S23 is connected to the other end of the switch S21 and the other end of the switch S32.

[0106] The switch S24 is connected between one of the two electrodes of the capacitor C15 and the node N3. Specifically, one end of the switch S24 is connected to one of the two electrodes of the capacitor C15 and the other of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S24 is connected to the node N3. In other words, the other end of the switch S24 is connected to the other end of the switch S11, the other end of the switch S22, and the other end of the switch S13.

[0107] The switch S33 is connected between the other of the two electrodes of the capacitor C15 and the node N1. Specifically, one end of the switch S33 is connected to the other of the two electrodes of the capacitor C15 and one of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S33 is connected to the node N1. In other words, the other end of the switch S33 is connected to the other end of the switch S31 and the other end of the switch S42.

[0108] The switch S34 is connected between the other of the two electrodes of the capacitor C15 and the node N2. Specifically, one end of the switch S34 is connected to the other of the two electrodes of the capacitor C15 and one of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S34 is connected to the node N2. In other words, the other end of the switch S34 is connected to the other end of the switch S21, the other end of the switch S32, and the other end of the switch S23.

[0109] The switch S43 is connected between the other of the two electrodes of the capacitor C16 and the ground line. Specifically, one end of the switch S43 is connected to the other of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S43 is connected to the ground line.

[0110] The switch S44 is connected between the other of the two electrodes of the capacitor C16 and the node N1. Specifically, one end of the switch S44 is connected to the other of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S44 is connected to the node N1. In other words, the other end of the switch S44 is connected to the other end of the switch S31, the other end of the switch S42, and the other end of the switch S33.

[0111] The switches of the first group including switches S12, S13, S22, S23, S32, S33, S42 and S43 and the switches of the second group including switches S11, S14, S21, S24, S31, S34, S41 and S44 are switched on and off complementarily based on the control signal S2. Specifically, in the first stage, the switches of the first group are turned on, and the switches of the second group are turned off. Conversely, in the second stage, the switches of the first group are turned off, and the switches of the second group are turned on.

[0112] For example, in one of the first stage and the second stage, the capacitors C10 to C40 are charged from the capacitors C11 to C13, and in the other of the first stage and the second stage, the capacitors C10 to C40 are charged from the capacitors C14 to C16. In other words, the capacitors C10 to C40 are always charged from the capacitors C11 to C13 or the capacitors C14 to C16, so even if the current flows from the nodes N1 to N4 to the output switch circuit 31 at a high speed, the nodes N1 to N4 can be replenished with charges at a high speed, so the potential fluctuation of the nodes N1 to N4 can be suppressed.

[0113] By operating in this way, the switched capacitor circuit 20 can maintain approximately equal voltages at both ends of each of the capacitors C10, C20, C30, and C40. Specifically, at the four nodes labeled V1 to V4, voltages V1 to V4 (voltages relative to the ground potential) that satisfy V1: V2: V3: V4 = 1: 2: 3: 4 are maintained. The voltage levels of the voltages V1 to V4 correspond to a plurality of discrete voltage levels that can be supplied to the output switch circuit 31 through the switched capacitor circuit 20.

[0114] In addition, the voltage ratio (V1:V2:V3:V4) is not limited to (1:2:3:4). For example, the voltage ratio (V1:V2:V3:V4) may be (1:2:4:8).

[0115] in addition, Figure 3 The structure of the switched capacitor circuit 20 shown is an example and is not limited thereto. Figure 3 In the embodiment, the switched capacitor circuit 20 is configured to supply voltages of four discrete voltage levels, but is not limited thereto. The switched capacitor circuit 20 may also be configured to supply voltages of any number of discrete voltage levels or more. For example, when supplying voltages of two discrete voltage levels, the switched capacitor circuit 20 may include at least capacitors C12 and C15, and switches S21 to S24, and S31 to S34.

[0116] [1.2.2 Circuit Structure of Output Switch Circuit 31]

[0117] Next, the circuit structure of the output switch circuit 31 is described. The output switch circuit 31 is connected to the digital control circuit 60. Figure 3 As shown, the output switch circuit 31 includes input terminals 131 to 134 , switches S51 to S54 , and an output terminal 130 .

[0118] The output terminal 130 is an example of a second output terminal, and is connected to the external connection terminal 102 via the filter circuit 41. The output terminal 130 is a terminal for supplying a power supply voltage selected from the voltages V1 to V4 to the power amplifier 2A via the external connection terminal 102.

[0119] The input terminals 131 to 134 are respectively connected to the nodes N4 to N1 of the switched capacitor circuit 20. The input terminals 131 to 134 are examples of a plurality of second input terminals, and are terminals for receiving the voltages V4 to V1 from the switched capacitor circuit 20.

[0120] The switch S51 is connected between the input terminal 131 and the output terminal 130. Specifically, the switch S51 has a terminal connected to the input terminal 131 and a terminal connected to the output terminal 130. In this connection structure, the switch S51 can switch the connection and non-connection between the input terminal 131 and the output terminal 130 by switching on / off (closed / opened) according to the control signal S3.

[0121] The switch S52 is connected between the input terminal 132 and the output terminal 130. Specifically, the switch S52 has a terminal connected to the input terminal 132 and a terminal connected to the output terminal 130. In this connection structure, the switch S52 can switch the connection and non-connection between the input terminal 132 and the output terminal 130 by switching on / off according to the control signal S3.

[0122] The switch S53 is connected between the input terminal 133 and the output terminal 130. Specifically, the switch S53 has a terminal connected to the input terminal 133 and a terminal connected to the output terminal 130. In this connection structure, the switch S53 can switch the connection and non-connection between the input terminal 133 and the output terminal 130 by switching on / off according to the control signal S3.

[0123] The switch S54 is connected between the input terminal 134 and the output terminal 130. Specifically, the switch S54 has a terminal connected to the input terminal 134 and a terminal connected to the output terminal 130. In this connection structure, the switch S54 can switch the connection and non-connection between the input terminal 134 and the output terminal 130 by switching on / off according to the control signal S3.

[0124] The switches S51 to S54 are controlled to be exclusively turned on. In other words, only one of the switches S51 to S54 is turned on, and the remaining switches S51 to S54 are turned off. Thus, the output switch circuit 31 can output one voltage selected from the voltages V1 to V4.

[0125] also, Figure 3The structure of the output switch circuit 31 shown is an example and is not limited thereto. In particular, the switches S51 to S54 may have any structure as long as they can selectively connect at least one of the four input terminals 131 to 134 to the output terminal 130. For example, the output switch circuit 31 may further include a switch connected between the switches S51 to S53 and the switch S54 and the output terminal 130. For another example, the output switch circuit 31 may further include a switch connected between the switches S51 and S52 and the switches S53 and S54 and the output terminal 130.

[0126] Furthermore, when voltages of two discrete voltage levels are supplied from the switched capacitor circuit 20 , the output switch circuit 31 only needs to include at least two of the switches S51 to S54 .

[0127] [1.2.3 Circuit Structure of Pre-regulator Circuit 11]

[0128] First, the structure of the pre-regulator circuit 11 will be described. Figure 3 As shown, the pre-regulator circuit 11 includes an input terminal 110, output terminals 111 to 114, inductor connection terminals 115 and 116, switches S61 to S63, S71 and S72, a power inductor L71 (an example of a first power inductor), and capacitors C61 to C64.

[0129] The input terminal 110 is an input terminal for a DC voltage. In other words, the input terminal 110 is connected to the DC power supply 50 and is a terminal for receiving an input voltage from the DC power supply 50 .

[0130] The output terminal 111 is an output terminal of the voltage V4. In other words, the output terminal 111 is a terminal for supplying the voltage V4 to the switched capacitor circuit 20. The output terminal 111 is connected to the external connection terminal 101a of the tracker circuit 1A.

[0131] The output terminal 112 is an output terminal of the voltage V3. In other words, the output terminal 112 is a terminal for the user to supply the voltage V3 to the switched capacitor circuit 20. The output terminal 112 is connected to the external connection terminal 101b of the tracker circuit 1A. Furthermore, the output terminal 112 is connected to the power amplifier 2B without passing through the tracker circuit 1A. In other words, the pre-regulator circuit 11 is connected to the switched capacitor circuit 20, and is connected to the power amplifier 2B without passing through the switched capacitor circuit 20 and the output switch circuit 31.

[0132] The output terminal 113 is an output terminal of the voltage V2. In other words, the output terminal 113 is a terminal for supplying the voltage V2 to the switched capacitor circuit 20. The output terminal 113 is connected to the external connection terminal 101c of the tracker circuit 1A.

[0133] The output terminal 114 is an output terminal of the voltage V1. In other words, the output terminal 114 is a terminal for supplying the voltage V1 to the switched capacitor circuit 20. The output terminal 114 is connected to the external connection terminal 101d of the tracker circuit 1A.

[0134] The inductor connection terminal 115 is connected to one end of the power inductor L71 , and the inductor connection terminal 116 is connected to the other end of the power inductor L71 .

[0135] The switch S71 is connected between the input terminal 110 and one end of the power inductor L71. Specifically, the switch S71 has a terminal connected to the input terminal 110 and a terminal connected to one end of the power inductor L71 via the inductor connection terminal 115. In this connection structure, the switch S71 can switch the connection and non-connection between the input terminal 110 and one end of the power inductor L71 by switching on / off.

[0136] The switch S72 is connected between one end of the power inductor L71 and the ground line. Specifically, the switch S72 has a terminal connected to one end of the power inductor L71 via the inductor connection terminal 115, and a terminal connected to the ground line. In this connection structure, the switch S72 can switch the connection and non-connection between one end of the power inductor L71 and the ground line by switching on / off.

[0137] The switch S61 is connected between the other end of the power inductor L71 and the output terminal 111. Specifically, the switch S61 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116, and a terminal connected to the output terminal 111. In this connection structure, the switch S61 can switch the connection and non-connection between the other end of the power inductor L71 and the output terminal 111 by switching on / off.

[0138] The switch S62 is connected between the other end of the power inductor L71 and the output terminal 112. Specifically, the switch S62 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116, and a terminal connected to the output terminal 112. In this connection structure, the switch S62 can switch the connection and non-connection between the other end of the power inductor L71 and the output terminal 112 by switching on / off.

[0139] The switch S63 is connected between the other end of the power inductor L71 and the output terminal 113. Specifically, the switch S63 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116, and a terminal connected to the output terminal 113. In this connection structure, the switch S63 can switch the connection and non-connection between the other end of the power inductor L71 and the output terminal 113 by switching on / off.

[0140] One of the two electrodes of the capacitor C61 is connected to the switch S61 and the output terminal 111. The other of the two electrodes of the capacitor C61 is connected to the switch S62, the output terminal 112, and one of the two electrodes of the capacitor C62.

[0141] One of the two electrodes of the capacitor C62 is connected to the switch S62, the output terminal 112, and the other of the two electrodes of the capacitor C61, and the other of the two electrodes of the capacitor C62 is connected to the path connecting the switch S63, the output terminal 113, and one of the two electrodes of the capacitor C63.

[0142] One of the two electrodes of the capacitor C63 is connected to the switch S63, the output terminal 113, and the other of the two electrodes of the capacitor C62. The other of the two electrodes of the capacitor C63 is connected to the output terminal 114 and one of the two electrodes of the capacitor C64.

[0143] One of the two electrodes of the capacitor C64 is connected to the output terminal 114 and the other of the two electrodes of the capacitor C63. The other of the two electrodes of the capacitor C64 is connected to the ground.

[0144] The switches S61 to S63 are controlled to be exclusively turned on. In other words, only one of the switches S61 to S63 is turned on, and the remaining switches of the switches S61 to S63 are turned off. By turning on only one of the switches S61 to S63, the pre-regulator circuit 11 can change the voltage supplied to the switched capacitor circuit 20 to the voltage level of the voltage V2 to V4.

[0145] The pre-regulator circuit 11 configured in this manner can supply electric charge to the switched capacitor circuit 20 via at least one of the output terminals 111 to 113 .

[0146] Furthermore, when the input voltage is converted into a regulated voltage, the pre-regulator circuit 11 only needs to include at least switches S71 and S72, a power inductor L71, an input terminal 110, and any one of output terminals 111 to 114. In this case, the external connection terminals 101a to 101d of the tracker circuit 1A may be replaced with one external connection terminal.

[0147] [1.2.4 Circuit structure of filter circuit 41]

[0148] Next, a description will be given of a circuit configuration of the filter circuit 41. The filter circuit 41 includes an input terminal 140, an output terminal 141, an inductor L51, a capacitor C51, and a switch S55.

[0149] The input terminal 140 is connected to the output terminal 130 of the output switch circuit 31 outside the filter circuit 41 , and is connected to the output terminal 141 inside the filter circuit 41 .

[0150] The output terminal 141 is connected to the external connection terminal 102 of the tracker circuit 1A outside the filter circuit 41 , and is connected to the input terminal 140 inside the filter circuit 41 .

[0151] The inductor L51 and the capacitor C51 form an RC series circuit, which is connected between the path connecting the input terminal 140 and the output terminal 141 and the ground line via the switch S55. In the present embodiment, the inductor L51 is connected between the switch S55 and the capacitor C51. Specifically, one end of the switch S55 is connected to the input terminal 140 and the output terminal 141, and the other end of the switch S55 is connected to the inductor L51. One end of the inductor L51 is connected to the switch S55, and the other end of the inductor L51 is connected to the capacitor C51. One end of the capacitor C51 is connected to the inductor L51, and the other end of the capacitor C51 is connected to the ground line.

[0152] In the switch S55 connected in this way, the switch S55 is switched on / off based on the control signal S4. For example, the switch S55 is controlled on / off as follows. (1) When the high frequency signal RF A If the channel bandwidth (that is, the modulation bandwidth) is greater than the threshold width, the switch S55 is opened (disconnected). As a result, the inductor L51 and the capacitor C51 are disconnected from the voltage supply path. At this time, the power supply voltage V is supplied to the power amplifier 2A via the external connection terminal 102. DET1 , but the filter circuit 41 does not function as a band-stop filter (also called a notch filter) in the voltage supply path. (2) If the high-frequency signal RF A If the channel bandwidth is less than the threshold width, the switch S55 is closed (turned on). As a result, the inductor L51 and the capacitor C51 are connected to the voltage supply path in a shunt manner. At this time, the power supply voltage V is supplied to the power amplifier 2A via the external connection terminal 102. DET1 , the filter circuit 41 acts as a band-stop filter on the voltage supply path.

[0153] As the threshold width used for controlling the switch S55, a value (eg, 100 MHz, etc.) predetermined through experiments and / or experience can be used.

[0154] As the stop band of the filter circuit 41, a frequency band depending on the threshold width is realized. For example, when 100 MHz is used as the threshold width and 0.5 is used as the predetermined coefficient, the stop band of the filter circuit 41 includes a frequency (50 MHz) obtained by multiplying the threshold width value (100 MHz) by the predetermined coefficient (0.5). Thus, the filter circuit 41 can reduce the noise component near 50 MHz on the voltage supply path. As a result, the high frequency signal RF can be suppressed in the power amplifier 2A. A The IMD between the MOSFET and the noise (50 MHz component) can reduce the adjacent channel leakage power (ACP: Adjacent Channel leakage Power) in the power amplifier 2A.

[0155] The stop band is defined as a frequency band having an insertion loss of 20 dB or more. Therefore, the stop band of the filter circuit 41 can be determined by measuring the power loss between the input terminal 140 and the output terminal 141 of the filter circuit 41 and detecting the frequency band where the measured loss is 20 dB or more.

[0156] also, Figure 3 The structure of the filter circuit 41 shown is an example and is not limited thereto. For example, the filter circuit 41 may not include the switch S55. For another example, the switch S55 may be connected between the capacitor C51 and the ground line.

[0157] For example, when the power amplifier 2A selectively amplifies transmission signals of a plurality of frequency bands, the switch S55 may be controlled to be turned on / off according to the frequency band of the amplified transmission signal.

[0158] [1.2.5 Circuit structure of digital control circuit 60]

[0159] Next, the circuit structure of the digital control circuit 60 included in the tracker circuit 1A will be described. Figure 4 As shown, the digital control circuit 60 includes a first controller 61 , a second controller 62 , capacitors C81 and C82 , and control terminals 601 to 604 .

[0160] The first controller 61 can generate control signals S2 and S4 by processing the source synchronous digital control signal received from the RFIC5 via the control terminals 601 and 602. The control signal S2 is a signal for controlling the on / off of switches S11 to S14, S21 to S24, S31 to S34, and S41 to S44 included in the switch capacitor circuit 20. The control signal S4 is a signal for controlling the on / off of the switch S55 included in the filter circuit 41.

[0161] In addition, the digital control signal processed in the first controller 61 is not limited to the source synchronous digital control signal. For example, the first controller 61 may also process the clock embedded digital control signal. In addition, the first controller 61 may also generate a control signal for controlling the output switch circuit 31.

[0162] In addition, although in this embodiment, a set of clock signals and data signals are used as digital control signals for the pre-regulator circuit 11, the switched capacitor circuit 20, and the filter circuit 41, the present invention is not limited thereto. For example, a set of clock signals and data signals may be used separately as digital control signals for the pre-regulator circuit 11, the switched capacitor circuit 20, and the filter circuit 41.

[0163] The second controller 62 processes the digital control logic (DCL: Digital Control Logic / Line) signals (DCL1, DCL2) received from the RFIC5 via the control terminals 603 and 604 to generate the control signal S3. The DCL signals (DCL1, DCL2) are generated based on the envelope signal of the high-frequency signal, etc., by the RFIC5. The control signal S3 is a signal for controlling the on / off of the switches S51 to S54 included in the output switch circuit 31.

[0164] The DCL signals (DCL1, DCL2) are each a one-bit signal. Voltages V1 to V4 are represented by a combination of two one-bit signals. For example, V1, V2, V3, and V4 are represented by "00", "01", "10", and "11", respectively. Gray code can also be used to express voltage levels.

[0165] The capacitor C81 is connected between the first controller 61 and the ground line. For example, the capacitor C81 is connected between a power supply line for supplying power to the first controller 61 and the ground line, and functions as a bypass capacitor. The capacitor C82 is connected between the second controller 62 and the ground line.

[0166] In addition, although two digital control logic signals are used to control the output switch circuit 31 in the present embodiment, the number of digital control logic signals is not limited thereto. For example, one or more than three digital control logic signals may be used according to the number of voltage levels that can be selected by each output switch circuit 31. In addition, the digital control signal used to control the output switch circuit 31 is not limited to the digital control logic signal.

[0167] [1.3 Tracking method]

[0168] Next, refer to Figure 5 A method of supplying a plurality of discrete voltages, that is, a tracking method in the communication device 7A configured as described above will be described. Figure 5 This is a flowchart showing the tracking method according to the present embodiment.

[0169] also, Figure 5 This is an illustrative flowchart, and the tracking method is not limited to Figure 5 Therefore, the description of the tracking method provided below should not be interpreted in a limiting sense.

[0170] For example, RFIC5 determines whether high-frequency communication uses frequency band A (S101). Here, if it is determined that frequency band A is used (S101: Yes), the pre-regulator circuit 11 converts the input voltage into an adjustment voltage (S103). Here, the input voltage is converted into a fixed voltage. The switch capacitor circuit 20 generates a plurality of discrete voltages based on the adjustment voltage (S105). The output switch circuit 31 generates a plurality of discrete voltages based on the high-frequency signal RF A The envelope of the high frequency signal RF is selectively output to the power amplifier 2A (S107). A The envelope of the power supply voltage V changes with time to multiple discrete levels DET1 The power amplifier 2A uses a power supply voltage of V DET1 , amplify the high frequency signal RF A (S109) Thus, the power amplifier 2A can amplify the high frequency signal RF in the digital ET mode. A .

[0171] On the other hand, when it is determined that the frequency band A is not used (S101: No), it is determined whether the high-frequency communication uses the frequency band B (S111). Here, when it is determined that the frequency band B is not used (S111: No), the processing is directly terminated. On the other hand, when it is determined that the frequency band B is used (S111: Yes), the pre-regulator circuit 11 converts the input voltage into an adjustment voltage and outputs it to the power amplifier 2B (S113). Here, the input voltage is converted into an adjustment voltage that changes to a plurality of discrete levels in frame units according to the average power, for example. The power amplifier 2B uses the power supply voltage V APT1 , amplify the high frequency signal RF B (S115) Thus, the power amplifier 2B can amplify the high frequency signal RF in the APT mode. B .

[0172] [1.4 Example of installation of tracker circuit 1A]

[0173] Next, as an example of installing the tracker circuit 1A configured as above, refer to Figure 6 to Figure 8 The tracker module 100 will be described.

[0174] Figure 6 1 is a top view of tracker module 100 according to the present embodiment. Figure 7 1 is a plan view of the tracker module 100 according to the present embodiment, and is a view showing the main surface 90 b side of the module substrate 90 as viewed from the positive side along the z-axis. Figure 8 2 is a cross-sectional view of tracker module 100 according to the present embodiment. Figure 8 The cross sections of the tracker module 100 are Figure 6 as well as Figure 7 Section on line VIII-VIII.

[0175] In addition, Figure 6 to Figure 8 In FIG. 9 , a portion of wiring that connects a plurality of circuit components disposed on the module substrate 90 is omitted from illustration. Figure 6 as well as Figure 7 In the figure, the resin member 91 covering the plurality of circuit components and the surface shielding electrode layer 92 covering the resin member 91 are omitted. Figure 6 In FIG. 1 , shaded blocks represent arbitrary circuit components that are not essential to the present invention.

[0176] Tracker module 100 has Figure 3 as well as Figure 4 The illustrated switched capacitor circuit 20 , output switch circuit 31 , filter circuit 41 , and digital control circuit 60 include multiple circuit components of active elements and passive elements, and further include a module substrate 90 , a resin component 91 , a shielding electrode layer 92 , and multiple electrodes 150 .

[0177] The module substrate 90 has main surfaces 90a and 90b facing each other. A ground electrode layer 90e and the like are formed in the module substrate 90 and on the main surface 90a. Figure 6 as well as Figure 7 In the embodiment, the module substrate 90 has a rectangular shape in a plan view, but is not limited to this shape.

[0178] As the module substrate 90, for example, a low temperature co-fired ceramic (LTCC: Low Temperature Co-fired Ceramics) substrate or a high temperature co-fired ceramic (HTCC: High Temperature Co-fired Ceramics) substrate having a stacked structure of multiple dielectric layers, a component-embedded substrate, a substrate having a redistribution layer (RDL: Redistribution Layer), or a printed circuit substrate can be used, but it is not limited to these substrates.

[0179] The integrated circuit 80 , capacitors C10 to C16 , C20 , C30 , C40 , C51 , C81 , and C82 , an inductor L51 , and a resin member 91 are arranged on the main surface 90 a .

[0180] The integrated circuit 80 includes an SC switch section 80b, an OS switch section 80c, and a filter switch section 80d. The SC switch section 80b includes switches S11 to S14, S21 to S24, S31 to S34, and S41 to S44. The OS switch section 80c includes switches S51 to S54. The filter switch section 80d includes a switch S55.

[0181] In addition, although Figure 6 In the embodiment, the SC switch section 80b, the OS switch section 80c, and the filter switch section 80d are included in a single integrated circuit 80, but the present invention is not limited thereto. For example, the SC switch section 80b may be included in one integrated circuit, and the OS switch section 80c and the filter switch section 80d may be included in another integrated circuit. For another example, the SC switch section 80b, the OS switch section 80c, and the filter switch section 80d may be independently included in three integrated circuits.

[0182] In addition, although Figure 6 In the embodiment, the integrated circuit 80 has a rectangular shape in a plan view of the module substrate 90 , but is not limited to this shape.

[0183] The integrated circuit 80 can be formed using, for example, CMOS (Complementary Metal Oxide Semiconductor), and specifically, can be manufactured by an SOI (Silicon on Insulator) process. The integrated circuit 80 is not limited to CMOS.

[0184] Capacitors C10 to C16, C20, C30, C40, C51, C81, and C82 are mounted as chip capacitors. A chip capacitor refers to a surface mount device (SMD: Surface Mount Device) constituting a capacitor. In addition, the mounting of multiple capacitors is not limited to chip capacitors. For example, a part or all of the multiple capacitors may be included in an integrated passive device (IPD: Integrated Passive Device), or may be included in an integrated circuit 80.

[0185] The inductor L51 is mounted as a chip inductor. A chip inductor refers to an SMD that constitutes an inductor. In addition, the mounting of the inductor L51 is not limited to a chip inductor. For example, the inductor L51 may also be included in an IPD.

[0186] The plurality of capacitors and inductors arranged on the main surface 90 a are grouped by circuit and arranged around the integrated circuit 80 .

[0187] When the module substrate 90 is viewed from above, the group of capacitors C10 to C16, C20, C30, and C40 included in the switched capacitor circuit 20 is arranged in an area on the main surface 90a sandwiched between a straight line along the upper side of the integrated circuit 80 and a straight line along the upper side of the module substrate 90, and an area on the main surface 90a sandwiched between a straight line along the right side of the integrated circuit 80 and a straight line along the right side of the module substrate 90. Thus, the group of circuit components included in the switched capacitor circuit 20 is arranged near the SC switch section 80b in the integrated circuit 80. In other words, the SC switch section 80b is arranged at a position closer to the switched capacitor circuit 20 than the OS switch section 80c.

[0188] In a plan view of the module substrate 90, the group of capacitors C51 and inductors L51 included in the filter circuit 41 is arranged in a region on the main surface 90a sandwiched between a straight line along the lower side of the integrated circuit 80 and a straight line along the lower side of the module substrate 90. Thus, the group of circuit components included in the filter circuit 41 is arranged near the filter switch section 80d in the integrated circuit 80. In other words, the filter switch section 80d is arranged at a position closer to the capacitor C51 and inductor L51 of the filter circuit 41 than the SC switch section 80b.

[0189] A plurality of electrodes 150 are arranged on the main surface 90b. A portion of the plurality of electrodes 150 is used as Figure 2 The external connection terminals 101a to 101d and 102 shown play a role. The plurality of electrodes 150 are electrically connected to the plurality of electronic components arranged on the main surface 90a via through-hole conductors formed in the module substrate 90. Copper electrodes can be used as the plurality of electrodes 150, but are not limited thereto. For example, solder electrodes can also be used as the plurality of electrodes.

[0190] Resin member 91 covers main surface 90a and at least a portion of the plurality of electronic components on main surface 90a. Resin member 91 has a function of ensuring reliability such as mechanical strength and moisture resistance of the plurality of electronic components on main surface 90a. In addition, resin member 91 may not be included in tracker module 100.

[0191] The shielding electrode layer 92 is, for example, a metal thin film formed by a sputtering method. The shielding electrode layer 92 is formed to cover the surface (top and side) of the resin member 91. The shielding electrode layer 92 is connected to the ground line to suppress the intrusion of external noise into the electronic components constituting the tracker module 100, and the noise generated in the tracker module 100 from interfering with other modules or other devices. In addition, the shielding electrode layer 92 may not be included in the tracker module 100.

[0192] also, Figure 6 to Figure 8 The structure of the tracker module 100 shown is an example and is not limited thereto. For example, a part of the capacitor and the inductor arranged on the main surface 90a may be formed in the module substrate 90. In addition, a part of the capacitor and the inductor arranged on the main surface 90a may not be included in the tracker module 100, and may not be arranged on the module substrate 90.

[0193] [1.5 Example of Configuration of Modules in Communication Device 7A]

[0194] Next, refer to Fig. 9 An example of implementing the communication device 7A will be described. Fig. 9 FIG. 7 is a diagram showing the configuration of modules in the communication device 7A of the present embodiment. Fig. 9 In order to easily understand the configuration relationship of each module, each module is given an abbreviation indicating its function (such as "PA"); however, the actual modules do not need to be given such an abbreviation.

[0195] A tracker module 100 (DET) including a tracker circuit 1A, PA modules ( PA1 and PA2 ) including power amplifiers 2A and 2B, RFIC 5 , and a PR module (PR) including a pre-regulator circuit 11 are arranged on a mother substrate 1000 .

[0196] The filter 3A may be included in the PA module (PA1) including the power amplifier 2A, and the filter 3B may be included in the PA module (PA2) including the power amplifier 2B.

[0197] When the mother substrate 1000 is viewed from above, the tracker module 100 (DET) is arranged between the PR module (PR) and the PA module (PA1) including the power amplifier 2A. Furthermore, the tracker module 100 (DET) is arranged near the PA module (PA1) including the power amplifier 2A. In other words, when the mother substrate 1000 is viewed from above, the distance D1 between the tracker module 100 (DET) and the PA module (PA1) including the power amplifier 2A is shorter than the distance D2 between the tracker module 100 (DET) and the PA module (PA2) including the power amplifier 2B. In other words, the distance between the switch capacitor circuit 20 and the power amplifier 2A is shorter than the distance between the switch capacitor circuit 20 and the power amplifier 2B.

[0198] Antenna 6A (ANT1) is disposed on the upper side of motherboard 1000, near PA module (PA1) including power amplifier 2A. Antenna 6B (ANT2) is disposed on the lower side of motherboard 1000, near PA module (PA2) including power amplifier 2B.

[0199] [1.6 Effects, etc.]

[0200] As described above, the tracker circuit 1A of the present embodiment is a tracker circuit 1A connected to a pre-regulator circuit 11 configured to convert an input voltage into an adjustment voltage, and comprises: a switching capacitor circuit 20 configured to generate a plurality of discrete voltages based on the adjustment voltage; and an output switching circuit 31 configured to selectively output at least one of the plurality of discrete voltages to a power amplifier 2A, the pre-regulator circuit 11 configured to output the adjustment voltage to the switching capacitor circuit 20, and to output the adjustment voltage to the power amplifier 2B without passing through the switching capacitor circuit 20.

[0201] According to other viewpoints, the tracker circuit 1A of this embodiment comprises: external connection terminals 101a~101d, connected to the pre-regulator circuit 11 including the power inductor L71; external connection terminal 102, connected to the power amplifier 2A; switching capacitor circuit 20, including input terminals 120a~120d and output terminals 121~124 connected to the external connection terminals 101a~101d; and output switch circuit 31, including input terminals 131~134 respectively connected to the output terminals 121~124 and output terminal 130 connected to the external connection terminal 102, and the pre-regulator circuit 11 is further connected to the power amplifier 2B without passing through the switching capacitor circuit 20 and the output switch circuit 31.

[0202] According to this, a plurality of discrete voltages can be supplied from the tracker circuit 1A to the power amplifier 2A, and the adjustment voltage can be directly supplied from the pre-regulator circuit 11 to the power amplifier 2B. Therefore, since a plurality of discrete voltages are supplied to the power amplifier 2A, the level of the power supply voltage can be discretely changed according to the high-frequency signal, and the power added efficiency can be improved. On the other hand, in the power amplifier 2B, since the adjustment voltage is supplied without passing through the tracker circuit 1A, the loss in the tracker circuit 1A can be reduced, and the power added efficiency can be improved.

[0203] For example, in the tracker circuit 1A of the present embodiment, the power amplifier 2A may be configured to operate in the digital ET mode, and the power amplifier 2B may be configured to operate in the APT mode.

[0204] According to this, in the power amplifier 2A, the power added efficiency can be improved by using the digital ET mode, and in the power amplifier 2B, the power added efficiency can be improved by using the APT mode.

[0205] In addition, for example, in the tracker circuit 1A of the present embodiment, the power amplifier 2A may be configured to amplify the transmission signal of the frequency band A within the range of 3300 to 5000 MHz, and the power amplifier 2B may be configured to amplify the transmission signal of the frequency band B within the range of 1427 to 2690 MHz or the range of 698 to 960 MHz.

[0206] According to this, the digital ET mode can be used in the frequency band of the ultra-high frequency group that allows a higher maximum output power, and the power added efficiency can be improved more effectively.

[0207] For example, in the tracker circuit 1A of the present embodiment, the distance D1 between the switched capacitor circuit 20 and the power amplifier 2A may be shorter than the distance D2 between the switched capacitor circuit 20 and the power amplifier 2B.

[0208] This allows the power amplifier 2A to be disposed near the switched capacitor circuit 20. Therefore, the voltage supply path from the switched capacitor circuit 20 to the power amplifier 2A can be shortened, and degradation of the power supply voltage can be suppressed.

[0209] For example, in the tracker circuit 1A of the present embodiment, the pre-regulator circuit 11, the switched capacitor circuit 20 and the power amplifier 2A may be arranged on the same mother substrate 1000, or the switched capacitor circuit 20 may be arranged between the pre-regulator circuit 11 and the power amplifier 2A when the mother substrate 1000 is viewed from above.

[0210] This makes it possible to shorten the voltage supply path from the pre-regulator circuit 11 to the power amplifier 2A via the switched capacitor circuit 20 , thereby suppressing the degradation of the power supply voltage.

[0211] Furthermore, the high frequency communication system (communication device 7A) of the present embodiment includes a tracker circuit 1A, a pre-regulator circuit 11, a power amplifier 2A, and a power amplifier 2B.

[0212] According to this, the same effect as that of the above-mentioned tracker circuit 1A can be achieved in the high-frequency communication system.

[0213] In addition, the tracking method of this embodiment uses power inductor L71 to convert the input voltage into an adjustment voltage, generates multiple discrete voltages based on the adjustment voltage, and selectively supplies at least one of the multiple discrete voltages to the power amplifier 2A, skips the generation of multiple discrete voltages, and supplies the adjustment voltage to the power amplifier 2B.

[0214] According to this, at least one of the plurality of discrete voltages can be selectively supplied to the power amplifier 2A, and the generation of the plurality of discrete voltages can be skipped and the adjustment voltage can be supplied to the power amplifier 2B. Therefore, when the adjustment voltage is supplied to the power amplifier 2B, the degradation of the adjustment voltage caused by the generation of the plurality of discrete voltages can be suppressed, and the power added efficiency can be improved.

[0215] For example, in the tracking method of this embodiment, the power amplifier 2A may be configured to amplify the high-frequency signal RF in the frequency band A in the digital ET mode. A The power amplifier 2B can also be configured to amplify the high frequency signal RF of the frequency band B in the APT mode. B , when the communication uses frequency band A, it is also possible to convert the input voltage, generate multiple discrete voltages, and selectively supply multiple discrete voltages to the power amplifier 2A. It is also possible to convert the input voltage and supply the adjustment voltage to the power amplifier 2B and skip the generation of multiple discrete voltages when the communication uses frequency band B.

[0216] According to this, when the digital ET mode and the APT mode are switched according to the frequency band used for communication, it is possible to suppress the degradation of the power supply voltage in the APT mode, and to improve the power added efficiency.

[0217] (Implementation Method 2)

[0218] Next, Embodiment 2 will be described. The tracker circuit 1B of this embodiment is different from the tracker circuit 1A of Embodiment 1 mainly in that it can be selectively connected to a plurality of pre-regulator circuits. Fig.10The tracker circuit 1B of this embodiment will be described mainly focusing on the differences from the tracker circuit 1A of the first embodiment. Fig.10 It is a circuit configuration diagram of the communication device 7B according to the present embodiment.

[0219] also, Fig.10 The circuit configuration is illustrative, and the communication device 7B and the tracker circuit 1B can be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 7B and the tracker circuit 1B provided below should not be interpreted in a limiting sense.

[0220] [2.1 Circuit Configuration of Communication Device 7B]

[0221] First, refer to Fig.10 The communication device 7B of the present embodiment is described below. The communication device 7B includes a tracker circuit 1B, power amplifiers 2A to 2C, filters 3A to 3C, an RFIC 5 , antennas 6A to 6C, pre-conditioner circuits 11 and 12 , and a DC power supply 50 .

[0222] The pre-regulator circuit 12 is an example of the third converter circuit and the second pre-regulator circuit, and is configured to convert the input voltage into an adjustment voltage (an example of the second adjustment voltage). Moreover, the pre-regulator circuit 12 can output the adjustment voltage to the switched capacitor circuit 20, and can also output the adjustment voltage to the power amplifier 2C without passing through the switched capacitor circuit 20.

[0223] The power amplifier 2C is an example of a third power amplifier, and is connected between the RFIC5 and the filter 3C. The power amplifier 2C is connected to the pre-regulator circuit 12, and can receive the power supply voltage V based on the APT mode. APT2 The power amplifier 2C can use the power supply voltage V received from the pre-regulator circuit 12. APT2 , amplifies the high frequency signal RF of band C received from RFIC5 C In other words, the power amplifier 2C can operate in the APT mode.

[0224] The filter 3C is connected between the power amplifier 2C and the antenna 6C. The filter 3C is a bandpass filter having a passband including the transmission frequency band of the frequency band C. In addition, the filter 3C may not be included in the communication device 7B.

[0225] Band C is the same as bands A and B, and is a frequency band used for a communication system constructed using RAT, and is predefined by a standardization organization, etc. In addition, band C is an example of a third frequency band, and in this embodiment, it is included in the mid-high frequency group (1427-2690 MHz) or the low frequency group (698-960 MHz). In addition, band C is not limited to a frequency band included in the mid-high frequency group or the low frequency group.

[0226] The antenna 6C outputs a transmission signal of the frequency band C input from the power amplifier 2C via the filter 3C. The antenna 6C may not be included in the communication device 7B.

[0227] [2.2 Circuit structure of tracker circuit 1B]

[0228] Next, refer to Fig.10 as well as Figure 3 The circuit configuration of the tracker circuit 1B will be described.

[0229] The tracker circuit 1B includes a switched capacitor circuit 20 , an output switch circuit 31 , a filter circuit 41 , a digital control circuit 60 , an input switch circuit 70 , and external connection terminals 101 to 103 .

[0230] The external connection terminal 101 is an example of a first external connection terminal, and is connected to the pre-regulator circuit 11 outside the tracker circuit 1B, and is connected to the input switch circuit 70 inside the tracker circuit 1B.

[0231] The external connection terminal 103 is an example of a third external connection terminal, and is a terminal representing a plurality of external connection terminals, similarly to the external connection terminal 101. The external connection terminal 103 is connected to the pre-regulator circuit 12 outside the tracker circuit 1B, and is connected to the input switch circuit 70 inside the tracker circuit 1B. The external connection terminal 103 is a terminal for receiving a regulation voltage (an example of a second regulation voltage) from the pre-regulator circuit 12.

[0232] The input switch circuit 70 is configured to switch the connection of the switched capacitor circuit 20 between the pre-regulator circuits 11 and 12. For example, the input switch circuit 70 can be configured as a SPDT (Single-Pole Double-Throw) type switch circuit. Specifically, the input switch circuit 70 includes switches S76 and S77.

[0233] The switch S76 is an example of a first switch, and is connected between the external connection terminal 101 and the input terminal of the switched capacitor circuit 20. In other words, one end of the switch S76 is connected to the external connection terminal 101, and the other end of the switch S76 is connected to the input terminal of the switched capacitor circuit 20.

[0234] The switch S77 is an example of a second switch, and is connected between the external connection terminal 103 and the input terminal of the switched capacitor circuit 20. In other words, one end of the switch S77 is connected to the external connection terminal 103, and the other end of the switch S77 is connected to the input terminal of the switched capacitor circuit 20.

[0235] [2.3 Effects, etc.]

[0236] As described above, the tracker circuit 1B of this embodiment may also be connected to a pre-regulator circuit 12 configured to convert an input voltage into an adjustment voltage, the switched capacitor circuit 20 may be configured to further generate a plurality of discrete voltages based on the adjustment voltage, the pre-regulator circuit 12 may be configured to output the adjustment voltage to the switched capacitor circuit 20, and output the adjustment voltage to the power amplifier 2C without passing through the switched capacitor circuit 20, and the tracker circuit 1B may also include an input switch circuit 70 configured to switch the connection of the switched capacitor circuit 20 between the pre-regulator circuits 11 and 12.

[0237] According to other viewpoints, the tracker circuit 1B of this embodiment may also include: an external connection terminal 103, which is connected to a pre-regulator circuit 12 including a power inductor L71; a switch S76, which is connected between the external connection terminal 101 and the input terminal 120; and a switch S77, which is connected between the external connection terminal 103 and the input terminal 120. The pre-regulator circuit 12 may also be further connected to the power amplifier 2C without passing through the switch capacitor circuit 20 and the output switch circuit 31.

[0238] According to this, since the connection of the switched capacitor circuit 20 can be switched between the pre-regulator circuits 11 and 12, the power amplifiers 2B and 2C can be switched so as to operate simultaneously with the power amplifier 2A supplied with the power supply voltage from the tracker circuit 1B. In other words, when the pre-regulator circuit 11 is connected to the switched capacitor circuit 20, the power supply voltage can be supplied to the power amplifiers 2A and 2C at the same time, and when the pre-regulator circuit 12 is connected to the switched capacitor circuit 20, the power supply voltage can be supplied to the power amplifiers 2A and 2B at the same time.

[0239] For example, in the tracker circuit 1B of the present embodiment, the power amplifier 2C may be configured to operate in the APT mode.

[0240] According to this, in the power amplifier 2C, the power added efficiency can be improved by using the APT mode.

[0241] For example, in the tracker circuit 1B of the present embodiment, the power amplifier 2C may be configured to amplify a transmission signal in a frequency band C included in a range of 1427 to 2690 MHz or a range of 698 to 960 MHz.

[0242] According to this, the digital ET mode can be used in the frequency band of the ultra-high frequency group that allows a higher maximum output power, and the power added efficiency can be improved more effectively.

[0243] (Implementation 3)

[0244] Next, Embodiment 3 will be described. The tracker circuit 1C of this embodiment differs from the tracker circuit 1A of Embodiment 1 mainly in that it includes a plurality of output switch circuits and can supply different power supply voltages to a plurality of power amplifiers at the same time. Fig.11 This embodiment will be described mainly focusing on the points different from the first and second embodiments. Fig.11 It is a circuit configuration diagram of a communication device 7C according to this embodiment.

[0245] also, Fig.11 The circuit configurations are illustrative, and the communication device 7C and the tracker circuit 1C can be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 7C and the tracker circuit 1C provided below should not be interpreted in a limiting sense.

[0246] [3.1 Circuit Structure of Communication Device 7C]

[0247] First, refer to Fig.11 The communication device 7C of the present embodiment is described below. The communication device 7C includes a tracker circuit 1C, power amplifiers 2A, 2B, and 2D, filters 3A, 3B, and 3D, an RFIC 5 , antennas 6A, 6B, and 6D, a pre-conditioner circuit 11 , and a DC power supply 50 .

[0248] The power amplifier 2D is an example of a fourth power amplifier, and is connected between the RFIC5 and the filter 3D. The power amplifier 2D is connected to the tracker circuit 1C and can receive a power supply voltage V based on the digital ET mode. DET2 The power amplifier 2D can use the power supply voltage V received from the tracker circuit 1C. DET2 , amplifies the high frequency signal RF of band D received from RFIC5 D In other words, the power amplifier 2D can operate in the digital ET mode.

[0249] The filter 3D is connected between the power amplifier 2D and the antenna 6D. The filter 3D is a bandpass filter having a passband including a transmission frequency band of the frequency band D. In addition, the filter 3D may not be included in the communication device 7C.

[0250] Band D is the same as bands A to C, and is a frequency band used for a communication system constructed using RAT, and is predefined by a standardization organization, etc. In addition, band D is an example of a fourth frequency band, and in this embodiment, is included in the ultra-high frequency group (3300 to 5000 MHz). In addition, band D is not limited to the frequency band included in the ultra-high frequency group.

[0251] The antenna 6D outputs a transmission signal in the frequency band D input from the power amplifier 2D via the filter 3D. The antenna 6D may not be included in the communication device 7C.

[0252] [3.2 Circuit structure of tracker circuit 1C]

[0253] Next, refer to Fig.11 as well as Figure 3 The circuit structure of the tracker circuit 1C will be described.

[0254] The tracker circuit 1C includes a switched capacitor circuit 20 , output switch circuits 31 and 32 , filter circuits 41 and 42 , a digital control circuit 60 , and external connection terminals 101 , 102 , and 104 .

[0255] The external connection terminal 104 is an example of a fourth external connection terminal, and is a terminal representing a plurality of external connection terminals, similar to the external connection terminal 101. The external connection terminal 104 is connected to the power amplifier 2D outside the tracker circuit 1C, and is connected to the filter circuit 42 inside the tracker circuit 1C. The external connection terminal 104 is used to supply the power supply voltage V DET2 Terminals.

[0256] The output switch circuit 32 is an example of a second output switch circuit, and is configured to selectively output at least one of the plurality of discrete voltages generated by the switch capacitor circuit 20 to the power amplifier 2D. In other words, the output switch circuit 32 can select at least one voltage from the plurality of discrete voltages and output the selected at least one voltage to the power amplifier 2D. At this time, the output switch circuit 32 can change the level of the voltage output to the power amplifier 2D discretely over time by repeatedly selecting operations. Such an output switch circuit 32 has the same circuit structure as the output switch circuit 31, and is controlled based on a digital control signal.

[0257] The filter circuit 42 is connected between the output switch circuit 32 and the power amplifier 2D, and is configured to attenuate noise components from the signal (a plurality of discrete voltages) from the output switch circuit 32. Such a filter circuit 42 has the same circuit configuration as the filter circuit 41.

[0258] [3.3 Effects, etc.]

[0259] As described above, the tracker circuit 1C of the present embodiment may further include the output switch circuit 32 configured to selectively output at least one of the plurality of discrete voltages to the power amplifier 2D.

[0260] From another point of view, the tracker circuit 1C of this embodiment may also include: an external connection terminal 104 connected to the power amplifier 2D; and an output switching circuit 32, including input terminals 131~134 connected to the output terminals 121~124 respectively and an output terminal 130 connected to the external connection terminal 104.

[0261] According to this, since the tracker circuit 1C includes the output switch circuits 31 and 32, the tracker circuit 1C can simultaneously supply different power supply voltages V to the two power amplifiers 2A and 2D. DET1 and V DET2 In this case, the pre-regulator circuit 11 and the switched capacitor circuit 20 can be shared by the two power amplifiers 2A and 2D, which can contribute to a reduction in the number of components and a reduction in size of the communication device 7C.

[0262] For example, in the tracker circuit 1C of the present embodiment, the power amplifier 2D may be configured to operate in the digital ET mode.

[0263] According to this, in the power amplifier 2D, the power added efficiency can be improved by using the digital ET mode.

[0264] For example, in the tracker circuit 1C of the present embodiment, the power amplifier 2D may be configured to amplify a transmission signal in a frequency band D within a range of 3300 to 5000 MHz.

[0265] According to this, the digital ET mode can be used in the frequency band of the ultra-high frequency group that allows a higher maximum output power, and the power added efficiency can be improved more effectively.

[0266] (Other Embodiments)

[0267] The tracker circuit, high frequency communication system, and tracking method of the present invention are described above based on the embodiments, but the tracker circuit, high frequency communication system, and tracking method of the present invention are not limited to the above embodiments. Other embodiments implemented by combining any of the constituent elements in the above embodiments, modified examples obtained by implementing various modifications that can be conceived by those skilled in the art to the above embodiments within the scope of the present invention, and various devices in which the above tracker circuit is built-in are also included in the present invention.

[0268] For example, in the circuit configurations of the various circuits of the above-described embodiments, other circuit elements and wirings may be inserted between the paths connecting the various circuit elements and signal paths disclosed in the drawings. For example, an impedance matching circuit may be inserted between the power amplifier 2A and the filter 3A.

[0269] In addition, in each of the above embodiments, a plurality of discrete voltages are supplied from the switched capacitor circuit to the output switch circuit, but the present invention is not limited thereto. For example, a plurality of voltages may be supplied from a plurality of DCDC converters to the output switch circuit. In addition, when the voltage levels of the plurality of discrete voltages are equally spaced, it is preferred to use a switched capacitor circuit, which is effective for miniaturization of the tracker module.

[0270] In addition, in each of the above embodiments, four discrete voltages are supplied to the power amplifier, but the number of discrete voltages is not limited to 4. For example, as long as the plurality of discrete voltages include at least a voltage corresponding to the maximum output power and a voltage corresponding to the output power with the highest generation frequency, the power added efficiency can be improved.

[0271] In the first embodiment, the plurality of circuit components of the tracker circuit 1A are arranged on the main surface 90a of the module substrate 90, but they may be arranged on both the main surfaces 90a and 90b. In this case, for example, the integrated circuit 80 may be arranged on the main surface 90b.

[0272] In the third embodiment, a single tracker circuit supplies a power supply voltage based on the digital ET mode to a plurality of power amplifiers. However, a plurality of tracker circuits may be used to supply a power supply voltage based on the digital ET mode to a plurality of power amplifiers. Fig.12 As shown, the communication device 7D may include two tracker circuits 1A, power amplifiers 2A to 2E, and two pre-regulator circuits 11. In this case, both tracker circuits 1A can supply the power supply voltage V to the power amplifier 2D. DET2 Therefore, the power supply voltage can be supplied simultaneously according to the following combination. (1) Tracker circuit 1A (1) supplies a high frequency signal RF for amplifying frequency band A to power amplifier 2A. A The power supply voltage V DET1 The tracker circuit 1A (2) supplies a high frequency signal RF for amplifying the frequency band D to the power amplifier 2D. D The power supply voltage V DET2 Thus, the power amplifiers 2A and 2D can be operated in the digital ET mode at the same time. In other words, the power added efficiency can be improved when transmitting in the frequency bands A and D at the same time. (2) Tracker circuit 1A (1) supplies a high frequency signal RF for amplifying the frequency band A to power amplifier 2A. A The power supply voltage V DET1The tracker circuit 1A (2) supplies a high frequency signal RF for amplifying the frequency band E to the power amplifier 2E. E The power supply voltage V DET3 Thus, the power amplifiers 2A and 2E can be operated in the digital ET mode at the same time. In other words, the power added efficiency can be improved when transmitting in the frequency bands A and E at the same time. (3) The tracker circuit 1A (1) supplies the high frequency signal RF for amplifying the frequency band A to the power amplifier 2A. A The power supply voltage V DET1 The pre-conditioner circuit 11 (2) supplies a high frequency signal RF for amplifying the frequency band C to the power amplifier 2C. C The power supply voltage V APT2 Thus, the power amplifier 2A can be operated in the digital ET mode and the power amplifier 2C can be operated in the APT mode at the same time. In other words, the power added efficiency can be improved when transmitting in the frequency bands A and C at the same time. (4) The tracker circuit 1A (1) supplies the high frequency signal RF for amplifying the frequency band D to the power amplifier 2D. D The power supply voltage V DET2 The tracker circuit 1A (2) supplies a high frequency signal RF for amplifying the frequency band E to the power amplifier 2E. E The power supply voltage V DET3 Thus, the power amplifiers 2D and 2E can be operated in the digital ET mode at the same time. In other words, the power added efficiency can be improved when transmitting in the frequency bands D and E at the same time. (5) The tracker circuit 1A (1) supplies the high frequency signal RF for amplifying the frequency band D to the power amplifier 2D. D The power supply voltage V DET2 The pre-conditioner circuit 11 (2) supplies a high frequency signal RF for amplifying the frequency band C to the power amplifier 2C. C The power supply voltage V APT2 Thus, the power amplifier 2D can be operated in the digital ET mode and the power amplifier 2C can be operated in the APT mode at the same time. In other words, the power added efficiency can be improved when transmitting in the frequency bands C and D at the same time. (6) The pre-regulator circuit 11 (1) supplies the high-frequency signal RF for amplifying the frequency band B to the power amplifier 2B. B The power supply voltage V APT1 The tracker circuit 1A (2) supplies a high frequency signal RF for amplifying the frequency band D to the power amplifier 2D. D The power supply voltage V DET2Thus, the power amplifier 2B can be operated in the APT mode and the power amplifier 2D can be operated in the digital ET mode at the same time. In other words, the power added efficiency can be improved when transmitting in the frequency bands B and D at the same time. (7) The pre-regulator circuit 11 (1) supplies the high-frequency signal RF for amplifying the frequency band B to the power amplifier 2B. B The power supply voltage V APT1 The tracker circuit 1A (2) supplies a high frequency signal RF for amplifying the frequency band E to the power amplifier 2E. E The power supply voltage V DET3 Thus, the power amplifier 2B can be operated in the APT mode and the power amplifier 2E can be operated in the digital ET mode at the same time. In other words, the power added efficiency can be improved when transmitting in the frequency bands B and E at the same time. (8) The pre-regulator circuit 11 (1) supplies the high-frequency signal RF for amplifying the frequency band B to the power amplifier 2B. B The power supply voltage V APT1 The pre-conditioner circuit 11 (2) supplies a high frequency signal RF for amplifying the frequency band C to the power amplifier 2C. C The power supply voltage V APT2 Thus, the power amplifiers 2B and 2C can be operated in the APT mode at the same time. In other words, the power added efficiency can be improved when transmitting in the frequency bands B and C at the same time.

[0273] Features of the tracker circuit, high-frequency communication system, and tracking method described based on the above-mentioned embodiments are shown below.

[0274] <1> A tracker circuit connected to a first converter circuit configured to convert an input voltage into a first adjustment voltage, comprising:

[0275] A second converter circuit is configured to generate a plurality of discrete voltages based on the first adjustment voltage; and

[0276] The first output switch circuit is configured to selectively output at least one of the plurality of discrete voltages to the first power amplifier.

[0277] The first converter circuit is configured to output the first regulated voltage to the second converter circuit, and to output the first regulated voltage to the second power amplifier without passing through the second converter circuit.

[0278] <2> According to the tracker circuit described in <1>,

[0279] The first power amplifier is configured to operate in a digital envelope tracking mode.

[0280] The second power amplifier is configured to operate in an average power tracking mode.

[0281] <3> According to the tracker circuit described in <2>,

[0282] The first power amplifier is configured to amplify a transmission signal in a first frequency band within a range of 3300 to 5000 MHz.

[0283] The second power amplifier is configured to amplify a transmission signal in a second frequency band included in a range of 1427 to 2690 MHz or a range of 698 to 960 MHz.

[0284] <4> A tracker circuit according to any one of <1> to <3>,

[0285] A distance between the second converter circuit and the first power amplifier is shorter than a distance between the second converter circuit and the second power amplifier.

[0286] <5> A tracker circuit according to any one of <1> to <4>,

[0287] The first converter circuit, the second converter circuit and the first power amplifier are arranged on the same substrate.

[0288] The second converter circuit is arranged between the first converter circuit and the first power amplifier in a plan view of the substrate.

[0289] <6> A tracker circuit according to any one of <1> to <5>,

[0290] The tracker circuit is further connected to a third converter circuit configured to convert the input voltage into a second regulated voltage.

[0291] The second converter circuit is further configured to generate the plurality of discrete voltages based on the second adjustment voltage.

[0292] The third converter circuit is configured to output the second adjusted voltage to the second converter circuit, and output the second adjusted voltage to the third power amplifier without passing through the second converter circuit.

[0293] The tracker circuit further includes an input switch circuit configured to switch connection of the second converter circuit between the first converter circuit and the third converter circuit.

[0294] <7> According to the tracker circuit described in <6>,

[0295] The third power amplifier is configured to operate in an average power tracking mode.

[0296] <8> According to the tracker circuit described in <7>,

[0297] The third power amplifier is configured to amplify a transmission signal in a third frequency band included in a range of 1427 to 2690 MHz or a range of 698 to 960 MHz.

[0298] <9> A tracker circuit according to any one of <1> to <8>,

[0299] The tracker circuit further includes a second output switch circuit configured to selectively output at least one of the plurality of discrete voltages to a fourth power amplifier.

[0300] <10> According to the tracker circuit described in <9>,

[0301] The fourth power amplifier is configured to operate in a digital envelope tracking mode.

[0302] <11> According to the tracker circuit described in <10>,

[0303] The fourth power amplifier is configured to amplify a transmission signal in a fourth frequency band within a range of 3300 to 5000 MHz.

[0304] <12> A high frequency communication system comprising:

[0305] A tracker circuit as described in any one of <1> to <11>;

[0306] the first converter circuit mentioned above;

[0307] The first power amplifier; and

[0308] The second power amplifier mentioned above.

[0309] <13> A tracker circuit comprising:

[0310] a first external connection terminal connected to a first pre-regulator circuit including a first power inductor;

[0311] A second external connection terminal connected to the first power amplifier;

[0312] a switched capacitor circuit, comprising a first input terminal connected to the first external connection terminal and a plurality of first output terminals; and

[0313] The first output switch circuit includes a plurality of second input terminals respectively connected to the plurality of first output terminals and a second output terminal connected to the second external connection terminal.

[0314] The first pre-regulator circuit is further connected to a second power amplifier without passing through the switched capacitor circuit and the first output switch circuit.

[0315] <14> According to the tracker circuit described in <13>,

[0316] A distance between the switched capacitor circuit and the first power amplifier is shorter than a distance between the switched capacitor circuit and the second power amplifier.

[0317] <15> According to the tracker circuit described in <13> or <14>,

[0318] The first pre-regulator circuit, the switched capacitor circuit and the first power amplifier are arranged on the same substrate.

[0319] The switched capacitor circuit is disposed between the first pre-regulator circuit and the first power amplifier in a plan view of the substrate.

[0320] <16> A tracker circuit according to any one of <13> to <15>,

[0321] The above tracker circuit also has:

[0322] a third external connection terminal connected to a second pre-regulator circuit including a second power inductor;

[0323] A first switch connected between the first external connection terminal and the first input terminal; and

[0324] A second switch is connected between the third external connection terminal and the first input terminal.

[0325] The second pre-regulator circuit is further connected to a third power amplifier without passing through the switched capacitor circuit and the first output switch circuit.

[0326] <17> A tracker circuit according to any one of <13> to <16>,

[0327] The above tracker circuit also has:

[0328] a fourth external connection terminal connected to a fourth power amplifier; and

[0329] The second output switch circuit includes a plurality of third input terminals respectively connected to the plurality of first output terminals and a third output terminal connected to the fourth external connection terminal.

[0330] <18> A high frequency communication system comprising:

[0331] A tracker circuit as described in any one of <13> to <17>;

[0332] the first pre-regulator circuit mentioned above;

[0333] The first power amplifier; and

[0334] The second power amplifier mentioned above.

[0335] <19>A tracking method,

[0336] The input voltage is converted to a regulated voltage using a power inductor,

[0337] Based on the above adjustment voltage, a plurality of discrete voltages are generated.

[0338] selectively supplying at least one of the plurality of discrete voltages to the first power amplifier,

[0339] The generation of the plurality of discrete voltages is skipped, and the adjustment voltage is supplied to the second power amplifier.

[0340] <20> Based on the tracking method described in <19>,

[0341] The first power amplifier is configured to amplify a first high frequency signal in a first frequency band in a digital envelope tracking mode.

[0342] The second power amplifier is configured to amplify the second high frequency signal in the second frequency band in an average power tracking mode.

[0343] When the communication uses the first frequency band, the input voltage is converted, the plurality of discrete voltages are generated, and the plurality of discrete voltages are selectively supplied to the first power amplifier.

[0344] When the second frequency band is used for communication, the input voltage is converted and the adjustment voltage is supplied to the second power amplifier, and generation of the plurality of discrete voltages is skipped.

[0345] The present invention can be widely used in communication devices such as mobile phones as a tracker circuit for supplying voltage to a power amplifier.

[0346] Description of Reference Numerals

[0347] 1A, 1B, 1C…tracker circuit, 2A, 2B, 2C, 2D, 2E…power amplifier, 3A, 3B, 3C, 3D…filter, 5…RFIC, 6A, 6B, 6C, 6D…antenna, 7A, 7B, 7C, 7D…communication device, 11, 12…pre-regulator circuit, 20…switched capacitor circuit, 31, 32…output switch circuit, 41, 42…filter circuit, 50…DC power supply, 60…digital control circuit, 61…first controller, 62…second controller, 80…integrated circuit, 80b…SC switch section, 80c…OS switch section, 80d…filter switch section , 90…module substrate, 90a, 90b…main surface, 90e…ground electrode layer, 91…resin component, 92…shielding electrode layer, 100…tracker module, 101, 101a, 101b, 101c, 101d, 102, 103, 104…external connection terminal, 110, 120a, 120b, 120c, 120d, 131, 132, 133, 134…input terminal, 111, 112, 113, 114, 121, 122, 123, 124, 130…output terminal, 150…electrode, 601, 602, 603, 604…control terminal.

Claims

1. A tracker circuit connected to a first converter circuit configured to convert an input voltage into a first adjustment voltage, wherein: have: A second converter circuit is configured to generate a plurality of discrete voltages based on the first adjustment voltage; and The first output switch circuit is configured to selectively output at least one of the plurality of discrete voltages to the first power amplifier. The first converter circuit is configured to output the first regulated voltage to the second converter circuit, and to output the first regulated voltage to the second power amplifier without passing through the second converter circuit.

2. The tracker circuit according to claim 1, wherein: The first power amplifier is configured to operate in a digital envelope tracking mode. The second power amplifier is configured to operate in an average power tracking mode.

3. The tracker circuit of claim 2, wherein: The first power amplifier is configured to amplify a transmission signal in a first frequency band within a range of 3300 to 5000 MHz. The second power amplifier is configured to amplify a transmission signal in a second frequency band included in a range of 1427 to 2690 MHz or a range of 698 to 960 MHz.

4. The tracker circuit according to any one of claims 1 to 3, wherein: A distance between the second converter circuit and the first power amplifier is shorter than a distance between the second converter circuit and the second power amplifier.

5. The tracker circuit according to any one of claims 1 to 4, wherein: The first converter circuit, the second converter circuit and the first power amplifier are arranged on the same substrate. The second converter circuit is arranged between the first converter circuit and the first power amplifier in a plan view of the substrate.

6. The tracker circuit according to any one of claims 1 to 5, wherein: The tracker circuit is further connected to a third converter circuit, the third converter circuit being configured to convert the input voltage into a second adjustment voltage. The second converter circuit is further configured to generate the plurality of discrete voltages based on the second adjustment voltage. The third converter circuit is configured to output the second adjusted voltage to the second converter circuit, and output the second adjusted voltage to the third power amplifier without passing through the second converter circuit. The tracker circuit further includes an input switch circuit configured to switch connection of the second converter circuit between the first converter circuit and the third converter circuit.

7. The tracker circuit of claim 6, wherein: The third power amplifier is configured to operate in an average power tracking mode.

8. The tracker circuit of claim 7, wherein: The third power amplifier is configured to amplify a transmission signal in a third frequency band included in a range of 1427 to 2690 MHz or a range of 698 to 960 MHz.

9. The tracker circuit according to any one of claims 1 to 8, wherein: The tracker circuit further includes a second output switch circuit configured to selectively output at least one voltage among the plurality of discrete voltages to a fourth power amplifier.

10. The tracker circuit of claim 9, wherein: The fourth power amplifier is configured to operate in a digital envelope tracking mode.

11. The tracker circuit of claim 10, wherein: The fourth power amplifier is configured to amplify a transmission signal in a fourth frequency band within a range of 3300 to 5000 MHz.

12. A high frequency communication system, wherein: have: The tracker circuit according to any one of claims 1 to 11; the first converter circuit mentioned above; The first power amplifier; and The second power amplifier mentioned above.

13. A tracker circuit, wherein: have: a first external connection terminal connected to a first pre-regulator circuit including a first power inductor; A second external connection terminal connected to the first power amplifier; a switched capacitor circuit, comprising a first input terminal connected to the first external connection terminal and a plurality of first output terminals; as well as The first output switch circuit includes a plurality of second input terminals respectively connected to the plurality of first output terminals and a second output terminal connected to the second external connection terminal. The first pre-regulator circuit is further connected to a second power amplifier without passing through the switched capacitor circuit and the first output switch circuit.

14. The tracker circuit of claim 13, wherein: A distance between the switched capacitor circuit and the first power amplifier is shorter than a distance between the switched capacitor circuit and the second power amplifier.

15. The tracker circuit according to claim 13 or 14, wherein: The first pre-regulator circuit, the switched capacitor circuit and the first power amplifier are arranged on the same substrate. The switched capacitor circuit is disposed between the first pre-regulator circuit and the first power amplifier in a plan view of the substrate.

16. The tracker circuit according to any one of claims 13 to 15, wherein: The above tracker circuit also has: a third external connection terminal connected to a second pre-regulator circuit including a second power inductor; A first switch connected between the first external connection terminal and the first input terminal; as well as A second switch is connected between the third external connection terminal and the first input terminal. The second pre-regulator circuit is further connected to a third power amplifier without passing through the switched capacitor circuit and the first output switch circuit.

17. The tracker circuit according to any one of claims 13 to 16, wherein: The above tracker circuit also has: a fourth external connection terminal connected to a fourth power amplifier; and The second output switch circuit includes a plurality of third input terminals respectively connected to the plurality of first output terminals and a third output terminal connected to the fourth external connection terminal.

18. A high frequency communication system, wherein: have: The tracker circuit according to any one of claims 13 to 17; the first pre-regulator circuit mentioned above; The first power amplifier; and The second power amplifier mentioned above.

19. A tracking method, wherein: The input voltage is converted to a regulated voltage using a power inductor, Based on the above adjustment voltage, a plurality of discrete voltages are generated. selectively supplying at least one of the plurality of discrete voltages to a first power amplifier, The generation of the plurality of discrete voltages is skipped, and the adjustment voltage is supplied to the second power amplifier.

20. The tracking method according to claim 19, wherein: The first power amplifier is configured to amplify a first high frequency signal in a first frequency band in a digital envelope tracking mode. The second power amplifier is configured to amplify the second high frequency signal in the second frequency band in an average power tracking mode. When the communication uses the first frequency band, the input voltage is converted, the plurality of discrete voltages are generated, and the plurality of discrete voltages are selectively supplied to the first power amplifier. When the second frequency band is used for communication, the input voltage is converted and the adjustment voltage is supplied to the second power amplifier, and generation of the plurality of discrete voltages is skipped.

Images