Temperature sensor and zero intermediate frequency receiver

Abstract

The invention provides a temperature sensor and a zero intermediate frequency receiver, the temperature sensor comprises a current supply module, a signal processing module and a temperature correlation module, the current supply module provides a first current, and the signal processing module performs multiple mirror image processing on the first current to obtain a temperature correlation module; when temperature correlation is carried out, a triode in the temperature correlation module is used for establishing a mapping relation among the second current, the temperature and the first voltage, and the temperature correlation module is used for carrying out temperature correlation on the temperature and the first voltage; and determining a second voltage associated with the temperature according to the first current and the mapping relation. According to the temperature sensor provided by the invention, a current source with a specific temperature coefficient does not need to be provided, the second current capable of neglecting the temperature coefficient can be provided by using the sub-threshold region of the field effect transistor, the temperature sensor can work, the output voltage and the temperature are linearly changed based on the working characteristics of the three-pole end, and the real-time detection of the internal temperature in a circuit is realized.

Description

Technical Field

[0001] The present invention relates to the field of analog circuits, and in particular to a temperature sensor and a zero intermediate frequency receiver. Background Art

[0002] Due to the continuous evolution of communication protocols, humans use high-frequency signals more and more frequently. With the continuous advancement of integrated circuit technology, high-integrated circuits that can integrate radio frequency circuits, digital circuits, and analog circuits are used in various fields. In practical applications, the operating temperature of integrated circuits affects the operating performance of the circuit during operation. However, in actual work, the actual temperature of the corresponding high-integrated circuit cannot be directly monitored by monitoring the external or internal temperature of the equipment, so it is impossible to provide temperature compensation for the relevant circuit according to the actual temperature of the circuit, which reduces the performance of the circuit.

[0003] For example, RFSOC (Radio Frequency System-on-Chip) can process high-frequency signals, and its main functions include: receiving, transmitting, mixing, filtering, etc. According to integrated circuit rules, temperature will have a significant impact on the sensitivity and frequency stability of the transceiver link; however, as a whole, there will be a large gap between the internal temperature of the chip and the external ambient temperature of the chip during operation, and it is impossible to avoid the impact of temperature on the transceiver link by directly monitoring the ambient temperature.

[0004] Therefore, how to provide a temperature sensor circuit that can be easily integrated into a circuit system is a technical problem that urgently needs to be solved. Summary of the invention

[0005] In view of the above-mentioned shortcomings of the prior art, the present invention provides a technical solution of a temperature sensor to solve at least one of the above-mentioned technical problems.

[0006] In order to achieve the above-mentioned purpose and other related purposes, the technical solution provided by this application is as follows.

[0007] According to a first aspect of an embodiment of the present application, a temperature sensor is provided, including:

[0008] A current supply module, used for providing a first current;

[0009] a signal processing module connected to the current supply module, performing multiple mirror processing on the first current, and adjusting the magnitude of the mirror processed current according to the subthreshold state of the field effect transistor in the signal processing module to obtain a second current;

[0010] a temperature association module, connected to the current supply module and the signal processing module, using the working characteristics of the transistor in the temperature association module to establish a mapping relationship among the second current, the temperature, and the first voltage, and determining a second voltage according to the first current and the mapping relationship, so as to reflect the temperature of the related circuit through the second voltage;

[0011] The first voltage is the voltage between the emitter and the base of the transistor.

[0012] In one embodiment of the present invention, the current supply module includes a first NMOS tube, a second NMOS tube, a first PMOS tube and a first resistor, the gate of the first NMOS tube is connected to the gate of the second NMOS tube via the first resistor, the source of the first PMOS tube is connected to a power supply voltage, the gate of the first PMOS tube is connected to the drain of the first PMOS tube, the drain of the first PMOS tube is connected to the drain of the second NMOS tube, the source of the first NMOS tube is connected to the source of the second NMOS tube, and the source of the second NMOS tube is grounded, wherein the drain of the first NMOS tube is connected to a reference current, and the second NMOS tube and the first PMOS tube generate the first current.

[0013] In one embodiment of the present invention, the signal processing module includes a mirror processing unit, a drive control unit and an adjustment unit. The mirror processing unit is connected to the current supply module, performs multiple mirror processing on the first current to obtain two transition currents, the drive control unit is connected to the current supply module, converts the first current into a drive voltage, and the adjustment unit is connected to the mirror processing unit and the drive control unit, and converts the two transition currents into the second current according to the drive voltage.

[0014] In one embodiment of the present invention, the mirror processing unit includes a second PMOS tube, a third PMOS tube, a fourth PMOS tube, a fifth PMOS tube and a third NMOS tube, the source of the second PMOS tube is connected to the power supply voltage, the gate of the second PMOS tube is connected to the gate of the third PMOS tube, the gate of the second PMOS tube is also connected to the drain of the fifth PMOS tube, the drain of the second PMOS tube is connected to the source of the fifth PMOS tube, the drain of the fifth PMOS tube is connected to the drain of the third NMOS tube, the source of the third NMOS tube is grounded, the source of the third PMOS tube is connected to the source of the second PMOS tube, the source of the fourth PMOS tube is connected to the source of the second PMOS tube, and the gate of the fourth PMOS tube is connected to the gate of the second PMOS tube, wherein the gate of the fifth PMOS tube and the gate of the third NMOS tube are connected to the current supply module, and the drain of the third PMOS tube and the drain of the fourth PMOS tube output the transition current.

[0015] In one embodiment of the present invention, the driving voltage includes a first driving voltage and a second driving voltage, the driving control unit includes a sixth PMOS tube, a seventh PMOS tube, a fourth NMOS tube and a fifth NMOS tube, the gate of the sixth PMOS tube is connected to the power supply voltage, the gate of the fourth NMOS tube is grounded, the source of the sixth PMOS tube is connected to the drain of the fourth NMOS tube, the drain of the sixth PMOS tube is connected to the source of the fourth NMOS tube, the gate of the seventh PMOS tube is grounded, the gate of the fifth NMOS tube is connected to the power supply voltage, the source of the seventh PMOS tube is connected to the drain of the fifth NMOS tube, the drain of the seventh PMOS tube is connected to the source of the fifth NMOS tube, and the drain of the sixth PMOS tube is connected to the drain of the seventh PMOS tube, wherein the drain of the sixth PMOS tube is connected to the current supply module, the drain of the fourth NMOS tube outputs the first driving voltage, and the drain of the fifth NMOS tube outputs the second driving voltage.

[0016] In one embodiment of the present invention, the regulating unit includes a sixth NMOS tube, a seventh NMOS tube, an eighth NMOS tube, and a ninth NMOS tube, the gate of the sixth NMOS tube is connected to the gate of the eighth NMOS tube, the drain of the sixth NMOS tube is connected to the drain of the ninth NMOS tube, the source of the sixth NMOS tube is grounded, the gate of the seventh NMOS tube is connected to the gate of the ninth NMOS tube, the drain of the seventh NMOS tube is connected to the drain of the eighth NMOS tube, the source of the seventh NMOS tube is grounded, the gate of the sixth NMOS tube is connected to the gate of the eighth NMOS tube, and the source of the eighth NMOS tube is connected to the source of the ninth NMOS tube, wherein the gate of the eighth NMOS tube and the gate of the ninth NMOS tube are connected to the driving control unit, the drain of the eighth NMOS tube and the drain of the ninth NMOS tube are connected to the mirror processing unit, the gate of the eighth NMOS tube is connected to the first driving voltage, the gate of the ninth NMOS tube is connected to the second driving voltage, and the source of the ninth NMOS tube outputs the second current.

[0017] In one embodiment of the present invention, the temperature association module includes a tenth NMOS tube, an eleventh NMOS tube, a first PNP transistor and a first capacitor, the base of the first PNP transistor and the collector of the first PNP transistor are grounded, the first end of the first capacitor is connected to the emitter of the first PNP transistor, the second end of the first capacitor is grounded, the emitter of the first PNP transistor is also connected to the gate of the tenth NMOS tube, the drain of the tenth NMOS tube is connected to the power supply voltage, the source of the tenth NMOS tube is connected to the drain of the eleventh NMOS tube, and the source of the eleventh NMOS tube is grounded, wherein the emitter of the first PNP transistor inputs the second current, the gate of the eleventh NMOS tube is connected to the current supply module, and the source of the tenth NMOS tube outputs the second voltage.

[0018] According to a second aspect of an embodiment of the present application, a zero intermediate frequency receiver is also provided, wherein the zero intermediate frequency receiver includes the temperature sensor as described above.

[0019] The present application provides a temperature sensor and a zero intermediate frequency receiver, the temperature sensor includes a current supply module, a signal processing module and a temperature association module, the first current is provided by the current supply module, the signal processing module performs multiple mirror processing on the first current, and controls the field effect transistor in the signal processing module to be in a subthreshold state to adjust the magnitude of the current after the mirror processing, and obtain a second current, when associated, the mapping relationship between the second current, temperature and the first voltage is established by using the transistor in the temperature association module, and then the second voltage is determined according to the first current and the mapping relationship, so that the output second voltage is related to the temperature, thereby achieving temperature measurement. The present application provides a temperature sensor, which does not need to provide a current source with a specific temperature coefficient, and can work by using the subthreshold region of the field effect transistor to provide a second current with a negligible temperature coefficient, and based on the working characteristics of the three extremes, the output voltage changes linearly with the temperature, which is convenient for subsequent quantification and realizes real-time detection of the internal temperature in the circuit.

[0020] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present invention, and together with the specification, are used to explain the principles of the present invention. Obviously, the drawings described below are only some embodiments of the present invention, and for those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0022] Figure 1 is a block diagram of a temperature sensor shown in an exemplary embodiment of the present invention;

[0023] Figure 2 is a specific circuit structure of a temperature sensor shown in an exemplary embodiment of the present invention;

[0024] Figure 3 is a schematic diagram of a second current versus temperature curve shown in an exemplary embodiment of the present invention;

[0025] Figure 4 FIG. 4 is a schematic diagram showing a curve of a second voltage varying with temperature according to an exemplary embodiment of the present invention. DETAILED DESCRIPTION

[0026] The following will describe the embodiments of the present invention with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be understood that the preferred embodiments are only for illustrating the present invention, not for limiting the scope of protection of the present invention.

[0027] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and thus the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0028] In the following description, numerous details are discussed to provide a more thorough explanation of the embodiments of the present invention. However, it is obvious to those skilled in the art that the embodiments of the present invention can be implemented without these specific details. In other embodiments, well-known structures and devices are shown in the form of block diagrams rather than in detail to avoid making the embodiments of the present invention difficult to understand.

[0029] RFSOC (Radio Frequency System-on-Chip) is a single-chip solution that integrates components such as RF front-end, ADC (Analog-to-Digital Converter) / DAC (Digital-to-Analog Converter), processor and FPGA (Field Programmable Gate Array). It is widely used in communications, radar, satellite communications and other fields, with high integration, low power consumption and powerful computing capabilities.

[0030] Due to the continuous evolution of communication protocols, humans use high-frequency signals more and more frequently. With the continuous advancement of integrated circuit technology, high-integrated circuits that can integrate radio frequency circuits, digital circuits, and analog circuits are used in various fields. In practical applications, the operating temperature of integrated circuits affects the operating performance of the circuit during operation. However, in actual work, the actual temperature of the corresponding high-integrated circuit cannot be directly monitored by monitoring the external or internal space temperature of the equipment, so it is impossible to provide temperature compensation for the relevant circuit according to the actual temperature of the circuit, which reduces the performance of the circuit.

[0031] For example, RFSOC can process high-frequency signals, and its main functions include receiving, transmitting, mixing, filtering, etc. According to integrated circuit rules, temperature will have a significant impact on the sensitivity and frequency stability of the transceiver link; however, as a whole, there will be a large gap between the internal temperature of the chip and the external ambient temperature of the chip during operation, and it is impossible to avoid the impact of temperature on the transceiver link by directly monitoring the ambient temperature.

[0032] To solve the above problems, Figure 1 As shown, the present application provides a temperature sensor, comprising:

[0033] A current supply module, used to provide a first current I 1 ;

[0034] The signal processing module is connected to the current supply module and processes the first current I 1 Perform multiple mirror processing, and adjust the magnitude of the current after the mirror processing according to the subthreshold state of the field effect transistor in the signal processing module to obtain a second current I 2 ;

[0035] The temperature correlation module is connected to the current supply module and the signal processing module, and uses the working characteristics of the clock transistor of the temperature correlation module to establish the second current I 2 , temperature, first voltage V 1 and the mapping relationship between the first current I 1 and the mapping relationship to determine the second voltage V 2 , through the second voltage V 2 The temperature of the reaction-related circuit;

[0036] Among them, the first voltage V 1 It is the voltage between the emitter and the base of the transistor.

[0037] In detail, Figure 2 As shown, the current supply module includes a first NMOS transistor MN1, a second NMOS transistor MN2, a first PMOS transistor MP1 and a first resistor R1. The gate of the first NMOS transistor MN1 is connected to the gate of the second NMOS transistor MN2 via the first resistor R1. The source of the first PMOS transistor MP1 is connected to the power supply voltage VDD. The gate of the first PMOS transistor MP1 is connected to the drain of the first PMOS transistor MP1. The drain of the first PMOS transistor MP1 is connected to the drain of the second NMOS transistor MN2. The source of the first NMOS transistor MN1 is connected to the source of the second NMOS transistor MN2. The source of the second NMOS transistor MN2 is grounded. The drain of the first NMOS transistor MN1 is connected to the reference current I bias The second NMOS tube MN2 and the first PMOS tube MP1 generate a first current I 1 .

[0038] In more detail, the signal processing module includes a mirror processing unit, a drive control unit and an adjustment unit. The mirror processing unit is connected to the current supply module to process the first current I 1 Perform multiple mirroring processes to obtain two transition currents. The drive control unit is connected to the current supply module to convert the first current I 1The regulating unit is connected to the mirror processing unit and the driving control unit, and converts the two transition currents into the second current I according to the driving voltage. 2 .

[0039] In more detail, Figure 2 As shown, the mirror processing unit includes a second PMOS tube MP2, a third PMOS tube MP3, a fourth PMOS tube MP4, a fifth PMOS tube MP5 and a third NMOS tube MN3, the source of the second PMOS tube MP2 is connected to the power supply voltage VDD, the gate of the second PMOS tube MP2 is connected to the gate of the third PMOS tube MP3, the gate of the second PMOS tube MP2 is also connected to the drain of the fifth PMOS tube MP5, the drain of the second PMOS tube MP2 is connected to the source of the fifth PMOS tube MP5, the drain of the fifth PMOS tube MP5 is connected to the drain of the third NMOS tube MN3, the source of the third NMOS tube MN3 is connected to the drain of the fifth PMOS tube MP5, and the drain of the fifth PMOS tube MP5 is connected to the drain of the third NMOS tube MN3. The third PMOS tube MP3 is connected to the source of the second PMOS tube MP2, the source of the fourth PMOS tube MP4 is connected to the source of the second PMOS tube MP2, the gate of the fourth PMOS tube MP4 is connected to the gate of the second PMOS tube MP2, wherein the gate of the fifth PMOS tube MP5 and the gate of the third NMOS tube MN3 are connected to the current supply module, the gate of the fifth PMOS tube MP5 is connected to the gate of the first PMOS tube MP1, the gate of the third NMOS tube MN3 is connected to the gate of the first NMOS tube MN1, and the drain of the third PMOS tube MP3 and the drain of the fourth PMOS tube MP4 output transition current.

[0040] In detail, Figure 2 As shown, the driving voltage includes a first driving voltage and a second driving voltage, the driving control unit includes a sixth PMOS tube MP6, a seventh PMOS tube MP7, a fourth NMOS tube MN4 and a fifth NMOS tube MN5, the gate of the sixth PMOS tube MP6 is connected to the power supply voltage VDD, the gate of the fourth NMOS tube MN4 is grounded, the source of the sixth PMOS tube MP6 is connected to the drain of the fourth NMOS tube MN4, the drain of the sixth PMOS tube MP6 is connected to the source of the fourth NMOS tube MN4, the gate of the seventh PMOS tube MP7 is grounded, and the fifth NMOS tube MN5 is grounded. The gate of MN5 is connected to the power supply voltage VDD, the source of the seventh PMOS tube MP7 is connected to the drain of the fifth NMOS tube MN5, the drain of the seventh PMOS tube MP7 is connected to the source of the fifth NMOS tube MN5, and the drain of the sixth PMOS tube MP6 is connected to the drain of the seventh PMOS tube MP7, wherein the drain of the sixth PMOS tube MP6 is connected to the current supply module, the drain of the sixth PMOS tube MP6 is connected to the drain of the first PMOS tube, the drain of the fourth NMOS tube MN4 outputs the first driving voltage, and the drain of the fifth NMOS tube MN5 outputs the second driving voltage.

[0041] In detail, Figure 2 As shown, the regulating unit includes a sixth NMOS tube MN6, a seventh NMOS tube MN7, an eighth NMOS tube MN8, and a ninth NMOS tube MN9. The gate of the sixth NMOS tube MN6 is connected to the gate of the eighth NMOS tube MN8, the drain of the sixth NMOS tube MN6 is connected to the drain of the ninth NMOS tube MN9, the source of the sixth NMOS tube MN6 is grounded, the gate of the seventh NMOS tube MN7 is connected to the gate of the ninth NMOS tube MN9, the drain of the seventh NMOS tube MN7 is connected to the drain of the eighth NMOS tube MN8, the source of the seventh NMOS is grounded, the gate of the sixth NMOS tube is connected to the gate of the eighth NMOS tube, the source of the eighth NMOS tube MN8 is connected to the source of the ninth NMOS tube MN9, wherein The gate of the eighth NMOS tube MN8 and the gate of the ninth NMOS tube MN9 are connected to the driving control unit, the drain of the eighth NMOS tube MN8 and the drain of the ninth NMOS tube MN9 are connected to the mirror processing unit, the drain of the eighth NMOS tube MN8 is connected to the drain of the third PMOS tube MN3, the drain of the ninth NMOS tube MN9 is connected to the drain of the fourth PMOS tube MN4, the gate of the eighth NMOS tube MN8 is connected to the first driving voltage, the gate of the eighth NMOS tube MN8 is connected to the drain of the fourth NMOS tube MN8, the gate of the ninth NMOS tube MN9 is connected to the second driving voltage, the gate of the ninth NMOS tube MN9 is connected to the drain of the fifth NMOS tube MN5, and the source of the ninth NMOS tube MN9 outputs the second current I 2 .

[0042] In more detail, Figure 2 As shown, the temperature correlation module includes a tenth NMOS transistor MN10, an eleventh NMOS transistor MN11, a first PNP transistor Q1 and a first capacitor C1, the base of the first PNP transistor Q1 and the collector of the first PNP transistor Q1 are grounded, the first end of the first capacitor C1 is connected to the emitter of the first PNP transistor Q1, the second end of the first capacitor C1 is grounded, the emitter of the first PNP transistor Q1 is also connected to the gate of the tenth NMOS transistor MN10, the drain of the tenth NMOS transistor MN10 is connected to the power supply voltage VDD, and the The source of the tenth NMOS tube MN10 is connected to the drain of the eleventh NMOS tube MN11, and the source of the eleventh NMOS tube MN11 is grounded, wherein the emitter of the first PNP transistor Q1 inputs the second current I2, the emitter of the first PNP transistor Q1 is connected to the source of the ninth PMOS tube MN9, the gate of the eleventh NMOS tube MN11 is connected to the current supply module, the gate of the eleventh NMOS tube MN11 is connected to the gate of the first NMOS tube MN1, and the source of the tenth NMOS tube MN10 outputs the second voltage V2.

[0043] Please refer to Figures 1 to 4 As shown, the working principle of the temperature sensor provided by this application is as follows:

[0044] The input end of the current supply module is connected to a reference current I bias , and the reference current I is copied through the mirror structure of the first NMOS transistor MN1 and the second NMOS transistor MN2 bias to form a first current I on the branch of the first PMOS transistor MP1 and the second NMOS transistor MN2 1 , and the first current I is mirror-copied through the mirror structure of the first PMOS transistor MP1 and the fifth PMOS transistor MP5 in the mirror processing unit 1 , and the current flowing through the branch of the second PMOS transistor MP2 and the fifth PMOS transistor MP5 is equal to the first current I 1 , and mirror processing is performed through the mirror structure of the second PMOS transistor MP2 and the third PMOS transistor MP3 and the mirror structure of the second PMOS transistor MP2 and the fourth PMOS transistor MP4 to copy the current, so that the transition current flowing through the third PMOS transistor MP3 and the fourth PMOS transistor MP4 is equal to the first current I 1 .

[0045] The sixth PMOS transistor MP6 and the fourth NMOS transistor MN4 in the drive control unit are cut off, the seventh PMOS transistor MP7 and the fifth NMOS transistor MN5 operate in the saturation region, the source of the sixth PMOS transistor MP6 outputs a first drive voltage, so that the sixth NMOS transistor MN6 and the eighth NMOS transistor MN8 are cut off; the second drive voltage output by the source of the seventh NMOS transistor MN7, and the second drive voltage makes the seventh NMOS transistor MN7 and the ninth NMOS transistor MN9 operate in the subthreshold region, that is, there is still drain-source current flowing through the seventh NMOS transistor MN7 and the ninth NMOS transistor MN9. The current flowing out of the source of the ninth NMOS transistor MN9 is a second current I 2 , from which it can be seen that the current flowing into the first PNP transistor Q1 only includes the current output by the ninth NMOS transistor MN9. When the drain-source voltage V DS of the ninth NMOS transistor MN9 and the thermal voltage V T meet specific conditions, that is, V DS ≥4V T , the expression of the second current I 2 is as shown in (1):

[0046]

[0047] In the expression (1), μp is the hole mobility, C ox is the gate oxide capacitance per unit area, V T is the thermal voltage (V T =kT / q, k is the Boltzmann constant, T is the absolute temperature, q is the electric charge of an electron), η is the non-ideal factor which is a constant, V THis the threshold voltage of the ninth PMOS tube, V GS is the gate-source voltage, V DS is the drain-source voltage of the ninth PMOS tube, and W / L is the width-to-length ratio of the transistor. From the parameters designed in formula (1), it can be obtained that: I DS The size of will be affected by the temperature coefficient T.

[0048] When the temperature T varies from -40℃ to 85℃, Figure 3 As shown, the current change amount flowing into the first NPN transistor Q1 is within 15μA, relative to the second current I 2 The total current is 500μA, and the change has little impact and can be ignored.

[0049] The base and collector of the first PNP transistor Q1 are grounded, the emitter of the first PNP transistor Q1 is connected to the source of the ninth NMOS transistor MN9, and the sixth NMOS transistor MN6 and the eighth NMOS transistor MN8 are in the cut-off state. The second current I 2 = is the current flowing from the fourth PMOS transistor MP4 to the ninth NMOS transistor MN9, and the emitter current I of the first PNP transistor Q1 can be obtained. E Equal to the second current I 2 , determine the first PNP transistor I E The emitter current is shown in expression (2):

[0050]

[0051] In expression (2), I E is the emitter current of the first PNP transistor Q1, I ES is the emitter saturation current of the first PNP transistor Q1, V 1 is the voltage between the emitter and base of the first PNP transistor Q1, k is the Boltzmann constant, T is the absolute temperature, and q is the charge of the electron.

[0052] Transform expression (2) and replace I E As a variable, V 1 As the output, according to formula (2), we get expression (3):

[0053]

[0054] In expression (3), V 1 is the voltage between the emitter and base of the first PNP transistor Q1, I E is the emitter current of the first PNP transistor Q1, I ES is the emitter saturation current of the first PNP transistor Q1, k is the Boltzmann constant, T is the absolute temperature, and q is the charge of the electron.

[0055] According to expression (3), V 1 The output is mainly related to three variables T, I E and I ES ,However Figure 3 It has been shown that I E The change in the temperature detection range of -40℃-85℃ is very small; although the emitter saturation current is also affected by temperature, it still changes very little within the temperature detection range. 1 In the range of -40℃-85℃, it is mainly directly controlled by the temperature variable T, which can 1 The temperature coefficient T can be regarded as a linear curve with a negative slope.

[0056] The reference current I is copied by the mirror processing structure of the eleventh NMOS transistor MN11 and the first NMOS transistor MN1. bias , the eleventh NMOS tube MN11 provides the tenth NMOS tube M10 with a working current, so that the tenth NMOS tube M10 works in the saturation region, V GSN10 The influence of temperature T is very small and can be ignored. 2 =V 1 -V GSN10 , so V 1 The output directly determines the second voltage V 2 The output, V 2 The trend of temperature T and V 1 The trend of the change with temperature T is consistent, so through the first voltage V 1 The second voltage V 2 Associated with temperature T, such as Figure 4 As shown, the second voltage V 2 The voltage decreases with the temperature change, showing a linear relationship, and can be adjusted by adjusting the second current I 2 The value of the second voltage V 2 The output slope, thereby achieving the second voltage V 2 The output value is used to monitor the temperature of the detection system.

[0057] In a second aspect of the present application, the present application further provides a zero intermediate frequency receiver, wherein the zero intermediate frequency receiver comprises the temperature sensor as described above, so as to monitor the operating temperature of the zero intermediate frequency receiver in real time.

[0058] The present application provides a temperature sensor and a zero intermediate frequency receiver, the temperature sensor includes a current supply module, a signal processing module and a temperature association module, the current supply module provides a first current, the signal processing module performs multiple mirror processing on the first current, and controls the field effect transistor in the signal processing module to be in a subthreshold state, so as to adjust the magnitude of the current after the mirror processing, and obtain a second current, when performing temperature association, the triode in the temperature association module is used to establish a mapping relationship between the second current, temperature and the first voltage, and then the second voltage is determined according to the first current and the mapping relationship, so that the output second voltage is related to the temperature, thereby achieving the purpose of temperature detection. The temperature sensor provided by the present application does not need to provide a current source with a specific temperature coefficient, but only needs to use the subthreshold region characteristics of the field effect transistor to provide a second current with a negligible temperature coefficient, and based on the working characteristics of the triode, the output voltage changes linearly with the temperature, and the slope between the output voltage and the temperature can be controlled by adjusting the magnitude of the second current, which is easy to control and convenient for subsequent quantification, so as to realize real-time detection of the internal temperature in the circuit.

[0059] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A temperature sensor, characterized in that: include: A current supply module, used for providing a first current; a signal processing module connected to the current supply module, performing multiple mirror processing on the first current, and adjusting the magnitude of the mirror processed current according to the subthreshold state of the field effect transistor in the signal processing module to obtain a second current; a temperature association module, connected to the current supply module and the signal processing module, using the working characteristics of the transistor in the temperature association module to establish a mapping relationship among the second current, the temperature, and the first voltage, and determining a second voltage according to the first current and the mapping relationship, so as to reflect the temperature of the related circuit through the second voltage; The first voltage is the voltage between the emitter and the base of the transistor.

2. The temperature sensor according to claim 1, characterized in that: The current supply module includes a first NMOS tube, a second NMOS tube, a first PMOS tube and a first resistor, wherein the gate of the first NMOS tube is connected to the gate of the second NMOS tube via the first resistor, the source of the first PMOS tube is connected to a power supply voltage, the gate of the first PMOS tube is connected to the drain of the first PMOS tube, the drain of the first PMOS tube is connected to the drain of the second NMOS tube, the source of the first NMOS tube is connected to the source of the second NMOS tube, and the source of the second NMOS tube is grounded, wherein the drain of the first NMOS tube is connected to a reference current, and the second NMOS tube and the first PMOS tube generate the first current.

3. The temperature sensor according to claim 2, characterized in that: The signal processing module includes a mirror processing unit, a drive control unit and an adjustment unit. The mirror processing unit is connected to the current supply module, performs multiple mirror processing on the first current to obtain two transition currents, the drive control unit is connected to the current supply module, converts the first current into a drive voltage, and the adjustment unit is connected to the mirror processing unit and the drive control unit, and converts the two transition currents into the second current according to the drive voltage.

4. The temperature sensor according to claim 3, characterized in that: The mirror processing unit includes a second PMOS tube, a third PMOS tube, a fourth PMOS tube, a fifth PMOS tube and a third NMOS tube, the source of the second PMOS tube is connected to the power supply voltage, the gate of the second PMOS tube is connected to the gate of the third PMOS tube, the gate of the second PMOS tube is also connected to the drain of the fifth PMOS tube, the drain of the second PMOS tube is connected to the source of the fifth PMOS tube, the drain of the fifth PMOS tube is connected to the drain of the third NMOS tube, the source of the third NMOS tube is grounded, the source of the third PMOS tube is connected to the source of the second PMOS tube, the source of the fourth PMOS tube is connected to the source of the second PMOS tube, and the gate of the fourth PMOS tube is connected to the gate of the second PMOS tube, wherein the gate of the fifth PMOS tube and the gate of the third NMOS tube are connected to the current supply module, and the drain of the third PMOS tube and the drain of the fourth PMOS tube output the transition current.

5. The temperature sensor according to claim 3, characterized in that: The driving voltage includes a first driving voltage and a second driving voltage. The driving control unit includes a sixth PMOS tube, a seventh PMOS tube, a fourth NMOS tube and a fifth NMOS tube. The gate of the sixth PMOS tube is connected to the power supply voltage, the gate of the fourth NMOS tube is grounded, the source of the sixth PMOS tube is connected to the drain of the fourth NMOS tube, the drain of the sixth PMOS tube is connected to the source of the fourth NMOS tube, the gate of the seventh PMOS tube is grounded, the gate of the fifth NMOS tube is connected to the power supply voltage, the source of the seventh PMOS tube is connected to the drain of the fifth NMOS tube, the drain of the seventh PMOS tube is connected to the source of the fifth NMOS tube, and the drain of the sixth PMOS tube is connected to the drain of the seventh PMOS tube. The drain of the sixth PMOS tube is connected to the current supply module, the drain of the fourth NMOS tube outputs the first driving voltage, and the drain of the fifth NMOS tube outputs the second driving voltage.

6. The temperature sensor according to claim 5, characterized in that: The regulating unit includes a sixth NMOS tube, a seventh NMOS tube, an eighth NMOS tube, and a ninth NMOS tube, wherein the gate of the sixth NMOS tube is connected to the gate of the eighth NMOS tube, the drain of the sixth NMOS tube is connected to the drain of the ninth NMOS tube, the source of the sixth NMOS tube is grounded, the gate of the seventh NMOS tube is connected to the gate of the ninth NMOS tube, the drain of the seventh NMOS tube is connected to the drain of the eighth NMOS tube, the source of the seventh NMOS tube is grounded, the gate of the sixth NMOS tube is connected to the gate of the eighth NMOS tube, and the source of the eighth NMOS tube is connected to the source of the ninth NMOS tube, wherein the gate of the eighth NMOS tube and the gate of the ninth NMOS tube are connected to the driving control unit, the drain of the eighth NMOS tube and the drain of the ninth NMOS tube are connected to the mirror processing unit, the gate of the eighth NMOS tube is connected to the first driving voltage, the gate of the ninth NMOS tube is connected to the second driving voltage, and the source of the ninth NMOS tube outputs the second current.

7. The temperature sensor according to claim 6, characterized in that: The temperature association module includes a tenth NMOS tube, an eleventh NMOS tube, a first PNP transistor and a first capacitor, the base of the first PNP transistor and the collector of the first PNP transistor are grounded, the first end of the first capacitor is connected to the emitter of the first PNP transistor, the second end of the first capacitor is grounded, the emitter of the first PNP transistor is also connected to the gate of the tenth NMOS tube, the drain of the tenth NMOS tube is connected to the power supply voltage, the source of the tenth NMOS tube is connected to the drain of the eleventh NMOS tube, and the source of the eleventh NMOS tube is grounded, wherein the emitter of the first PNP transistor inputs the second current, the gate of the eleventh NMOS tube is connected to the current supply module, and the source of the tenth NMOS tube outputs the second voltage.

8. A zero intermediate frequency receiver, characterized in that: The zero intermediate frequency receiver comprises the temperature sensor according to any one of claims 1-7.

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