Power GaN HEMT switch dynamic current characteristic modeling method

Abstract

The invention discloses a power GaN HEMT switch dynamic current characteristic modeling method, which combines advanced static and recurrent neural network concepts to design an accurate model architecture. The provided model integrates a self-heating effect and is coupled with three different current components: an intrinsic current module of zero-order time differential, a capacitive current module of first-order time differential and a non-ideal current module of high-order time differential, so that a comprehensive GaN HEMT nonlinear dynamic switch output current model is formed. Compared with a traditional model, the method has obvious advantages in multiple indexes such as time-frequency domain precision, time step length precision, calculation efficiency and model generalization ability.

Description

Technical Field

[0001] The invention relates to a method for modeling dynamic current characteristics of a power GaN HEMT switch based on an advanced neural network. Background Art

[0002] GaN HEMT transistor is a heterojunction transistor based on the third-generation semiconductor GaN and its related materials. As a transistor based on wide bandgap semiconductor materials, GaN HEMT has many excellent properties, such as extremely high breakdown voltage, high electron mobility, extremely small reverse recovery charge, and high thermal stability. This has attracted widespread attention in the application of high-frequency and high-power circuits. In the field of power electronics, such as DC-DC circuits, AC-DC circuits, and inverters, switching transistors are key devices for achieving efficient energy conversion. Due to its low on-state resistance, excellent switching speed, and extremely high voltage resistance, GaN HEMT has been widely used in power switching applications with high voltage, high frequency, and high efficiency requirements.

[0003] When designing power electronic circuits, EDA software is needed to simulate and analyze the built circuits. Circuit simulation software relies on the use of analytical function models of devices to quickly and accurately solve device characteristics. Due to the maturity of process and material, GaN HEMT faces complex time-domain dynamic nonlinear characteristics in high-power and high-frequency switching applications. This includes various memory accumulation effects and parasitic effects, which cause GaN HEMT to exhibit complex non-ideal characteristic fluctuations in the time domain relative to the ideal switching output current during the switching process. A large number of previous studies have shown that capacitance effect, self-heating effect, and trap effect-induced dynamic on-resistance effect are the three main reasons for the non-ideal time-domain dynamic characteristics of GaN HEMT. In addition, other parasitic effects, such as parasitic inductance, will also affect the current dynamics. In order to establish an efficient and accurate GaNHEMT time-domain dynamic switching characteristic model, it is necessary to describe these complex physical effects distributed on different time scales and with multiple independent variable influencing factors with analytical functions, as well as the coupling of these physical effects in the final complete model and the description of the superposition of the contribution of each model to the final current.

[0004] The mathematical model description of the device is usually a trade-off between model accuracy and calculation speed. The academic community has conducted many studies on the modeling of the time-domain dynamic characteristics of GaN HEMT. The most important problem is the lack of calculation accuracy in the time-frequency domain. In order to ensure the solution speed, analytical functions with highly approximate characteristics are used to replace the actual analytical solutions of the coupled differential equations generated by the multi-physical coupling mechanism in the transistor. This brings about two aspects of insufficient accuracy. One is the insufficient description accuracy of static nonlinear relationships. The second is the lack of accurate description capabilities for complex dynamic effects with different time scales or time-domain memory ranges.

[0005] GaN HEMT is a high electron mobility transistor based on wide bandgap semiconductors with excellent performance in the RF and power fields. With higher electric field saturation drift velocity, higher thermal conductivity and better high temperature stability, these characteristics make GaN an ideal choice for manufacturing high-performance power semiconductor devices. Power circuit design relies on circuit simulation (EDA) software based on compact device function models. In the field of power applications, GaN faces complex dynamic effects of different nonlinear orders at different time scales and time ranges, which makes the device characteristics deviate from the ideal switching characteristics and significantly affects the performance of power switches. In order to compromise between the computing speed, computing accuracy and generalization performance of the device model, the device models proposed by academia and industry are usually based on the following two ideas. In the modeling of nonlinear effects, it relies on the combination of physical formulas and empirical fitting formulas. In the description of dynamic effects, it relies on a large number of resistance, capacitance and inductance models (such as thermal resistance and heat capacitance of self-heating effects, etc.). These methods have poor nonlinear function description capabilities and usually have serious high-order quantity abandonment (such as the resistance, capacitance and inductance model is essentially a first-order linear differential approximation). Traditional models have obvious errors in long-term accuracy stability and the description of high-frequency high-order nonlinear dynamic characteristics.

[0006] Power GaN HEMTs usually operate in a switching state with extremely high off-state voltage and on-state current. Under this high-stress operating state, serious dynamic non-ideal effects are amplified. The current compact model is gradually unable to meet the accuracy and speed requirements of simulation, showing a large error compared to experimental data. The existing technology has the following defects:

[0007] Poor nonlinear description capability: The existing models are not good at describing the intrinsic characteristics and complex non-ideal nonlinear effects of power GaN HEMTs. Since the physical model can only form a description of the ideal components, and the existing empirical model is not good at describing and generalizing the highly nonlinear components, there are obvious errors between the model description and the actual experimental data in the area where the high-order inflection points of the characteristics appear. This results in a decrease in the description accuracy of the high-order nonlinear area.

[0008] Poor model generalization ability: In order to improve model accuracy, modern models will introduce more empirical fitting formula components. The empirical fitting formula can form a good fitting effect on the values ​​in the training data set, but lacks the ability to truly learn the essential functional relationship, so the degree of fitting of the numerical relationship outside the data set is poor. When the data set range is expanded, the overall accuracy will decrease.

[0009] The description of dynamic effects produces huge errors. The traditional model uses the resistance-capacitance-inductance model to describe the dynamic characteristics of the device. This method retains the first-order time differential linear component in the dynamic time differential component and ignores the higher-order differential component. When faced with the description of complex nonlinear dynamic effects, there are obvious errors relative to experimental data. Summary of the invention

[0010] In order to solve the defects in the prior art, the present invention first discloses a dynamic output current model device based on port dynamic voltage excitation, and its technical solution is as follows:

[0011] Dynamic output current model device based on port dynamic voltage excitation, characterized by: Self-heating module: The key point temperature T predicted by the self-heating module vd ,T vs It will be coupled to the temperature-sensitive current model part as an input variable; the self-heating module describes the dynamic temperature changes of the virtual source and drain under the dynamic output voltage and current at two key points;

[0012] The first current module: It is a static nonlinear current model of the 0th order time differential in the time domain, which describes the static ideal intrinsic current in the current component. This module is based on a two-order modulated neural network model, which describes the static output current under different port power supply excitation conditions under different channel temperature conditions during the switching process in the instantaneous quasi-static state;

[0013] The second current module is a linear time-domain first-order differential module: it describes the contribution of the port intrinsic capacitance to the current under voltage excitation. This module describes the nonlinear relationship between the port capacitance and voltage through a SqueezeNet (compressed neural network). Finally, the contribution of each port intrinsic capacitance to the port current under the port capacitance value corresponding to the current transient voltage is obtained through the IV characteristic relationship of the ideal capacitor.

[0014] The third current module: It is a time high-order voltage differential nonlinear module. It describes the excitation memory effect of high-order nonlinearity through a timing neural network, and summarizes the complex high-order nonlinear memory effects on different time scales, which are manifested in the dynamic on-resistance change law in the open state under different stresses and after use time, as well as the non-ideal current fluctuation in the switching transient.

[0015] Based on the above-mentioned dynamic output current model device based on port dynamic voltage excitation, the present invention also discloses a GaN HEMT dynamic output current model modeling method based on high-order current differential division and advanced neural network, which is characterized by: current module division is performed using the high-order current differential division method, and an advanced neural network modeling method is described for each module.

[0016] The present invention also discloses a non-volatile storage medium, characterized in that the non-volatile storage medium includes a stored program, wherein when the program is running, the device where the non-volatile storage medium is located is controlled to execute the above method.

[0017] The present invention also discloses a terminal device, characterized in that the terminal device includes: a processor, a memory, a communication interface and a bus; the processor, the memory and the communication interface are connected through the bus and complete mutual communication; the memory stores executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, so as to execute the above method.

[0018] Beneficial Effects

[0019] (1) Current component segmentation method based on current differential order: The current components are grouped from a mathematical perspective, and the descriptive advantages of modular neural networks are combined to make the modular blocks have significant mathematical correlation, reduce the complexity of the model architecture, and improve the accuracy of each module.

[0020] (2) The overall architecture of the model is based on the complex coupling of multiple physical mechanisms and current modules: The overall architecture of the model is constructed from the perspective of physical mechanism coupling and current superposition to accurately describe the physical mechanism coupling effect and related current composition process.

[0021] (3) Modular model building method based on advanced neural network: Through the powerful nonlinear function relationship of neural network to describe the relationship, it achieves advantages such as time-frequency domain accuracy, generalized description performance, and computational efficiency that far exceed traditional methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a schematic diagram of the structural framework of the complete characteristic model of the dynamic current of the power GaN HEMT switch of the present invention;

[0023] Figure 2 It is a schematic diagram of the functional structure of the current component block concept of different order time differentials and nonlinear relationships of the present invention;

[0024] Figure 3 It is a schematic diagram of the cross section and the position structure of the virtual source and the virtual drain considered in the GaN HEMT self-heating model of the present invention;

[0025] Figure 4 The overall architecture of the self-heating module based on the feedback neural network in the model components of the present invention; (a) the overall architecture of the self-heating module algorithm; (b) the core neural network structure of the algorithm;

[0026] Figure 5 Schematic diagram of a two-stage modulated intrinsic static current source model in the model module of the present invention; wherein: (a) the model architecture includes a stage 1 room temperature intrinsic current module and a stage 2 temperature modulation module (b) the convolutional network structure of the stage 1 room temperature intrinsic current module (c) the convolutional network structure of the stage 2 temperature modulation module;

[0027] Figure 6 The overall structure diagram of the capacitor current module in the model composition module of the present invention includes a core port CV module and an outer ideal capacitor current module;

[0028] Figure 7 The schematic diagram of the inner port CV model in the model module of the present invention; the port intrinsic capacitance and port voltage modules are described by a unified model, and the SqueezeNet architecture is used for efficient feature extraction to reduce the model scale: (a) The overall architecture of the CV model, the Fire module replaces the convolution module; (b) The schematic diagram of the Fire module structure;

[0029] Figure 8 This is the high-order non-ideal dynamic output current model in the model module of the present invention: (a) the overall architecture of the model at this level (b): the model structure of the LSTM stage (c) the schematic diagram of the internal node connection relationship of the ESN module (d) the schematic diagram of the second stage convolutional network modulation module structure; DETAILED DESCRIPTION

[0030] The technical solution of the present invention is implemented according to the following technical route:

[0031] Temperature characteristics considering self-heating effect

[0032] In order to balance the accuracy and speed of the model, the influence of self-heating effect on temperature characteristics is analyzed in detail.

[0033] Decomposition of current components

[0034] Divide the total current into three parts:

[0035] Zero-order static part (static current component);

[0036] The linear part of the first-order time derivative (capacitive current component);

[0037] High-order time derivative nonlinear part (non-ideal current component);

[0038] Design three physical effect modules

[0039] Three independent modules are designed according to different current components:

[0040] Intrinsic Static Current Module

[0041] Intrinsic Capacitive Current Module

[0042] High-Order Time-Derivative Non-IdealCurrent Module;

[0043] Introducing advanced neural network methods

[0044] Advanced neural network (NN) technology is used to improve the model.

[0045] Modular design and parameter optimization

[0046] Customize the network architecture design and optimize the parameters for each module.

[0047] Propose a high-precision and high-efficiency dynamic output current model

[0048] Based on the above steps, a dynamic output current model suitable for GaN HEMT switching operation is developed with high accuracy and high efficiency.

[0049] 1. Overall architecture:

[0050] The present invention establishes a dynamic output current device based on port dynamic voltage excitation. The device uses the port dynamic input voltage as the device model input (VGS(t): dynamic gate-source port voltage, VDS(t): dynamic drain-source port voltage). Through the mapping operation of the input excitation and the cumulative change of the memory effect state of the internal module, the time domain dynamic current is finally output. The overall device model description relationship is shown in formula (1), and the overall outer layer model of the device is expressed as Figure 1 In the following text, variables are represented by the form of ID(t) to represent time-dynamic variables starting from the initial state, and the symbol (t) represents that the variable has a time-dependent memory characteristic. The form of ID represents the transient variable at this moment.

[0051] ID(t)=f(VGS(t), VDS(t)) (1)

[0052] In order to accurately describe the dynamic effect of the model, the present invention uses Figure 2The time-domain differential relationship of current and voltage shown in the figure is used as the basis for block division, and the device model is divided into blocks for current contribution from the perspective of different time differential orders and nonlinear relationships. The device model is divided into three current contribution parts. At the same time, in order to reflect the influence of channel temperature on current characteristics, the present invention selects two virtual source and drain points in the model as the key positions for current generation based on the viewpoint of GaN HEMT virtual source current generation theory, and predicts the dynamic temperature of the two key positions during operation through the self-heating temperature characteristic module.

[0053] The temperature T between two points predicted by the self-heating model vd ,T vs It is coupled as an input variable to the temperature-sensitive current model part. The self-heating temperature model describes the dynamic temperature change of the virtual source and drain under the dynamic output voltage and current at two key points. The relationship described is shown in formula (2), where ID(t) is derived from the final model output current feedback in the forward current operation of the model. In the formula, T vd ,T vs It refers to the temperature of the virtual source and virtual drain in the channel, f represents the nonlinear dynamic function relationship, VDS(t) and ID(t) refer to the dynamic output current and voltage.

[0054] T vd ,T vs =f(VDS(T),ID(t))(2)

[0055] For the three current component modules, the first partial module is a static nonlinear current model of the 0th order time differential in the time domain. It describes the most important part of the current component, namely the static ideal intrinsic current, corresponding to Figure 1 The intrinsic current source module is based on a two-order modulation neural network model, which describes the static output current under different port power supply excitation conditions under different channel temperature conditions during the switching process in an instantaneous quasi-static state. The model strips away the influence of all dynamic characteristics, and its expression is shown in formula (3): In the formula, ID intrisic is the intrinsic quiescent current of the output, VGS, VDS are the gate-source-drain-source voltages of the transient input at this moment, T vd ,T vs It is the virtual source and virtual drain temperature at this moment.

[0056] ID intrinsic =f(VGS,VDS,T vd ,T vs )(3)

[0057] The second part is the linear time domain first-order differential module: it describes the contribution of the port intrinsic capacitance to the current under voltage excitation, corresponding to Figure 1The port capacitance current module is mainly used to efficiently describe the nonlinear relationship between the port capacitance and voltage through a refined SqueezeNet. Finally, the IV characteristic relationship of the ideal capacitor is used to obtain the contribution of each port's intrinsic capacitance to the port current under the port capacitance value corresponding to the current transient voltage. The relationship described is shown in equations (4) and (5). Where Cgd, Cgs, and Cds are the gate-drain voltage, gate-source voltage, and drain-source voltage, respectively, and VGS and VDS are the gate-source and drain-source voltages input at this moment. capa It is the first-order linear current component contributed by the ideal capacitor.

[0058] (Cgd, Cgs, Cds) = f(VGS, VDS)(4)

[0059]

[0060] The third part is the time high-order voltage differential nonlinear module: This stage describes the excitation memory effect of high-order nonlinearity through a sophisticated time-series neural network, and summarizes the complex high-order nonlinear memory effect on different time scales, which is manifested in the dynamic on-resistance change law in the open state under different stresses and after use time, and the non-ideal current fluctuation in the switching transient. For example, the influence of trap effect and parasitic inductance. Corresponding to Figure 1 Medium and high-order differential non-ideal current module. This device module contains three sub-stages. Through the separate description and high-dimensional feature mapping of switch state stress, long-term and short-term memory of transistor state, and the final non-ideal current output under different VGS and VDS modulation, an accurate description of the sum of high-order non-ideal current components is achieved. The overall description of the model is shown in formula (6), which shows the current components generated by the cumulative effects of various high-order non-idealities under the influence of different voltage and temperature change processes and state accumulation. It is worth mentioning that the solution time step is taken as an input into this level of model. Compared with the traditional first-order linear difference approximation, the method of the present invention can capture the errors caused by high-order differences and significantly reduce the errors caused by increasing the solution time step. In the formula, Idy is the high-order time-differential current contributed by this stage, VDS(t), IDS(t) are the drain-source voltage and drain-source current feedback input at this moment, Tvd(t), Tvs(t) are the virtual source-drain temperatures of the channel at each moment, Δt is the time step used in the calculation, and VGS is the transient gate-source voltage input at this moment.

[0061] I dy =f(VDS(t),IDS(t),T vd (t),T vs (t),Δt,VGS)(6).

[0062] The final output current of the device model is obtained by adding the current contributions of the three parts. Through the accurate description of the dominant component of the intrinsic current of the 0th-order differential relationship, the 1st-order capacitor current, and the high-order current deviation caused by various cumulative non-ideal effects under various switching excitations and channel temperature changes, the accurate total output current is finally obtained. The final current expression is:

[0063]

[0064] Where ID(t) is the total dynamic current of the output, and ID intrisic , I capa , I dy It is the current component contributed by the above three current modules.

[0065] 2. Model module block introduction

[0066] In the above description, it is explained that in the modeling method proposed in this article, the component model blocks within the overall architecture are self-heating temperature modules, and three current model modules: 0-order current component module, 1-order current component module, and high-order nonlinear current module. The construction method and mathematical model of these three modules will be explained in detail below. Please note that the model structure described below is the specific composition of each sub-module in the above architecture, which is the relationship between the whole and the components, not the relationship of parallel models: The logic of the entire patent article: First, the overall model architecture and the component modules of the architecture are introduced, and then the composition of each module is introduced in detail.

[0067] 1) Self-heating temperature module based on feedback variable neural network

[0068] During the switching dynamics of the transistor, due to the differences in the internal electric field and current density distribution, different temperature distributions will exist in the channel. It has been reported that using a single channel temperature to summarize the channel temperature distribution under different switching dynamics to describe the self-heating effect will cause certain errors. This paper proposes a method based on the idea of ​​the famous GaN HEMT MVS current generation theory to select the key positions of the self-heating effect. The temperature dynamic change distribution of the two key points of the virtual source and virtual drain in the process is used as the description of the self-heating effect. Its position is as follows Figure 3 shown.

[0069] We have established a nested feedback temperature model. The inner function model expression (9) describes the relationship between the temperature change rate of the virtual source and drain and the temperature of the two points of the virtual source and drain at this moment and the power characteristics generated by the output current and voltage. The outer model uses the first-order differential approximation of the rate of change, that is, it is considered that the temperature change at the next moment compared to this moment is equal to the first-order differential multiplied by the time step, as shown in formula (10). Finally, the outer model feeds back the final output current of the device and the key point temperature obtained by the model at this time step as feedback variables to the input of the model as the independent variable for the next moment. Its overall network structure is as follows: Figure 4 shown.

[0070]

[0071] For the core inner layer function relationship, we use a standard numerical convolutional neural network to describe it. The network has a fully connected input feature expansion layer and output mapping layer. And a three-layer convolution module for feature extraction and numerical mapping. In the input feature expansion fully connected module, the network performs feature expansion through two layers of fully connected layers, expanding the input features from 4 dimensions to 128 dimensions. It retains a rich high-dimensional variable space for subsequent convolution feature extraction. Its specific structure is as follows Figure 4 (b) as shown.

[0072] 2) Intrinsic current source module based on two-order modulation (time 0th order differential static current component)

[0073] The intrinsic current source is the most dominant module of the current component in the GaN HEMT output IV relationship, reflecting the basic current output relationship of the transistor. This paper regards the intrinsic current source component as the ideal static current component stripped of all dynamic non-ideal components, corresponding to Figure 2 The time 0th order differential quiescent current component.

[0074] This article proposes a two-order modulation model. The first-order model is used to describe the IV characteristic relationship of the output at a standard room temperature of 25°C. Its input variables are only the port drive voltage, VGS, VDS. The output variable is the 25-degree Celsius standard current of the transistor without self-heating effect. The second-order model is a temperature modulation model. In this order model, the model regards the self-heating effect or the actual output current at different operating temperatures as the modulation of the ideal output current at room temperature by temperature. Therefore, the input independent variables of the second-order model are the room temperature output current ID, and two key point temperatures Tvd, Tvs, and the output variable is the actual output current at the corresponding temperature. The overall model architecture is as follows: Figure 5 shown.

[0075] In order to obtain the most efficient feature extraction method, we still use the idea of ​​standard convolutional neural network in the construction of the two-order model. The first-order room temperature intrinsic current module uses a fully connected module with input and output variable dimension transformation and a three-layer convolution module for feature extraction. After optimization, a 128-dimensional variable vector was selected for convolution operation. This paper adopts a funnel convolution kernel distribution strategy, and performs pooling downsampling and increases the feature channel dimension after each convolution operation. By gradually reducing the receptive field to form a gradually refined feature extraction method, it is conducive to the gradual capture of the overall curve law to the local curve law, thereby minimizing the number of weights while improving the model accuracy.

[0076] In the second-order temperature modulation model, for the three-dimensional input independent variables: room temperature output current, two key point temperatures, it is necessary to distinguish the importance of the three input variables to the output results at the initial input. The second-order temperature modulation model is based on the first-order room temperature intrinsic output current value for temperature modulation. Mechanistically, the room temperature intrinsic current output by the first-order model is the core of the current component. The model adds a feature attention module after the input variable. The feature attention module automatically calculates the input weight of each input variable through a small fully connected neural network, and inputs the input variables into the main backbone neural network after weighting. The subsequent backbone neural network consists of a standard convolutional neural network structure, and its morphology is similar to that of the first-order model.

[0077] 3) First-order linear current component module based on the inner layer SqueezeNet CV relationship model

[0078] Capacitance is one of the most important sources of memory effect in transistors. It contributes to the main nonlinearity in the time-frequency domain and phase. GaN HEMT is a device that relies on the electric field to modulate the distribution and transport of channel electrons, thereby controlling the channel conductance. There is a significant capacitance effect, corresponding to the intrinsic capacitance Cgs, Cds, and Cgd between the three ports. The port capacitance current contributes Figure 2 Among the current components of each order of time differential, the linear part of the first order differential component is:

[0079]

[0080] The capacitor current proposed in this paper is based on the first-order linear differential current-voltage output relationship of the ideal capacitor mentioned above, and focuses on solving the nonlinear change of the terminal capacitance of the transistor with voltage within a wide range of port voltage distribution. After calculating the port capacitance characteristics under the current port voltage, the IV output relationship of the capacitor is used to obtain the value of the capacitor contribution as the time first-order differential current component of the ideal intrinsic capacitance contribution of the transistor.

[0081] The overall structure of the capacitor current model is as follows: Figure 6 The core part of the model is the port CV relationship model in the center. The outer model uses the calculated capacitance at this moment to calculate the capacitance contribution current at this moment according to the IV relationship of the ideal capacitance. The numerical equation for the calculation is:

[0082]

[0083] This paper uses two techniques to build the network. The first is to use the ability of neural networks to describe high-dimensional variables. We use a streamlined unified model to describe the three-port capacitor output variables and several port voltages in a unified model, rather than using three different models to describe the CV relationship of the three capacitors separately. The model inputs two port voltage values ​​VGS and VDS, where VGS and VDS contain the information model of VGD, and outputs three port voltages (Cgs, Cgd, Cds) at one time. This greatly reduces the model size of the capacitor part.

[0084] The second is to introduce the idea based on the SqueezeNet network structure to replace the traditional network backbone for feature extraction and screening, and to build the network architecture. SqueezeNet is a neural network with the FireModule module as the core module. This module first compresses the input feature channel dimension through a Squeeze layer, and then uses two small convolution kernels of different sizes in the expand layer to extract the same feature at the same time using the low-dimensional data after channel compression, and finally splices the features after the layer to form a channel dimension expansion. Compared with the traditional large convolution kernel convolution operation calculated sequentially by layer, it uses the data compressed and streamlined by the channel size to complete the feature extraction of multiple field of view accuracies within a layer calculation cycle, and then splices the channels at the output position. While ensuring efficient feature extraction, it has a higher degree of parallelism and a lower computational burden for computer hardware. The port CV network structure constructed in this article is as follows Figure 6 shown.

[0085] The network architecture uses a single-layer weighted input fully connected dimension expansion module to expand the input dimension to 256 dimensions, and then uses a layer of convolutional network module to expand the feature channel dimension. The three-layer FireModule module is designed to replace the convolutional module to form the feature extraction backbone of the network. The structure of FireModule is as follows Figure 8(b) is shown. First, a convolution operation with a convolution kernel size of 1 and an adjustable squeeze dimension of the output channel number is used to reduce the channel size. Then, the reduced squeeze channel data is simultaneously subjected to convolution operations with two convolution kernels of extraction field size of 1 and 3 for feature extraction. The convolution results after the convolution operation of the two convolution kernels form a spliced ​​output in the channel dimension and enter the processing operation of the next layer. After the FireModule feature extraction is completed, the output fully connected layer is used to map the high-dimensional data to the final output Cgs, Cgd, Cds.

[0086] The four-layer FireModule with a similar structure is used for feature extraction. While keeping the input channel at 16, the number of feature extraction channels after Squeeze is 8, so that the dimension of the feature channel after splicing is still 16, ensuring the consistency of the network processing data dimension and improving the stability of the forward operation of the network model.

[0087] 4) High-order non-ideal dynamic output current module based on hybrid timing neural network

[0088] Extensive research has shown that there are high-order non-ideal output characteristics in GaN HEMTs. Under different application conditions, the actual output current of the device deviates from the current described by the constructed model. In switching applications, the switching current is very important for the overall switching efficiency and power consumption, and directly determines the value of the switch on-resistance. These current deviations may come from several aspects. One is the description error of the previous model, and the other is some additional non-ideal IV response relationships, such as the changes in channel carrier distribution caused by the complex trap effects of GaN HEMTs, which have been widely studied and proven, and additional parasitic elements such as parasitic inductance. These effects cause changes in dynamic on-resistance during switching and non-ideal ripple or ringing during switching.

[0089] The high-order differential dynamic resistance equivalent current model architecture established in this paper is as follows Figure 8 The architecture of the model is mainly based on the following considerations: 1. In order to express the high-order characteristics of the time variable (Δt n), no longer using a simple first-order differential linear increment approximation, but directly using the time step as the model input, thereby reducing the error caused by the time step approximation. 2. The model needs to contain high-order memory variables to express the non-ideal effects of different memory time scales under the dominance of physical mechanisms of different properties and types, covering high-speed memory effects that respond within the ns level, such as parasitic inductance, and long-term memory effects from ns to s levels, such as trap effects of different positions and energy properties. 3. The model needs to distinguish the process of switching state stress under the influence of different self-heating effects, and needs to have an independent description path for the switching state. 4. The model needs to be able to describe the different current response characteristics of different ports driven at this moment under the same internal memory state of the device.

[0090] Based on the above considerations, the main body of the model is divided into two stages. The first stage is used to describe the accumulation process of different memory effects inside the device during the action of different switch dynamic stresses, including the separate description of switch state stress and high-dimensional feature mapping, and the use of a memory system composed of a timing network to learn and memorize the timing rules of high-dimensional features, and output the standard state on-state dynamic non-ideal current. The standard state non-ideal current is defined as VGS = 6V, VDS = 0.75V, and the non-ideal output current in the on state. The second stage is the driving voltage modulation model, which is based on the standard non-ideal current and describes the modulation of this part of the high-order non-ideal dynamic current under different port voltages (VGS, VDS) in a certain device memory state.

[0091] To this end, this paper divides the first-stage memory effect accumulation model of the module into two sub-stage models. The first sub-stage uses two branches to map the effects of VDS stress and ID stress on the internal state of the transistor. Among them, the VDS branch mainly corresponds to the stress effect of high-voltage VDS in the off state, and the ID branch mainly corresponds to the high current stress effect in the on state. For example, in the trap effect, the off-state high VDS usually causes the capture of trap charges, while the on-state ID usually causes the release of the trap effect. At the same time, VDS and ID may also stimulate the response of parasitic capacitance and parasitic inductance. Since there are many physical effects involved, high-dimensional variables need to be used for mathematical description. The ESN network is used as the high-dimensional nonlinear mapping of the input-level features of the two channels and the capture and memory of short-time features. Through training experiments, the number of high-dimensional features of each channel is selected as 64 while ensuring efficiency. This is a sparsely connected sequential network with low computational consumption when performing efficient high-dimensional feature mapping and short-time sequential feature extraction. Moreover, the ESN itself does not participate in the training weight update, which reduces the pressure of model training.

[0092] The 4-layer fully connected stacked LSTM network is used as the second sub-stage of the first stage model and as the backbone of the network in this section. The LSTM network is an advanced and accurate time series network that is used to memorize the time series features of sequences from different time scales, which meets the needs of this level of model. The network structure and LSTM basic units of this stage are as follows: Figure 8 (b) This paper uses a 4-layer 256-unit fully connected LSTM network to form a more complex connection topology, nonlinear mapping and trainable weights in each layer of LSTM units, which improves the network's ability to capture complex timing relationships. The model at this stage finally uses a fully connected layer to map the internal state and output relationship of the LSTM network, and finally outputs a high-order non-ideal output current under the standard on-state.

[0093] In the second stage of the model, this module uses the standard on-state non-ideal current output by the previous stage as a reference to describe the modulation effect of the instantaneous driving voltage of different ports on the non-ideal current. First, a layer of attention module is used to emphasize the standard on-state dynamic non-ideal current I of the previous stage input. dy_std The leading role of the network is then a 3-layer standard numerical convolutional network is used to map the modulation characteristic function relationship. The final output is the actual output time high-order differential non-ideal dynamic current under different memory dynamics and different port voltages.

[0094] The present invention proposes a current component segmentation method based on the time differential order. This method divides and describes the currents of different dynamic nonlinear time differential orders by mechanism. According to the current components and numerical characteristics of each mechanism, a special processing network is customized to form a high-precision function description.

[0095] Based on the division of current components, an overall switching current model architecture is proposed, which includes an accurate self-heating effect module, multiple current components and multiple physical effects coupling. There are complex variable feedback and module coupling relationships in the architecture, and finally the complete switching dynamic current coupled with multiple physical mechanisms is output.

[0096] In order to accurately describe the numerical variables described by each mechanism module, this paper has precisely customized and optimized algorithm models of different structures based on advanced neural network ideas for each mechanism module. In particular, for high-order time differential current components, this paper proposes a complex and sophisticated hybrid dynamic time series neural network. This network algorithm architecture achieves a high degree of accuracy in describing high-order nonlinear dynamic characteristics, far exceeding the description effect of current traditional models.

[0097] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions only describe the principles of the present invention. The present invention may be subject to various changes and improvements without departing from the spirit and scope of the present invention. These changes and improvements fall within the scope of the present invention. The scope of protection claimed by the present invention is defined by the attached claims and their equivalents.

Claims

1. A dynamic output current model device based on port dynamic voltage excitation, characterized by: Self-heating module: The key point temperature T predicted by the self-heating module vd ,T vs The self-heating module describes the dynamic temperature change of the virtual source and drain under the dynamic output voltage and current of two key point temperatures. The first current module: It is a static nonlinear current model of the 0th order time differential in the time domain, which describes the static ideal intrinsic current in the current component. This module is based on a two-order modulated neural network model, which describes the static output current under different port power supply excitation conditions under different channel temperature conditions during the switching process in the instantaneous quasi-static state; The second current module is a linear time-domain first-order differential module: it describes the contribution of the port intrinsic capacitance to the current under voltage excitation. This module describes the nonlinear relationship between the port capacitance and voltage through a compressed neural network SqueezeNet, and finally obtains the contribution of each port intrinsic capacitance to the port current under the port capacitance value corresponding to the current transient voltage through the IV characteristic relationship of the ideal capacitor; The third current module: It is a time high-order voltage differential nonlinear module. It describes the excitation memory effect of high-order nonlinearity through a timing neural network, and summarizes the complex high-order nonlinear memory effects on different time scales, which are manifested in the dynamic on-resistance change law in the open state under different stresses and after use time, as well as the non-ideal current fluctuation in the switching transient.

2. The dynamic output current model device based on port dynamic voltage excitation according to claim 1 is characterized by: Self-heating module relationship: T vd ,T vs =f(VDS(T),ID(t)); Among them, in the model forward flow operation, ID(t) comes from the final model output current feedback; T vd ,T vs It refers to the temperature of the virtual source and virtual drain in the channel, f represents the nonlinear dynamic function relationship, VDS(t) and ID(t) refer to the dynamic output current and voltage.

3. The dynamic output current model device based on port dynamic voltage excitation according to claim 2 is characterized by: The relationship expressed by the first part module is shown in formula (3): intrisic is the intrinsic quiescent current of the output, VGS, VDS are the gate-source-drain-source voltages of the transient input at this moment, T vd ,T vs is the virtual source and virtual drain temperature at this moment; ID intrinsic =f(VGS,VDS,T vd ,T vs )(3)。 4. The dynamic output current model device based on port dynamic voltage excitation according to claim 2 is characterized by: The relationship described by the second current module is shown in equations (4) and (5). Where Cgd, Cgs, and Cds are the gate-drain voltage, gate-source voltage, and drain-source voltage, respectively, and VGS and VDS are the gate-source and drain-source voltages input at this moment; I capa is the first-order linear current component contributed by the ideal capacitor: (Cgd, Cgs, Cds) = f(VGS, VDS)(4) 5. The dynamic output current model device based on port dynamic voltage excitation according to claim 2, characterized in that: The third current module contains three sub-stages. Through the separate description and high-dimensional feature mapping of switch state stress, long and short-term memory of transistor state, and the final non-ideal current output under different VGS and VDS modulation, an accurate description of the sum of high-order non-ideal current components is achieved.

6. The dynamic output current model device based on port dynamic voltage excitation according to claim 5 is characterized by: The overall description of the third current module is shown in formula (6), where Idy is the high-order time differential current contributed by this stage, VDS(t), IDS(t) are the drain-source voltage and drain-source current feedback input at this moment, Tvd(t), Tvs(t) are the channel virtual source-drain temperatures at each moment, Δt is the time step used for the calculation, and VGS is the transient gate-source voltage input at this moment: I dy =f(VDS(t),IDS(t),T vd (t),T vs (t),Δt,VGS) (6)。 7. The dynamic output current model device based on port dynamic voltage excitation according to claim 6 is characterized by: The final output current of the third current module is obtained by adding the current contributions of the three parts; by accurately describing the dominant component of the intrinsic current of the 0th-order differential relationship, the 1st-order capacitor current, and the high-order current deviation caused by various cumulative non-ideal effects under various switching excitations and channel temperature changes, the accurate total output current is finally obtained. The final current expression is: Where ID(t) is the total dynamic current of the output, and ID intrisic , I capa , I dy It is the current component contributed by the above three current modules.

8. A method for modeling a GaN HEMT dynamic output current model based on high-order current differential division and advanced neural network, the method is based on the dynamic output current model device based on port dynamic voltage excitation according to claim 1, and is characterized by: The current module is divided by high-order current differential partitioning method, and the advanced neural network modeling method is described for each module.

9. A non-volatile storage medium, characterized in that: The non-volatile storage medium includes a stored program, wherein the program controls the device where the non-volatile storage medium is located to execute the method according to claim 8 when the program is executed.

10. A terminal device, characterized in that: The terminal device includes: a processor, a memory, a communication interface and a bus; the processor, the memory and the communication interface are connected through the bus and communicate with each other; the memory stores executable program code; the processor runs the program corresponding to the executable program code by reading the executable program code stored in the memory, so as to execute the method as described in claim 8 above.

Images