PCBA automatic test system and method

Abstract

The invention relates to the technical field of PCBA automatic testing, in particular to a PCBA automatic testing system and method. The method comprises the following steps: performing line width average difference calculation according to PCBA circuit design data to obtain a line routing width average difference; constructing a PCBA circuit three-dimensional model according to the line routing width average difference to obtain a PCBA circuit three-dimensional model; performing overload damage probability estimation according to the PCBA circuit theoretical power consumption operation interval to obtain power transmission overload damage probability data; performing cascade influence analysis according to the power transmission overload damage probability data, and performing circuit ultimate bearing grade division to obtain circuit ultimate bearing grades; carrying out test case dynamic adaptation according to the circuit ultimate bearing grade to obtain a damage edge condition test adaptation case; according to the invention, the PCBA automatic test technology is optimized, so that the PCBA automatic test technology is more perfect.

Description

Technical Field

[0001] The present invention relates to the technical field of PCBA automated testing, and in particular to a PCBA automated testing system and method. Background Art

[0002] Automated testing methods usually integrate a variety of technical means, such as AOI (automatic optical inspection) based on visual recognition, X-Ray inspection, ICT (in-circuit testing) and functional testing, covering the entire process from welding quality inspection to electrical performance verification. The core of this method is to make full use of computer control and high-precision sensors to achieve real-time data acquisition and analysis, so as to quickly and comprehensively evaluate the function and reliability of PCBA. PCBA automated testing methods have broad application prospects in the modern electronic manufacturing industry, especially in the fields of consumer electronics, automotive electronics and medical equipment, and their importance is becoming increasingly prominent. In automotive electronics, automated testing methods can effectively evaluate the performance of electronic control units (ECUs) and ensure their reliable operation under harsh working conditions; in the medical field, circuit board functional testing of precision instruments is even more related to the safety and effectiveness of equipment. However, a traditional PCBA automated testing method has the problem of unclear overload damage analysis and low test accuracy. Summary of the invention

[0003] Based on this, it is necessary to provide a PCBA automated testing method to solve at least one of the above technical problems.

[0004] To achieve the above object, a PCBA automated testing method is provided, the method comprising the following steps:

[0005] Step S1: Obtain PCBA circuit design data and PCBA circuit theoretical power consumption operation range; calculate the line width average difference according to the PCBA circuit design data to obtain the line routing width average difference; construct a PCBA circuit three-dimensional model according to the line routing width average difference to obtain the PCBA circuit three-dimensional model;

[0006] Step S2: collecting power transmission fluctuation test data of the PCBA circuit three-dimensional model according to the PCBA circuit theoretical power consumption operation range to obtain power transmission fluctuation test data; identifying abnormal fluctuations on the power transmission fluctuation test data to obtain power transmission abnormal fluctuation data; estimating the overload damage probability of the power transmission abnormal fluctuation data to obtain power transmission overload damage probability data;

[0007] Step S3: performing cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; performing circuit limit load level classification based on the overload damage cascade impact data to obtain the circuit limit load level;

[0008] Step S4: dynamically adapt the test case according to the circuit limit load level to obtain the damage edge condition test adaptation case; design the automated test firmware based on the damage edge condition test adaptation case to obtain the damage automated test firmware, and send the damage automated test firmware to the terminal to perform PCBA automated testing.

[0009] The present invention can accurately understand the width difference of the line by obtaining PCBA circuit design data and calculating the average difference of line width, which is very important for ensuring the normal operation of the circuit board. According to these data, a three-dimensional model of the PCBA circuit is constructed, so that the designer can comprehensively analyze and optimize the circuit in a virtual environment. This not only helps to ensure the rationality of the layout of the circuit board, but also effectively predicts electrical characteristics such as current path and transmission impedance, laying the foundation for subsequent testing and optimization. In step S2, according to the operating range of the theoretical power consumption of the PCBA circuit, the circuit is tested for power transmission fluctuations, and the stability of power transmission is understood by collecting test data. Abnormal identification is performed on the collected fluctuation data, and potential problems caused by power supply fluctuations can be accurately discovered. Further, based on these abnormal fluctuation data, the probability of overload damage encountered by the power transmission system is estimated, which provides valuable predictions for the long-term stability of the circuit and helps identify the links that need to be improved. According to the power transmission overload damage probability data, cascade impact analysis is performed, which can comprehensively evaluate the impact of overload damage on the entire circuit system and reveal the damage extension path. This analysis process helps to identify the most vulnerable part of the circuit and the chain reaction caused by damage, and further provides a basis for the evaluation of the circuit's ultimate carrying capacity. Finally, by processing these data, the limit load level of the circuit is obtained to ensure that the design meets the actual operating conditions and load requirements. According to the limit load level of the circuit, in step S4, the test case is dynamically adapted to ensure that the test covers all damage edge conditions. These adapted test cases will be used to design automated test firmware to verify the stability and reliability of the circuit by simulating various damage scenarios under actual operating conditions. The automated test firmware can efficiently and accurately perform all test tasks, and perform automated testing by sending it to the terminal device, thereby greatly improving the efficiency and accuracy of the test, and providing important guarantees for the quality control of circuit products. Therefore, the present invention is an optimization process made to a traditional PCBA automated testing method, which solves the problem that a traditional PCBA automated testing method has unclear overload damage analysis and low test accuracy, improves the clarity of overload damage analysis, and improves test accuracy.

[0010] Preferably, step S1 comprises the following steps:

[0011] Step S11: Obtain PCBA circuit design data and PCBA circuit theoretical power consumption operation range;

[0012] Step S12: marking the circuit routing of the PCBA circuit design data to obtain circuit routing marking data;

[0013] Step S13: Calculating the average difference of the line width of the circuit routing mark data according to the PCBA circuit design data to obtain the average difference of the line routing width;

[0014] Step S14: constructing a three-dimensional model of the PCBA circuit according to the average difference in line width and the PCBA circuit design data to obtain a three-dimensional model of the PCBA circuit.

[0015] The present invention first obtains PCBA circuit design data and the operating range of the theoretical power consumption of the circuit, which provides necessary basic information for subsequent analysis and optimization. The circuit design data includes the layout, component type, connection method and other contents of the circuit, while the theoretical power consumption operating range helps determine the power demand and load capacity of the circuit under normal working conditions. This step ensures that all analysis and optimization performed in the subsequent process are based on the correct circuit data and the expected power consumption range, thereby avoiding design problems caused by inaccurate basic data. The acquired PCBA circuit design data is marked for routing, and the marked circuit routing data can provide detailed basis for subsequent routing analysis and calculation. Through this marking, the position, width and relationship of each circuit routing with other circuits can be clearly known. This step not only helps to optimize the circuit design, but also can effectively improve the accuracy and feasibility of circuit board wiring, and prevent the occurrence of unreasonable routing or non-compliance with design requirements in the later production and testing process. Based on the circuit routing marking data, the average difference of the line width is calculated. This process can accurately analyze the width difference of each circuit routing and calculate the average difference of the width of the entire circuit to ensure that each line meets the electrical performance requirements. The calculation of the average line width difference helps to find potential problems in circuit design, such as too thin lines will cause current overload, while too wide lines will waste space and materials. This step plays an important role in improving the stability of the circuit board, reducing electrical interference, and optimizing energy efficiency. On the basis of obtaining the average line width difference and PCBA circuit design data, the three-dimensional model of the circuit is constructed. By combining the average line width difference and other design parameters, a three-dimensional model of the PCBA circuit is generated to provide support for subsequent electrical performance analysis, thermal analysis, and mechanical analysis. The beneficial effect of this step is that through the visualized three-dimensional model, the layout, routing, and component distribution of the circuit can be more intuitively evaluated, while simulating factors such as current flow and heat distribution, thereby providing a convenient tool for circuit design optimization and troubleshooting, and improving the accuracy and feasibility of the overall design.

[0016] Preferably, step S2 comprises the following steps:

[0017] Step S21: constructing a virtual simulation environment for the PCBA circuit three-dimensional model to obtain a circuit virtual simulation environment;

[0018] Step S22: collecting power transmission fluctuation test data of the circuit virtual simulation environment according to the PCBA circuit theoretical power consumption operation range to obtain power transmission fluctuation test data;

[0019] Step S23: using a preset power fluctuation abnormality identification model to identify abnormal fluctuations in the power transmission fluctuation test data, and obtaining power transmission abnormal fluctuation data;

[0020] Step S24: Estimating the overload damage probability of the power transmission abnormal fluctuation data to obtain power transmission overload damage probability data.

[0021] The present invention provides a dynamic simulation platform for circuit performance testing and verification by building a virtual simulation environment for a three-dimensional model of a PCBA circuit. This virtual simulation environment can simulate the behavior of the circuit under different working conditions, such as current flow, heat distribution and signal transmission. By creating an accurate virtual environment, designers can quickly evaluate potential problems in circuit design without actually building the circuit, reduce the cost and time of hardware testing, and provide a reliable basis for subsequent testing and optimization. Based on the theoretical power consumption operation range of the PCBA circuit, the circuit in the virtual simulation environment is tested for power transmission fluctuations, and relevant data is collected. By simulating the working state of the circuit in different power consumption ranges, the impact of power supply fluctuations on circuit stability can be identified. The key to this step is to understand the negative effects of power supply fluctuations on the circuit through accurate test data, which provides an important basis for subsequent abnormal identification and optimization. Through the virtual simulation environment, the risks brought by power supply fluctuations can be predicted and adjusted in a safe virtual environment. By applying a preset power fluctuation abnormal identification model, the collected power transmission fluctuation test data is analyzed to identify abnormal fluctuations therein. The model can quickly and accurately identify abnormal fluctuations based on historical data, fluctuation amplitude, frequency and other parameters, and calibrate the fluctuation patterns that lead to power overload or equipment damage. The core value of this process is to discover potential power fluctuation problems in advance, avoid damage caused by unstable power supply in actual circuit operation, and thus improve the reliability and safety of the circuit system. Estimate the probability of overload damage for the identified abnormal fluctuation data of power transmission. This step estimates the probability of overload damage to the power transmission system by analyzing the abnormal conditions in the fluctuation data and combining the design parameters, load conditions and characteristics of the circuit with the characteristics of power transmission. This process helps designers understand the risk of damage to the power system under specific fluctuation conditions and provides data support for subsequent design optimization. By predicting the probability of damage in advance, corresponding measures can be taken in the circuit design stage to optimize the stability of the power transmission system, reduce the possibility of overload, and ensure that the circuit can operate stably for a long time in actual applications.

[0022] Preferably, step S24 includes the following steps:

[0023] Step S241: performing amplitude offset segmentation processing on the abnormal power transmission fluctuation data to obtain abnormal amplitude offset segmentation data;

[0024] Step S242: performing segmented amplitude integration based on the abnormal amplitude offset segmented data to obtain segmented amplitude offset integrated data;

[0025] Step S243: performing amplitude concentration distribution analysis on the abnormal amplitude offset segmented data according to the amplitude offset segmented integral data to obtain the amplitude concentration distribution degree;

[0026] Step S244: performing geometric analysis of abnormal heat accumulation in segments according to the amplitude concentration distribution degree and the segmented integral data of the amplitude offset to obtain geometric analysis of abnormal heat accumulation in segments;

[0027] Step S245: Estimating the overload damage probability based on the segmented abnormal heat accumulation geometric data to obtain power transmission overload damage probability data.

[0028] The present invention performs amplitude offset segmentation processing on abnormal power transmission fluctuation data. This process divides the power fluctuation data into multiple stages according to the amplitude variation range, so that the fluctuation amplitude in each stage is relatively consistent, which is convenient for subsequent analysis. Segmentation processing can help to more accurately capture the fluctuation characteristics of different amplitude intervals, reduce the interference of data noise, and provide a clearer data basis for subsequent abnormal identification and risk assessment. This processing step effectively improves the accuracy of data processing and the operability of analysis, and avoids potential problems covered by a single data fluctuation range. On the basis of amplitude offset segmentation processing, the amplitude segmentation integral calculation is performed on the data of each segment. Through the integral operation, the total energy accumulation of power fluctuations in each segment can be obtained, revealing the intensity of power fluctuations in each stage and its long-term impact on the system. This operation helps to quantify the cumulative effect of power fluctuations, so that designers can clearly identify risk stages with large fluctuations or long duration. This step is crucial for further predicting the abnormal state of the power transmission system, and can provide a quantitative basis for subsequent damage probability estimation and optimization. Based on the amplitude offset segmentation integral data, the amplitude concentration distribution degree is analyzed. This process evaluates the distribution characteristics of power fluctuations in each segment by statistically analyzing the concentration of segmented data, and determines which segments have relatively concentrated fluctuation amplitudes, which puts greater pressure on the circuit. Amplitude concentration distribution analysis helps identify which fluctuation ranges are more concentrated during power transmission, which will cause problems such as overload and heat loss. Through this analysis, circuit design and power management strategies can be further optimized to ensure that the power system can maintain stable operation under more extreme conditions. By combining the amplitude concentration distribution and the amplitude offset segment integral data, a geometric analysis of segment abnormal heat accumulation is performed. This process can quantify the heat accumulation effect of power fluctuations in each segment on circuit components. Parts with concentrated power fluctuation amplitudes and long durations often lead to heat accumulation, which causes components to overheat, causing failures or damage. Through geometric analysis, the heat accumulation of each stage can be obtained, so as to more accurately evaluate the thermal management requirements of the circuit under specific fluctuation conditions and avoid system failures caused by thermal runaway. Based on the geometric data of segment abnormal heat accumulation, the probability of overload damage is estimated. This step evaluates the probability of overload damage to the power delivery system under specific power fluctuation conditions by analyzing the heat accumulation data of each segment, combined with the physical characteristics and heat tolerance limits of the circuit. Overload damage is usually accompanied by excessive heat accumulation, resulting in damage to circuit components or system failure. By calculating the probability of damage, designers can evaluate the carrying capacity of the power system and take necessary preventive measures based on the results, such as increasing heat dissipation design, optimizing power delivery, or introducing overload protection mechanisms, thereby improving the safety and reliability of the power system.

[0029] Preferably, step S244 includes the following steps:

[0030] According to the amplitude concentration distribution degree and the amplitude offset segmented integral data, the abnormal heat dynamic gradient field is obtained to obtain the abnormal heat segmented gradient field;

[0031] Perform anisotropic offset vector analysis on abnormal heat segmented gradient field to obtain segmented heat offset vector data;

[0032] Perform geometric fitting processing on the segmented heat offset vector data to obtain heat offset geometric fitting data;

[0033] Based on the heat offset proportional fitting data, the segmented abnormal heat accumulation proportional analysis is performed to obtain the segmented abnormal heat accumulation proportional data.

[0034] The present invention constructs an abnormal heat dynamic gradient field by combining the amplitude concentration distribution degree and the amplitude offset segmented integral data. This process can identify the heat distribution changes of power fluctuations at different time and space scales, and then reveal the heat change trend caused by excessive fluctuations in local areas of the circuit. The generation of abnormal heat segmented gradient field can provide accurate regional heat data for subsequent heat analysis, help locate the hot spots of heat accumulation, so as to timely find the key parts that cause overheating or damage in the design stage and optimize the thermal management design. By performing anisotropic offset vector analysis on the abnormal heat segmented gradient field, the distribution changes of heat in different directions can be revealed. This process analyzes whether the heat accumulation shows a specific directional offset, such as whether there is an excessive concentration or uneven distribution in a certain direction. By extracting the segmented heat offset vector data, the heat diffusion pattern caused by power fluctuations can be analyzed more accurately, thereby providing designers with more specific guidance on heat dissipation. This information is of great significance for effectively controlling the risk of overheating and optimizing the heat dissipation solution. By performing geometric fitting processing on the segmented heat offset vector data, the nonlinear change of heat offset can be converted into a predictable mathematical model. The geometric fitting process can help designers quantify the changing trends of heat offset in different stages and regions, making the changes in heat distribution more regular and controllable. This processing method simplifies the complexity of circuit thermal management. Designers can predict heat change trends and potential overheating problems through fitting results, providing higher accuracy for subsequent risk assessment. The geometric analysis of abnormal heat accumulation in segments based on the heat offset geometric fitting data can further predict and quantify the heat accumulation conditions in different areas of the circuit. By combining the heat offset data with the circuit design parameters and analyzing the degree of heat accumulation in each segment, it is possible to identify which areas have excessive heat accumulation, causing overheating and damage. This geometric analysis provides a more accurate heat distribution map for circuit design, allowing designers to effectively adjust aspects such as power transmission and heat dissipation design to avoid equipment failures caused by excessive heat accumulation and improve the stability and reliability of the overall system.

[0035] Preferably, step S3 comprises the following steps:

[0036] Step S31: normalizing the power transmission overload damage probability data to obtain power transmission overload damage normalized data;

[0037] Step S32: performing cascade impact analysis based on the normalized data of power transmission overload damage to obtain overload damage cascade impact data;

[0038] Step S33: Based on the overload damage cascade impact data and the power transmission overload damage normalization data, the circuit limit load level is divided into circuit limit load levels to obtain the circuit limit load level.

[0039] The present invention first normalizes the power transmission overload damage probability data, with the aim of converting the data into a unified standard range (usually 0 to 1) to eliminate the differences between different data scales. This process helps to improve the comparability of the data and ensure that subsequent analysis can be performed at the same scale. In addition, the normalization process helps to reduce the impact of extreme values ​​on the data analysis results, so that the damage probability can more accurately reflect the actual risk level of the system during the analysis process. Through normalization, the damage probability of power transmission is represented more clearly and standardized, providing a reliable basis for subsequent cascade impact analysis and circuit carrying capacity assessment. Cascade impact analysis based on the normalized data of power transmission overload damage is aimed at identifying the mutual influence between different components in the power system. Overload damage in the power system often has a cascade effect, that is, the damage of one component leads to a chain reaction of other components, further aggravating the overall damage of the system. By performing cascade analysis on these data, the interdependence of various components in the system and the potential risk propagation path can be revealed. This process helps to quantify the potential cascade effect in the system and identify the key factors that lead to large-scale system failures, thereby providing valuable information for stability analysis and risk warning of the power system. The purpose of using overload damage cascade impact data and power transmission overload damage normalization data to divide the circuit extreme load levels is to set clear boundaries for the load capacity of the power system. By comprehensively considering the damage probability, cascade effect, and the load capacity of each component in the system, the circuit can be divided into different load levels. This process helps identify the safety boundaries of the power system and provides support for power management decisions. For example, by dividing the extreme load levels, the maximum load capacity of the system under different load conditions can be determined to avoid system collapse or damage under overload conditions. This analysis is crucial to the safety, reliability, and optimal design of the power transmission system. It can guide the formulation of equipment operation and maintenance strategies and improve the system's risk resistance.

[0040] Preferably, step S33 includes the following steps:

[0041] Step S331: performing multi-dimensional vector field mapping processing based on the overload damage cascade impact data and the power transmission overload damage normalization data to obtain overload damage vector correlation data;

[0042] Step S332: Calculate the thermal distribution of circuit nodes on the overload damage vector correlation data to obtain thermal distribution characteristic data of circuit nodes;

[0043] Step S333: calculating the overload thermal instability variance according to the circuit node thermal distribution characteristic data and the overload damage vector correlation data to obtain the overload thermal instability variance data;

[0044] Step S334: performing critical value fitting on the overload thermal instability variance data to obtain overload thermal instability critical value fitting data;

[0045] Step S335: dividing the circuit limit load level according to the overload thermal instability variance data and the overload thermal instability critical value fitting data to obtain the circuit limit load level.

[0046] The present invention aims to convert damage data of different dimensions into vector field form by performing multi-dimensional vector field mapping processing on overload damage cascade impact data and power transmission overload damage normalization data. This processing can reveal the correlation between the damage of each component in the power transmission system and the system load, and provide a systematic and comprehensive damage assessment framework for subsequent analysis. Through the mapped overload damage vector correlation data, designers can more clearly understand the overload risk of the system under different load conditions, and provide strong data support for circuit optimization and risk warning. The purpose of calculating the thermal distribution of circuit nodes on the overload damage vector correlation data is to analyze the heat distribution characteristics of each node in the circuit. Heat accumulation caused by overload is often one of the key factors for power system damage. Therefore, accurately calculating the thermal distribution of each node is crucial to evaluating the safety of the system. Through these calculations, characteristic data of circuit node thermal distribution can be obtained, revealing which nodes or areas are facing overheating risks under overload conditions. This data provides a basis for subsequent thermal instability analysis, helping designers identify high-temperature areas that cause circuit failures, so as to take heat dissipation optimization measures in time to avoid system failure. The thermal instability variance of overload is calculated by combining the heat distribution characteristic data of circuit nodes with the correlation data of overload damage vector. The purpose of this process is to quantify the volatility of thermal instability of the power system under overload. The thermal instability variance can reflect the amplitude and instability of thermal fluctuations when the system is carrying an overload load. A larger variance value usually means that the system faces a greater risk of thermal instability. By calculating the overload thermal instability variance data, potential thermal instability areas in the power system can be identified, and a scientific basis can be provided for further risk assessment and control measures. This helps to optimize thermal management in the design stage and reduce the probability of system overheating failure. The critical value fitting of the overload thermal instability variance data is aimed at finding the critical point of instability of the power system under overload. This process obtains a predictive and guiding critical value by fitting the thermal instability variance data. This critical value represents the maximum thermal load value that the power system can carry. If this critical value is exceeded, the system will face the risk of thermal instability or damage. Through this fitting, designers can adjust the operating parameters and loads of the power system according to actual conditions to ensure that the system operates within a safe thermal load range. This process helps to effectively predict and avoid thermal instability when the system is overloaded, and improves the safety and reliability of the system. The circuit limit load level is divided according to the overload thermal instability variance data and the overload thermal instability critical value fitting data. This process determines the maximum load capacity of the circuit by combining the thermal instability variance and the critical value, and divides it into different load levels. By dividing the extreme load levels, a clear safety boundary can be provided for the design and operation of the power system, helping to identify which parts are at risk of overload under different load conditions, thereby achieving targeted risk prevention and control.This process provides a scientific basis for the safe operation of the power system, helps to avoid circuit failures due to overload in practical applications, and ensures the long-term stable operation of the system.

[0047] Preferably, step S334 includes the following steps:

[0048] Perform nonlinear reduction processing on the overload thermal instability variance data to obtain the reduced overload thermal instability vector data;

[0049] The reduced overload thermal instability vector data is processed by multi-partition thermodynamic analysis to obtain the thermal instability partition critical analysis data;

[0050] According to the critical analysis data of thermal instability partitions and the thermal distribution characteristic data of circuit nodes, a critical gain matrix is ​​fitted to obtain a gain critical gain matrix;

[0051] Based on the gain critical gain matrix, critical numerical fitting is performed to obtain the critical numerical fitting data of overload thermal instability.

[0052] The overload thermal instability variance data of the present invention is processed by nonlinear reduction, aiming to simplify complex multidimensional data sets and reduce unnecessary redundant information. Nonlinear reduction maps the data to a low-dimensional space while retaining its most important thermal instability information by adopting dimensionality reduction methods, such as principal component analysis (PCA) or manifold learning techniques. The beneficial effect of this step is that it makes the originally complex data more compact and easy to process, while improving the data interpretation ability. Through the reduced thermal instability vector data, subsequent analysis can more accurately capture the potential instability behavior of the system, avoiding information loss or computational burden brought about in the big data processing process. Multi-partition thermodynamic analysis is performed on the reduced overload thermal instability vector data. Thermal instability phenomena in power systems usually have spatial distribution characteristics, and the heat conduction and accumulation in different regions vary greatly. Through multi-partition thermodynamic analysis, the system can be divided into multiple regions, and the thermal dynamic behavior of each region under overload conditions is analyzed separately, so as to obtain critical analysis data of thermal instability partitions. This process helps to reveal the thermal instability characteristics and thresholds of each region, identify key areas with excessive heat load in the system, and provide data support for thermal management and optimization. In addition, this regional analysis makes the thermal instability warning of the system more accurate and controllable, avoiding the occurrence of overall instability. The critical gain matrix fitting process is performed using the critical analysis data of thermal instability partitions and the thermal distribution characteristic data of circuit nodes. Through the fitting process, the gain critical gain matrix can be obtained, which reveals the gain response of each region or node to the overall stability of the system under different thermal instability conditions. The critical gain matrix can reflect the degree of mutual influence of thermal instability between different nodes or regions, and the contribution of each region to the system's carrying capacity. The beneficial effect of this step is that it provides a thermodynamic model for the system, which helps to further evaluate the stability of each node in the circuit under thermal overload conditions, allowing designers to accurately predict the response mode of the power system under different thermal loads, thereby avoiding thermal instability of the system in practical applications. Critical numerical fitting is performed based on the gain critical gain matrix to obtain the critical numerical fitting data of overload thermal instability. The purpose of critical numerical fitting is to determine the critical value of the power system under different thermal loads, that is, the critical point of system instability, through mathematical modeling. Through this fitting, the risk of thermal instability of the system when facing different degrees of overload can be predicted, and the maximum thermal load range that the system can withstand can be clarified. The fitted critical values ​​provide a safety margin for system operation and design, helping to prevent equipment overheating, burning, or system failure caused by overload. The beneficial effect of this step is to predict the thermal instability behavior of the system under extreme conditions through scientific numerical methods, thereby providing clear quantitative standards for the safe operation of the circuit, supporting system optimization and fault prevention.

[0053] Preferably, step S4 comprises the following steps:

[0054] Step S41: performing level edge condition sampling on the overload damage cascade impact data and the power transmission overload damage probability data according to the circuit limit load level to obtain overload damage level edge condition data;

[0055] Step S42: dynamically adapt the test case to the overload damage level edge condition data to obtain a damage edge condition test adaptation case;

[0056] Step S43: Design automated test firmware based on the damage edge condition test adaptation case to obtain damage automated test firmware, and send the damage automated test firmware to the terminal to perform PCBA automated testing.

[0057] The present invention can accurately identify the critical situation of overload damage by sampling the circuit limit load level, overload damage cascade impact data and power transmission overload damage probability data. This method can fully consider the circuit's load capacity and damage probability, thereby providing more accurate basic data for subsequent testing and design. This sampling process helps to analyze the reliability and load limit of the circuit in a variety of complex situations, and provides a scientific basis for subsequent optimization of test schemes and improvement of circuit durability. The process of dynamically adapting the overload damage level edge condition data ensures that the test case can be adjusted in real time according to different damage edge conditions. This dynamic adaptation can not only improve the accuracy of the test, but also adapt to changing conditions in different test environments, thereby enhancing the pertinence and flexibility of the test. By optimizing the test case, different damage scenarios can be better covered, ensuring that the equipment can be fully evaluated under various extreme conditions, thereby improving the reliability and safety of the product. Based on the damage edge condition test adaptation case, the automated test firmware design can realize an efficient and systematic test process. Performing PCBA (printed circuit board assembly) testing in an automated manner not only reduces the error and labor intensity of manual operation, but also greatly improves the speed and accuracy of the test. Sending automated test firmware to the terminal for execution can quickly obtain test results, promptly identify potential problems, and optimize them, thereby accelerating product verification and quality improvement processes, reducing testing costs, and ensuring the high quality of the final product.

[0058] Preferably, the present invention further provides a PCBA automated testing system for executing the PCBA automated testing method as described above, the PCBA automated testing system comprising:

[0059] A three-dimensional model building module is used to obtain PCBA circuit design data and the theoretical power consumption operation range of the PCBA circuit; calculate the average difference of line width according to the PCBA circuit design data to obtain the average difference of line routing width; and build a three-dimensional model of the PCBA circuit according to the average difference of line routing width to obtain a three-dimensional model of the PCBA circuit;

[0060] The overload damage probability estimation module is used to collect power transmission fluctuation test data of the PCBA circuit three-dimensional model according to the theoretical power consumption operation range of the PCBA circuit to obtain power transmission fluctuation test data; to identify abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data; to estimate the overload damage probability of the abnormal power transmission fluctuation data to obtain power transmission overload damage probability data;

[0061] The load level classification module is used to perform cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; based on the overload damage cascade impact data, the circuit limit load level is classified to obtain the circuit limit load level;

[0062] The automated firmware design module is used to dynamically adapt the test cases according to the circuit limit load level to obtain the damage edge condition test adaptation cases; based on the damage edge condition test adaptation cases, the automated test firmware is designed to obtain the damage automated test firmware, and the damage automated test firmware is sent to the terminal to perform PCBA automated testing.

[0063] The beneficial effect of the present invention is that by obtaining PCBA circuit design data and calculating the mean difference in line width, the width difference of the line can be accurately understood, which is crucial to ensuring the normal operation of the circuit board. Based on these data, a three-dimensional model of the PCBA circuit is constructed, so that the designer can comprehensively analyze and optimize the circuit in a virtual environment. This not only helps to ensure the rationality of the layout of the circuit board, but also effectively predicts electrical characteristics such as current path and transmission impedance, laying the foundation for subsequent testing and optimization. In step S2, according to the operating range of the theoretical power consumption of the PCBA circuit, the circuit is tested for power transmission fluctuations, and the stability of power transmission is understood by collecting test data. The collected fluctuation data is identified for abnormalities, and potential problems caused by power fluctuations can be accurately discovered. Further, based on these abnormal fluctuation data, the probability of overload damage encountered by the power transmission system is estimated, which provides valuable predictions for the long-term stability of the circuit and helps identify the links that need to be improved. According to the power transmission overload damage probability data, cascade impact analysis is performed, which can comprehensively evaluate the impact of overload damage on the entire circuit system and reveal the damage extension path. This analysis process helps to identify the most vulnerable parts of the circuit and the chain reactions caused by damage, and further provides a basis for the evaluation of the circuit's ultimate carrying capacity. Finally, by processing these data, the limit load level of the circuit is obtained to ensure that the design meets the actual operating conditions and load requirements. According to the limit load level of the circuit, in step S4, the test case is dynamically adapted to ensure that the test covers all damage edge conditions. These adapted test cases will be used to design automated test firmware to verify the stability and reliability of the circuit by simulating various damage scenarios under actual operating conditions. The automated test firmware can efficiently and accurately perform all test tasks, and perform automated testing by sending it to the terminal device, thereby greatly improving the efficiency and accuracy of the test, and providing important guarantees for the quality control of circuit products. Therefore, the present invention is an optimization process made to a traditional PCBA automated testing method, which solves the problem that a traditional PCBA automated testing method has unclear overload damage analysis and low test accuracy, improves the clarity of overload damage analysis, and improves test accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 A schematic diagram of the steps of a PCBA automated testing method;

[0065] Figure 2 for Figure 1 Detailed implementation steps of step S2 in FIG.

[0066] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0067] The technical method of the present invention is described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by technicians in this field without creative work are within the scope of protection of the present invention.

[0068] In addition, the accompanying drawings are only schematic illustrations of the present invention and are not necessarily drawn to scale. The same reference numerals in the figures represent the same or similar parts, and their repeated description will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities and do not necessarily correspond to physically or logically independent entities. The functional entities can be implemented in software form, or implemented in one or more hardware modules or integrated circuits, or implemented in different networks and / or processor methods and / or microcontroller methods.

[0069] It should be understood that, although the terms "first", "second", etc. may be used herein to describe various units, these units should not be limited by these terms. These terms are used only to distinguish one unit from another unit. For example, without departing from the scope of the exemplary embodiments, the first unit may be referred to as the second unit, and similarly the second unit may be referred to as the first unit. The term "and / or" used herein includes any and all combinations of one or more of the listed associated items.

[0070] To achieve this, please refer to Figure 1 to Figure 2 , a PCBA automated testing method, the method comprising the following steps:

[0071] Step S1: Obtain PCBA circuit design data and PCBA circuit theoretical power consumption operation range; calculate the line width average difference according to the PCBA circuit design data to obtain the line routing width average difference; construct a PCBA circuit three-dimensional model according to the line routing width average difference to obtain the PCBA circuit three-dimensional model;

[0072] Step S2: collecting power transmission fluctuation test data of the PCBA circuit three-dimensional model according to the PCBA circuit theoretical power consumption operation range to obtain power transmission fluctuation test data; identifying abnormal fluctuations on the power transmission fluctuation test data to obtain power transmission abnormal fluctuation data; estimating the overload damage probability of the power transmission abnormal fluctuation data to obtain power transmission overload damage probability data;

[0073] Step S3: performing cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; performing circuit limit load level classification based on the overload damage cascade impact data to obtain the circuit limit load level;

[0074] Step S4: dynamically adapt the test case according to the circuit limit load level to obtain the damage edge condition test adaptation case; design the automated test firmware based on the damage edge condition test adaptation case to obtain the damage automated test firmware, and send the damage automated test firmware to the terminal to perform PCBA automated testing.

[0075] In the embodiment of the present invention, reference Figure 1 FIG. 1 is a schematic diagram of a step flow chart of a PCBA automated testing method of the present invention. In this example, the PCBA automated testing method includes the following steps:

[0076] Step S1: Obtain PCBA circuit design data and PCBA circuit theoretical power consumption operation range; calculate the line width average difference according to the PCBA circuit design data to obtain the line routing width average difference; construct a PCBA circuit three-dimensional model according to the line routing width average difference to obtain the PCBA circuit three-dimensional model;

[0077] In an embodiment of the present invention, PCBA circuit design data is obtained, including information such as power requirements of all components, connections, and components on the circuit board. The data is mainly derived from circuit schematics and wiring diagrams, and can provide a comprehensive description of circuit layout and function. After obtaining the circuit theoretical power consumption operation range, the circuit routing width in the design data is calculated, and the line width mean difference calculation method is executed. Specifically, by analyzing the circuit wiring, the range of variation of the line width is calculated, and the width mean difference of each line is obtained. The formula for mean difference calculation is the average of the absolute values ​​of the difference between all line widths and their average widths, and the result obtained in this way helps to evaluate the distribution of current and the power carrying capacity of the circuit. Then, based on the line routing width mean difference data, a three-dimensional modeling algorithm (for example, a modeling technique based on Bézier curve fitting) is used to construct a three-dimensional model of the PCBA circuit. This model accurately reflects the actual layout and line direction of the circuit board, laying the foundation for subsequent testing and simulation analysis.

[0078] Step S2: collecting power transmission fluctuation test data of the PCBA circuit three-dimensional model according to the PCBA circuit theoretical power consumption operation range to obtain power transmission fluctuation test data; identifying abnormal fluctuations on the power transmission fluctuation test data to obtain power transmission abnormal fluctuation data; estimating the overload damage probability of the power transmission abnormal fluctuation data to obtain power transmission overload damage probability data;

[0079] In an embodiment of the present invention, a power transmission fluctuation test is carried out according to the theoretical power consumption operation range of the PCBA circuit. In the specific operation, a virtual simulation environment is designed based on the three-dimensional model of the PCBA circuit to simulate the current fluctuation of the circuit under different power operation conditions. The simulation environment will include a current and voltage fluctuation data collection tool between the power input terminal and the circuit. By running the power fluctuation scenarios under different load conditions, the fluctuation data of power transmission is collected, and the data content includes the time series changes of voltage, current and power. Subsequently, the collected fluctuation data is analyzed using an anomaly detection algorithm. The algorithm adopts an anomaly recognition method based on time series, such as Z-score detection based on statistical analysis or a clustering algorithm based on machine learning, to identify power fluctuation data outside the normal power consumption range. The identified abnormal fluctuation data is further analyzed, and a statistically based model (such as a Bayesian inference model) is used to estimate the probability of overload damage. By calculating the damage probability, the potential overload damage probability data in the power transmission process is obtained.

[0080] Step S3: performing cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; performing circuit limit load level classification based on the overload damage cascade impact data to obtain the circuit limit load level;

[0081] In an embodiment of the present invention, after obtaining the overload damage probability data of power transmission, these data are first normalized. The normalization operation standardizes all the damage probability data to unify their numerical ranges, which is convenient for subsequent analysis. Next, the cascade analysis method is used to perform cascade impact analysis on the overload damage data. This analysis evaluates the degree of impact of damage to a certain node on other nodes by establishing the impact relationship between the nodes in the power transmission network. In the cascade impact analysis, the connectivity analysis method in graph theory is used to model the circuit connection in the form of nodes and edges, and the cascade impact data of the damage under overload conditions is calculated. Based on these analysis results, the limit state analysis method is used to divide the circuit into extreme load levels. This method grades the circuit load level according to the circuit's load capacity and the damage extension path, ensuring that each node can withstand the maximum load when operating at high power, and avoiding overload-induced system collapse.

[0082] Step S4: dynamically adapt the test case according to the circuit limit load level to obtain the damage edge condition test adaptation case; design the automated test firmware based on the damage edge condition test adaptation case to obtain the damage automated test firmware, and send the damage automated test firmware to the terminal to perform PCBA automated testing.

[0083] In an embodiment of the present invention, according to the limit load level of the circuit, the test case is dynamically adapted by determining the level edge condition of the overload damage. First, the load capacity of each node is analyzed according to the limit load level of the circuit to evaluate its performance under the limit conditions. By analyzing the damage level edge condition data obtained, the constraint optimization algorithm is used to adjust and adapt the test case. In this process, taking into account the load differences of different components of the circuit and the overload mode that occurs, test cases for different damage situations are designed. Then, according to the adapted test case, the firmware design method is used to generate automated test firmware. In the specific implementation, the firmware is designed through the embedded development platform, and the test script compatible with the PCBA circuit is generated by the automated test tool, and these firmware are sent to the test terminal for execution. During the test process, the firmware will perform real-time monitoring according to the preset damage edge conditions to ensure that the test covers all potential overload damage scenarios, and automatically record data and feedback results to complete the comprehensive automated test of the PCBA circuit.

[0084] Preferably, step S1 comprises the following steps:

[0085] Step S11: Obtain PCBA circuit design data and PCBA circuit theoretical power consumption operation range;

[0086] Step S12: marking the circuit routing of the PCBA circuit design data to obtain circuit routing marking data;

[0087] Step S13: Calculating the average difference of the line width of the circuit routing mark data according to the PCBA circuit design data to obtain the average difference of the line routing width;

[0088] Step S14: constructing a three-dimensional model of the PCBA circuit according to the average difference in line width and the PCBA circuit design data to obtain a three-dimensional model of the PCBA circuit.

[0089] In an embodiment of the present invention, first, all circuit diagrams and circuit element related information are extracted from the design file of the PCBA. The design file generally includes a circuit diagram, component parameters, layout information, connection relationship, routing rules, etc. By analyzing the circuit design data, parameter information such as the operating voltage, current, and power consumption of each component is extracted. In addition, it is also necessary to verify the working range of the component according to the component specification to ensure that the theoretical power consumption in its design is reasonable. These data can be obtained by parsing the electrical connection information of the circuit diagram, for example, using a method similar to circuit simulation software to calculate the power consumption of each circuit element under normal working conditions. The operating range of the theoretical power consumption is determined by the range of the design current and voltage, thereby providing a basis for subsequent steps. All circuit traces in the PCBA circuit design data are marked one by one. The purpose of trace marking is to ensure that the width and distribution of the circuit traces are calculated and optimized in detail in subsequent steps. This process can read the trace information in the circuit design through an automated tool, and mark the basic properties of each trace, including trace type, trace width, trace spacing, etc., according to the length, current density, transmission requirements, etc. of different trace segments. To this end, the circuit design file can be parsed, and for each circuit routing, the level to which it belongs (such as single-sided board, multi-layer board, etc.) is set, and the routing width and spacing requirements are marked by algorithm processing. In addition, it is also necessary to set the current carrying capacity of the routing according to current, power consumption and environmental factors (such as temperature, humidity, etc.) to ensure the accuracy of the marking data. It is necessary to further calculate the circuit routing marking data obtained in step S12 to obtain the average difference in the width of the circuit routing. The main purpose of this calculation is to optimize the width distribution of the circuit to ensure that there is no overheating or unevenness when the current flows through, thereby improving the stability and performance of the circuit. First, the ideal width of each routing line segment is calculated by the current density and power demand in the circuit design, and compared with the actual width recorded in the marking data. The average difference calculation can be achieved by the following steps: first calculate the theoretical width of each routing, and calculate the expected width range based on the calibrated current density. Then, obtain the actual width of each routing in the marking data, and calculate the difference between the theoretical width and the actual width. By averaging the width differences of all lines, the line width average difference is obtained, so as to further adjust the layout of the circuit routing to ensure that the designed routing width meets the current carrying and thermal management requirements. Based on the line routing width average difference and circuit design data calculated in step S13, a three-dimensional model of the PCBA circuit is constructed. First, the three-dimensional layout of the circuit is drawn by computer-aided design (CAD) tools using the spatial coordinates, size information of each component in the circuit design data and the routing mark data obtained in step S12. Specifically, according to the layout position, pad size, pin distribution and other information of each component, these components are accurately located in three-dimensional space.Next, according to the mean difference data of the routing width obtained in step S13, the routing layout of the circuit is adjusted to ensure that the width and spacing of each routing are within the allowable design range. Through numerical optimization algorithms, such as genetic algorithms or particle swarm optimization (PSO) algorithms, the direction and width of the circuit routing are further adjusted to avoid excessive concentration or excessive sparseness. Finally, the spatial relationship between each circuit element and routing is presented in the three-dimensional model, and a three-dimensional model file is generated for subsequent simulation and manufacturing.

[0090] Preferably, step S2 comprises the following steps:

[0091] Step S21: constructing a virtual simulation environment for the PCBA circuit three-dimensional model to obtain a circuit virtual simulation environment;

[0092] Step S22: collecting power transmission fluctuation test data of the circuit virtual simulation environment according to the PCBA circuit theoretical power consumption operation range to obtain power transmission fluctuation test data;

[0093] Step S23: using a preset power fluctuation abnormality identification model to identify abnormal fluctuations in the power transmission fluctuation test data, and obtaining power transmission abnormal fluctuation data;

[0094] Step S24: Estimating the overload damage probability of the power transmission abnormal fluctuation data to obtain power transmission overload damage probability data.

[0095] As an example of the present invention, refer to Figure 2 As shown, in this example, step S2 includes:

[0096] Step S21: constructing a virtual simulation environment for the PCBA circuit three-dimensional model to obtain a circuit virtual simulation environment;

[0097] In an embodiment of the present invention, a three-dimensional geometric model of a PCBA circuit is first established, and the model should include the layout of the circuit board, the position and connection mode of the electrical components. The detailed geometric structure of the PCBA circuit is designed using a CAD tool (such as SolidWorks or AutoCAD), and converted into a three-dimensional model format suitable for simulation software (such as ANSYS or COMSOL). When building a simulation environment, it is necessary to consider the physical properties of electrical components, the layout of transmission lines, heat dissipation conditions, etc., to ensure that the simulation environment can accurately reflect the operating environment of the actual circuit. Then, by defining the properties of the material such as electrical conductivity and thermal conductivity, combined with external conditions such as temperature and humidity, a real environment that can simulate power transmission is constructed. The simulation effect of different electrical components of the circuit in the virtual environment must be guaranteed to match the actual physical environment as much as possible, including considering the influence of current, power transmission, etc.

[0098] Step S22: collecting power transmission fluctuation test data of the circuit virtual simulation environment according to the PCBA circuit theoretical power consumption operation range to obtain power transmission fluctuation test data;

[0099] In an embodiment of the present invention, the test conditions are first set according to the theoretical power consumption operation range of the PCBA circuit. For example, the normal operating voltage and current range of each component (such as power chip, capacitor, resistor, etc.) are set. Through the power fluctuation test, a series of power fluctuation conditions are introduced into the simulation environment, such as current spikes, short-term voltage changes, etc., to simulate the actual working state. During the test, the simulation software records the power changes of the circuit at each moment according to different fluctuation modes, and collects power fluctuation data in real time. These data include the changing trends of voltage and current, the changes in instantaneous power consumption, etc., and finally obtain a test data set containing various types of fluctuation conditions. This data set can provide the actual performance of the circuit under different power consumption and different voltage fluctuation conditions, and provide a basis for subsequent abnormal fluctuation identification and damage estimation.

[0100] Step S23: using a preset power fluctuation abnormality identification model to identify abnormal fluctuations in the power transmission fluctuation test data, and obtaining power transmission abnormal fluctuation data;

[0101] In an embodiment of the present invention, signal processing technology is used to analyze the power fluctuation test data collected in step S22. By combining time domain analysis with frequency domain analysis, the main features in the data (such as standard deviation and mean change of voltage and current fluctuations) are first extracted, and then thresholds are set based on these features to determine whether the fluctuations exceed the normal range. In order to improve the accuracy of recognition, an abnormality detection algorithm based on statistical analysis (such as the Z-score method) can be used, or a clustering algorithm in machine learning (such as K-means) can be used to classify the fluctuation data to identify the abnormal state of the fluctuation. For example, a sharp fluctuation of current or an excessive deviation of voltage will be identified as an abnormal fluctuation. During the detection process, the normal and abnormal states of the power fluctuations are marked, and finally a test data set containing abnormal fluctuation events is obtained for subsequent analysis.

[0102] Step S24: Estimating the overload damage probability of the power transmission abnormal fluctuation data to obtain power transmission overload damage probability data.

[0103] In an embodiment of the present invention, the abnormal fluctuation data identified in step S23 is first processed to convert these abnormal fluctuations into specific factors that cause circuit overload. By analyzing the amplitude, frequency, duration and other indicators of power fluctuations, a mathematical model related to overload damage of electrical components in PCBA circuits is established. The model is based on the damage probability and response characteristics of components under overload conditions, and uses cumulative damage theory (such as Miner's criterion) for damage estimation. By comprehensively analyzing the duration and fluctuation amplitude of each abnormal fluctuation event, the degree of damage to the electrical components by each abnormal fluctuation is calculated. Finally, the damage probability of all fluctuation events is combined to obtain the overall overload damage probability data in a power transmission process. This data can help evaluate the reliability and stability of the circuit in long-term operation and provide a basis for circuit design optimization.

[0104] Preferably, step S24 includes the following steps:

[0105] Step S241: performing amplitude offset segmentation processing on the abnormal power transmission fluctuation data to obtain abnormal amplitude offset segmentation data;

[0106] Step S242: performing segmented amplitude integration based on the abnormal amplitude offset segmented data to obtain segmented amplitude offset integrated data;

[0107] Step S243: performing amplitude concentration distribution analysis on the abnormal amplitude offset segmented data according to the amplitude offset segmented integral data to obtain the amplitude concentration distribution degree;

[0108] Step S244: performing geometric analysis of abnormal heat accumulation in segments according to the amplitude concentration distribution degree and the segmented integral data of the amplitude offset to obtain geometric analysis of abnormal heat accumulation in segments;

[0109] Step S245: Estimating the overload damage probability based on the segmented abnormal heat accumulation geometric data to obtain power transmission overload damage probability data.

[0110] In the embodiment of the present invention, it is first necessary to collect abnormal fluctuation data generated during power transmission. These data come from monitoring points of power transmission equipment such as substations, power lines or electrical equipment. Abnormal fluctuation data usually manifests as sudden changes in parameters such as current and voltage outside the normal fluctuation range. In order to facilitate subsequent analysis, these data need to be segmented. Specifically, it is first necessary to set an amplitude threshold to determine whether a data point is an abnormal fluctuation. When the amplitude of a data point exceeds this threshold, the point is marked as an abnormal fluctuation. Then, the time series data is divided into continuous abnormal fluctuation segments, and the start and end of each segment are determined by the time point when the fluctuation amplitude exceeds the set threshold. For each abnormal fluctuation segment, its start time, end time and fluctuation amplitude information within the segment are recorded. These segmented data will constitute "abnormal amplitude offset segment data", which provides a basis for subsequent amplitude segment integration and heat accumulation analysis. Each abnormal amplitude offset segment is integrated. The specific operation is: for each segment of abnormal fluctuation data, an integral algorithm is used to calculate the total amplitude change of the segment. Common integration methods include trapezoidal integration method and Simpson integration method. If the abnormal fluctuation data is a discrete sequence, each segment can be integrated by numerical integration method. For example, if the voltage amplitude changes from V1 to V2 in a certain time period, and the change process is linear, the integration method will calculate the cumulative value corresponding to the amplitude change of this segment. In actual operation, the sampling frequency and error correction of the data must also be considered. The data of the amplitude segment integration will provide a quantitative basis for the subsequent amplitude concentration distribution analysis. Through this step, the integral value of each segment of abnormal fluctuation can be obtained, that is, the "amplitude offset segment integration data", which helps to evaluate the load brought by abnormal fluctuations in power transmission to the equipment. The core task of this step is to analyze the amplitude concentration of each segment of abnormal amplitude offset segment data. Amplitude concentration is a measure of the degree of concentration of abnormal fluctuation amplitude changes in a certain period of time. Specifically, the standard deviation, coefficient of variation and other methods in statistics can be used to measure the concentration of fluctuation data. First, for each segment of abnormal amplitude offset data, the mean and standard deviation of all data points in the segment are calculated. A smaller standard deviation indicates that the amplitude changes are more concentrated, and the coefficient of variation indicates the ratio of the standard deviation to the mean, reflecting the relative volatility of the data. For each segment of data, the corresponding concentration index is calculated. Then, based on the amplitude concentration of each segment, the overall distribution of the concentration can be further analyzed by statistical methods to obtain the "amplitude concentration distribution" data. This data is helpful for subsequent judgment of the possibility of damage to power equipment under different fluctuation intensities. The aforementioned amplitude concentration distribution and amplitude offset segmented integral data are used to analyze abnormal heat accumulation. According to the energy conversion principle in power transmission, when power equipment is subjected to large abnormal amplitude fluctuations for a long time, excessive heat accumulation will occur, causing equipment overload or damage.Therefore, it is necessary to calculate the heat accumulation caused by abnormal fluctuations on the equipment based on the results of the amplitude segmented integration. First, a heat accumulation model is set, which can be calculated based on the power formula of current or voltage and the relationship between heat and current amplitude. In the model, the amplitude offset segmented integration data is used as the input parameter of heat accumulation. For each segment of data, the heat accumulation value in that period of time is calculated through the functional relationship between time and power amplitude. In order to simplify the model, heat accumulation is often analyzed using a geometric model, which means that the heat accumulation in a time period is regarded as a gradually increasing process. By analyzing the heat accumulation in each stage in a geometric manner, the heat accumulation during each abnormal fluctuation can be obtained. These data are "segmented abnormal heat accumulation geometric data", which reflects the heat load borne by the equipment when facing abnormal fluctuations of different intensities. Based on the segmented abnormal heat accumulation geometric data obtained in the above steps, the overload damage probability of the equipment in the power transmission system is further estimated. First, a damage model needs to be established, which usually combines factors such as the maximum heat tolerance of the equipment, the accumulation degree of heat load, and the heat resistance of the equipment material. According to the design parameters of the power transmission system, the overload threshold of the equipment can be set. Then, the probability of the power equipment being overloaded in each time period is calculated by combining the heat accumulation geometric data with the equipment's tolerance standard and overload threshold. The damage probability is usually estimated through a cumulative effect model, assuming that the probability of the equipment being overloaded in a certain period of time is proportional to the degree of heat accumulation. Through methods such as Monte Carlo simulation, the probability of overload damage to the equipment in each period of time is estimated, and finally the "power transmission overload damage probability data" is obtained.

[0111] Preferably, step S244 includes the following steps:

[0112] According to the amplitude concentration distribution degree and the amplitude offset segmented integral data, the abnormal heat dynamic gradient field is obtained to obtain the abnormal heat segmented gradient field;

[0113] Perform anisotropic offset vector analysis on abnormal heat segmented gradient field to obtain segmented heat offset vector data;

[0114] Perform geometric fitting processing on the segmented heat offset vector data to obtain heat offset geometric fitting data;

[0115] Based on the heat offset proportional fitting data, the segmented abnormal heat accumulation proportional analysis is performed to obtain the segmented abnormal heat accumulation proportional data.

[0116] In the embodiment of the present invention, for the input amplitude concentration distribution and amplitude offset segmented integral data, data preprocessing is first performed to ensure the integrity and accuracy of the data. The amplitude concentration distribution is to obtain the distribution of the signal amplitude in each interval by statistically analyzing the amplitude of the input signal, and determine the change trend of the signal and its concentration degree. The amplitude offset segmented integral data is obtained after the segmented integral processing of the signal, which represents the accumulated value of the change of the signal in different sections. On this basis, the data is gradient calculated using the numerical integration method. By calculating the gradient field of each section, the abnormal heat dynamic gradient field can be obtained. Each point in the gradient field represents the rate of change of the signal around the point or the rate of change of the amplitude, and then the abnormal heat segmented gradient field is obtained by analyzing the local change of the gradient field. This process obtains the segmented gradient value by numerical differentiation and local optimal interval division, which ensures the accuracy and rationality of the gradient field of each section of data. After the abnormal heat segmented gradient field is obtained, the next step is to perform anisotropic offset vector analysis on each segment. Anisotropic offset refers to calculating the offset of heat in different directions through the change of the gradient field. In this step, the directional gradient method is used to decompose each gradient value in a directional manner, and the offset vector in each direction is obtained by analyzing the change amount of the signal in each direction. In specific implementation, by calculating the gradient value of each point, combined with the change law of the signal in the local area, the change trend of the point in each direction is analyzed by two-dimensional or three-dimensional coordinate transformation, and finally the offset vector of the point is obtained. This process combines the spatial variation characteristics of the signal, and uses discrete Fourier transform (FFT) and other technologies to optimize the analysis effect of each segmented heat offset vector, so that the calculated offset vector is more accurate and reflects the local change characteristics of the signal. After obtaining the segmented heat offset vector data, geometric fitting processing is performed to further refine the expression of the heat offset vector. Geometric fitting processing is to fit the offset vector data into a curve or function that conforms to the geometric relationship through a mathematical fitting algorithm. Specifically, the least squares method or other numerical optimization methods are used to fit the data points of the offset vector into a continuous geometric function model. The model can accurately represent the law of the change of the offset vector with heat, thereby achieving a detailed description of the dynamic change of abnormal heat. During the fitting process, by adjusting the parameters, the overall and local errors of the fitting results are minimized, ensuring that the fitting results can truly reflect the offset of the segmented heat and make the subsequent data processing more stable and reliable. After obtaining the proportional fitting data of the heat offset, the segmented abnormal heat accumulation is further analyzed proportionally. The core of this step is to calculate the accumulation effect of the heat offset in each segment, especially in the sections where the abnormal heat distribution is more concentrated. By integrating the proportional fitting data, the heat accumulation in each segment is obtained. This process uses the numerical integration method to integrate the heat offset of each segment along the time or space axis, and finally obtains the abnormal heat accumulation data of the segment.In this process, the geometric accumulation rule is used to ensure that the accumulation process conforms to the geometric law and avoids excessive accumulation or omission. In the process of abnormal heat accumulation in segments, detailed adjustments can also be made to adjust the accumulation weight according to different segment intervals, so that the heat accumulation data can more accurately reflect the real abnormal situation.

[0117] Preferably, step S3 comprises the following steps:

[0118] Step S31: normalizing the power transmission overload damage probability data to obtain power transmission overload damage normalized data;

[0119] Step S32: performing cascade impact analysis based on the normalized data of power transmission overload damage to obtain overload damage cascade impact data;

[0120] Step S33: Based on the overload damage cascade impact data and the power transmission overload damage normalization data, the circuit limit load level is divided into circuit limit load levels to obtain the circuit limit load level.

[0121] In the embodiment of the present invention, the power transmission overload damage probability data collected first is usually derived from historical data or real-time monitoring data. In the specific implementation process, the maximum and minimum normalization method is used, and these data have different dimensions or ranges. In order to ensure the uniformity of data processing and the comparability of subsequent analysis, these data must be normalized. The normalized power transmission overload damage data is used for cascade impact analysis. The purpose of cascade impact analysis is to evaluate the mutual influence between components in a system, especially when a component (such as a substation, a transmission line, etc.) is overloaded and damaged, the impact on other components. In the specific implementation, an impact relationship matrix is ​​first constructed, and the degree of influence can be obtained by analyzing historical data, equipment specifications, and the topological structure of the power system. For example, if an overload damage occurs in a substation, it will have different degrees of impact on the downstream transmission line, and vice versa. In the implementation process, firstly, according to the normalized overload damage probability data and the cascade impact data, the limit load level of the circuit is divided by the piecewise function method, and different load level standards are set according to the design requirements of the power transmission system. For example, the load level can be divided into three levels: "low load", "normal load" and "overload", and each level corresponds to a critical value range. For each circuit, the ultimate load capacity under specific conditions is calculated by combining the overload damage probability data and the cascade impact data. At this time, the calculation of the ultimate load capacity needs to consider the health status of each component in the system, historical fault records, and future damage risks. According to the calculated load capacity, a piecewise function is used to match the load capacity of each circuit with the preset load level standard. Specifically, if the load capacity is less than a certain threshold, it is classified as a "low load" level; if the load capacity is within a certain range, it is classified as a "normal load"; if the load capacity exceeds a certain threshold, it is determined to be in an "overload" state.

[0122] Preferably, step S33 includes the following steps:

[0123] Step S331: performing multi-dimensional vector field mapping processing based on the overload damage cascade impact data and the power transmission overload damage normalization data to obtain overload damage vector correlation data;

[0124] Step S332: Calculate the thermal distribution of circuit nodes on the overload damage vector correlation data to obtain circuit node thermal distribution characteristic data;

[0125] Step S333: calculating the overload thermal instability variance according to the circuit node thermal distribution characteristic data and the overload damage vector correlation data to obtain the overload thermal instability variance data;

[0126] Step S334: performing critical value fitting on the overload thermal instability variance data to obtain overload thermal instability critical value fitting data;

[0127] Step S335: dividing the circuit limit load level according to the overload thermal instability variance data and the overload thermal instability critical value fitting data to obtain the circuit limit load level.

[0128] In an embodiment of the present invention, firstly, the overload damage cascade impact data of the circuit and the normalized data of the power transmission overload damage are collected. The overload damage cascade impact data contains the influence relationship between different circuit nodes or power transmission channels under overload conditions, while the normalized data of the power transmission overload damage indicates the degree of overload damage of each node under standard load conditions. These two sets of data provide basic information for processing. In order to realize multi-dimensional vector field mapping, it is first necessary to normalize these data so that the dimensions of all data are unified for subsequent calculation. Subsequently, these data are mapped into a multi-dimensional vector field based on the finite element method or distributed algorithm, in which each node corresponds to an overload damage vector, which comprehensively considers the influencing factors of multiple dimensions, such as current, temperature, time, etc. In this process, the numerical interpolation method is used to process the spatial and temporal distribution of the circuit to ensure that the overload damage information of each node can be accurately reflected in the vector field, thereby obtaining complete overload damage vector association data. The overload damage vector association data obtained in step S331 is used as input to calculate the thermal distribution of the circuit node. The calculation of thermal distribution is performed based on the heat conduction model. Specifically, it is assumed that the heat of each node in the circuit will increase due to overload damage, the conduction of heat follows Fourier's law, and different distribution characteristics will be presented in multidimensional space. In order to perform calculations, a numerical simulation technology based on the finite difference method (FDM) or the finite element method (FEM) is used to construct a heat conduction equation model, and the temperature change of each circuit node is iteratively calculated. The initial temperature of each node can be set to the temperature under the standard working state. As time changes, the temperature will gradually increase due to overload damage. Through this process, the thermal distribution of each node of the circuit can be obtained, thereby obtaining the characteristic data of the thermal distribution of the circuit nodes, which contain the relationship between temperature change and overload damage. Based on the thermal distribution characteristic data of the circuit nodes obtained in step S332 and the overload damage vector correlation data in step S331, the variance of overload thermal instability is calculated. The thermal instability variance is a key indicator that describes the instability of the thermal distribution of the circuit under overload conditions and the resulting system failure. First, a mathematical model of the thermal instability variance is established using the thermodynamic stability theory. By comparing the thermal distribution state of each node in the circuit with the standard thermal distribution state under normal working conditions, the thermal instability of each node is calculated. Thermal instability can be measured by the fluctuation amplitude of the thermal distribution, and the square of the fluctuation amplitude is the thermal instability variance. Then, the thermal instability of all nodes is weighted averaged to obtain the overload thermal instability variance data of the entire circuit. This variance data can help evaluate the stability of the circuit under different workloads, especially the probability of circuit instability under overload conditions. For the overload thermal instability variance data obtained in step S333, the critical value fitting method is used to deduce the critical value of thermal instability of the circuit under different overload conditions.In the specific implementation, first collect historical data or obtain the relationship between the variance of overload thermal instability and the actual instability event within a certain range through experimental testing. Use mathematical techniques such as least squares method, Lagrange interpolation method or spline curve fitting to fit the thermal instability variance data and deduce the critical values ​​under different damage levels. In the fitting process, it is necessary to take into account the thermal conduction characteristics of each circuit node and the cascade effect of damage, so that the fitting function can accurately reflect the behavior of the system under overload conditions. Finally, the obtained overload thermal instability critical value fitting data provides a theoretical basis for the thermal instability critical point of the circuit, which can be used for the subsequent evaluation of the circuit carrying capacity. First, according to the overload thermal instability variance data and the overload thermal instability critical value fitting data obtained in steps S333 and S334, the circuit's extreme load level is divided. The extreme load level refers to the maximum overload capacity that the circuit can safely carry. When this capacity is exceeded, the circuit will experience thermal instability or other forms of failure. In the specific operation, first compare the thermal instability variance with the critical value fitting data. By setting a certain threshold, the circuit can be divided into multiple load levels. For example, when the variance of overload thermal instability is less than a certain critical value, the circuit is evaluated as a low load level; when the variance is greater than a higher critical value, the circuit is evaluated as a high load level. Each level represents the load capacity of the circuit under different overload conditions. In the division process, a method based on clustering analysis (such as the K-means algorithm) can be used to automatically divide the circuit into multiple load levels according to the changing trend of the thermal instability variance and critical value fitting data. This process not only improves the accuracy of the division, but also provides clear overload load capacity guidance for the practical application of the circuit.

[0129] Preferably, step S334 includes the following steps:

[0130] Perform nonlinear reduction processing on the overload thermal instability variance data to obtain the reduced overload thermal instability vector data;

[0131] The reduced overload thermal instability vector data is processed by multi-partition thermodynamic analysis to obtain the thermal instability partition critical analysis data;

[0132] According to the critical analysis data of thermal instability partitions and the thermal distribution characteristic data of circuit nodes, a critical gain matrix is ​​fitted to obtain a gain critical gain matrix;

[0133] Based on the gain critical gain matrix, critical numerical fitting is performed to obtain the critical numerical fitting data of overload thermal instability.

[0134] In the embodiment of the present invention, when performing nonlinear reduction processing of overload thermal instability variance data, it is first necessary to collect overload thermal instability data of the circuit under different working conditions. These data mainly come from temperature and power fluctuations under multiple circuit overload states. For these data, a method based on principal component analysis (PCA) combined with an adaptive algorithm is used for nonlinear dimensionality reduction. First, the main features in the data are extracted by principal component analysis, which can effectively reduce the dimension of the data and make the data present lower noise. Next, a nonlinear mapping method (such as local linear embedding LLE or t-SNE) is used to further map the data to avoid information loss caused by linear methods, and finally the original high-dimensional data is mapped to low-dimensional overload thermal instability vector data. The core of this step is to maintain the core features of the data and reduce redundant information under overload conditions through nonlinear dimensionality reduction. For the reduced overload thermal instability vector data that has been obtained, multi-partition thermodynamic analysis is performed next. By dividing the thermodynamic model of different areas on the circuit board, the entire circuit board is divided into multiple thermodynamic partitions. The thermal characteristics of each partition are determined by physical parameters such as local temperature, power consumption and thermal conductivity. The finite element analysis (FEA) method is used to simulate and analyze the thermal dynamic behavior of each partition. This method takes into account factors such as local temperature changes, heat conduction and heat convection, and obtains the critical point of thermal instability in each area under overload conditions by numerically solving the heat conduction equation. Then, the partition critical analysis data of thermal instability is obtained through multi-partition thermodynamic analysis. This step determines the stability boundaries of different thermal zones through precise calculation of the multi-dimensional thermal model, and provides a basis for the subsequent critical gain matrix fitting. According to the critical analysis data of the thermal instability partition obtained in the previous step and the thermal distribution characteristic data of the circuit nodes, the critical gain matrix fitting process is then performed. In this step, it is first necessary to extract the thermal distribution data of each node in the circuit, which reflects the temperature and power consumption of each node. Through matrix calculation, the critical point of the thermal instability partition is combined with the thermal characteristics of the node to form a critical gain matrix. Each element of this matrix represents the degree of influence of the temperature change of a certain node on the stability of the entire system under specific circuit conditions. During the fitting process, linear regression analysis and least squares optimization algorithm are used to best match the critical analysis data of thermal instability with the thermal distribution characteristic data of the circuit nodes, so as to obtain the gain matrix. This process ensures that the fitted gain matrix has a high accuracy in predicting the thermal instability of the circuit in actual work by minimizing the error function. After obtaining the critical gain matrix of the gain, the last step is to perform critical numerical fitting. This process is based on the gain matrix obtained by the previous fitting, and further accurately fits the critical value of overload thermal instability through numerical optimization methods. The critical gain matrix is ​​numerically calculated by numerical integration method and the method of solving optimization problems to obtain the critical value of overload thermal instability.This fitting process not only takes into account the thermal conduction effect of the circuit, but also takes into account complex factors such as the mutual influence of various components in the circuit, power consumption, and temperature feedback. In actual operation, the numerical fitting adopts the back propagation algorithm and combines the optimization objective function to tune the fitting results to ensure that the obtained critical values ​​have good engineering applicability and accuracy. Ultimately, the obtained overload thermal instability critical value fitting data provides a reliable theoretical basis for circuit design and operation, helping to avoid potential thermal instability problems in testing.

[0135] Preferably, step S4 comprises the following steps:

[0136] Step S41: performing level edge condition sampling on the overload damage cascade impact data and the power transmission overload damage probability data according to the circuit limit load level to obtain overload damage level edge condition data;

[0137] Step S42: dynamically adapt the test case to the overload damage level edge condition data to obtain a damage edge condition test adaptation case;

[0138] Step S43: Design automated test firmware based on the damage edge condition test adaptation case to obtain damage automated test firmware, and send the damage automated test firmware to the terminal to perform PCBA automated testing.

[0139] In the embodiment of the present invention, it is first necessary to obtain the circuit's ultimate load capacity data, which is usually determined by circuit design specifications or by test experiments. Next, according to the design capacity of the power transmission system, the probability distribution of overload damage is calculated, taking into account the load changes during the power transmission process and its damage to the circuit. When the overload damage data is graded, multiple different damage levels are divided according to the pre-set current threshold and temperature threshold. For example, an overload of 0 to 20% can be set as a first-level damage, an overload of 20% to 50% can be set as a second-level damage, and an overload of more than 50% can be set as a third-level damage. Then, using statistical methods and edge condition sampling technology, specific edge data are extracted from the power transmission overload damage probability data. These edge data are located at the critical points of different damage levels, helping to determine the performance of the system when approaching the ultimate load. The sampling method can use methods such as Monte Carlo simulation to generate these edge condition data sets based on the circuit's ultimate load data and the state of the power transmission, and finally form the output of "overload damage level edge condition data". First, the overload damage level edge condition data obtained in step S41 needs to be converted into actual test cases. Each edge condition data represents a specific circuit working state and needs to be matched with the test case of the circuit. In order to achieve dynamic adaptation, an adaptation algorithm is used to map these edge data to the input and output parameters of the circuit test. For example, by setting a current intensity and temperature curve, the operating temperature of the circuit can be adjusted under different current loads, and the response of the circuit under these load conditions can be determined by simulating the change of current load. This process ensures that the generated test cases can cover the extreme overload conditions by dynamically adjusting the parameters in the test cases. Intelligent optimization methods such as genetic algorithms and particle swarm optimization can be used to search and adjust the test cases to ensure that all edge conditions can be effectively covered and the generated test cases can reflect the performance and behavior of the actual circuit under these edge conditions. The result of this step is to form a series of test case sets that adapt to different overload damage levels, which can be used for subsequent automated testing. First, it is necessary to design the corresponding automated test firmware based on the previously generated damage edge condition test adaptation cases. The main function of the firmware is to convert these test cases into instruction sequences that can be executed by the automated test platform. The automated test firmware can be written in hardware description language (HDL) or other low-level languages ​​so that it can interact with the hardware of the test terminal. The test firmware will include all necessary configuration parameters and operation steps, such as setting the test current, duration, and other circuit parameters related to overload damage. This firmware will also include an anomaly detection mechanism that can monitor in real time whether the circuit has overload damage during execution and feedback the test results based on the test situation.In the design process of the test firmware, a layered architecture can be adopted, where each layer is responsible for different test tasks. For example, the data acquisition layer is responsible for reading current and voltage data, the control layer is responsible for setting the load of the circuit, and the decision layer is responsible for judging whether the expected damage edge conditions have been achieved based on the test results. This firmware will be sent to the terminal device through a network interface or physical medium, and loaded and executed on the terminal. When executed at the terminal, the firmware will automatically test the PCBA (printed circuit board assembly) according to the designed test cases, evaluate its performance and degree of damage under different overload conditions, and generate corresponding test reports. In this way, the overload protection function of the PCBA can be verified under real-world extreme conditions and its long-term stability can be ensured.

[0140] Preferably, the present invention further provides a PCBA automated testing system for executing the PCBA automated testing method as described above, the PCBA automated testing system comprising:

[0141] A three-dimensional model building module is used to obtain PCBA circuit design data and the theoretical power consumption operation range of the PCBA circuit; calculate the average difference of line width according to the PCBA circuit design data to obtain the average difference of line routing width; and build a three-dimensional model of the PCBA circuit according to the average difference of line routing width to obtain a three-dimensional model of the PCBA circuit;

[0142] The overload damage probability estimation module is used to collect power transmission fluctuation test data of the PCBA circuit three-dimensional model according to the PCBA circuit theoretical power consumption operation range to obtain power transmission fluctuation test data; identify abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data; estimate the overload damage probability of the abnormal power transmission fluctuation data to obtain power transmission overload damage probability data;

[0143] The load level classification module is used to perform cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; based on the overload damage cascade impact data, the circuit limit load level is classified to obtain the circuit limit load level;

[0144] The automated firmware design module is used to dynamically adapt the test cases according to the circuit limit load level to obtain the damage edge condition test adaptation cases; based on the damage edge condition test adaptation cases, the automated test firmware is designed to obtain the damage automated test firmware, and the damage automated test firmware is sent to the terminal to perform PCBA automated testing.

[0145] Therefore, the embodiments should be regarded as illustrative and non-restrictive from all points, and the scope of the present invention is limited by the appended claims rather than the above description, and it is therefore intended that all changes falling within the meaning and range of equivalent elements of the application documents are included in the present invention.

[0146] The above description is only a specific embodiment of the present invention, so that those skilled in the art can understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but should conform to the widest scope consistent with the principles and novel features invented herein.

Claims

1. A PCBA automated testing method, characterized in that: The following steps are involved: Step S1: Obtain PCBA circuit design data and PCBA circuit theoretical power consumption operation range; Calculate the average difference of line width according to PCBA circuit design data to obtain the average difference of line width; construct a three-dimensional model of PCBA circuit according to the average difference of line width to obtain the three-dimensional model of PCBA circuit; Step S2: collecting power transmission fluctuation test data of the PCBA circuit three-dimensional model according to the PCBA circuit theoretical power consumption operation range to obtain power transmission fluctuation test data; identifying abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data; The power transmission abnormal fluctuation data is used to estimate the overload damage probability, and the power transmission overload damage probability data is obtained; Step S3: performing cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; Based on the overload damage cascade impact data, the circuit limit load level is divided into circuit limit load levels to obtain the circuit limit load level; Step S4: dynamically adapt the test case according to the circuit limit load level to obtain a damage edge condition test adaptation case; Based on the damage edge condition test adaptation case, the automated test firmware is designed to obtain the damage automated test firmware, and the damage automated test firmware is sent to the terminal to perform PCBA automated testing.

2. The PCBA automated testing method according to claim 1, characterized in that: Step S1 includes the following steps: Step S11: Obtain PCBA circuit design data and PCBA circuit theoretical power consumption operation range; Step S12: marking the circuit routing of the PCBA circuit design data to obtain circuit routing marking data; Step S13: Calculating the average difference of the line width of the circuit routing mark data according to the PCBA circuit design data to obtain the average difference of the line routing width; Step S14: constructing a three-dimensional model of the PCBA circuit according to the average difference in line width and the PCBA circuit design data to obtain a three-dimensional model of the PCBA circuit.

3. The PCBA automated testing method according to claim 1, characterized in that: Step S2 includes the following steps: Step S21: constructing a virtual simulation environment for the PCBA circuit three-dimensional model to obtain a circuit virtual simulation environment; Step S22: collecting power transmission fluctuation test data of the circuit virtual simulation environment according to the PCBA circuit theoretical power consumption operation range to obtain power transmission fluctuation test data; Step S23: using a preset power fluctuation abnormality identification model to identify abnormal fluctuations in the power transmission fluctuation test data, and obtaining power transmission abnormal fluctuation data; Step S24: Estimating the overload damage probability of the power transmission abnormal fluctuation data to obtain power transmission overload damage probability data.

4. The PCBA automated testing method according to claim 3, characterized in that: Step S24 includes the following steps: Step S241: performing amplitude offset segmentation processing on the abnormal power transmission fluctuation data to obtain abnormal amplitude offset segmentation data; Step S242: performing segmented amplitude integration based on the abnormal amplitude offset segmented data to obtain segmented amplitude offset integrated data; Step S243: performing amplitude concentration distribution analysis on the abnormal amplitude offset segmented data according to the amplitude offset segmented integral data to obtain the amplitude concentration distribution degree; Step S244: performing geometric analysis of abnormal heat accumulation in segments according to the amplitude concentration distribution degree and the segmented integral data of the amplitude offset to obtain geometric analysis of abnormal heat accumulation in segments; Step S245: Estimating the overload damage probability based on the segmented abnormal heat accumulation geometric data to obtain power transmission overload damage probability data.

5. The PCBA automated testing method according to claim 4, characterized in that: Step S244 includes the following steps: According to the amplitude concentration distribution degree and the amplitude offset segmented integral data, the abnormal heat dynamic gradient field is obtained to obtain the abnormal heat segmented gradient field; Perform anisotropic offset vector analysis on abnormal heat segmented gradient field to obtain segmented heat offset vector data; Perform geometric fitting processing on the segmented heat offset vector data to obtain heat offset geometric fitting data; Based on the heat offset proportional fitting data, the segmented abnormal heat accumulation proportional analysis is performed to obtain the segmented abnormal heat accumulation proportional data.

6. The PCBA automated testing method according to claim 1, characterized in that: Step S3 includes the following steps: Step S31: normalizing the power transmission overload damage probability data to obtain power transmission overload damage normalized data; Step S32: performing cascade impact analysis based on the normalized data of power transmission overload damage to obtain overload damage cascade impact data; Step S33: Based on the overload damage cascade impact data and the power transmission overload damage normalization data, the circuit limit load level is divided into circuit limit load levels to obtain the circuit limit load level.

7. The PCBA automated testing method according to claim 6, characterized in that: Step S33 includes the following steps: Step S331: performing multi-dimensional vector field mapping processing based on the overload damage cascade impact data and the power transmission overload damage normalization data to obtain overload damage vector correlation data; Step S332: Calculate the thermal distribution of circuit nodes on the overload damage vector correlation data to obtain thermal distribution characteristic data of circuit nodes; Step S333: calculating the overload thermal instability variance according to the circuit node thermal distribution characteristic data and the overload damage vector correlation data to obtain the overload thermal instability variance data; Step S334: performing critical value fitting on the overload thermal instability variance data to obtain overload thermal instability critical value fitting data; Step S335: dividing the circuit limit load level according to the overload thermal instability variance data and the overload thermal instability critical value fitting data to obtain the circuit limit load level.

8. The PCBA automated testing method according to claim 7, characterized in that: Step S334 includes the following steps: Perform nonlinear reduction processing on the overload thermal instability variance data to obtain the reduced overload thermal instability vector data; The reduced overload thermal instability vector data is processed by multi-partition thermodynamic analysis to obtain the thermal instability partition critical analysis data; According to the critical analysis data of thermal instability partitions and the thermal distribution characteristic data of circuit nodes, a critical gain matrix is ​​fitted to obtain a gain critical gain matrix; Based on the gain critical gain matrix, critical numerical fitting is performed to obtain the critical numerical fitting data of overload thermal instability.

9. The PCBA automated testing method according to claim 1, characterized in that: Step S4 includes the following steps: Step S41: performing level edge condition sampling on the overload damage cascade impact data and the power transmission overload damage probability data according to the circuit limit load level to obtain overload damage level edge condition data; Step S42: dynamically adapt the test case to the overload damage level edge condition data to obtain a damage edge condition test adaptation case; Step S43: Design automated test firmware based on the damage edge condition test adaptation case to obtain damage automated test firmware, and send the damage automated test firmware to the terminal to perform PCBA automated testing.

10. A PCBA automated testing system, characterized in that: Used to perform the PCBA automated testing method according to claim 1, the PCBA automated testing system comprises: A three-dimensional model building module is used to obtain PCBA circuit design data and the theoretical power consumption operation range of the PCBA circuit; calculate the average difference of line width according to the PCBA circuit design data to obtain the average difference of line routing width; and build a three-dimensional model of the PCBA circuit according to the average difference of line routing width to obtain a three-dimensional model of the PCBA circuit; The overload damage probability estimation module is used to collect power transmission fluctuation test data of the PCBA circuit three-dimensional model according to the PCBA circuit theoretical power consumption operation range to obtain power transmission fluctuation test data; identify abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data; estimate the overload damage probability of the abnormal power transmission fluctuation data to obtain power transmission overload damage probability data; The load level classification module is used to perform cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; based on the overload damage cascade impact data, the circuit limit load level is classified to obtain the circuit limit load level; The automated firmware design module is used to dynamically adapt the test cases according to the circuit limit load level to obtain the damage edge condition test adaptation cases; based on the damage edge condition test adaptation cases, the automated test firmware is designed to obtain the damage automated test firmware, and the damage automated test firmware is sent to the terminal to perform PCBA automated testing.

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