Layout constraint generation method and device of chip standard unit, equipment and medium

In the backend design of FPGA chip, the module placement and aspect ratio debugging are used to generate layout constraint scripts, which solves the problem of unsatisfactory standard unit layout and achieves fast and accurate layout result generation.

CN120030978AActive Publication Date: 2025-05-23SHANGHAI XINLU TECH CO LTD
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Patent Information

Application Number
CN202510514088.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-23
Publication Date
2025-05-23
Estimated Expiration
2045-04-23

AI Technical Summary

Technical Problem

In the FPGA chip backend design, the standard unit layout results are not ideal, and there are problems such as poor timing performance of critical paths, excessive winding resource consumption and improper netlist function adjustment, resulting in the inability to implement the design's expected functions, and the layout constraint script writing time and labor cost are high.

Method used

By calculating the module size and core area information in advance, module placement and aspect ratio debugging are performed in the graphical interface, and layout constraint scripts can be generated that can be used in EDA tools, reducing time and labor costs and improving layout accuracy.

Benefits of technology

It realizes the rapid generation of layout constraint scripts that meet user requirements, reduces the development time of FPGA chips, and improves layout accuracy and user debugging efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a layout constraint generation method and device of a chip standard unit, equipment and a medium. The layout constraint generation method for the chip standard cells comprises the following steps: determining initial width and initial height information of a core region according to provided area information of all standard cells and an expected aspect ratio, Site width, Site height and expected utilization rate of the core region; classifying the provided placement modules, and determining initial width and initial height information of each placement module; according to an area verification rule of the placement module, adjusting initial width and initial height information of the placement module; and sequentially arranging the placement modules in the core area according to the placement verification rule of the placement modules. According to the layout constraint generation method of the chip standard unit provided by the embodiment of the invention, the time cost and the labor cost of layout constraint script writing can be greatly reduced, and the digital back-end process is accelerated.
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Description

Technical Field

[0001] The present disclosure relates to the technical field of chip design, and particularly to a method, apparatus, device and medium for generating layout constraints of chip standard cells. Background Art

[0002] The main work of digital chip backend design is to complete the design process of the chip from the gate-level netlist to the GDSII physical layout.

[0003] For the conventional chip backend design process, the placement of standard cells is mainly carried out by using EDA tool software. After the user provides the gate-level netlist as an input file to the EDA software, by using the EDA software in combination with its embedded algorithms, a large number of standard cells in the gate-level netlist can be directly placed, while taking into account the requirements of timing, routing resources, design rule checking, etc. to a certain extent. This process is called placement. However, there are also flaws in the use of the conventional placement process. Although the EDA software will determine the positions of the standard cells according to the input information such as the pin connection relationships of each standard cell in the gate-level netlist and the timing constraint file, limited by its internal algorithms, when the mainstream EDA software performs placement on some special designs such as field programmable gate arrays (FPGAs), the layout results of its standard cells are often not very satisfactory. In particular, there are problems such as poor timing performance of critical paths, excessive consumption of routing resources, unexpected functional adjustments to the netlist, such as unexpected adjustments to the types and quantities of standard cells in the netlist, resulting in the inability to achieve the design's expected functions.

[0004] Therefore, the existing technology still needs to be improved.

[0005] It should be noted that the above introduction to the technical background is only for the convenience of clearly and completely explaining the technical solutions of the present application and facilitating the understanding of those skilled in the art. It cannot be considered that the above technical solutions are well-known to those skilled in the art just because these solutions are described in the background art part of the present application. Summary of the Invention

[0006] In order to solve at least one of the above problems and one or more of other potential problems, the present disclosure proposes a method, apparatus, device and medium for generating layout constraints of chip standard cells, which can greatly reduce the time cost and labor cost of writing layout constraint scripts and accelerate the progress of the digital backend process.

[0007] In a first aspect of the present disclosure, a layout constraint generation method for a chip standard cell is proposed, the method comprising: determining initial width and initial height information of a core area according to provided area information and expected utilization of all standard cells and expected aspect ratio of a core area, width of a site, and height of a site; classifying provided placement modules into categories, and determining initial width and initial height information of each of the placement modules; adjusting initial width and initial height information of the placement modules according to area verification rules of the placement modules to obtain initial placement width and initial placement height information of the placement modules; sequentially arranging the placement modules in the core area according to placement verification rules of the placement modules; when the placement modules are arranged in the core area, obtaining the core area information and the placement module arrangement information at the current moment, and then converting the obtained placement module layout information into a usable layout constraint script.

[0008] Further, in some embodiments, the above-mentioned determining the initial width and initial height information of the core area based on the provided area information and expected utilization of all standard cells and the expected aspect ratio of the core area, the width of the Site, and the height of the Site includes: determining the initial area of ​​the above-mentioned core area based on the provided area information and the expected utilization of all standard cells; determining the initial width and initial height information of the above-mentioned core area based on the expected aspect ratio of the above-mentioned core area, the width of the Site, the height of the Site and the initial area of ​​the above-mentioned core area.

[0009] Further, in some embodiments, the initial area of ​​the core area is determined based on the area information and expected utilization of all the provided standard cells, including: obtaining the area of ​​each standard cell among all the standard cells, summing the obtained areas of all the standard cells to obtain the total area of ​​all the standard cells; and determining the initial area of ​​the core area based on the expected utilization of the core area and the total area of ​​all the standard cells.

[0010] Further, in some embodiments, the initial width and initial height information of the core area are determined based on the expected aspect ratio of the core area, the width of Site, the height of Site and the initial area of ​​the core area, including: determining the expected width information and the expected height information of the core area based on the initial area of ​​the core area and the expected aspect ratio of the core area; determining the multiple of the expected width and the width of Site as the initial width of the core area by rounding up; determining the multiple of the expected height and the height of Site as the initial height of the core area by rounding up.

[0011] Further, in some embodiments, the provided placement modules are divided into categories, and the initial width and initial height information of each of the above-mentioned placement modules are determined, including: dividing the same placement modules in all the provided placement modules into the same category; when the placement modules belonging to the same category are set as loosely constrained modules, determining the sum of the areas of all standard cells in the placement modules belonging to the loosely constrained modules and belonging to the same category; determining the expected width information and expected height information of each of the above-mentioned placement modules belonging to the loosely constrained modules and belonging to the same category according to the sum of the areas of all standard cells in the placement modules belonging to the loosely constrained modules and belonging to the same category, the internal utilization rate and the internal aspect ratio; determining the multiple of the expected width of each of the above-mentioned placement modules belonging to the loosely constrained modules and belonging to the same category and the width of Site by rounding up as the initial width of each of the above-mentioned placement modules belonging to the loosely constrained modules and belonging to the same category; determining the multiple of the expected height of each of the above-mentioned placement modules belonging to the loosely constrained modules and belonging to the same category and the height of Site by rounding up as the initial height of each of the above-mentioned placement modules belonging to the loosely constrained modules and belonging to the same category.

[0012] Furthermore, in some embodiments, the provided placement modules are classified, and the initial width and initial height information of each of the placement modules are determined, which further includes: when the placement modules belonging to the same class category are set as strict constraint modules, determining the sum of the areas of all standard cells in the placement modules belonging to the strict constraint modules and belonging to the same class category; determining the expected width information and expected height information of each of the placement modules belonging to the same class category according to the sum of the areas of all standard cells in the placement modules belonging to the strict constraint modules and belonging to the same class category, the internal arrangement mode, the internal utilization rate and the internal aspect ratio; determining the multiple of the expected width of each of the placement modules belonging to the strict constraint modules and belonging to the same class category and the width of Site by rounding up as the initial width of each of the placement modules belonging to the strict constraint modules and belonging to the same class category; determining the multiple of the expected height of each of the placement modules belonging to the strict constraint modules and belonging to the same class category and the height of Site by rounding up as the initial height of each of the placement modules belonging to the strict constraint modules and belonging to the same class category.

[0013] Further, in some embodiments, according to the area verification rule of the above placement module, the initial width and initial height information of the above placement module are adjusted to obtain the placement initial width and placement initial height information of the above placement module, including the following steps: S1, check whether the standard cells in the placement module that belong to the strictly constrained module and belong to the same class can be arranged in the above placement module according to the above internal arrangement; S2, when the standard cells in the placement module that belong to the strictly constrained module and belong to the same class cannot be arranged in the above placement module according to the above internal arrangement, while keeping the total area within the set capacity range, reduce the initial height of the above placement module by 1 standard height and increase the initial width of the above placement module by 1 standard width, or reduce the initial width of the above placement module by 1 standard width and increase the initial height of the above placement module by 1 standard height, and rearrange the standard cells in the above placement module in the above placement module according to the above internal arrangement, where one standard height is the height of 1 Site and one standard width is the width of 1 Site; re-execute step S1; S3, when the standard cells in the placement module that belong to the strictly constrained module and belong to the same class are arranged in the above placement module according to the above internal arrangement, obtain the placement initial width and placement initial height information of the above placement module according to the adjusted width and adjusted height of the above placement module at this time.

[0014] Further, in some embodiments, in the above step S2, when the standard unit in the placement module that belongs to the strict constraint module and belongs to the same class category cannot be arranged in the above placement module according to the above internal arrangement method, while keeping the total area within the set capacity range, the initial height of the above placement module is reduced by 1 standard height and the initial width of the above placement module is increased by 1 standard width, or the initial width of the above placement module is reduced by 1 standard width and the initial height of the above placement module is increased by 1 standard height, including: when the area of ​​the above placement module is greater than the set capacity range after reducing the initial height of the above placement module by 1 standard height and increasing the initial width of the above placement module by 1 standard width, repeatedly reducing the initial height of the above placement module by 1 standard height until the area of ​​the above placement module falls within the set capacity range; when the initial height of the above placement module is reduced by 1 standard height and the initial width of the above placement module is increased by 1 standard width, After the initial width of the placement module is increased by 1 standard width, if the area of ​​the placement module is smaller than the set capacity range, the additional increase of the initial width of the placement module by 1 marked width is repeated until the area of ​​the placement module falls within the set capacity range; when the initial width of the placement module is reduced by 1 standard width and the initial height of the placement module is increased by 1 standard height, if the area of ​​the placement module is larger than the set capacity range, the additional reduction of the initial width of the placement module by 1 standard width is repeated until the area of ​​the placement module falls within the set capacity range; when the initial width of the placement module is reduced by 1 standard width and the initial height of the placement module is increased by 1 standard height, if the area of ​​the placement module is smaller than the set capacity range, the additional increase of the initial height of the placement module by 1 standard height is repeated until the area of ​​the placement module falls within the set capacity range.

[0015] Further, in some embodiments, the above-mentioned placing modules in the core area in sequence according to the placement verification rule of the above-mentioned placement modules includes: when the selected first placement module is placed in the above-mentioned core area, the placement coordinate point of the first corner of the selected rectangular placement module is set to coincide with the integer coordinate point of the closest distance in the above-mentioned core area, and the coordinate points of the remaining corners of the above-mentioned first placement module are rearranged according to the adjusted coordinate point of the first corner of the above-mentioned first placement module, so that the selected rectangular placement module is placed in the above-mentioned core area; when the selected second placement module is placed in the above-mentioned core area where the first placement module is placed, the placement coordinate point of the first corner of the selected rectangular placement module is set to coincide with the integer coordinate point of the closest distance in the above-mentioned core area. The nearest integer coordinate points in the core area coincide with each other, and the coordinate points of the remaining corners of the second placement module are rearranged according to the adjusted coordinate point of the first corner of the second placement module; check whether the coordinate point of each of the four corners of the rectangular second placement module falls within the first placement module, and check whether the coordinate point of each of the four corners of the rectangular first placement module falls within the second placement module; when the coordinate point of each of the four corners of the second placement module does not fall within the first placement module, and the coordinate point of each of the four corners of the first placement module does not fall within the second placement module, the selected rectangular second placement module is arranged in the core area where the first placement module is placed.

[0016] Further, in some embodiments, the above-mentioned placing the above-mentioned placement modules in the above-mentioned core area in sequence according to the placement verification rules of the above-mentioned placement modules also includes: when the coordinate point of any one of the four corners of the above-mentioned second placement module falls within the above-mentioned first placement module, or when the coordinate point of any one of the four corners of the above-mentioned first placement module falls within the above-mentioned second placement module; adjusting the four corner coordinate points of the above-mentioned second placement module in a rectangular shape, so that the coordinate point of each of the four corners of the above-mentioned second placement module does not fall within the above-mentioned first placement module, and at the same time, the coordinate point of each of the four corners of the above-mentioned first placement module does not fall within the above-mentioned second placement module.

[0017] Further, in some embodiments, the above-mentioned adjustment of the four corner coordinate points of the above-mentioned second placement module into a rectangular shape includes: increasing one or more standard widths of the four corner coordinate points of the above-mentioned second placement module at the same time, or reducing one or more standard widths of the four corner coordinate points of the above-mentioned second placement module at the same time, or increasing one or more standard heights of the four corner coordinate points of the above-mentioned second placement module at the same time, or reducing one or more standard heights of the four corner coordinate points of the above-mentioned second placement module at the same time.

[0018] Further, in some embodiments, the above-mentioned placing the above-mentioned placement modules in the above-mentioned core area in sequence according to the placement verification rule of the above-mentioned placement module also includes: when placing the selected third placement module in the above-mentioned core area where the above-mentioned first placement module and the above-mentioned second placement module are placed, the placement coordinate point of the first corner of the selected rectangular placement module is set to coincide with the integer coordinate point of the closest distance in the above-mentioned core area, and the coordinate points of the remaining corners of the above-mentioned third placement module are rearranged according to the adjusted coordinate point of the first corner of the above-mentioned third placement module; the coordinate points of each of the four corners of the above-mentioned third placement module in the rectangular shape are checked. Whether the punctuation mark falls within the first placement module and the second placement module, and whether the coordinate point of each of the four corners of the rectangular-shaped first placement module and the second placement module falls within the third placement module; when the coordinate point of each of the four corners of the third placement module does not fall within the first placement module and the second placement module, and the coordinate point of each of the four corners of the first placement module and the second placement module does not fall within the third placement module, the selected rectangular-shaped third placement module is arranged in the core area where the first placement module and the second placement module are placed.

[0019] Furthermore, in some embodiments, the placing of the placement modules in the core area in sequence according to the placement verification rules of the placement modules further includes: when the selected Nth placement module is placed in the core area where the first to N-1th placement modules are placed, the placement coordinate point of the first corner of the selected rectangular Nth placement module is set to coincide with the integer coordinate point of the closest distance in the core area, and the coordinate points of the remaining corners of the Nth placement module are rearranged according to the adjusted coordinate point of the first corner of the Nth placement module; and checking whether the coordinate point of each of the four corners of the rectangular Nth placement module falls within the first placement module. The module is placed in the N-1th placement module, and at the same time, it is checked whether the coordinate point of each of the four corners of the rectangular-shaped first placement module to the N-1th placement module falls within the Nth placement module; when the coordinate point of each of the four corners of the Nth placement module does not fall within the first placement module to the N-1th placement module, and at the same time, the coordinate point of each of the four corners of the first placement module to the N-1th placement module does not fall within the Nth placement module, the selected rectangular-shaped Nth placement module is arranged in the core area where the first placement module to the N-1th placement module are placed; wherein N is a positive integer greater than 3.

[0020] In a second aspect of the present disclosure, a layout constraint generating device for a chip standard cell is provided, the device comprising: a core area initialization unit, for determining the initial width and initial height information of the core area according to the provided area information of all standard cells and the expected aspect ratio of the core area, the width of the Site, the height of the Site and the expected utilization rate; a placement module initialization unit, for classifying the provided placement modules and determining the initial width and initial height information of each of the placement modules; a placement module initial adjustment unit, for adjusting the initial width and initial height information of the placement modules according to the area verification rules of the placement modules to obtain the placement initial width and placement initial height information of the placement modules; a placement module arrangement unit, for arranging the placement modules in the core area in sequence according to the placement verification rules of the placement modules; and a constraint condition acquisition unit, for acquiring the core area information and the placement module arrangement information at the current moment after the placement modules complete the arrangement in the core area.

[0021] In a third aspect of the present disclosure, an electronic device is provided, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the layout constraint generation method for the chip standard unit as described above when executing the computer program.

[0022] In a fourth aspect of the present disclosure, a computer-readable storage medium is further provided, on which a computer program is stored, wherein the computer program, when executed by a processor, implements the steps of the method for generating layout constraints for a chip standard cell as described above.

[0023] Compared with the prior art, the present disclosure has the following beneficial effects: By setting the basic information of the standard cell, the initial width and initial height information of the core area are determined; and the initial width and initial height information of each placement module are determined; and according to the area verification rule of the placement module, the initial width and initial height information of the placement module are adjusted to obtain the placement initial width and placement initial height information of the placement module; according to the placement verification rule of the placement module, the placement modules are arranged in the core area in sequence; then the core area information and the placement module arrangement information at the current moment are obtained as the layout constraint content of the chip standard cell, and the layout constraint data is obtained, which reduces the development time of the FPGA chip; further, in some embodiments, the initial width and initial height information of the placement module are adjusted by the area verification rule of the placement module and the placement verification rule of the placement module, and the placement module is effectively arranged in the core area, thereby improving the accuracy of the layout. The layout constraint generation method of the above-mentioned chip standard cell is conducive to implementation through a graphical user interface, which is convenient for operations such as aspect ratio adjustment and position placement of different module constraints, and greatly improves the user debugging efficiency compared to EDA tools. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings, in which: Figure 1 A flow chart of a method for generating layout constraints for a chip standard cell according to an embodiment of the present disclosure is shown; Figure 2 A schematic diagram showing a layout constraint generating device for a chip standard cell according to an embodiment of the present disclosure; and In the various drawings, the same or corresponding reference numerals denote the same or corresponding parts. DETAILED DESCRIPTION

[0025] Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as being limited to the embodiments described herein. On the contrary, these embodiments are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not intended to limit the scope of protection of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.

[0026] In the description of the embodiments of the present disclosure, the term "including" and similar terms should be understood as open inclusion, that is, "including but not limited to". The term "based on" should be understood as "based at least in part on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first", "second", etc. may refer to different or the same objects. Other explicit and implicit definitions may also be included below. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0027] It should be understood that although the terms first, second, third, etc. may be used in the present application to describe various information, these information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0028] Generally, the main work of digital chip back-end design is to complete the chip design process from gate level netlist to GDSⅡ physical layout. In this process, the layout of standard cells has a significant impact on the final performance, area, power consumption and other key indicators of the chip. The product advantages brought by reasonable standard cell placement mainly include: shortening the critical path, reducing the delay of the critical path, and improving chip performance; avoiding extra consumption of winding resources, reducing winding difficulty and reducing winding resource expenses, helping to reduce chip area; reducing timing violations and design rule check violations and other chip pre-tapeline sign-off check violations, reducing the number of iterations, and accelerating chip tape-out.

[0029] Furthermore, for the conventional back-end design process of chips, the placement of standard cells is mainly carried out by using the EDA tool software for back-end chip design (EDA, Electronic Design Automation, that is, the electronic design automation software used for very large-scale integrated circuits; the EDA software mentioned in this disclosure all refers to the electronic design automation software corresponding to the back-end chip design part). After the user provides the gate-level netlist as an input file to the EDA software, by using the EDA software in conjunction with its embedded algorithms, a large number of standard cells in the gate-level netlist can be directly placed in the core area (Core area, that is, the main functional area of the chip, and the standard cells are placed in this area), while meeting the requirements of timing, routing resources, design rule checking, etc. to a certain extent. This process is called placement. However, there are also flaws in the use of the conventional placement process. Although the EDA software will automatically determine the positions of the standard cells according to the input information such as the pin connection relationships of each standard cell in the gate-level netlist and the timing constraint files, limited by its internal algorithms, it does not always achieve satisfactory placement results. Currently, the mainstream back-end design EDA software is mainly designed for the back-end design process of application-specific integrated circuit (ASIC) chips, which results in less than ideal placement results when it comes to placing some special designs, such as field programmable gate array (FPGA). Specific problems include, for example, poor timing performance of critical paths; excessive consumption of routing resources; unexpected functional adjustments to the netlist, such as unexpected adjustments to the types and quantities of standard cells in the netlist, resulting in the inability to achieve the design's expected functions. This is also a problem that users have to face when they hope to carry out the back-end process of chips with special designs. Furthermore, it is very necessary to use a placement constraint script to constrain the placement process to obtain a placement result that better meets the user's requirements. However, how to quickly obtain a usable placement constraint script often requires spending a large amount of human and time costs to write, and it cannot be quickly debugged and iterated.

[0030] In order to solve the above problems, the conventional solution is to provide more refined constraints for EDA tools, including more detailed timing constraint files; and manually written layout constraint scripts for EDA software, which deeply constrain the behavior of EDA software during the layout process. The constraints include: limiting the height and width of the area where the standard cells of the specified module can be placed; limiting the position of the area where the standard cells of the specified module can be placed; for some key modules, directly specifying the position of each standard cell to which it belongs, etc. Obviously, as the refinement of the constraint script increases, the constraint script is more likely to achieve the expected layout effect, but the time and labor cost required for its writing will continue to increase. In the current chip back-end design, on the one hand, the number of standard cells is often in the hundreds of thousands or even tens of millions, or even more than 100 million; on the other hand, the utilization rate of a single chip needs to be maintained at a high level to reduce the area cost. Accurately constraining so many standard cells in a small area means that the length of the layout constraint file may be very long, which means that the workload of writing such a script will be very large, and the time cost of script writing is high. Moreover, since standard cells cannot be placed randomly in the core area but need to be placed on the Site, if the coordinates, height, width and other data in the constraint script are not integer multiples of the height and width of the Site, it may cause accuracy problems in the layout constraint script. In addition, after such scripts are completed for the first time, multiple debugging is often required to compare the performance under different placement conditions to determine the final constraint solution. On EDA tools, operations such as quickly moving standard cells of specified modules in batches are not convenient, which further increases the time cost and prolongs the design time.

[0031] In order to solve at least one of the above problems, as well as one or more of the other potential problems, in some embodiments of the present disclosure, an attempt is made to capture and calculate the size and aspect ratio of different modules and the size, length-width ratio and other information of the core area in advance before the layout process of the formal digital back-end process, and to perform free placement and aspect ratio debugging of different module instantiations in a separate graphical interface. Finally, based on the layout results of the graphical interface, a layout constraint script that can be directly used in the EDA tool software is directly output, which greatly reduces the time and labor costs of writing the layout constraint script and accelerates the progress of the digital back-end process.

[0032] It should be understood that in some embodiments of the present disclosure, the standard unit (for example, it can also be called Standard-Cell, the basic placement unit in the chip back-end process) refers to the basic placement unit in the chip back-end process; the core area (for example, it can also be called Core area, the main functional area of ​​the chip, used to place the standard unit) refers to the main functional area of ​​the chip, used to place the standard unit; Site refers to the basic size unit in the chip back-end; the width of the Site refers to the basic length unit of the chip width and coordinates, which is related to the process; the height of the Site refers to the basic length unit of the chip height and coordinates, which is also related to the process; the module (for example, the placement module, including the module to be placed and the placed module) refers to a collection of standard units with specific functions. It should be understood that in some embodiments of the present disclosure, obtaining the placement initial width and placement initial height information of the placement module refers to the reasonable placement initial width and placement initial height information. In some embodiments, the loose constraint in the loose constraint module means that the user only wants to specify the position of the module in the subsequent placement, and does not require the placement of the standard unit inside the module. In some embodiments, the strict constraints in the strict constraint module mean that the user not only wants to specify the location of the module in the subsequent placement, but also has requirements for the placement of the standard units inside the module. Further, in some embodiments, 1 standard height refers to the height of 1 Site; 1 standard width refers to the width of 1 Site.

[0033] It should also be understood that in some embodiments of the present disclosure, the layout constraint generation method of the chip standard unit can produce a script for the EDA software as an input file, as a constraint file for its layout to obtain the desired layout result. Further, in some embodiments, the layout constraint generation method of the chip standard unit includes: an input file generation sub-method for reading the designed EDA software and outputting the input file of the tool; a layout debugging method for manual layout debugging of the target design, including adjusting the position and aspect ratio of different modules (for example, through a user-operable graphical interface); an output file generation method, after the layout plan is finally confirmed, for converting the coordinate file generated by the tool into a layout constraint script file that can be used for the EDA tool.

[0034] In contrast, the traditional layout constraint file output method is mostly written directly on site by users, such as manually writing commands in the layout constraint script: constrain module A in a specific constraint method M in the target area {(X1, Y1) (X2, Y2)}; or confirm in advance that the placement requirements of some modules conform to certain rules. In this case, scripts can be used for batch generation, such as using scripts to batch generate N similar commands: constrain module An in a specific constraint method Mn in the target area {(X1n, Y1n) (X2n, Y2n)}. However, both methods have problems: for the former, when the number of modules to be constrained is large, the time cost of using this method of writing one by one will be very high; and for the latter, even if it solves the problem of script writing speed to a certain extent, for the specific placement of each module constraint, considering that the parameters and placement requirements of different modules are often inconsistent, there may not always be obvious rules to follow, which makes it difficult to simply use scripts for batch processing. For example, when different modules need to be placed, users need to manually define information such as the aspect ratio and position of each module. When there are many types of modules, this part of the work alone will be very complicated. In addition, both methods lack intuitive debugging methods: users need to run the commands on the back-end EDA to view the results after writing them, and then adjust the aspect ratio and position of the constraints in the script according to the results on the EDA's graphical interface. This process is not intuitive, inconvenient and time-consuming, which greatly increases the debugging cost of generating layout constraint files.

[0035] It should also be understood that in some embodiments of the present disclosure, considering that the standard cell must be placed in the core area (Core area), on the Row composed of Site, the optional position coordinates of the standard cell are not continuous, but discrete. Here, the Site height and width are referred to as the standard height (basic height) and standard width (basic width), which come from the PDK (Process Design Kit) of the process node currently used. Only when the coordinate value provided to the standard cell is an integer multiple of the basic height (standard height) and the basic width (standard width) can the tool accurately place and fix it, otherwise it will be forcibly adjusted by the EDA tool due to illegal coordinate problems. Similarly, the width and height of the core area (Core area) should also be integer multiples of the basic height and basic width to avoid waste of the core area (Core area), and the width and height of the module corresponding to the constraint area should also be integer multiples of the basic height and basic width to improve the accuracy of the constraint.

[0036] The following is a further description with reference to the accompanying drawings.

[0037] Figure 1A flow chart of a layout constraint generation method for a chip standard cell according to an embodiment of the present disclosure is shown. In the illustrated example embodiment, a layout constraint generation method 100 for a chip standard cell is shown, and the layout constraint generation method 100 for a chip standard cell includes: step 120, determining the initial width and initial height information of the core area according to the area information and expected utilization of all standard cells provided, the expected aspect ratio of the core area, the width of the Site, and the height of the Site; step 140, classifying the provided placement modules, and determining the initial width and initial height information of each of the above placement modules; step 160, for example, first determining whether its initial size information is reasonable according to the area verification rule of the above placement module. If it is unreasonable, adjusting the initial width and initial height information of the above placement module; step 180, according to the placement verification rule of the above placement module, sequentially arranging the above placement modules in the above core area; step 190, when the above placement modules complete the arrangement in the above core area, obtaining the above core area information and the above placement module arrangement information at the current moment, and converting them into a layout constraint script. It should be understood that in actual use, it is often difficult to encounter the situation of "once in place", but it is necessary to repeatedly debug and place. Therefore, after the modules have been placed, the placed modules can still be cancelled, moved, cancelled and adjusted in aspect ratio (i.e., aspect ratio), and rearranged. For this reason, after step 180, step 182 may be included, the placement module arranged in the core area may be readjusted in aspect ratio, or readjusted in the position of the new core area, or the placement module arranged in the core area may be cancelled, and the verification of step 160 and step 180 may be re-executed; further, step 192 may be included, after obtaining the core area information and the placement module arrangement information at the current moment, the core area information and the placement module arrangement information are stored, so as to set the baseline of the work and facilitate forward tracing. Further, step 194 may be included, after obtaining the core area information and the placement module arrangement information at the current moment, the corresponding information is converted into a layout constraint script, so as to allow the user to use the script to reproduce the desired placement layout on the digital backend EDA.

[0038] Further, in some embodiments, for step 120, the above-mentioned determining the initial width and initial height information of the core area based on the provided area information and expected utilization of all standard cells and the expected aspect ratio of the core area, the width of the Site, and the height of the Site includes: determining the initial area of ​​the above-mentioned core area based on the provided area information and the expected utilization of all standard cells; determining the initial width and initial height information of the above-mentioned core area based on the expected aspect ratio of the above-mentioned core area, the width of the Site, the height of the Site and the initial area of ​​the above-mentioned core area.

[0039] Further, in some embodiments, the initial area of ​​the core area is determined based on the area information and expected utilization of all the provided standard cells, including: obtaining the area of ​​each standard cell among all the standard cells, summing the obtained areas of all the standard cells to obtain the total area of ​​all the standard cells; and determining the initial area of ​​the core area based on the expected utilization of the core area and the total area of ​​all the standard cells.

[0040] Further, in some embodiments, the initial width and initial height information of the core area are determined based on the expected aspect ratio of the core area, the width of Site, the height of Site and the initial area of ​​the core area, including: determining the expected width information and the expected height information of the core area based on the initial area of ​​the core area and the expected aspect ratio of the core area; determining the multiple of the expected width and the width of Site as the initial width of the core area by rounding up; determining the multiple of the expected height and the height of Site as the initial height of the core area by rounding up.

[0041] It should be understood that from the user's perspective, the user adjusts the parameters of the input file data generated according to their own needs, including: 1) the expected aspect ratio of the core area (Core area); 2) the expected utilization of the core area (Core area); 3) the name of the module expected to be strictly constrained; 4) the name of the module expected to be loosely constrained and the expected utilization inside. When the user provides this information, the tool is in place and can be used to read the input file and perform layout operations on the EDA software to obtain a file containing all the input information required for the subsequent steps.

[0042] Further, in some embodiments, the provided placement modules are divided into categories, and the initial width and initial height information of each of the above-mentioned placement modules are determined, including: dividing the same placement modules in all the provided placement modules into the same category; when the placement modules belonging to the same category are set as loosely constrained modules, determining the sum of the areas of all standard cells in the placement modules belonging to the loosely constrained modules and belonging to the same category; determining the expected width information and expected height information of each of the above-mentioned placement modules belonging to the loosely constrained modules and belonging to the same category according to the sum of the areas of all standard cells in the placement modules belonging to the loosely constrained modules and belonging to the same category, the internal utilization rate and the internal aspect ratio; determining the multiple of the expected width of each of the above-mentioned placement modules belonging to the loosely constrained modules and belonging to the same category and the width of Site by rounding up as the initial width of each of the above-mentioned placement modules belonging to the loosely constrained modules and belonging to the same category; determining the multiple of the expected height of each of the above-mentioned placement modules belonging to the loosely constrained modules and belonging to the same category and the height of Site by rounding up as the initial height of each of the above-mentioned placement modules belonging to the loosely constrained modules and belonging to the same category. It should be understood that for a loose constraint module, a loose constraint (loose constraint) is adopted, and it is only necessary to determine the name of the loose constraint module and the expected utilization rate inside it.

[0043] Furthermore, in some embodiments, the provided placement modules are classified, and the initial width and initial height information of each of the placement modules are determined, which further includes: when the placement modules belonging to the same class category are set as strict constraint modules, determining the sum of the areas of all standard cells in the placement modules belonging to the strict constraint modules and belonging to the same class category; determining the expected width information and expected height information of each of the placement modules belonging to the same class category according to the sum of the areas of all standard cells in the placement modules belonging to the strict constraint modules and belonging to the same class category, the internal arrangement mode, the internal utilization rate and the internal aspect ratio; determining the multiple of the expected width of each of the placement modules belonging to the strict constraint modules and belonging to the same class category and the width of Site by rounding up as the initial width of each of the placement modules belonging to the strict constraint modules and belonging to the same class category; determining the multiple of the expected height of each of the placement modules belonging to the strict constraint modules and belonging to the same class category and the height of Site by rounding up as the initial height of each of the placement modules belonging to the strict constraint modules and belonging to the same class category. It should be understood that for strictly constrained modules, it is necessary to additionally provide a strictly constrained module file or data content, which includes the module name information that is desired to be strictly constrained and the standard unit instance name (instance name) information and arrangement order information to which it belongs; further, its arrangement order information, for example, can be the sequential arrangement of each type of standard unit therein.

[0044] Therefore, it can be understood that the input file generation method can be run using the EDA software that reads the target netlist to generate a file containing the following information as input information for the next stage, for example: 1) the height and width of the core area (Core area); 2) the name of the module to be constrained (including the strictly constrained module and the loosely constrained module) and its height and width; 3) among them, the category name (reference name) and instance name (instance name) of all standard cells inside the strictly constrained module; 4) the names of all instantiations of all modules that need to be constrained and their height and width. Regarding the height and width of the core area (Core area); data can be generated through input files (for example, scripts), and then the sum of all standard cell areas in the Gate Level Netlists corresponding to the target design will be obtained from the EDA tool; then, the sum of the areas will be divided by the expected utilization rate preset by the user to obtain the expected total area of ​​the core area (Core area); then, based on the expected aspect ratio of the core area (Core area) preset by the user, the height and width of the aspect ratio will be obtained; then, this height and width will be converted into integer multiples of the standard height (base height) and the standard width (base width) (rounded up); then, the core area (Core area) will be used as the area for layout and placement.

[0045] It should also be understood that the name and height and width information of the module to be constrained; the input file generation step will capture more information about the corresponding module and all its instantiations based on the target module name provided by the user, depending on the different constraint methods defined by the user. For two constraint methods: strict constraint or loose constraint (loose constraint); strict constraint means that the final output constraint file will contain the location of each standard unit under the module, maximizing the accuracy of the constraint; while loose constraint will only provide a specified rectangular coordinate range for all standard units under the corresponding module in the constraint file to guide the layout, and the layout of the standard unit inside the area is performed by the EDA tool. Further, for the module that needs strict constraints, the type name of the standard unit under it and the number of each standard unit, height and width (unit is basic height and basic width) are captured; if it is a module that only needs loose constraints, the sum of the areas of all standard units under it is calculated in the EDA tool, and then the sum of the areas is divided by the user's expected module utilization; the area size of the corresponding area of ​​the module can be obtained, and then the height and width are determined according to the initial aspect ratio set by the user. Similarly, the height and width also need to be converted into integer multiples of the base height and base width (rounded up). All this information will be output to the next level as input data for subsequent layout.

[0046] Further, in some embodiments, according to the area verification rule of the above-mentioned placement module, the initial width and height of the placement module provided by the previous level are verified. If the verification fails, the initial width and initial height information of the above-mentioned placement module are adjusted to obtain the adjusted, legal initial width and initial height information of the above-mentioned placement module. It should be understood that the reason for the above-mentioned operation steps is that for the strictly constrained module, we calculate the expected length and width of the module based on the sum of the areas of the internal standard units. We can ensure that the area of ​​the module must be greater than the sum of the areas of the internal standard units by rounding up during calculation. However, considering the size of the standard unit, this cannot guarantee that the internal standard unit can be placed in the corresponding module area (for example, a module corresponding area is a square, and there is a rectangular standard unit with a total area of ​​half of it, but it is extremely narrow and long, then whether the standard unit can be placed in the module depends on whether the length of the standard unit is less than the side length of the module). For this reason, it is also necessary to try to place it according to the internal placement order of the strictly constrained module provided by the user, in order to confirm whether the current height and width are reasonable. The method comprises the following steps: S1, checking whether the standard cells in the placement modules belonging to the strict constraint modules and the same name class category can be arranged in the placement modules according to the above internal arrangement mode; S2, when the standard cells in the placement modules belonging to the strict constraint modules and the same name class category cannot be arranged in the placement modules according to the above internal arrangement mode, while keeping the total area within the set capacity range, reducing the initial height of the placement modules by 1 standard height and increasing the initial width of the placement modules by 1 or more standard widths, or reducing the initial width of the placement modules by 1 standard width and increasing the initial height of the placement modules by 1 or more standard heights, and rearranging the standard cells in the placement modules in the placement modules according to the above internal arrangement mode, wherein one standard height is the height of 1 Site and one standard width is the width of 1 Site; re-executing step S1; S3, when the standard cells in the placement modules belonging to the strict constraint modules and the same name class category can be arranged in the placement modules according to the above internal arrangement mode, obtaining the placement initial width and placement initial height information of the placement modules according to the adjusted width and adjusted height of the placement modules at this time.

[0047] Further, in some embodiments, in the above step S2, when the standard unit in the placement module that belongs to the strict constraint module and belongs to the same class category cannot be arranged in the above placement module according to the above internal arrangement method, while keeping the total area within the set capacity range, the initial height of the above placement module is reduced by 1 standard height and the initial width of the above placement module is increased by 1 standard width, or the initial width of the above placement module is reduced by 1 standard width and the initial height of the above placement module is increased by 1 standard height, including: when the area of ​​the above placement module is greater than the set capacity range after reducing the initial height of the above placement module by 1 standard height and increasing the initial width of the above placement module by 1 standard width, repeatedly reducing the initial height of the above placement module by 1 standard height until the area of ​​the above placement module falls within the set capacity range; when the initial height of the above placement module is reduced by 1 standard height and the initial width of the above placement module is increased by 1 standard width, After the initial width of the placement module is increased by 1 standard width, if the area of ​​the placement module is less than the set capacity range, the initial width of the placement module is repeatedly increased by 1 standard width until the area of ​​the placement module falls within the set capacity range; when the initial width of the placement module is reduced by 1 standard width and the initial height of the placement module is increased by 1 standard height, if the area of ​​the placement module is greater than the set capacity range, the initial width of the placement module is repeatedly reduced by 1 standard width until the area of ​​the placement module falls within the set capacity range; when the initial width of the placement module is reduced by 1 standard width and the initial height of the placement module is increased by 1 standard height, if the area of ​​the placement module is less than the set capacity range, the initial height of the placement module is repeatedly increased by 1 standard height until the area of ​​the placement module falls within the set capacity range. It should be understood that the additional adjustment of 1 standard height or 1 standard width is performed step by step, that is, it may be necessary to adjust N standard heights or N standard widths to reach the point where the area of ​​the placement module falls within the set capacity range, which increases the stability of the adjustment.

[0048] Further, in some embodiments, the above-mentioned placement modules are sequentially arranged in the above-mentioned core area according to the placement verification rules of the above-mentioned placement modules, including: when the selected first placement module is arranged in the above-mentioned core area, the placement coordinate point of the first corner (generally, in some embodiments, the upper left corner is the default) of the selected rectangular first placement module is set to coincide with the integer coordinate point of the nearest distance in the above-mentioned core area, and the coordinate points of the remaining corners of the above-mentioned first placement module are rearranged according to the adjusted coordinate point of the first corner of the above-mentioned first placement module. Since the module is rectangular and the length and width are both integer multiples of the standard height and the standard width, when the coordinate point of one corner is an integer, the coordinate points of the remaining corners must also be integers, thereby making the selected rectangular first placement module be arranged in the above-mentioned core area; when the selected second placement module is arranged in the above-mentioned core area where the first placement module is placed, the selected rectangular second placement module is arranged in the above-mentioned core area. The placement coordinate point of the first corner of the second placement module is set to coincide with the integer coordinate point with the nearest distance in the above-mentioned core area, and the coordinate points of the remaining corners of the above-mentioned second placement module are rearranged according to the adjusted coordinate point of the first corner of the above-mentioned second placement module; then, it is determined whether the second placement module to be placed has an overlapping relationship with the first placement module that has been placed, and for this purpose, it is checked whether the coordinate point of each of the four corners of the above-mentioned second placement module in a rectangular shape falls within the above-mentioned first placement module, and at the same time, it is checked whether the coordinate point of each of the four corners of the above-mentioned first placement module in a rectangular shape falls within the above-mentioned second placement module; when the coordinate point of each of the four corners of the above-mentioned second placement module does not fall within the above-mentioned first placement module, and at the same time, the coordinate point of each of the four corners of the above-mentioned first placement module does not fall within the above-mentioned second placement module, the selected rectangular second placement module is arranged in the above-mentioned core area where the above-mentioned first placement module is placed.

[0049] Further, in some embodiments, the above-mentioned placing the above-mentioned placement modules in the above-mentioned core area in sequence according to the placement verification rules of the above-mentioned placement modules also includes: when the coordinate point of any one of the four corners of the above-mentioned second placement module falls within the above-mentioned first placement module, or when the coordinate point of any one of the four corners of the above-mentioned first placement module falls within the above-mentioned second placement module; adjusting the four corner coordinate points of the above-mentioned second placement module in a rectangular shape, so that the coordinate point of each of the four corners of the above-mentioned second placement module does not fall within the above-mentioned first placement module, and at the same time, the coordinate point of each of the four corners of the above-mentioned first placement module does not fall within the above-mentioned second placement module.

[0050] Further, in some embodiments, the above-mentioned adjustment of the four corner coordinate points of the above-mentioned second placement module in a rectangular shape includes: increasing the horizontal coordinates of the four corner coordinate points of the above-mentioned second placement module by one or more standard widths at the same time (for example, setting the standard width as the horizontal coordinate), or reducing the horizontal coordinates of the four corner coordinate points of the above-mentioned second placement module by one or more standard widths at the same time, or increasing the vertical coordinates of the four corner coordinate points of the above-mentioned second placement module by one or more standard heights at the same time (for example, setting the standard height as the vertical coordinate), or reducing the vertical coordinates of the four corner coordinate points of the above-mentioned second placement module by one or more standard heights at the same time.

[0051] Further, in some embodiments, the above-mentioned placing the above-mentioned placement modules in the above-mentioned core area in sequence according to the placement verification rule of the above-mentioned placement module also includes: when placing the selected third placement module in the above-mentioned core area where the above-mentioned first placement module and the above-mentioned second placement module are placed, the placement coordinate point of the first corner of the selected rectangular placement module is set to coincide with the integer coordinate point of the closest distance in the above-mentioned core area, and the coordinate points of the remaining corners of the above-mentioned third placement module are rearranged according to the adjusted coordinate point of the first corner of the above-mentioned third placement module; the coordinate points of each of the four corners of the above-mentioned third placement module in the rectangular shape are checked. Whether the punctuation mark falls within the first placement module and the second placement module, and whether the coordinate point of each of the four corners of the rectangular-shaped first placement module and the second placement module falls within the third placement module; when the coordinate point of each of the four corners of the third placement module does not fall within the first placement module and the second placement module, and the coordinate point of each of the four corners of the first placement module and the second placement module does not fall within the third placement module, the selected rectangular-shaped third placement module is arranged in the core area where the first placement module and the second placement module are placed.

[0052] Further, in some embodiments, the above-mentioned placing the above-mentioned placement modules in the above-mentioned core area in sequence according to the placement verification rule of the above-mentioned placement modules also includes: when the selected Nth placement module is placed in the above-mentioned core area where the above-mentioned first placement module to the above-mentioned N-1th placement module are placed, the placement coordinate point of the first corner of the selected rectangular Nth placement module is set to coincide with the integer coordinate point of the closest distance in the above-mentioned core area, and the coordinate points of the remaining corners of the above-mentioned Nth placement module are rearranged according to the adjusted coordinate point of the first corner of the above-mentioned Nth placement module; check whether the coordinate point of each of the four corners of the above-mentioned Nth placement module in the rectangular shape falls within the first placement module. The selected rectangular Nth placement module is placed in the N-1th placement module, and at the same time, it is checked whether the coordinate point of each of the four corners of the rectangular-shaped first placement module to the N-1th placement module falls within the Nth placement module; when the coordinate point of each of the four corners of the Nth placement module does not fall within the first placement module to the N-1th placement module, and at the same time, the coordinate point of each of the four corners of the first placement module to the N-1th placement module does not fall within the Nth placement module, the selected rectangular-shaped Nth placement module is arranged in the core area where the first placement module to the N-1th placement module are placed; wherein N is a positive integer greater than 3.

[0053] It should also be understood that as a placement module (generally, a rectangular area), it will first appear to be adsorbed to the nearest grid (i.e., coordinates are integerized). For example, the currently selected module to be placed will be placed preferentially in the upper left corner of this rectangular area; if there is a module that has been placed in the upper left corner, then an overlap detection based on the placement verification rule will be performed; if there is an overlap, then another place where it can be placed will be tried; for example, first, it will be tried whether the right side of the module to be placed (rectangle) can accommodate the module, that is, the height coordinates of the four vertices (e.g., set as the Y-axis coordinates) remain unchanged, but the width coordinates (e.g., set as the X-axis coordinates) are uniformly increased by 1 standard width, and then overlap is detected, and the cycle continues until a place that can be placed is found; if the right side does not work, it will try the bottom, that is, first restore the coordinates of the module to be placed to the upper left corner, and then continue to explore downwards (which can be expressed as the width coordinate remains unchanged, while the height coordinate is uniformly reduced by 1 standard height) until a place that can be placed is found. That is, it can be understood that the entire placement module tries to translate in the upper, lower, left, and right directions in the core area as a whole, in order to find an overlap detection that passes the placement verification rule. If the position is found, the module is finally placed at that position.

[0054] It should be understood that from the user's perspective, before placement, the user adjusts the aspect ratio of the instantiations of different modules (the area shape is a rectangle); specifically, according to the different constraint methods of the module (strict, loose), the adjustment algorithm is also different. Among them, for the instantiation of the module that needs strict constraints, the number, height and width of each standard unit under it are already in the input file. Therefore, when adjusting the aspect ratio, it will be calculated in real time according to the number, height and width of the standard units inside it to ensure that the rectangular area can definitely place all the standard units belonging to it. At this time, the user can also make detailed edits to the instantiation of this module: the user can adjust the spatial order of the arrangement of the standard units inside the current rectangular area. For the instantiation of the loosely constrained module, when adjusting the aspect ratio, since it will first calculate its basic area based on the default height and width in the input file, and then based on the default height and default width in the input file, the aspect ratio is adjusted with the total area as close to the basic area as possible, on the premise that the total area is greater than or equal to the basic area. In terms of position, since all standard units need to be placed on rows (layout tracks) in the digital backend process, and their minimum spacing needs to be a specific integer multiple of sites (the minimum standard unit width unit in PDK), the placement of all modules also needs to be an integer multiple of the height and width of the site. In particular, when users place modules, position adsorption will be used to ensure that the final position is in a legal position, that is, the horizontal and vertical coordinate values ​​are both integers (that is, the actual coordinates are integer multiples of the corresponding base height or base width).

[0055] Furthermore, for the strictly constrained module, since its internal standard unit information has been input, its arrangement inside the module can also be adjusted. For example, it can be adjusted separately. Furthermore, when the user has basically determined the aspect ratio of the module and the internal arrangement order of the strictly constrained module, the user can start to place it. Furthermore, while laying out, a set of placement coordinate data is generally generated in real time; the main content of this data is basically the same as the layout input data, but for the instantiation part, coordinate information is added (the interval unit can be converted from the standard height and standard width to the normal unit, such as μm). In particular, in order to eliminate the interference of the unplaced module, for each instantiation, its coordinate will be negative when it is not placed, and the real coordinate after placement will be after placement.

[0056] Furthermore, the generated constraint algorithm includes: after completing the above layout (for example, in a diagram), that is, after the placement module is arranged in the core area, obtaining the core area information and the placement module arrangement information at the current moment, and outputting the data information as layout constraint data that can be used with the EDA tool. For example, while the layout is being performed, a set of placement coordinate data is generated in real time to record the current placement situation; for example, it includes the following information: 1) the height and width of the core area (Core area); 2) for the strictly constrained module, the position information of each standard unit inside it; 3) for the loosely constrained module, the position information and size information of the corresponding tentative placement area; thereby converting the output data into a layout constraint method that can be used by an EDA tool, the method may include: setting the height and width of the Core area of ​​the current design, setting the position of each standard unit of the strictly constrained module, and setting the position and size of the corresponding area of ​​each module of the loosely constrained module; its specific commands are related to the EDA tool itself. Furthermore, if it is implemented in a script program, for example, after the constraint script is generated, the generated constraint script can be run in a loaded EDA tool to obtain the expected layout result; further, by timely checking the layout results, timely adjustments can be made when unexpected situations are found in the layout results.

[0057] Figure 2 A schematic diagram of a layout constraint generating device for a chip standard cell according to an embodiment of the present disclosure is shown. In the illustrated embodiment, a layout constraint generating device for a chip standard cell is also provided, the device comprising: a core area initialization unit, for determining the initial width and initial height information of the core area according to the area information of all standard cells provided and the expected aspect ratio of the core area, the width of the Site, the height of the Site and the expected utilization rate; a placement module initialization unit, for classifying the provided placement modules and determining the initial width and initial height information of each of the above placement modules; a placement module initial adjustment unit, for adjusting the initial width and initial height information of the above placement modules according to the area verification rules of the above placement modules to obtain the placement initial width and placement initial height information of the above placement modules; a placement module arrangement unit, for arranging the above placement modules in the above core area in sequence according to the placement verification rules of the above placement modules; a constraint condition acquisition unit, for acquiring the above core area information and the above placement module arrangement information at the current moment after the above placement modules complete the arrangement in the above core area. Afterwards, the arrangement information is converted into a layout constraint script to allow the user to use the script to reproduce the desired placement layout on the digital backend EDA.

[0058] In addition, according to an embodiment of the present disclosure, an electronic device is provided, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the layout constraint generation method for the chip standard unit as described above when executing the computer program.

[0059] In addition, according to an embodiment of the present disclosure, a computer-readable storage medium is further provided, on which a computer program is stored, wherein the computer program, when executed by a processor, implements the steps of the method for generating layout constraints for a chip standard cell as described above.

[0060] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

[0061] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. For those skilled in the art, the present disclosure may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A method for generating layout constraints for a chip standard cell, characterized in that: include: Determine the initial width and initial height information of the core area according to the area information and expected utilization of all standard cells provided, the expected aspect ratio of the core area, the width of the site, and the height of the site; Classify the provided placement modules into categories, and determine initial width and initial height information of each placement module; According to the area verification rule of the placement module, the initial width and initial height information of the placement module are adjusted to obtain the placement initial width and initial height information of the placement module; Arranging the placement modules in the core area in sequence according to the placement verification rules of the placement modules; After the placement module completes the arrangement in the core area, the core area information and the placement module arrangement information at the current moment are obtained.

2. The method according to claim 1, characterized in that The step of determining the initial width and initial height information of the core area according to the provided area information and expected utilization of all standard cells, the expected aspect ratio of the core area, the width of the Site, and the height of the Site includes: Determining the initial area of ​​the core area according to the area information and expected utilization of all standard cells provided; The initial width and initial height information of the core area are determined according to the expected aspect ratio of the core area, the width of the Site, the height of the Site, and the initial area of ​​the core area.

3. The method according to claim 2, characterized in that The step of determining the initial area of ​​the core region according to the provided area information and expected utilization of all standard cells includes: Acquiring the area of ​​each standard cell among all the standard cells, and summing the acquired areas of all the standard cells to obtain the total area of ​​all the standard cells; An initial area of ​​the core area is determined according to an expected utilization rate of the core area and a total area of ​​all standard cells.

4. The method according to claim 3, characterized in that The determining the initial width and initial height information of the core area according to the expected aspect ratio of the core area, the width of the Site, the height of the Site, and the initial area of ​​the core area includes: Determining expected width information and expected height information of the core area according to the initial area of ​​the core area and the expected aspect ratio of the core area; Determine the multiple of the expected width and the width of the Site by rounding up to an integer as the initial width of the core area; The multiple of the expected height and the height of the Site is determined by rounding up to an integer to serve as the initial height of the core area.

5. The method according to claim 1, characterized in that Classifying the provided placement modules into categories and determining initial width and initial height information of each placement module, including: Classifying identical placement modules among all provided placement modules into the same class category; When the placement modules belonging to the same class category are set as loosely constrained modules, determining the sum of the areas of all standard cells in the placement modules belonging to the loosely constrained modules and belonging to the same class category; Determine the expected width information and expected height information of each placement module belonging to the loose constraint module and belonging to the same name class according to the sum of the areas of all standard cells in the placement modules belonging to the loose constraint module and belonging to the same name class category, the internal utilization rate and the internal aspect ratio; Determine the multiple of the expected width of each placement module belonging to the loose constraint module and the same class category and the width of the Site by rounding up to use as the initial width of each placement module belonging to the loose constraint module and the same class category; The multiple of the expected height of each placement module belonging to the loose constraint module and the same class category and the height of the Site is determined by rounding up to serve as the initial height of each placement module belonging to the loose constraint module and the same class category.

6. The method according to claim 5, characterized in that Classifying the provided placement modules into categories and determining the initial width and initial height information of each placement module, further comprising: When the placement modules belonging to the same name class category are set as strict constraint modules, determining the sum of the areas of all standard cells in the placement modules belonging to the strict constraint modules and belonging to the same name class category; Determine the expected width information and expected height information of each placement module belonging to the same category according to the sum of the areas of all standard cells in the placement modules belonging to the strict constraint module and the same category, the internal arrangement mode, the internal utilization rate and the internal aspect ratio; Determine the multiple of the expected width of each placement module belonging to the strict constraint module and the same name class category and the width of the Site by rounding up to use as the initial width of each placement module belonging to the strict constraint module and the same name class category; The multiple of the expected height of each placement module belonging to the strict constraint module and the same class category and the height of the Site is determined by rounding up to serve as the initial height of each placement module belonging to the strict constraint module and the same class category.

7. The method according to claim 6, characterized in that According to the area verification rule of the placement module, the initial width and initial height information of the placement module are adjusted to obtain the placement initial width and placement initial height information of the placement module, including the following steps: S1, checking whether the standard cells in the placement module belonging to the strict constraint module and the same name class category can be arranged in the placement module according to the internal arrangement mode; S2, when the standard cells in the placement module belonging to the strict constraint module and the same name category cannot be arranged in the placement module according to the internal arrangement mode, while keeping the total area within the set capacity range, reduce the initial height of the placement module by 1 standard height and increase the initial width of the placement module by 1 standard width, or reduce the initial width of the placement module by 1 standard width and increase the initial height of the placement module by 1 standard height, and rearrange the standard cells in the placement module in the placement module according to the internal arrangement mode, wherein one standard height is the height of 1 Site and one standard width is the width of 1 Site; re-execute step S1; S3, when the standard cells in the placement module belonging to the strict constraint module and the same name class are arranged in the placement module according to the internal arrangement method, the initial placement width and initial placement height information of the placement module are obtained according to the adjusted width and adjusted height of the placement module at this time.

8. The method according to claim 7, characterized in that In the step S2, when the standard cells in the placement module belonging to the strict constraint module and the same name category cannot be arranged in the placement module according to the internal arrangement mode, the initial height of the placement module is reduced by 1 standard height and the initial width of the placement module is increased by 1 standard width, or the initial width of the placement module is reduced by 1 standard width and the initial height of the placement module is increased by 1 standard height while keeping the total area within the set capacity range, including: After reducing the initial height of the placement module by 1 standard height and increasing the initial width of the placement module by 1 standard width, if the area of ​​the placement module is larger than the set capacity range, repeatedly reducing the initial height of the placement module by 1 standard height until the area of ​​the placement module falls within the set capacity range; After reducing the initial height of the placement module by 1 standard height and increasing the initial width of the placement module by 1 standard width, if the area of ​​the placement module is smaller than the set capacity range, repeatedly increase the initial width of the placement module by 1 standard width until the area of ​​the placement module falls within the set capacity range; After reducing the initial width of the placement module by 1 standard width and increasing the initial height of the placement module by 1 standard height, if the area of ​​the placement module is larger than the set capacity range, repeatedly reducing the initial width of the placement module by 1 standard width until the area of ​​the placement module falls within the set capacity range; After reducing the initial width of the placement module by 1 standard width and increasing the initial height of the placement module by 1 standard height, when the area of ​​the placement module is smaller than the set capacity range, repeatedly increase the initial height of the placement module by 1 standard height until the area of ​​the placement module falls within the set capacity range.

9. The method according to claim 1, characterized in that: The placing modules are sequentially arranged in the core area according to the placement verification rules of the placement modules, comprising: When placing the selected first placement module in the core area, the placement coordinate point of the first corner of the selected rectangular first placement module is set to coincide with the nearest integer coordinate point in the core area, and the coordinate points of the remaining corners of the first placement module are rearranged according to the adjusted coordinate point of the first corner of the first placement module, so that the selected rectangular first placement module is placed in the core area; When the selected second placement module is arranged in the core area where the first placement module is placed, the placement coordinate point of the first corner of the selected rectangular second placement module is set to coincide with the integer coordinate point of the closest distance in the core area, and the coordinate points of the remaining corners of the second placement module are rearranged according to the adjusted coordinate point of the first corner of the second placement module; checking whether the coordinate point of each of the four corners of the rectangular second placement module falls within the first placement module, and checking whether the coordinate point of each of the four corners of the rectangular first placement module falls within the second placement module; When the coordinate point of each of the four corners of the second placement module does not fall within the first placement module, and at the same time the coordinate point of each of the four corners of the first placement module does not fall within the second placement module, the selected rectangular second placement module is arranged in the core area where the first placement module is placed.

10. The method according to claim 9, characterized in that The placing modules are sequentially arranged in the core area according to the placement verification rules of the placement modules, and further comprises: When the coordinate point of any one of the four corners of the second placement module falls within the first placement module, or when the coordinate point of any one of the four corners of the first placement module falls within the second placement module; adjust the four corner coordinate points of the second rectangular placement module so that the coordinate point of each of the four corners of the second placement module does not fall within the first placement module, and at the same time, the coordinate point of each of the four corners of the first placement module does not fall within the second placement module.

11. The method according to claim 10, characterized in that The four corner coordinate points of the second placement module for adjusting the rectangular shape include: The four corner coordinate points of the second placement module are increased by one or more standard widths at the same time, or the four corner coordinate points of the second placement module are reduced by one or more standard widths at the same time, or the four corner coordinate points of the second placement module are increased by one or more standard heights at the same time, or the four corner coordinate points of the second placement module are reduced by one or more standard heights at the same time.

12. The method according to claim 9, characterized in that The placing modules are sequentially arranged in the core area according to the placement verification rules of the placement modules, and further comprises: When the selected third placement module is arranged in the core area where the first placement module and the second placement module are placed, the placement coordinate point of the first corner of the selected rectangular placement module is set to coincide with the integer coordinate point of the closest distance in the core area, and the coordinate points of the remaining corners of the third placement module are rearranged according to the adjusted coordinate point of the first corner of the third placement module; check whether the coordinate point of each of the four corners of the rectangular third placement module falls within the first placement module and the second placement module, and check whether the coordinate point of each of the four corners of the rectangular first placement module and the second placement module falls within the third placement module; When the coordinate point of each of the four corners of the third placement module does not fall within the first placement module and the second placement module, and at the same time the coordinate point of each of the four corners of the first placement module and the second placement module does not fall within the third placement module, the selected rectangular-shaped third placement module is arranged in the core area where the first placement module and the second placement module are placed.

13. The method according to claim 9, characterized in that The placing modules are sequentially arranged in the core area according to the placement verification rules of the placement modules, and further comprises: When the selected Nth placement module is arranged in the core area where the first to N-1th placement modules are placed, the placement coordinate point of the first corner of the selected rectangular Nth placement module is set to coincide with the integer coordinate point of the closest distance in the core area, and the coordinate points of the remaining corners of the Nth placement module are rearranged according to the adjusted coordinate point of the first corner of the Nth placement module; check whether the coordinate point of each of the four corners of the rectangular Nth placement module falls within the first to N-1th placement modules, and check whether the coordinate point of each of the four corners of the rectangular first to N-1th placement modules falls within the Nth placement module; When the coordinate point of each of the four corners of the Nth placement module does not fall within the first placement module to the N-1th placement module, and at the same time, the coordinate point of each of the four corners of the first placement module to the N-1th placement module does not fall within the Nth placement module, the selected rectangular Nth placement module is arranged in the core area where the first placement module to the N-1th placement module are placed; wherein N is a positive integer greater than 3.

14. A layout constraint generating device for a chip standard unit, characterized in that: include: The core area initialization unit is used to determine the initial width and initial height information of the core area according to the area information of all standard cells provided, the expected aspect ratio of the core area, the width of the site, the height of the site and the expected utilization rate; A placement module initialization unit, used for classifying the provided placement modules into categories and determining initial width and initial height information of each placement module; A placement module initial adjustment unit, used to adjust the initial width and initial height information of the placement module according to the area verification rule of the placement module, so as to obtain the placement initial width and placement initial height information of the placement module; a placement module arrangement unit, configured to arrange the placement modules in the core area in sequence according to the placement verification rules of the placement modules; The constraint condition acquisition unit is used to acquire the core area information and the placement module arrangement information at the current moment after the placement module completes the arrangement in the core area.

15. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that: When the processor executes the computer program, the steps of the method for generating layout constraints of a chip standard cell as claimed in any one of claims 1 to 13 are implemented.

16. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method for generating layout constraints of a chip standard cell as claimed in any one of claims 1 to 13 are implemented.

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