Power factor correction rectifier and method

Abstract

The invention relates to a power factor correction rectifier and a method. The invention provides a method for reducing inductive current ripples of a three-phase flying capacitor multi-level boost power factor correction rectifying circuit. The rectifying circuit is provided with three totem pole bridge arms. The method comprises the following steps: for the three-phase flying capacitor multi-level boost power factor correction rectification circuit, determining a corresponding one of the three totem pole bridge arms according to at least one section in a line period or a voltage level of a phase voltage, applying an additional phase shift to one of the totem pole legs at one or more times within the line period; and applying an additional phase offset to center align the midpoint voltages of the three totem-pole bridge arms.

Description

Technical Field

[0001] The present invention relates to a three-phase power factor correction (PFC) rectifier, and more particularly to a three-phase multi-level boost PFC rectifier with a flying capacitor. Background Art

[0002] In applications such as electric vehicle charging and data center power transmission, kilowatt-level three-phase PFC rectifiers are widely used, where PFC rectifiers have both high power density and high conversion efficiency. Flying capacitor multi-level (FCML) rectifiers have great potential for improving the performance of three-phase PFC rectifiers due to their advantages such as smaller required PFC inductors and the use of lower rated voltage switches and high energy density ceramic capacitors. In a single-phase N-level boost PFC rectifier with flying capacitors and phase-shifted pulse width modulation (PWM) (where N is an integer greater than or equal to three), the ripple frequency of the PFC inductor current increases significantly, where the ripple frequency is N-1 times the switching frequency. The increase in ripple frequency leads to a significant reduction in the size of the PFC inductor and electromagnetic interference (EMI) filter, thereby improving the power density. In addition, the voltage stress of the totem pole switch is significantly reduced (for example, the voltage stress is less than 1 / (N-1) of the output voltage), so switches with low rated voltage can be used, which significantly reduces the parasitic capacitance of the switch, thereby improving efficiency. Compared with a single-phase multi-level boost PFC rectifier, the ripple frequency of the PFC inductor current can be further increased in a three-phase multi-level boost PFC rectifier with a flying capacitor. Specifically, in a conventional three-phase two-level six-switch boost PFC rectifier using continuous PWM, the midpoint voltages of the three phase bridge arms are center-aligned, and the ripple frequency of the PFC inductor current is twice the switching frequency. Therefore, if in a three-phase PFC rectifier, the two-level totem pole bridge arm is replaced with an N-level totem pole bridge arm with a flying capacitor and phase-shifted PWM is adopted, the ripple frequency of the PFC inductor current of the three-phase N-level boost PFC rectifier with a flying capacitor will increase to twice the ripple frequency of the PFC inductor current of the single-phase N-level boost PFC rectifier with a flying capacitor (that is, the ripple frequency of the PFC inductor current of the three-phase N-level boost PFC rectifier with a flying capacitor increases to 2(N-1) times the switching frequency). Compared with the single-phase N-level boost PFC rectifier, the doubled ripple frequency in the three-phase N-level boost PFC rectifier can further reduce the size of the PFC inductor and the EMI filter. However, by observing the midpoint voltages of the three totem pole bridge arms, it can be seen that in at least part of the line cycle, the midpoint voltages of the three totem pole bridge arms are not center-aligned. In fact, the midpoint voltages of only two totem pole bridge arms are center-aligned. Therefore, in those parts of the line cycle, the ripple frequency of the three-phase PFC inductor current is not twice that of the corresponding single-phase PFC inductor current.In view of the above, it is desirable to provide a method combining the advantages of a single-phase N-level boost rectifier and a three-phase two-level boost PFC rectifier. Summary of the invention

[0003] In one embodiment, a method for reducing the inductor current ripple of a three-phase flying capacitor multi-level boost power factor correction rectifier circuit is provided, wherein the rectifier circuit has three totem pole bridge arms. The method includes: for the three-phase flying capacitor multi-level boost power factor correction rectifier circuit, according to the voltage level of at least one segment or phase voltage in a line cycle, determining a corresponding one of the three totem pole bridge arms, applying an additional phase offset to the one of the totem pole bridge arms at one or more times in the line cycle; and center-aligning the midpoint voltages of the three totem pole bridge arms by applying the additional phase offset.

[0004] In another embodiment, a power factor correction rectifier is provided, comprising a three-phase flying capacitor multi-level boost power factor correction rectifier circuit and a control circuit. The three-phase flying capacitor multi-level boost power factor correction rectifier circuit comprises three totem pole bridge arms, wherein each totem pole bridge arm comprises a plurality of switches in pairs, and each pair of switches is coupled to a flying capacitor. The control circuit is configured to: for the three-phase flying capacitor multi-level boost power factor correction rectifier circuit, determine a corresponding one of the three totem pole bridge arms according to the voltage level of at least one segment or phase voltage within a line cycle, apply an additional phase offset to one of the totem pole bridge arms at one or more times within the line cycle; and center-align the midpoint voltages of the three totem pole bridge arms by applying the additional phase offset.

[0005] Various aspects of the present invention will be described in the following embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The various aspects of the present invention can be more easily understood through the following schematic diagrams, in which the components are used to illustrate the present invention and are not necessarily drawn to scale. Furthermore, in each schematic diagram, similar reference numerals are used to indicate corresponding parts.

[0007] Figure 1 FIG. 4 is a block diagram of a three-phase flying capacitor N-level boost PFC rectifier according to an embodiment of the present invention.

[0008] Figure 2 exemplify Figure 1 The circuit structure of the three-phase flying capacitor N-level boost PFC rectifier is shown.

[0009] Figure 3 for Figure 1 FIG. 4 is a block diagram of a control circuit with average current control in a three-phase flying capacitor N-level boost PFC rectifier.

[0010] Figure 4 for Figure 3 A block schematic diagram of a portion of a control circuit in FIG.

[0011] Figure 5 exemplify Figure 4 A specific implementation circuit of the PWM module is shown.

[0012] Figure 6 exemplify Figure 4 A specific example circuit of the pulse distribution logic module is shown.

[0013] Fig. 7A The definition of the line period and sixty degree segments is illustrated.

[0014] Figure 7B exemplify Figure 4 A specific implementation circuit of the phase shift section detection module is shown.

[0015] Figure 7C The truth table used to determine the current sixty degree segment in one embodiment of the present case is illustrated.

[0016] Fig. 8A and Figure 8B The simulation waveforms of the three-phase flying capacitor three-level boost PFC rectifier in one embodiment of the present case are respectively illustrated when no additional phase shift control is performed and when additional phase shift control is performed.

[0017] Fig. 9A FIG. 4 shows a simulated waveform of the current of the PFC inductor of a three-phase flying capacitor three-level boost PFC rectifier without additional phase shift control during a line cycle, Fig. 9B The simulated waveform of the current of the PFC inductor of the three-phase flying capacitor three-level boost PFC rectifier with additional phase shift control during the line cycle is shown.

[0018] Fig.10 exemplify Figure 4 The phase shift section detection module in the invention is used in a specific implementation circuit of a three-phase four-level boost PFC rectifier with a flying capacitor.

[0019] Fig.11 In a three-phase flying capacitor four-level boost PFC rectifier, based on the sensed phase voltage (level has shifted V o / 2) and a schematic diagram of simulation waveforms of an input phase detection method for realizing additional phase shift control.

[0020] Fig. 12A and Fig. 12B The simulation waveforms of the three-phase flying capacitor four-level boost PFC rectifier in one embodiment of the present case are respectively illustrated when no additional phase shift control is performed and when additional phase shift control is performed.

[0021] Fig.13A Shows the simulated waveform of the current of the PFC inductor of a three-phase flying-capacitor four-level boost PFC rectifier without additional phase-shift control during an on-line cycle. Fig. 13B Shows the simulated waveform of the current of the PFC inductor of a three-phase flying-capacitor four-level boost PFC rectifier with additional phase-shift control during an on-line cycle.

[0022] Fig.14 Illustrates Figure 4 The phase-shift section detection module in [ ] is used for a specific implementation circuit of a three-phase five-level boost PFC rectifier with flying capacitors.

[0023] Fig.15 Is a schematic diagram of the simulated waveform of an input phase detection method based on sensing phase voltages (levels shifted by V o / 2) and used to implement additional phase-shift control in a three-phase flying-capacitor five-level boost PFC rectifier.

[0024] Fig.16A And Fig. 16B Illustrates respectively the simulated waveforms of a three-phase flying-capacitor five-level boost PFC rectifier in an embodiment of this case without additional phase-shift control and with additional phase-shift control.

[0025] Fig.17A Shows the simulated waveform of the current of the PFC inductor of a three-phase flying-capacitor five-level boost PFC rectifier without additional phase-shift control during an on-line cycle. Fig. 17B Shows the simulated waveform of the current of the PFC inductor of a three-phase flying-capacitor five-level boost PFC rectifier with additional phase-shift control during an on-line cycle.

[0026] Fig.18 Is a schematic flow diagram of a method for reducing the inductor current ripple in a flying-capacitor multilevel PFC rectifier in an embodiment of this case.

[0027] Wherein, the reference numerals are explained as follows:

[0028] 10: Three-phase flying-capacitor multilevel boost power factor correction rectifier

[0029] 12: Flying-capacitor multilevel power factor correction rectifier circuit

[0030] 14: Control circuit

[0031] 16, 16A, 16B, 16C: Totem-pole bridge arms

[0032] La, Lb, Lc: Inductors

[0033] Vxn, Van, Vbn, Vcn: Phase voltages

[0034] iLx, iLa, iLb, iLc: Inductive current

[0035] Ma, Mb, Mc: Neutral point

[0036] Vo,REF, VEA: Voltage

[0037] VO: Output voltage

[0038] Saib, Sam1b, Sam(N-3)b, Saob: Upper switch

[0039] Sbib, Sbm1b, Sbm(N-3)b, Sbob: Upper switch

[0040] Scib, Scm1b, Scm(N-3)b, Scob: Upper switch

[0041] Sai, Sam1, Sam(N-3), Sao: Lower switch

[0042] Sbi, Sbm1, Sbm(N-3), Sbo: Lower switch

[0043] Sci, Scm1, Scm(N-3), Sco: Lower switch

[0044] CFa1, CFa2, CFa(N-1), CFa(N-2): Flying capacitor

[0045] CFb1, CFb2, CFb(N-1), CFb(N-2): Flying capacitor

[0046] CFc1, CFc2, CFc(N-1), CFc(N-2): Flying capacitor

[0047] 18, 18A, 18B, 18C: Leg control circuit

[0048] 26: Phase shift section detection module

[0049] PSx: Signal

[0050] CO: Capacitor

[0051] VCTRLx: Control signal

[0052] 20: PWM module

[0053] 22: Basic carrier generator

[0054] 24: Phase shift carrier generator

[0055] 28: Pulse distribution logic module

[0056] 30: PFC controller

[0057] vCAR, vCAR,360 / (N-1), vCAR,360(N-2) / (N-1), vCAR,PS, vCAR,360 / (N-1),PS, vCAR,360(N-2) / (N-1),PS: carrier

[0058] 32: Comparator

[0059] vicx: output signal

[0060] VPWMxi, VPWMxm1, VPWMxm(N-3), VPWMxo, VPWMxi,PS, VPWMxm1,PS, VPWMxm(N-3),PS, VPWMxo,PS: Pulse

[0061] vGSxi, vGSxib, vGSxm1, vGSxm1b, vGSxm(N-3), vGSxm(N-3)b, vGSxo, vGSxob: gate pulse

[0062] 34: Line cycle

[0063] 36, 38, 40: Phase voltage

[0064] I, II, III, IV, V, VI: Segment

[0065] 26A: Phase shift segment detection module

[0066] 42: Truth Table

[0067] 44: Comparator

[0068] PSa, PSb, PSc: Signal

[0069] 46. ​​VCarrier: Basic triangular carrier

[0070] 48, 50, 52, VMa, VMb, VMc: midpoint voltage

[0071] 54. VLa: boost inductor voltage

[0072] 56. iLa: boost inductor current

[0073] 58, 60, 62: Boost inductor current

[0074] 26B: Phase shift segment detection module

[0075] 64: Comparator

[0076] 66, 68, 70, VaLS, VbLS, VcLS: Phase voltage

[0077] 72, 74, 76: Midpoint voltage

[0078] 78, 80, 82: Boost inductor current

[0079] 84: Basic triangular carrier

[0080] 86, 88, 90: Midpoint voltage

[0081] 92: Boost inductor voltage

[0082] 94: Boost inductor current

[0083] 96, 98, 100: boost inductor current

[0084] 26C: Phase shift segment detection module

[0085] 102, 104, 106: Comparator

[0086] 108: Sixty degree section module

[0087] 110, 112, 114: Phase voltage

[0088] 116, 118, 120: Midpoint voltage

[0089] 122, 124, 126: Boost inductor current

[0090] 127: Basic triangular carrier

[0091] 128, 130, 132: Midpoint voltage

[0092] 134: Boost inductor voltage

[0093] 136: Boost inductor current

[0094] 138, 140, 142: Boost inductor current

[0095] 144: Control Methods

[0096] 146, 148: Steps

[0097] TSW: Switching cycle DETAILED DESCRIPTION

[0098] The present invention discloses some embodiments of a three-phase flying capacitor multi-level (FCML) boost power factor correction (PFC) rectifier and method. In one embodiment of the method, for the three-phase flying capacitor multi-level boost power factor correction rectifier, one of the three totem pole bridge arms is determined according to the voltage level of at least one segment or phase voltage in a line cycle, and an additional phase offset is applied to the gate pulse of the switch of the totem pole bridge arm at one or more times in the line cycle to achieve center alignment of the midpoint voltages of all three totem pole bridge arms. By center alignment of the midpoint voltages of the three totem pole bridge arms, the ripple frequency of the PFC inductor current is twice the ripple frequency of the corresponding single-phase PFC inductor current, and the ripple of the inductor current is also reduced.

[0099] In short, in a conventional two-level three-phase six-switch boost PFC rectifier using continuous PWM, the midpoint voltages of the three totem pole bridge arms are center-aligned, so that the ripple frequency of the PFC inductor current is doubled relative to the switching frequency, thereby significantly reducing the volume of the PFC inductor and the EMI filter. In order to double the ripple frequency of the PFC inductor current of the three-phase FCML boost PFC rectifier (compared to the ripple frequency of the PFC inductor current of the corresponding single-phase FCML boost PFC rectifier), in some embodiments of the three-phase FCML boost PFC rectifier device (also referred to as the three-phase FCML boost PFC rectifier or PFC rectifier device) and method, for the totem pole bridge arm whose midpoint voltage is not center-aligned with the midpoint voltages of the other two totem pole bridge arms, an additional phase offset can be introduced into the gate pulse of its switch so that the midpoint voltages of all three totem pole bridge arms are center-aligned. Therefore, the ripple frequency of the three-phase PFC inductor current is (e.g., always) twice the ripple frequency of the corresponding single-phase PFC inductor current. In addition, the peak-to-peak value of the three-phase PFC inductor current ripple is significantly reduced compared to the peak-to-peak value of the corresponding single-phase PFC inductor current ripple.

[0100] After summarizing some features of the three-phase FCML boost PFC rectifier of the present case, the three-phase FCML boost PFC rectifier illustrated in the accompanying drawings will be described in detail below. Although the three-phase FCML boost PFC rectifier will be described here according to the accompanying drawings, and the focus is on three-level, four-level and five-level configurations, the possible embodiments of the present case are not limited to this. For example, the embodiments can also be applied to multi-level configurations (i.e., N-level configurations, where N is greater than or equal to three) other than three-level, four-level and five-level, all of which are covered by the present case. It should be noted that PFC rectifiers are sometimes referred to as PFC converters in the industry. In addition, although specific details in one or more embodiments are determined or described during the description process, these specific details are not limited to the necessary parts of each embodiment, and the various advantages stated are not limited to being achieved by a single embodiment. The present case is intended to cover various alternatives, modifications and equivalents within the scope of the principles and protection defined by the claims attached to the present case. For example, two or more embodiments may interchange features with each other or be combined in any combination. Furthermore, it should be noted that the appended claims are not limited to the specific embodiments described herein.

[0101] See also Figure 1 , which shows a three-phase flying capacitor multi-level (FCML) boost PFC rectifier 10 in one embodiment. The multi-level (i.e., N-level) referred to herein means three levels or more. In this embodiment, the three-phase FCML boost PFC rectifier 10 includes a FCML (boost) PFC rectifier circuit 12 coupled to a control circuit 14. The FCML PFC rectifier circuit 12 includes three totem pole bridge arms 16 (e.g., totem pole bridge arms 16A, 16B, and 16C), and has correspondingly arranged totem pole switches. For example, as Figure 2 FIG. 1 shows a FCML PFC rectifier circuit 12. The FCML PFC rectifier circuit 12 includes two inductors L coupled to the corresponding a , L b and L c The phase voltage of the three inputs V an 、V bn and V cn . Flowing through the inductor L a , L b and L c The currents are respectively the boost inductor current i La 、i Lb and i Lc The totem pole bridge arm 16A is connected to the phase voltage V an , where the midpoint M a Connect to inductor L a and the upper switch S of the totem pole bridge arm 16Aaib and the lower switch S ai During operation, the midpoint M a The totem pole bridge arm 16B is connected to the phase voltage V bn , where the midpoint M b Connect to inductor L b and the upper switch S of the totem pole bridge arm 16B bib and the lower switch S bi During operation, the midpoint M b The totem pole bridge arm 16C is connected to the phase voltage V cn , where the midpoint M c Connect to inductor L c and the upper switch S of the totem pole bridge arm 16C cib and the lower switch S ci During operation, the midpoint M c Corresponding to the midpoint voltage of the totem pole bridge arm 16C. Generally, each totem pole bridge arm 16 includes a totem pole switch. For example, each totem pole bridge arm 16 includes at least two pairs of (e.g., three-level) switches, wherein each pair of switches includes an upper switch and a lower switch relative to the corresponding midpoint. Taking the totem pole bridge arm 16A as an example, the first pair of switches includes an upper switch S aib and the lower switch S ai and operate in a complementary manner (e.g., one can be switched as a boost switch and the other as a synchronous rectification switch according to the duty cycle). Similarly, the second pair of switches includes an upper switch S am1b and the lower switch S am1 and operate in a complementary manner. The flying capacitor C Fa1 Coupled to the first pair of switches (upper switch S aib and the lower switch S ai ), flying capacitor C Fa2 Coupled to the second pair of switches (upper switch S am1b and the lower switch S am1 ). The switches in the other totem pole bridge arms 16B and 16C are arranged in a similar manner, and if applied to more levels, the switches in each totem pole bridge arm are also arranged in a similar manner. xi and S xib is the internal switch, S xo and S xob For external switch, S xmk and S xmkb (k=1, ..., N-3) is the middle switch (between the inside and the outside), C Fx1 To C Fx(N-2) is the flying capacitance, M x is the midpoint of the totem pole bridge arm, x∈{a,b,c}.

[0102] It should be noted that Figure 2 The transistor type of the switch is not limited to the circuit topology shown. Possible transistor types include, but are not limited to, MOSFET (such as SiC MOSFET) and GaN, all of which are within the scope of the embodiments of the present invention.

[0103] Please refer to Figure 1 The control circuit 14 uses the bridge arm control circuit 18A (for example, for phase a), the bridge arm control circuit 18B (for example, for phase b) and the bridge arm control circuit 18C (for example, for phase c) and cooperates with the phase shift segment detection module 26 to implement PWM control of the switch of the totem pole bridge arm. The dotted line frame around the three bridge arm control circuits 18 (i.e., the bridge arm control circuits 18A, 18B and 18C) in the figure is used to represent the input signal PS x can be provided to any bridge arm control circuit 18. It should be noted that the phase shift segment detection module 26 may additionally or alternatively include a function of determining or detecting a voltage level, which will be described later in accordance with the applications involving four levels, five levels or higher levels in FIGS. 10 to 17B. The bridge arm control circuits 18A, 18B and 18C are identical in structure. In one embodiment, Figure 3 As shown, the control circuit 14 is configured to perform average current-mode control and duty-cycle feedforward control. Figure 3 The control circuit 14 includes a bridge arm control circuit 18 and a phase shift segment detection module 26, wherein the bridge arm control circuit 18 can represent any one of the bridge arm control circuits 18A, 18B, and 18C. In other words, the control circuit 14 includes three bridge arm control circuits 18 (e.g. Figure 1 The bridge arm control circuits 18A, 18B and 18C shown in FIG. Figure 3 The bridge arm control circuit 18 shown has the same structure. In terms of average current mode control, a current controller is used in a feedback control loop, and the line current leads the line voltage. However, since the line current leads the line voltage, a power factor that is not equal to one and zero crossing distortion of the line current may result. Duty cycle feedforward control attempts to overcome this disadvantage by using a duty cycle value determined outside the loop (i.e., outside the feedback control loop), where the duty cycle value can be determined, for example, based on the rectified line voltage and the output voltage of the boost PFC rectifier, and can be referred to as a pre-calculated duty cycle value. In terms of effect, duty cycle feedforward control can reduce the burden of the feedback control loop to perform this task. The pre-calculated duty cycle value is combined with the value of the current control loop to provide a control signal VCTRLx To the PWM module 20. The key components of this case include the PWM module 20 and multiple carrier generators, where the carrier generators include a basic carrier generator 22, a phase-shifted carrier generator 24 (e.g., a phase shift relative to the basic carrier), a phase-shifted section detection module 26, and a pulse distribution logic module 28. It should be noted that x is a, b, or c. In addition, Figure 1 and Figure 3 The components and modules shown in can be provided by those with ordinary knowledge in the art in different arrangement settings to achieve similar effects.

[0104] Please refer to Figure 4 , which shows a part of the control circuit 14 for a three-phase FCML boost PFC rectifier 10 with multiple levels (N levels). Specifically, Figure 4 shows the PFC controller 30 of the control circuit 14 (representing Figure 3 the average current mode and duty cycle feedforward control circuit used in to provide the signal V CTRLx ), the PWM module 20, the basic carrier generator 22, the phase-shifted carrier generator 24, and the phase-shifted section detection module 26. The basic carrier generator 22 and the phase-shifted carrier generator 24 provide two groups of carriers to the PWM module 20. Each group of carriers contains N - 1 carriers, and the two groups of carriers are the basic carrier group (derived from the basic carrier generator 22) and the additional carrier group (derived from the phase-shifted carrier generator 24) respectively. The basic carrier group contains carriers v CAR , v CAR,360 / (N-1) , …, v CAR,360(N-2) / (N-1) , where there is a phase shift of 360 / (N - 1) degrees (i.e., T SW / (N - 1)) between two consecutive carriers. Taking the flying capacitor three-level boost PFC rectifier and the flying capacitor four-level boost PFC rectifier as examples, the basic carrier group contains two carriers and three carriers respectively, and the phase shifts between consecutive carriers are 180 degrees (i.e., T SW / 2) and 120 degrees (T SW / 3) respectively. The additional carrier group contains v CAR,PS , v CAR,360 / (N-1),PS , …, v CAR,360(N-2) / (N-1),PS , where each carrier has a phase shift of 360 / [2(N - 1)] degrees (i.e., T SW / [2(N - 1)]) compared to the corresponding carrier in the basic carrier group. Taking the flying capacitor three-level boost PFC rectifier and the flying capacitor four-level boost PFC rectifier as examples, the carriers in the additional carrier group have phase shifts of 90 degrees (i.e., T SW / 4) and 60 degrees (i.e., T SW / 6) respectively compared to the corresponding carriers in the basic carrier group.

[0105] The PWM module 20 corresponding to each phase includes two groups of comparators, wherein each group of comparators includes N-1 comparators with hysteresis, and the two groups of comparators correspond to two carrier groups respectively. In other words, each carrier has a corresponding comparator with hysteresis. Figure 5 A specific implementation circuit of the PWM module 20 is shown as an example. Figure 5 As shown, the PWM module 20 includes a group of comparators 32. In each comparator 32, an input is a control signal V CTRLx , and the other input is a carrier from the basic carrier generator 22 or the phase-shifted carrier generator 24. Figure 4 and Figure 5 The control signal V output by the PFC controller 30 and input to the PWM module 20 (eg, input to the input of each comparator 32) is CTRLx for Figure 3 The output signal v of the current controller icx The comparator 32 controls the signal V CTRLx In fact, the comparator 32 compares the carrier with the control signal, and the output of the comparator 32 includes pulses based on the basic carrier group (e.g., V PWMxi 、V PWMxm1 etc.) and pulses based on additional carrier groups (phase-shifted carriers) (e.g. V PWMxi,PS 、V PWMxm1,PS etc).

[0106] exist Figure 4 In the phase shift segment detection module 26, a specific totem pole bridge arm 16 (eg, Figure 2 The gate pulse of the switch in the specific totem pole bridge arm 16 has an additional phase shift in different sections of the online cycle. The phase shift section detection module 26 has different detection logics for different level numbers N. The detection logic of the phase shift section detection module 26 will be described below by taking three-level, four-level and five-level three-phase FCML boost PFC rectifiers as examples.

[0107] Based on the signal PS output by the phase shift section detection module 26 x , Figure 4 The pulse distribution logic module 28 in the totem pole bridge arm 16 distributes the PWM pulse output by the PWM module 20 to the switch of the totem pole bridge arm 16. xy The gate pulse is:

[0108]

[0109] In this equation, m, i and o represent the middle switch, the inner switch and the outer switch of the totem pole bridge arm 16 respectively. Figure 6 FIG. 2 is a circuit diagram of a pulse distribution logic module 28. The pulse distribution logic module 28 includes a plurality of logic gates, wherein the logic gates generate a pulse distribution logic module 28 according to the signal PS provided by the phase shift segment detection module 26. x The additional phase-shifted gate pulse (e.g., from the phase-shifted carrier generator 24) or the non-phase-shifted gate pulse (e.g., from the basic carrier generator 22) is selected. In fact, the pulse distribution logic module 28 is provided with a circuit for generating the aforementioned gate pulse v GSxy If PS x =1, then v GSxy =v PWMxy,PS (i.e. phase-shifted pulse); if PS x =0, then v GSxy =v PWMxy (ie no phase-shifted pulses).

[0110] As described above, for different number of levels, the phase shift segment detection module 26 has different detection methods for the portion of the detection line cycle that needs to apply additional phase shift to achieve midpoint voltage alignment. 7A to 7C Emphasis is placed on the segment identification and the final phase shift control to ensure that the midpoint voltage of the illustrated three-phase three-level boost PFC rectifier with flying capacitor is center-aligned. A method embodiment of the present case is described below, which implements an additional phase shift T for the totem pole bridge arm 16 associated with the input phase with the maximum phase-to-neutral voltage absolute value. SW / 4. In order to correctly detect the input phase, the line cycle 34 is divided into six 60-degree segments, so that in each 60-degree segment, there is a phase voltage with the largest absolute value, such as Fig. 7A For example, the line cycle 34 includes a phase voltage 36 (ie, V an ), phase voltage 38 (ie V bn ) and phase voltage 40 (ie V cn ). Each sixty degree segment of the line cycle 34 is indicated by Roman numerals I to VI below the line cycle 34. It should be noted that in each sixty degree segment, one phase voltage has the maximum absolute value, while the voltage waveforms of the other phases intersect each other (such as Fig. 7A For example, in sections I and IV, the phase voltage 36 (V an ) has the largest absolute value, while the other phase voltages 38 and 40 (V bn ,V cn ) does not have the maximum absolute value and the two waveforms intersect each other. Figure 7B An example circuit of the phase shift segment detection module 26A is shown. Figure 7CA truth table 42 is shown for decoding the phase voltages of the line cycle 34. Figure 7B As shown, the phase shift segment detection module 26A includes three comparators 44 with hysteresis, and the input of the comparator 44 includes the corresponding phase voltage V xn (For example, V an 、V bn and V cn ) and ground (reference zero potential). Comparator 44 is used to determine whether the received phase voltage is positive or negative. When the phase voltage is positive, the output of comparator 44 is 1; conversely, when the phase voltage is negative, the output of comparator 44 is zero. For example, Fig. 7A As shown, in section I, the phase voltage V an (36) is positive, and the phase voltage V bn and V cn (38, 40) is negative, so in truth table 42, the phase voltage V in segment I is an 、V bn and V cn The corresponding output values ​​of the comparator 44 are 1, 0 and 0 respectively. Similarly, in section IV, the phase voltage V an (36) is negative, and the phase voltage V bn and V cn (38, 40) is positive, so in truth table 42, the phase voltage V in segment IV is an 、V bn and V cn The corresponding output values ​​of the comparator 44 are 0, 1 and 1 respectively. The binary value combination corresponding to each segment is used to determine the phase shift output signal PS x For example, in segment I, the combination of binary values ​​1, 0, and 0 corresponds to the decoder output 4 (=1*2^2); in segment IV, the combination of binary values ​​0, 1, and 1 corresponds to the decoder output 3 (=0*2^2+1*2^1+1*2^0). Figure 7B As shown, sections I and IV (decoder output 4 and output 3, respectively) cooperate with corresponding logic gates to provide signal PS a The signal for additional phase offset control can be expressed as follows:

[0111] PS a =Segment I+Segment IV

[0112] PS b =Segment III+Segment VI

[0113] PS c =Segment II+Segment V

[0114] In other words, in the segment I or IV of the line cycle 34, the phase voltage V an The totem pole bridge arm (e.g. Figure 2 The gate pulses of the switches of the totem pole bridge arm 16A shown in FIG. 16A are subjected to an additional phase shift (according to the signal PS a ), but not to the totem pole bridge arms corresponding to the other two phases (for example Figure 2 The gate pulses of the switches of the totem pole bridge arms 16B and 16C shown in FIG. 16B are applied with an additional phase offset. Similarly, in the segments III or VI of the line cycle 34, the gate pulses corresponding to the phase voltage V bn The totem pole bridge arm (e.g. Figure 2 The gate pulses of the switches of the totem pole bridge arm 16B shown in FIG. 16A apply an additional phase shift (according to the signal PS b ), but not to the totem pole bridge arms corresponding to the other two phases (for example Figure 2 The gate pulses of the switches of the totem pole bridge arms 16A and 16C shown in FIG. 16A are applied with an additional phase offset. Similarly, in segment II or V of line cycle 34, the gate pulses corresponding to the phase voltage V cn The totem pole bridge arm (e.g. Figure 2 The gate pulses of the switches of the totem pole bridge arm 16C shown in FIG. 16A apply an additional phase shift (according to the signal PS c ), but not to the totem pole bridge arms corresponding to the other two phases (for example Figure 2 An additional phase shift is applied to the gate pulses of the switches of the totem pole bridge legs 16A and 16B as shown.

[0115] To illustrate the operation of a three-phase flying capacitor three-level boost PFC rectifier with additional phase shift control, Fig. 8A , Figure 8B , Fig. 9A and Fig. 9B The important simulation waveforms for a 4.5Kw three-phase flying capacitor three-level boost PFC rectifier are shown, where the inductor L a , L b and L c All are 200uH, and the three independent average current mode controllers operate at a switching frequency of 150kHz. The input voltage of each phase is 220Vrms at 50Hz, and the output voltage is 760V. Fig. 8A The operating waveform without additional phase shift control is shown. Figure 8B The operating waveforms when additional phase shift control is performed are shown. Fig. 8A and Figure 8B The waveforms shown from top to bottom are respectively the basic triangular carrier 46 (i.e., V Carrier ), three totem pole bridge arms (e.g. Figure 2 The midpoint voltages 48, 50 and 52 (i.e., VMa 、V Mb and V Mc ), the boost inductor voltage 54 of phase a (i.e., V La ) and the boost inductor current 56 of phase a (i.e., i La ). The waveform shown magnifies the online cycle (e.g. Fig. 7A In the section I of the line cycle 34) of the phase voltage V an The waveform near the peak value, and as above according to 7A to 7C As mentioned above, in section I, the phase voltage V an has the largest absolute value and is determined according to the signal PS a Apply a phase shift. Fig. 8A As shown, the midpoint voltage 48 of the totem pole bridge arm corresponding to phase a is not centrally aligned with the midpoint voltages 50 and 52 of the totem pole bridge arms corresponding to the other two phases, but has T SW / 4 phase shift. Generally speaking, in a three-phase multi-level boost PFC rectifier with a flying capacitor, by observing the midpoint voltages of the three totem pole bridge arms, it can be seen that in the entire line cycle or certain sections of the line cycle, only the midpoint voltages of two totem pole bridge arms are center-aligned. In addition, Fig. 8A The boost inductor current 56 (i La ) has a ripple frequency that is twice the switching frequency, i.e. f ripple,iLa =2f SW , which is a simulation result of the operation of a three-phase three-level boost PFC. It can be seen that the flying capacitor causes the inductor current to repeat in a single switching cycle (using at least two sets of switches), thereby increasing the ripple frequency. In some embodiments of the three-phase flying capacitor three-level boost PFC rectifier, an additional phase offset is applied to the gate pulse of the switch of a specific totem pole bridge arm, wherein the midpoint voltage of the specific totem pole bridge arm is not center-aligned with the midpoint voltages of other totem pole bridge arms. By additionally applying a phase offset in the corresponding section, the midpoint voltages of all three totem pole bridge arms can be center-aligned, thereby doubling the ripple frequency of the boost inductor current. In this example, by applying the midpoint voltage of the totem pole bridge arm corresponding to phase a to T SW / 4 phase shift, the midpoint voltages of all three totem pole bridge arms can be center-aligned, such as Figure 8B The waveforms of the midpoint voltages 48, 50, and 52 are shown. Figure 8B As shown, the midpoint voltages of all three totem pole bridge arms are aligned in the center, which will cause the boost inductor current 56 (i La ) doubles the ripple frequency, that is, f ripple,iLa =4f SW Furthermore, compared with Fig. 8A The boost inductor current 56(i La ), Figure 8BMedium boost inductor current 56(i La )’s peak-to-peak ripple is significantly reduced (e.g., from approximately 1.35A to 0.53A).

[0116] Fig. 9A 1 shows the waveform of the current of the PFC inductor (ie, the boost inductor current) of the three-phase flying capacitor three-level boost PFC rectifier without additional phase shift control during the line cycle, Fig. 9B FIG. 4 shows a waveform of the current of the PFC inductor (ie, the boost inductor current) of a three-phase flying capacitor three-level boost PFC rectifier with additional phase shift control during a line cycle. Fig. 9A and Fig. 9B The boost inductor currents 58, 60 and 62 (i.e., i La 、i Lb and i Lc ) waveform, the unit is ampere. Compared to Fig. 9A In the case where no additional phase shift control is performed, Fig. 9B With the additional phase shift control performed in FIG. 5 , the current ripple of the PFC inductor is significantly reduced throughout the line cycle, thereby significantly reducing the total harmonic distortion (eg, the total harmonic distortion is reduced from approximately 4.66% to 1.78%).

[0117] According to another embodiment of the present invention, for a three-phase four-level boost PFC rectifier with a flying capacitor, the midpoint voltage level is between V o / 3 and 2V o T is applied to the totem pole bridge arms between / 3 (for example, totem pole bridge arms 16A, 16B and 16C). SW / 6 additional phase shift, and by detecting the voltage level shifted by V o / 2 phase voltage to sense the appropriate input phase. Specifically, T SW / 6 additional phase shift, where the specific totem pole bridge arm corresponds to the phase voltage level shift V o / 2 after V o / 3 and 2V o / 3 input phase.

[0118] Fig.10 exemplify Figure 3 and Figure 4 A specific implementation circuit of the phase shift segment detection module 26 in FIG. Fig.10 The phase shift segment detection module in the embodiment is applicable to a three-phase four-level boost PFC rectifier with a flying capacitor and is indicated by reference numeral 26B. The phase shift segment detection module 26B includes a comparator 64 with hysteresis, wherein the comparator 64 is used to determine whether the shifted voltage (level) in a specific phase is between V o / 3 and 2V o / 3, and the comparator 64 is used to obtain the following signal PS x Additional logic is provided to provide a signal PS that controls the additional phase shift x (For example, providing Figure 4 The pulse distribution logic module 28 in FIG. 2 is a pulse distribution logic module 28 in FIG. 2 . The signal for controlling the additional phase shift can be obtained by the following formula:

[0119]

[0120] Among them, v xLS For V o / 2 phase shifted phase voltage V xn , for example, xLS =V xn +V o / 2.

[0121] To illustrate the operation of a three-phase flying capacitor four-level boost PFC rectifier with additional phase shift control, Figures 11 to 13B The important simulation waveforms for a 4.5Kw three-phase flying capacitor four-level boost PFC rectifier are shown, where the inductor L a , L b and L c All are 100uH, and the three independent average current mode controllers operate at a switching frequency of 150kHz. The input voltage of each phase is 220Vrms at 50Hz, and the output voltage is 760V. Fig.11 The waveforms shown from top to bottom are level shift V o / 2 after the phase voltage 66, 68 and 70 (V aLS 、V bLS and V cLS ), the midpoint voltages 72, 74 and 76 (V Ma 、V Mb and V Mc ) and the three boost inductor currents 78, 80 and 82 (i La 、i Lb and i Lc-- ). The waveforms of the midpoint voltages 72, 74 and 76 of the totem pole bridge arms contain the average value of the midpoint voltages during the switching cycle. In short, in practice, since each midpoint voltage represents a constantly changing signal (e.g., a jumping signal), represented by a block in the figure, and the block covers the averaged sinusoidal signal, the midpoint voltage is difficult to measure reliably. In addition, filtering the jumping signal is not a practical method to obtain information about the average signal. Due to the level offset V o The input phase voltage after / 2 has the same information as the midpoint voltage, so this case adopts level shift (for example, the level of the sinusoidal signal is shifted upward by V o / 2), this method is more practical and feasible. Fig.11 It can be seen that the level shift V o / 2 phase voltages 66, 68 and 70 are consistent with the average midpoint voltages 72, 74 and 76 in the switching cycle, respectively. o / 3 to 2V o / 3 interval (for example, the midpoint voltage is 76 (V Mc ) Signal PS c In some embodiments, the phase shift section detection module 26B detects the phase voltage V after the level shift by cLS The voltage level of V o / 3 and 2V o / 3 for comparison (in Fig.11 The right side of the waveforms of the phase voltages 66, 68 and 70 shows V o / 3 and 2V o / 3 level).

[0122] Fig. 12A shows the waveform of four-level operation without additional phase shift control, while Fig. 12B The waveforms for four-level operation with additional phase shift control are shown in FIG. Fig. 12A and Fig. 12B The waveforms shown from top to bottom are the basic triangular carrier 84 (V Carrier ), the midpoint voltages of the three totem pole bridge arms are 86, 88 and 90 (V Ma 、V Mb and V Mc ), the boost inductor voltage of phase a is 92(V La ) and the boost inductor current 94 (i La ). The waveform shown magnifies the V o / 3≤v Mc ≤2V o / 3 section of the boost inductor current i- Lc The waveform near the zero-crossing point when it changes from positive to negative. Fig. 12A As shown, the midpoint voltage of the totem pole bridge arm corresponding to the c phase is 90 (V Mc ) is not connected to the midpoint voltages 86 and 88 (V Ma and V Mb ) are centrally aligned, and have T SW / 6 phase shift. Furthermore, if Fig. 12A As shown, the boost inductor current 94 (i La ) has a ripple frequency that is three times the switching frequency, i.e. f ripple,iLa =3f SW, which is the simulation result of the three-phase four-level boost PFC operation with flying capacitor. By setting the midpoint voltage of the totem pole bridge arm corresponding to phase c to 90 (V Mc ) SW / 6 phase shift, the midpoint voltages of all three totem pole bridge arms are center-aligned, such as Fig. 12B As shown. Therefore, the ripple frequency of the boost inductor current is doubled, that is, f ripple,iLa =6f SW , and the peak-to-peak value of the boost inductor current ripple (ie, the PFC inductor current ripple) is significantly reduced (eg, from 0.97A to 0.15A).

[0123] Fig.13A 1 shows the waveform of the current of the PFC inductor (ie, the boost inductor current) of the three-phase flying capacitor four-level boost PFC rectifier without additional phase shift control during the line cycle, Fig. 13B 13A and 13B show the waveform of the current of the PFC inductor (i.e., the boost inductor current) of the three-phase flying capacitor four-level boost PFC rectifier with additional phase shift control during the line cycle. La 、i Lb and i Lc ) waveform, the unit is ampere. Compared to Fig.13A In the case where no additional phase shift control is performed, Fig. 13B With the additional phase shift control performed in FIG. 5 , the ripple of the PFC inductor current is significantly reduced over the entire line cycle, thereby significantly reducing the total harmonic distortion (eg, the total harmonic distortion is reduced from approximately 4% to 1.4%).

[0124] According to another embodiment of the present invention, for a three-phase five-level boost PFC rectifier with a flying capacitor, the following control algorithm can be used to apply T in the totem pole bridge arm: SW / 8 additional phase shift.

[0125]

[0126] Among them, v xLS , (x∈{a,b,c}) is the phase voltage V xn After V o After the phase shift of / 2, segment X(X∈{I,II,III,IV,V,VI}) is Fig. 7A As described above, the detection level can be shifted by V o / 2 phase voltage and the appropriate sixty degree segment in the line cycle to sense the appropriate input phase. Specifically, T is applied to a specific totem pole bridge arm. SW / 6 additional phase shift, wherein the specific totem pole bridge arm corresponds to the voltage level (i.e., the phase voltage, and the level has been shifted by V o / 2) is less than V o / 4 and greater than 3V o / 4 input phase. Fig.14 exemplify Figure 3 and Figure 4 A specific implementation circuit of the phase shift segment detection module 26 in FIG. Fig.14 The phase shift section detection module in the embodiment is suitable for a three-phase five-level boost PFC rectifier with a flying capacitor and is indicated by reference numeral 26C. The phase shift section detection module 26C includes comparators 102, 104 and 106 (for V aLS 、V bLS and V cLS ), the comparators 102, 104 and 106 are used to determine whether the level of the phase voltage after the offset is less than V o / 4 or greater than 3V o / 4. The phase shift segment detection module 26C further includes a sixty degree segment module 108, wherein the sixty degree segment module 108 includes a similar Figure 7B and Figure 7C The decoder and truth table shown in FIG. 2 are used to determine the corresponding sixty degree segment in the line cycle. The phase shift segment detection module 26C also includes an additional logic, wherein the additional logic implements the aforementioned control algorithm based on the information of the comparators 102, 104 and 106 and the sixty degree segment module 108 to determine the signal PS for additional phase shift control. a ,PS b and PS c .

[0127] To illustrate the operation of a three-phase flying capacitor five-level boost PFC rectifier with additional phase shift control, Figure 15 to Figure 1 7 shows the important simulation waveforms for a 4.5Kw three-phase flying capacitor five-level boost PFC rectifier, where the inductor L a , L b and L c All are 50uH, and the three independent average current mode controllers operate at a switching frequency of 150kHz. The input voltage of each phase is 220Vrms at 50Hz, and the output voltage is 760V. Fig.15 The waveforms shown from top to bottom are level shift V o / 2 after the phase voltage 110, 112 and 114 (V aLS 、V bLS and V cLS ), the midpoint voltages of the three totem pole bridge arms are 116, 118 and 120 (V Ma 、V Mband V Mc ) and the three boost inductor currents 122, 124, and 126 (i La 、i Lb and i Lc-- ).

[0128] like Fig.15 As shown, by sensing the level shift V o / 2 phase voltage to detect the input phase that needs additional phase shift control. For example, in segment I of the line cycle, when v Mb ≤V o / 4, additional phase shift control (PS b ), and when v Mc ≤V o / 4, additional phase shift control (PS c ). By sensing the offset V o The voltage level after / 2 (i.e., phase voltage) can obtain the said interval, for example, by sensing the phase voltage 112 to obtain v bLS ≤V o / 4 interval, and by sensing the phase voltage 114 to obtain v cLS ≤V o Similar to the phase shift segment detection in the aforementioned four-level application, in the five-level application, the voltage level can be compared with the midpoint voltage signal of the jump to achieve actual signal detection by utilizing the level shift of the phase voltage.

[0129] Fig.16A shows the waveform of five-level operation without additional phase shift control, while Fig. 16B The waveforms for five-level operation with additional phase shift control are shown. Fig.16A and Fig. 16B The waveforms shown from top to bottom are the basic triangular carrier 127 (V Carrier ), the midpoint voltages of the three totem pole bridge arms are 128, 130 and 132 (V Ma 、V Mb and V Mc ), the boost inductor voltage of phase a is 134(V La ) and the boost inductor current 136 (i La ). The waveform shown magnifies the waveform of segment I of the line cycle, which is v Mb ≤V o / 4 voltage level interval. Fig.16A As shown, the midpoint voltage of the totem pole bridge arm corresponding to phase b is 130 (V Mc ) is not connected to the midpoint voltages 128 and 132 (V Ma and V Mc) are centrally aligned, and have T SW / 8 phase shift. Furthermore, if Fig.16A As shown, the boost inductor current 136 (i La ) has a ripple frequency that is four times the switching frequency, i.e., f ripple,iLa =4f SW This is the simulation result of the operation of a three-phase five-level boost PFC with a flying capacitor. By setting the midpoint voltage of the totem pole bridge arm corresponding to phase b to 130 (V Mb ) SW / 8 phase shift, the midpoint voltages of all three totem pole bridge arms are center-aligned, such as Fig. 12B As shown. Therefore, the ripple frequency of the boost inductor current is doubled, that is, f ripple,iLa =8f SW , and the peak-to-peak value of the boost inductor current ripple (ie, the PFC inductor current ripple) is significantly reduced (eg, from 1A to 0.26A).

[0130] Fig.17A FIG. 4 shows the waveform of the current of the PFC inductor of the three-phase flying capacitor five-level boost PFC rectifier without additional phase shift control during the line cycle, Fig. 17B The waveform of the current of the PFC inductor of a three-phase flying capacitor five-level boost PFC rectifier with additional phase shift control during the line cycle is shown. Fig.17A and Fig. 17B The boost inductor currents 138, 140, and 142 (i La 、i Lb and i Lc ) waveform, the unit is ampere. Compared to Fig.17A In the case where no additional phase shift control is performed, Fig. 17B With the additional phase shift control performed in FIG. 5 , the ripple of the PFC inductor current is significantly reduced over the entire line cycle, thereby significantly reducing the total harmonic distortion (eg, the total harmonic distortion is reduced from approximately 4% to 1.07%).

[0131] According to the present invention, in three-phase FCML boost PFC applications with more than five levels, the same general method can be used. First, the input phase and the corresponding line cycle segment to which additional phase shift control is required are determined by observing the midpoint voltage of the three totem pole bridge arms. Then, the level shift V is sensed. o The phase voltage after / 2 is detected and each sixty degree segment in the line cycle (in each segment there is a phase voltage with the maximum absolute value) is detected to achieve additional phase shift control.

[0132] The control circuit 14 may be implemented using hardware, software (including firmware), or a combination of hardware and software. For example, the control circuit 14 may be implemented using a digital signal processor or a microcontroller, wherein the microcontroller may include the following technologies: a discrete logic circuit having logic gates to implement logic functions on data signals, an application specific integrated circuit having an appropriate combination of logic gates, a programmable gate array, a field programmable gate array, and the like.

[0133] Based on the above embodiments of the three-phase FCML boost PFC rectifier and method, this case proposes a control method, namely Fig.18 The control method 144 is shown. The control method 144 is applicable to a three-phase FCML boost PFC rectifier circuit having three bridge arms. The control method 144 includes: determining a voltage level of a totem pole bridge arm and a segment and / or phase voltage of a line cycle for a certain totem pole bridge arm of the three-phase FCML boost PFC rectifier circuit, applying an additional phase offset at one or more times within the line cycle (step 146); and center-aligning the midpoint voltages of the three totem pole bridge arms by applying the additional phase offset (step 148).

[0134] Based on the above embodiments of the three-phase FCML boost PFC rectifier and method and the corresponding Figures 1 to 18 The present invention provides a method embodiment, wherein the method (144) is used to reduce the inductor current ripple in a three-phase flying capacitor multi-level boost power factor correction rectifier circuit having three totem pole bridge arms (16A, 16B, 16C). The method comprises the steps of: (a) for the three-phase flying capacitor multi-level boost power factor correction rectifier circuit, determining one of the three totem pole bridge arms according to the voltage level of at least one segment or phase voltage within a line cycle, and applying an additional phase offset (146) to the one of the totem pole bridge arms at one or more times within the line cycle; and (b) center-aligning the midpoint voltages of the three totem pole bridge arms by applying the additional phase offset (148).

[0135] This method embodiment may include a combination of one or more of the following features.

[0136] In a method embodiment, applying the additional phase offset includes: applying the additional phase offset to the gate pulse of the switch of only one of the three totem pole bridge arms at one or more times within the line cycle, and the selection of the one of the totem pole bridge arms is related to the segment of the line cycle and / or the voltage level of the phase voltage.

[0137] In a method embodiment, applying the additional phase offset includes: selecting one of two pulse width modulation (PWM) pulse groups, wherein each pulse width modulation pulse group corresponds to one of two carrier groups, and the two carrier groups have a T SW / [2(N-1)] phase offset, each carrier group contains N-1 carriers, and there is T between any two consecutive carriers SW / (N-1) phase shift, where N is the number of levels of the three-phase flying capacitor multi-level boost power factor correction rectifier circuit, T SW is the switching cycle.

[0138] In the method embodiment, the determining step of step (a) is performed according to the number of levels of the three-phase flying capacitor multi-level boost power factor correction rectifier circuit.

[0139] In a method embodiment, a three-phase flying capacitor multi-level boost power factor correction rectifier circuit includes a three-phase flying capacitor three-level boost power factor correction rectifier circuit, and step (a) includes: dividing the line cycle into six sixty-degree segments, wherein in each sixty-degree segment, one of the three phase voltages has a maximum voltage absolute value relative to the other two phase voltages; and determining the current segment of the line cycle by comparing the voltage levels of the three phase voltages with zero.

[0140] In a method embodiment, for a three-phase flying capacitor three-level boost power factor correction rectifier circuit, applying an additional phase shift includes applying T SW / 4 phase shift, where one of the totem pole bridge arms corresponds to the phase voltage with the maximum voltage absolute value in the current section, T SW is the switching cycle.

[0141] In a method embodiment, a three-phase flying capacitor multi-level boost power factor correction rectifier circuit includes a three-phase flying capacitor four-level boost power factor correction rectifier circuit, and step (a) includes: shifting the levels of the three phase voltages of the three totem pole bridge arms by half of the output voltage during the online cycle; and determining, among the three phase voltages, a phase voltage that is greater than or equal to one third of the output voltage and less than or equal to two thirds of the output voltage.

[0142] In a method embodiment, for a three-phase flying capacitor four-level boost power factor correction rectifier circuit, applying an additional phase shift includes applying a gate pulse T of a switch in one of the totem pole bridge arms. SW / 6 phase shift, the phase voltage of one of the totem pole bridge arms is greater than or equal to one third of the output voltage and less than or equal to two thirds of the output voltage, T SW is the switching cycle.

[0143] In a method embodiment, a three-phase flying capacitor multi-level boost power factor correction rectifier circuit includes a three-phase flying capacitor five-level boost power factor correction rectifier circuit, and step (a) includes: dividing a line cycle into six sixty-degree segments; shifting the levels of three phase voltages of three totem pole bridge arms by half of the output voltage in the line cycle; determining a current segment of the line cycle; and determining, among the three phase voltages after the level shift, one of the phase voltages after the level shift that is less than or equal to one quarter of the output voltage or greater than or equal to three quarters of the output voltage in the current segment.

[0144] In a method embodiment, for a three-phase flying capacitor five-level boost power factor correction rectifier circuit, applying an additional phase shift includes applying a gate pulse T of a switch in one of the totem pole bridge arms. SW / 8 phase shift, and the phase voltage of one of the totem pole bridge arms after the level shift in the current section is less than or equal to one quarter of the output voltage or greater than or equal to three quarters of the output voltage, T SW is the switching cycle.

[0145] Based on the above embodiments of the three-phase FCML boost PFC rectifier and method and the corresponding Figures 1 to 18 The present invention provides a power factor correction rectifier embodiment, wherein the power factor correction rectifier (10) comprises a three-phase flying capacitor multi-level boost power factor correction rectifier circuit (12) and a control circuit (14). The three-phase flying capacitor multi-level boost power factor correction rectifier circuit (12) comprises three totem pole bridge arms (16A, 16B, 16C), wherein each totem pole bridge arm comprises a plurality of switches in pairs, and each pair of switches is coupled to a flying capacitor. The control circuit (14) is configured to: for the three-phase flying capacitor multi-level boost power factor correction rectifier circuit, determine one of the three totem pole bridge arms according to the voltage level of at least one segment or phase voltage within a line cycle, apply an additional phase offset (146) to one of the totem pole bridge arms at one or more times within the line cycle; and make the midpoint voltages of the three totem pole bridge arms centrally aligned (148) by applying the additional phase offset.

[0146] In an embodiment of the power factor correction rectifier, the control circuit applies an additional phase offset, including: the control circuit applies an additional phase offset to the gate pulse of the switch of the totem pole bridge arm only for one of the totem pole bridge arms related to the segment of the line cycle and / or the voltage level of the phase voltage at one or more times within the line cycle.

[0147] In an embodiment of the power factor correction rectifier, the control circuit applies the additional phase shift including: the control circuit selects one of two pulse width modulation pulse groups, wherein each pulse width modulation pulse group corresponds to one of two carrier groups, and there is T between the two carrier groups. SW / [2(N-1)] phase offset, each carrier group contains N-1 carriers, and there is T between any two consecutive carriers SW / (N-1) phase shift, N is the number of levels of the three-phase flying capacitor multi-level boost power factor correction rectifier circuit, T SW is the switching cycle.

[0148] In an embodiment of the power factor correction rectifier, the control circuit determines the application object of the additional phase shift according to the number of levels of the three-phase flying capacitor multi-level boost power factor correction rectifier circuit.

[0149] In an embodiment of a power factor correction rectifier, a three-phase flying capacitor multi-level boost power factor correction rectifier circuit includes a three-phase flying capacitor three-level boost power factor correction rectifier circuit. In order to determine the application object of the additional phase shift, the control circuit is configured to: divide the line cycle into six sixty-degree segments, wherein in each sixty-degree segment, one of the three phase voltages has a maximum voltage absolute value relative to the other two phase voltages; and determine the current segment of the line cycle by comparing the voltage levels of the three phase voltages with zero.

[0150] In an embodiment of the power factor correction rectifier, for a three-phase flying capacitor three-level boost power factor correction rectifier circuit, the control circuit applying an additional phase shift includes: the control circuit applies a gate pulse T to a switch of one of the totem pole bridge arms. SW / 4 phase shift, where one of the totem pole bridge arms corresponds to the phase voltage with the maximum voltage absolute value in the current section, T SW is the switching cycle.

[0151] In an embodiment of a power factor correction rectifier, a three-phase flying capacitor multi-level boost power factor correction rectifier circuit includes a three-phase flying capacitor four-level boost power factor correction rectifier circuit. In order to determine the application object of the additional phase shift, the control circuit is configured to: shift the levels of the three phase voltages of the three totem pole bridge arms by half of the output voltage during the online cycle; and determine, among the three phase voltages, a phase voltage that is greater than or equal to one third of the output voltage and less than or equal to two thirds of the output voltage.

[0152] In an embodiment of the power factor correction rectifier, for a three-phase flying capacitor four-level boost power factor correction rectifier circuit, the control circuit applies an additional phase shift including: the control circuit applies a gate pulse T to a switch of one of the totem pole bridge arms. SWA phase shift of 1 / 6, where the phase voltage of one of the totem pole legs is greater than or equal to one-third and less than or equal to two-thirds of the output voltage, T SW is the switching period.

[0153] In an embodiment of the power factor correction rectifier, the three-phase flying capacitor multilevel boost power factor correction rectifier circuit includes a three-phase flying capacitor five-level boost power factor correction rectifier circuit. To determine the object to which the additional phase shift is applied, the control circuit is configured to: divide the line period into six sixty-degree segments; shift the levels of the three phase voltages of the three totem pole legs by half of the output voltage in the line period; determine the current segment of the line period; and among the three phase voltages after the level shift, determine the phase voltage that is less than or equal to one-fourth or greater than or equal to three-fourths of the output voltage in the current segment.

[0154] In an embodiment of the power factor correction rectifier, for the three-phase flying capacitor five-level boost power factor correction rectifier circuit, the control circuit applying the additional phase shift includes: the control circuit applies a phase shift of T SW 1 / 8 to the gate pulse of the switch of one of the totem pole legs, and in this one totem pole leg, the phase voltage after the level shift is less than or equal to one-fourth or greater than or equal to three-fourths of the output voltage in the current segment, T SW is the switching period.

[0155] It should be noted that the above are only the preferred embodiments proposed for the purpose of illustrating the present case. The present case is not limited to the described embodiments, and the scope of the present case is determined by the claims. And the present case can be variously modified by those skilled in the art, but all do not depart from what the claims are intended to protect. In addition, the disclosed embodiments can be arbitrarily combined, and referring to one embodiment does not mean excluding the features in other embodiments. In the scope of the patent application, the term "comprising" does not exclude other elements or steps, and the "a" prefixed to the element name does not exclude a plurality.

Claims

1. A method for reducing an inductor current ripple of a three-phase flying capacitor multi-level boost power factor correction rectifier circuit having three totem pole bridge arms, the method comprising the steps of: (a) for the three-phase flying capacitor multi-level boost power factor correction rectifier circuit, determining one of the three totem pole bridge arms corresponding to the totem pole bridge arms according to a voltage level of at least one segment or one phase voltage within a line cycle, and applying an additional phase offset to the one of the totem pole bridge arms at one or more times within the line cycle; and (b) The midpoint voltages of the three totem pole bridge arms are center-aligned by applying the additional phase shift.

2. The method of claim 1 , wherein applying the additional phase offset comprises: applying the additional phase offset to the gate pulse of the switch of the totem pole bridge arm only for one of the totem pole bridge arms associated with the segment of the line cycle and / or the voltage level of the phase voltage at the one or more times within the line cycle.

3. The method of claim 2, wherein applying the additional phase offset comprises: selecting one of two pulse width modulation pulse groups, wherein each of the pulse width modulation pulse groups corresponds to one of two carrier groups, and the two carrier groups have a T SW / [2(N-1)] phase offset, each carrier group contains N-1 carriers, and there is a T between any two consecutive carriers. SW / (N-1) phase shift, N is the number of levels of the three-phase flying capacitor multi-level boost power factor correction rectifier circuit, T SW is the switching cycle.

4. The method of claim 1, wherein the determining step of step (a) is performed according to the number of levels of the three-phase flying capacitor multi-level boost power factor correction rectifier circuit.

5. The method according to claim 4, wherein the three-phase flying capacitor multi-level boost power factor correction rectifier circuit comprises a three-phase flying capacitor three-level boost power factor correction rectifier circuit, and step (a) comprises: Divide the line cycle into six sixty degree sections, wherein in each of the sixty degree sections, one of the three phase voltages has a maximum voltage absolute value relative to the other two phase voltages; and A current segment of the line cycle is determined by comparing the voltage levels of the three phase voltages with zero.

6. The method of claim 5, wherein for the three-phase flying capacitor three-level boost power factor correction rectifier circuit, applying the additional phase shift comprises: applying a gate pulse T SW / 4 phase shift, where one of the totem pole bridge arms corresponds to the phase voltage with the maximum voltage absolute value in the current section, T SW is the switching cycle.

7. The method of claim 4, wherein the three-phase flying capacitor multi-level boost power factor correction rectifier circuit comprises a three-phase flying capacitor four-level boost power factor correction rectifier circuit, and step (a) comprises: In the line cycle, the levels of the three phase voltages of the three totem pole bridge arms are shifted by half of the output voltage; and Among the three phase voltages, the phase voltage that is greater than or equal to one third of the output voltage and less than or equal to two thirds of the output voltage is determined.

8. The method of claim 7, wherein for the three-phase flying capacitor four-level boost power factor correction rectifier circuit, applying the additional phase shift comprises: applying a gate pulse T SW / 6 phase shift, the phase voltage of one of the totem pole bridge arms is greater than or equal to one third of the output voltage and less than or equal to two thirds of the output voltage, T SW is the switching cycle.

9. The method according to claim 4, wherein the three-phase flying capacitor multi-level boost power factor correction rectifier circuit comprises a three-phase flying capacitor five-level boost power factor correction rectifier circuit, and step (a) comprises: Divide the line period into six sixty degree segments; In the line cycle, the levels of the three phase voltages of the three totem pole bridge arms are shifted by half of the output voltage; determining a current segment of the line cycle; and Among the three phase voltages after the level shift, one of the phase voltages after the level shift that is less than or equal to one quarter of the output voltage or greater than or equal to three quarters of the output voltage in the current section is determined.

10. The method of claim 9, wherein for the three-phase flying capacitor five-level boost power factor correction rectifier circuit, applying the additional phase shift comprises: applying a gate pulse T SW / 8 phase shift, and in one of the totem pole bridge arms, the phase voltage after the level shift is less than or equal to one quarter of the output voltage or greater than or equal to three quarters of the output voltage in the current section, T SW is the switching cycle.

11. A power factor correction rectifier comprising: A three-phase flying capacitor multi-level boost power factor correction rectifier circuit comprises three totem pole bridge arms, wherein each of the totem pole bridge arms comprises a plurality of switches in pairs of two, and each pair of switches is coupled to a flying capacitor; and A control circuit configured to: For the three-phase flying capacitor multi-level boost power factor correction rectifier circuit, according to a voltage level of at least one segment or one phase voltage in a line cycle, determine one of the three totem pole bridge arms corresponding to the totem pole bridge arms, and apply an additional phase offset to the one of the totem pole bridge arms at one or more times in the line cycle; The midpoint voltages of the three totem pole bridge arms are center-aligned by applying the additional phase shift.

12. A power factor correction rectifier as described in claim 11, wherein the control circuit applies the additional phase offset including: the control circuit applies the additional phase offset to the gate pulse of the switch of the totem pole bridge arm only for one of the totem pole bridge arms related to the segment of the line cycle and / or the voltage level of the phase voltage at the one or more times within the line cycle.

13. The power factor correction rectifier of claim 12, wherein the control circuit applies the additional phase offset comprises: the control circuit selects one of two pulse width modulation pulse groups, wherein each of the pulse width modulation pulse groups corresponds to one of two carrier groups, and the two carrier groups have a T SW / [2(N-1)] phase offset, each carrier group contains N-1 carriers, and there is a T between any two consecutive carriers. SW / (N-1) phase shift, N is the number of levels of the three-phase flying capacitor multi-level boost power factor correction rectifier circuit, T SW is the switching cycle.

14. The power factor correction rectifier as claimed in claim 11, wherein the control circuit determines the application object of the additional phase offset according to the number of levels of the three-phase flying capacitor multi-level boost power factor correction rectifier circuit.

15. The power factor correction rectifier of claim 14, wherein the three-phase flying capacitor multi-level boost power factor correction rectifier circuit comprises a three-phase flying capacitor three-level boost power factor correction rectifier circuit, and to determine the application object of the additional phase offset, the control circuit is configured to: Dividing the line cycle into six sixty degree sections, wherein in each of the sixty degree sections, one of the three phase voltages has a maximum voltage absolute value relative to the other two phase voltages; and A current segment of the line cycle is determined by comparing the voltage levels of the three phase voltages with zero.

16. The power factor correction rectifier as claimed in claim 15, wherein for the three-phase flying capacitor three-level boost power factor correction rectifier circuit, the control circuit applying the additional phase shift comprises: the control circuit applying a gate pulse T SW / 4 phase shift, where one of the totem pole bridge arms corresponds to the phase voltage with the maximum voltage absolute value in the current section, T SW is the switching cycle.

17. The power factor correction rectifier of claim 14, wherein the three-phase flying capacitor multi-level boost power factor correction rectifier circuit comprises a three-phase flying capacitor four-level boost power factor correction rectifier circuit, and to determine the application object of the additional phase offset, the control circuit is configured to: In the line cycle, the levels of the three phase voltages of the three totem pole bridge arms are shifted by half of the output voltage; and Among the three phase voltages, the phase voltage that is greater than or equal to one third of the output voltage and less than or equal to two thirds of the output voltage is determined.

18. The power factor correction rectifier as claimed in claim 17, wherein for the three-phase flying capacitor four-level boost power factor correction rectifier circuit, the control circuit applying the additional phase shift comprises: the control circuit applying a gate pulse T SW / 6 phase shift, the phase voltage of one of the totem pole bridge arms is greater than or equal to one third of the output voltage and less than or equal to two thirds of the output voltage, T SW is the switching cycle.

19. The power factor correction rectifier of claim 14, wherein the three-phase flying capacitor multi-level boost power factor correction rectifier circuit comprises a three-phase flying capacitor five-level boost power factor correction rectifier circuit, and to determine the application object of the additional phase offset, the control circuit is configured to: Divide the line period into six sixty degree segments; In the line cycle, the levels of the three phase voltages of the three totem pole bridge arms are shifted by half of the output voltage; determining a current segment of the line cycle; and Among the three phase voltages after the level shift, the phase voltage that is less than or equal to one quarter of the output voltage or greater than or equal to three quarters of the output voltage in the current section is determined.

20. The power factor correction rectifier as claimed in claim 19, wherein for the three-phase flying capacitor five-level boost power factor correction rectifier circuit, the control circuit applying the additional phase shift comprises: the control circuit applying a gate pulse T SW / 8 phase shift, and in one of the totem pole bridge arms, the phase voltage after the level shift is less than or equal to one quarter of the output voltage or greater than or equal to three quarters of the output voltage in the current section, T SW is the switching cycle.

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