Capacitive load switch protection circuit suitable for high-side switch

Abstract

The invention discloses a capacitive load switch protection circuit suitable for a high-side switch, which is characterized in that when a PWM (Pulse Width Modulation) signal is input into an external input signal IN accessed to the input end of a D trigger module, a counter in the D trigger module starts counting until an RS trigger is triggered to generate an RS latch signal; the RS latch signal is delayed by the first delay module to generate a flag bit signal CLSOK, the operation of the logic module and the driving module is controlled through the flag bit signal CLSOK, and the capacitor load at the output end of the high-side switch is charged; a time threshold value for accessing a PWM signal is set through a second time delay module, when the duration of inputting the PWM signal exceeds the time threshold value, counting of a counter in a D trigger module is reset through a reset logic module, the switching speed of a high-side switch is made to run in a standard mode, and the switching speed of the high-side switch is made to run through operation of a capacitive load switch protection circuit. And discontinuous stepped charging of the load capacitor in the high-side switch is realized.

Description

Technical Field

[0001] The present invention relates to the technical field of capacitive load switch protection circuits, and in particular to a capacitive load switch protection circuit suitable for a high-side switch. Background Art

[0002] High-side switch is an important component in the field of electronics. It refers to a switch device located between the power supply and the load, which is responsible for separating or connecting the chip power supply load. The high-side switch places the switching element between the positive pole or high potential end of the power supply and the load, and effectively controls the load current by controlling the on and off of the switching element. This control method enables high-side switches to play an important role in a variety of application scenarios, such as automotive applications, industrial lighting, and motor control. Its design not only improves the efficiency of the motherboard space, but also saves costs. At the same time, the high-side switch is used in combination with control elements such as microcontrollers to provide necessary protection and control for various loads such as motors, lighting, and actuators.

[0003] High-side switches can more easily implement current limiting and overload protection functions, thereby protecting circuits and loads from damage. However, since the high-side switch is directly connected between the power supply and the load, it needs to withstand higher voltage stress, which may have a certain impact on the reliability and life of the switching element: when the circuit output end of the high-side switch carries a capacitive load, when the high-side switch is turned on, the capacitive load will begin to charge, and a large transient current will be generated at this time. If the capacitor capacity is large or the power supply voltage is high, the transient current may be very large, thereby causing an impact on the high-side switch and the power supply; secondly, during the capacitor charging process, the output voltage will experience a process from low to high, which may cause other components in the high-side switch to be affected; in addition, if the capacity of the capacitive load is large, it may also cause fluctuations in the power supply voltage, and the charging speed of the capacitor depends on the switching speed of the switch. If the switching speed is too fast, it may cause excessive voltage transients on the capacitor, resulting in electromagnetic interference EMI and other problems.

[0004] When electronic modules in automotive applications have load capacitors, they can be used to stabilize the voltage across them, ensuring that the device can still work reliably in the presence of voltage spikes or oscillations. However, such devices are very prone to high surge currents during switching, which triggers the protection mode of the high-side switch, locks the device, and keeps the capacitor uncharged. Therefore, how to ensure that the power switch size is not too large and improve power stability by reducing the current peak during the switch transition has become an urgent problem that the industry needs to solve. Summary of the invention

[0005] In view of the problems existing in the prior art, the present invention provides a capacitive load switch protection circuit suitable for a high-side switch. By reducing the switching speed of the high-side switch under the action of the capacitive load switch protection circuit, the charging speed of the load capacitor in the high-side switch is slowed down and the charging time is extended, the transient change of the load capacitor is reduced, electromagnetic interference EMI is avoided, and intermittent step charging of the load capacitor is achieved to protect the high-side switch.

[0006] To achieve the above technical objectives, the present invention adopts the following technical solution: a capacitive load switch protection circuit suitable for a high-side switch, comprising: a D trigger module, an RS latch, a reset logic module, a first delay module, a second delay module, a logic module and a drive module,

[0007] When the external input signal IN connected to the input end of the D flip-flop module has no PWM signal input, the counter, RS latch, first delay module, second delay module and reset logic module in the D flip-flop module do not work, and the switching speed of the high-side switch is controlled by the logic module and the driving module to operate in the standard mode;

[0008] When the external input signal IN connected to the input end of the D trigger module has a PWM signal input, the counter in the D trigger module starts counting until the RS trigger is triggered to generate an RS latch signal. The RS latch signal generates a flag signal CLS_OK after the delay of the first delay module. The operation of the logic module and the driving module is controlled by the flag signal CLS_OK to charge the capacitive load at the output end of the high-side switch. The time threshold for connecting the PWM signal is set by the second delay module. When the duration of the input PWM signal exceeds the time threshold, the counter count in the D trigger module is cleared to zero by the reset logic module, so that the switching speed of the high-side switch operates in the standard mode.

[0009] Furthermore, the D input terminal of the D flip-flop module is connected to the external input signal IN, and whether the capacitive load switch protection circuit is started is triggered according to whether the external input signal IN has a PWM signal; the CLK terminal of the D flip-flop module is connected to the clock signal from the high-side switch, the Reset terminal of the D flip-flop module is connected to the output terminal of the reset logic module, and the Q output terminal of the D flip-flop module is connected to the input terminal of the RS latch.

[0010] Furthermore, the first delay module and the second delay module are both composed of a first D trigger module, a second D trigger module and a third D trigger module.

[0011] Furthermore, the CLK end of the first D flip-flop module, the CLK end of the second D flip-flop module, and the CLK end of the third D flip-flop module are all connected to the clock signal from the high-side switch, the Reset end of the first D flip-flop module, the Reset end of the second D flip-flop module, and the Reset end of the third D flip-flop module are all connected to the output end of the reset logic module, the Q output end of the first D flip-flop module is connected to the D input end of the second D flip-flop module, and the Q output end of the second D flip-flop module is connected to the D input end of the third D flip-flop module.

[0012] Further, the D input end of the first D flip-flop module in the first delay module is connected to the output end of the RS latch, and the Q output end of the third D flip-flop module in the first delay module is respectively connected to the input end of the logic module and the input end of the driving module.

[0013] Furthermore, the D input terminal of the first D flip-flop module in the second delay module is connected to the external input signal IN, and the Q output terminal of the third D flip-flop module in the second delay module is respectively connected to the input terminal of the reset logic module and the input terminal of the RS latch.

[0014] Furthermore, the RS latch is composed of two cross-coupled NOR gates, the set end S of the RS latch is respectively connected to the Q output end of the D flip-flop and the Q output end of the third D flip-flop module in the second delay module, and the output end of the RS latch is connected to the D input end of the first D flip-flop module in the first delay module.

[0015] Compared with the prior art, the present invention has the following beneficial effects:

[0016] (1) When a voltage spike or oscillation occurs, the capacitive load switch protection circuit for a high-side switch of the present invention can realize intermittent step-by-step charging of the external load capacitor of the high-side switch, effectively slowing down the charging rate of the load capacitor in the high-side switch and correspondingly extending its charging cycle, thereby effectively preventing frequent restarts, reducing power fluctuations, and providing protection for the output load;

[0017] (2) The capacitive load switch protection circuit for the high-side switch of the present invention adopts a simple and efficient circuit structure, which realizes comprehensive protection of the output load capacitor, thereby significantly improving the service life of components. Under the protection of the capacitive load switch protection circuit of the present invention, the high-side switch can charge the load capacitor smoothly without activating other protection mechanisms, effectively avoiding the generation of excessive output transient current, thereby avoiding the interference of electromagnetic errors and enhancing the stability of the power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1Schematic diagram of a capacitive load switch protection circuit applicable to a high-side switch according to the present invention;

[0019] Figure 2 It is a circuit diagram of the first delay module and the second delay module in the present invention;

[0020] Figure 3 Schematic diagram of the circuit of the RS latch in the present invention;

[0021] Figure 4 A schematic diagram of an output waveform of a high-side switch under a capacitive load through a capacitive load switch protection circuit applicable to a high-side switch of the present invention;

[0022] Figure 5 The diagram is a schematic diagram of the output waveform of the high side switch under resistive load through the capacitive load switch protection circuit applicable to the high side switch of the present invention. DETAILED DESCRIPTION

[0023] The technical solution of the present invention is further explained below in conjunction with the accompanying drawings.

[0024] like Figure 1 The present invention is a schematic diagram of a capacitive load switch protection circuit suitable for a high-side switch, wherein the capacitive load switch protection circuit comprises: a D trigger module, an RS latch, a reset logic module, a first delay module, a second delay module, a logic module and a drive module;

[0025] When the external input signal IN connected to the input end of the D flip-flop module has no PWM signal input, at this time, the high-side switch is in a normal working mode, the counter, RS latch, first delay module, second delay module and reset logic module in the D flip-flop module are all not working, and the switching speed of the high-side switch is controlled by the logic module and the driving module to operate in the standard mode;

[0026] When the external input signal IN connected to the input end of the D trigger module has a PWM signal input, the counter in the D trigger module starts counting until the RS trigger is triggered to generate an RS latch signal. In order to ensure that it is not affected by the interference of glitch pulses, after the RS latch signal is delayed for a period of time by the first delay module, the high-side switch enters the protection mode of the capacitive load switch protection circuit, and the RS latch signal generates a flag signal CLS_OK after the delay of the first delay module. By using the flag signal CLS_OK as a control signal, the operation of the control logic module and the drive module is controlled, and the switching speed of the high-side switch is reduced compared to the switching speed under normal working conditions, and then the load capacitor in the capacitive load switch circuit is charged; the time threshold for accessing the PWM signal is set by the second delay module, and when the duration of the input PWM signal exceeds the time threshold, the output signal is forced to be low through the reset logic module, and the counter count in the D trigger module is cleared to zero, so that the switching speed of the high-side switch operates in the standard mode. By adopting the capacitive load switch protection circuit of the present invention, intermittent step charging is achieved when the output end of the high-side switch has a large load capacitance.

[0027] When the high-side switch is in normal working mode, if a very large transient current is generated at the output end at this time, the current limiting mode of the high-side switch will be triggered, causing the high-side switch to restart, or even generate excessive power. By operating the high-side switch under the capacitive load switch protection circuit, the intermittent step charging of the load capacitor in the high-side switch is realized, ensuring that the load capacitor in the high-side switch will not appear too fast or too high power, slowing down the charging speed of the load capacitor in the high-side switch and extending its charging time. Therefore, in the protection mode of the capacitive load switch protection circuit, the high-side switch can charge the load capacitor without triggering other internal protection modes, so that the output signal of the high-side switch increases, thereby achieving the effect of protecting the high-side switch, greatly improving the stability of the power supply and extending the life of the device.

[0028] In the present invention, the D input end of the D flip-flop module is connected to the external input signal IN, and whether the capacitive load switch protection circuit is started is triggered according to whether the external input signal IN has a PWM signal; the CLK end of the D flip-flop module is connected to the clock signal from the high-side switch, and the Reset end of the D flip-flop module is connected to the output end of the reset logic module. When the reset logic signal comes, the D flip-flop is reset and its internal existing state is cleared; the Q output end of the D flip-flop module is connected to the input end of the RS latch. When the D flip-flop recognizes that the PWM signal has arrived, it sends a set or reset signal to the RS latch, and the internal signal of the RS latch is reset or reset.

[0029] like Figure 2In the present invention, the first delay module and the second delay module are both composed of a first D flip-flop module, a second D flip-flop module and a third D flip-flop module connected in series, the CLK end of the first D flip-flop module, the CLK end of the second D flip-flop module and the CLK end of the third D flip-flop module are all connected to the clock signal from the high-side switch, the Reset end of the first D flip-flop module, the Reset end of the second D flip-flop module and the Reset end of the third D flip-flop module are all connected to the output end of the reset logic module, the Q output end of the first D flip-flop module is connected to the D input end of the second D flip-flop module, and the Q output end of the second D flip-flop module is connected to the D input end of the third D flip-flop module.

[0030] The main function of the first delay module in the present invention is delay counting. When the IN input port is identified from the initial state to the time set inside the first delay module, the protection mode of the capacitive load switch protection circuit is forced to exit. The time set inside the first delay module can be arbitrarily set according to requirements. The D input end of the first D flip-flop module in the first delay module is connected to the output end of the RS latch, and the Q output end of the third D flip-flop module in the first delay module is respectively connected to the input end of the logic module and the input end of the driving module.

[0031] In the present invention, the D input end of the first D flip-flop module in the second delay module is connected to the external input signal IN, and the Q output end of the third D flip-flop module in the second delay module is respectively connected to the input end of the reset logic module and the input end of the RS latch. The time threshold for accessing the PWM signal is set by the second delay module. When the duration of the input PWM signal exceeds the time threshold, the counter count in the D flip-flop module is reset to zero by the reset logic module, so that the high-side switch exits the CLS mode, and its switching speed operates in the standard mode. When it is recognized that the IN input port is changed from a PWM signal to a normally high signal, the second delay module, the reset logic module and the D flip-flop can be used to recognize that the IN input port switches from a PWM signal to a normally high signal after exceeding the set time threshold, and then the D flip-flop and the RS latch are reset to force exit from the CLS mode and clear the internal cache.

[0032] like Figure 3 In the present invention, the RS latch is composed of two cross-coupled NOR gates, the set end S of the RS latch is respectively connected to the Q output end of the D flip-flop and the Q output end of the third D flip-flop module in the second delay module, and the output end of the RS latch is connected to the D input end of the first D flip-flop module in the first delay module.

[0033] The reset logic module, logic circuit and other circuits used in the present invention all adopt classic circuit modules widely circulated and applied in the current semiconductor industry, such as: D flip-flop reset logic module, AND gate, NOT gate and other logic circuits, which will not be repeated in detail here.

[0034] like Figure 4 The output waveform diagram of the high-side switch under the capacitive load of the capacitive load switch protection circuit of the present invention is shown. It can be seen that after the IN input port recognizes the arrival of the PWM signal, the high-side switch is in the protection mode of the capacitive load switch protection circuit. The switching speed is slowed down, which reduces the charging current I of the large load capacitor at the output end of the high-side switch. L , by smoothly charging the large load capacitor, the output voltage V of the high-side switch is realized OUT Intermittent step charging is performed, during which the charging speed of the load capacitor is slowed down and the charging time is extended, effectively avoiding the generation of excessive transient current at the output end and protecting the high-side switch.

[0035] like Figure 5 The capacitive load switch protection circuit applicable to the high-side switch of the present invention is also applicable to the high-side switch under the resistive load: after the IN input port recognizes the arrival of the PWM signal, the switching speed of the high-side switch slows down, and the protection mode of the load switch protection circuit is entered at this time, and the conversion rate slows down as the switching speed of the high-side switch slows down.

[0036] The above are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should be regarded as the protection scope of the present invention.

Claims

1. A capacitive load switch protection circuit suitable for a high-side switch, characterized in that: include: D trigger module, RS latch, reset logic module, first delay module, second delay module, logic module and drive module, When the external input signal IN connected to the input end of the D flip-flop module has no PWM signal input, the counter, RS latch, first delay module, second delay module and reset logic module in the D flip-flop module do not work, and the switching speed of the high-side switch is controlled by the logic module and the driving module to operate in the standard mode; When the external input signal IN connected to the input end of the D trigger module has a PWM signal input, the counter in the D trigger module starts counting until the RS trigger is triggered to generate an RS latch signal. The RS latch signal generates a flag signal CLS_OK after the delay of the first delay module. The operation of the logic module and the driving module is controlled by the flag signal CLS_OK to charge the capacitive load at the output end of the high-side switch. The time threshold for connecting the PWM signal is set by the second delay module. When the duration of the input PWM signal exceeds the time threshold, the counter count in the D trigger module is cleared to zero by the reset logic module, so that the switching speed of the high-side switch operates in the standard mode.

2. A capacitive load switch protection circuit suitable for a high side switch according to claim 1, characterized in that: The D input end of the D flip-flop module is connected to the external input signal IN, and whether the capacitive load switch protection circuit is started is triggered according to whether the external input signal IN has a PWM signal; the CLK end of the D flip-flop module is connected to the clock signal from the high-side switch, the Reset end of the D flip-flop module is connected to the output end of the reset logic module, and the Q output end of the D flip-flop module is connected to the input end of the RS latch.

3. A capacitive load switch protection circuit suitable for a high side switch according to claim 2, characterized in that: The first delay module and the second delay module are both composed of a first D trigger module, a second D trigger module and a third D trigger module.

4. The capacitive load switch protection circuit suitable for a high side switch according to claim 3, characterized in that: The CLK end of the first D flip-flop module, the CLK end of the second D flip-flop module, and the CLK end of the third D flip-flop module are all connected to the clock signal from the high-side switch, the Reset end of the first D flip-flop module, the Reset end of the second D flip-flop module, and the Reset end of the third D flip-flop module are all connected to the output end of the reset logic module, the Q output end of the first D flip-flop module is connected to the D input end of the second D flip-flop module, and the Q output end of the second D flip-flop module is connected to the D input end of the third D flip-flop module.

5. The capacitive load switch protection circuit suitable for a high side switch according to claim 4, characterized in that: The D input end of the first D flip-flop module in the first delay module is connected to the output end of the RS latch, and the Q output end of the third D flip-flop module in the first delay module is respectively connected to the input end of the logic module and the input end of the driving module.

6. The capacitive load switch protection circuit suitable for a high side switch according to claim 5, characterized in that: The D input terminal of the first D flip-flop module in the second delay module is connected to the external input signal IN, and the Q output terminal of the third D flip-flop module in the second delay module is respectively connected to the input terminal of the reset logic module and the input terminal of the RS latch.

7. A capacitive load switch protection circuit suitable for a high side switch according to claim 6, characterized in that: The RS latch is composed of two cross-coupled NOR gates, the set end S of the RS latch is respectively connected to the Q output end of the D flip-flop and the Q output end of the third D flip-flop module in the second delay module, and the output end of the RS latch is connected to the D input end of the first D flip-flop module in the first delay module.

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