A Source Region Doping-Modulated IGBT Structure and Fabrication Method

Abstract

The present application provides a source region doped modulation IGBT structure and a manufacturing method thereof. A source region doped modulation IGBT structure includes: a collector metal electrode, a collector, a buffer layer, a first drift region, a modulation layer, and a second drift region stacked in sequence; a charge storage layer connected to the modulation layer through a plurality of modulation columns; a body region, an emitter, a first dielectric layer, an emitter metal electrode, and a passivation layer stacked in sequence on the charge storage layer; wherein, a plurality of polysilicon gate electrodes are provided at the bottom of the dielectric layer, and after each polysilicon gate electrode passes through the emitter, the body region, and the charge storage layer, it extends into the modulation column one by one, and a second dielectric layer is coated outside each polysilicon gate electrode; the emitter metal electrode is embedded in the emitter and the second drift region and contacts the body region. The IGBT structure provided by the present application can reduce the Miller capacitance and the capacitance inflection point of the IGBT while keeping the on-state voltage drop unchanged, and greatly improve the dynamic performance of the device.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and particularly to a source region doped modulated IGBT structure and a manufacturing method thereof. Background Art

[0002] As the core device of power electronics technology, semiconductor power devices are an important bridge between weak current control and strong current operation, converting "coarse electricity" into "precision electricity" and providing diverse and directly usable electrical energy for economic development and social operation. In the process of the green and intelligent development of power electronics technology, insulated gate bipolar transistors (IGBTs) are widely used due to their high power and low loss characteristics. IGBTs are composite fully controlled voltage-driven power semiconductor devices developed based on metal-oxide-semiconductor field-effect transistors (MOSFETs) and bipolar junction transistors (BJTs), combining the advantages of high input impedance of MOSFETs and low on-state voltage drop of BJTs. Due to the existence of the conductivity modulation effect, they have a low saturation voltage drop in the on-state, a high carrier density, and a high output power; at the same time, they also have the advantages of voltage control devices, small drive power, and fast switching speed, and are particularly suitable for applications in fields such as AC motors, frequency converters, switching power supplies, lighting circuits, and traction drives.

[0003] In IGBTs, the charge storage layer is an effective way to enhance the injection effect and reduce the conduction loss. However, the introduction of the charge storage layer will lead to higher Miller capacitance and capacitance inflection point, thus exacerbating the gate oscillation and EMI problems and affecting the reliability of IGBT devices during switching operation. Summary of the Invention

[0004] Based on this, it is necessary to provide a source region doped modulated IGBT structure and a manufacturing method thereof for the above technical problems.

[0005] In a first aspect, the present application provides a source region doped modulated IGBT structure, including:

[0006] A collector metal electrode, a collector, a buffer layer, a first drift region, a modulation layer, and a second drift region stacked in sequence;

[0007] A charge storage layer connected to the modulation layer through a plurality of modulation columns;

[0008] A body region, an emitter, a first dielectric layer, an emitter metal electrode, and a passivation layer stacked in sequence on the charge storage layer;

[0009] Wherein, a plurality of polysilicon gate electrodes are provided at the bottom of the dielectric layer. After passing through the emitter, the body region, and the charge storage layer, each polysilicon gate electrode extends into the modulation column one by one, and a second dielectric layer is coated outside each polysilicon gate electrode;

[0010] The emitter metal electrode is embedded in the emitter and the second drift region and contacts the body region.

[0011] In one embodiment, the modulation column is a boron difluoride column, and the boron difluoride column and the modulation layer form a capacitance modulation structure.

[0012] In one embodiment, the collector is a P-type doped region formed by high-energy boron implantation.

[0013] In one embodiment, the buffer layer is an N-type region formed by annealing high-energy phosphorus implantation or high-energy hydrogen implantation, and the annealing junction depth is 2 to 30 microns.

[0014] In one embodiment, the first drift region is an N-type doped Si material, and the resistivity of the first drift region is 20 to 130 Ω·cm.

[0015] In one embodiment, the charge storage layer and the emitter are N-type regions formed by phosphorus implantation and annealing.

[0016] In one embodiment, the body region is a P-type region formed by boron implantation and annealing.

[0017] In one embodiment, at least one of the second drift region, the first dielectric layer, and the second dielectric layer is a silicon oxide material doped with phosphorus and boron.

[0018] Second invention, the present application provides a method for manufacturing the source region doped modulation IGBT structure as described above, including the following steps:

[0019] Provide a first drift region, form a modulation layer on the first drift region, form a second drift region on the modulation layer, form a charge storage layer on the second drift region, form a body region on the charge storage layer, and form an emitter on the body region;

[0020] Form a first trench penetrating the emitter, the body region, the charge storage layer, and the second drift region, and form a modulation column at the bottom of the first trench;

[0021] Form a second dielectric layer on the inner sidewall of the first trench, and fill a polysilicon gate electrode in the second dielectric layer;

[0022] Form a first dielectric layer on the body region, form a second trench penetrating the first dielectric layer and the emitter and extending into the body region, and form an emitter metal electrode in the second trench and above the first dielectric layer, and form a passivation layer on the emitter metal electrode;

[0023] Form a buffer layer, a collector, and a collector metal electrode in sequence at the bottom of the first drift region.

[0024] In one embodiment, the modulation column is a boron difluoride column.

[0025] In the above source region doped modulation IGBT structure, it includes a collector metal electrode, a collector, a buffer layer, a first drift region, a modulation layer, and a second drift region stacked in sequence, a charge storage layer, which is connected to the modulation layer through a plurality of modulation columns; a body region, an emitter, a first dielectric layer, an emitter metal electrode, and a passivation layer stacked in sequence on the charge storage layer; wherein, a plurality of polysilicon gate electrodes are provided at the bottom of the dielectric layer, and after each polysilicon gate electrode passes through the emitter, the body region, and the charge storage layer, it extends into the modulation column one by one, and a second dielectric layer is coated outside each polysilicon gate electrode. By introducing a structure including a modulation column and a modulation layer in the first drift region, the source region charge distribution is optimized horizontally and vertically, and the N-type carriers introduced by the charge storage layer are compensated, thereby reducing the Miller capacitance and the capacitance inflection point of the device and obtaining better dynamic performance. Therefore, the present invention can reduce the Miller capacitance and the capacitance inflection point of the IGBT while keeping the on-state voltage drop unchanged, and greatly improve the dynamic performance of the device. Description of the Drawings

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present application or in the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0027] Figure 1 It is a flowchart of a preparation method of a source region doped modulation IGBT structure provided in one embodiment;

[0028] Figure 2 It is a schematic diagram of forming a modulation layer on the first drift region in one embodiment;

[0029] Figure 3 It is a schematic diagram of forming a second drift region on the modulation layer in one embodiment;

[0030] Figure 4 It is a schematic diagram of forming a charge storage layer on the second drift region in one embodiment;

[0031] Figure 5 It is a schematic diagram of forming a body region on the charge storage layer in one embodiment;

[0032] Figure 6 It is a schematic diagram of forming an emitter on the body region in one embodiment;

[0033] Figure 7Schematic diagram of forming a modulation column and a polysilicon gate electrode in an embodiment;

[0034] Figure 8 Schematic diagram of forming a first dielectric layer on a body region in an embodiment;

[0035] Figure 9 Schematic diagram of forming an emitter metal electrode in an embodiment;

[0036] Figure 10 Schematic diagram of forming a buffer layer, a collector, and a collector metal electrode at the bottom of a first drift region in an embodiment.

[0037] Description of reference numerals:

[0038] 11. First drift region; 12. Modulation layer; 13. Second drift region; 14. Charge storage layer; 15. Body region; 16. Emitter; 17. Modulation column; 18. Polysilicon gate electrode; 19. Second dielectric layer; 20. First dielectric layer; 21. Emitter metal electrode; 22. Passivation layer; 23. Buffer layer; 24. Collector; 25. Collector metal electrode. Detailed implementation manners

[0039] For ease of understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. Preferred embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used in the specification of this application herein are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0041] See Figure 10 , Figure 10Shows a schematic diagram of a source region doped modulation IGBT structure in some embodiments. In some embodiments, a source region doped modulation IGBT structure includes: a collector metal electrode 25, a collector 24, a buffer layer 23, a first drift region 11, a modulation layer 12, and a second drift region 13 stacked in sequence; a charge storage layer 14 connected to the modulation layer 12 through a plurality of modulation columns 17; a body region 15, an emitter 16, a first dielectric layer 20, an emitter metal electrode 21, and a passivation layer 22 stacked in sequence on the charge storage layer 14; wherein, a plurality of polysilicon gate electrodes 18 are provided at the bottom of the dielectric layer, and after each polysilicon gate electrode 18 passes through the emitter 16, the body region 15, and the charge storage layer 14, it extends into the modulation column 17 one by one, and a second dielectric layer 19 is coated outside each polysilicon gate electrode 18; the emitter metal electrode 21 is embedded in the emitter 16 and the second drift region 13 and contacts the body region 15.

[0042] From the bottom to the top direction of the IGBT (Insulated Gate Bipolar Transistor) structure, the collector metal electrode 25, the collector 24, the buffer layer 23, the first drift region 11, the modulation layer 12, and the second drift region 13 are stacked in sequence. The body region 15 is located on the charge storage layer 14, and the body region 15, the emitter 16, the first dielectric layer 20, the emitter metal electrode 21, and the passivation layer 22 are stacked in sequence along the bottom-to-top direction.

[0043] The collector metal electrode 25 is located at the bottommost, and its main function is to collect and conduct the current from the collector 24, and at the same time provide electrical connection for the device. It is made of a highly conductive metal material to ensure efficient current transmission. The collector 24 layer is the region in the IGBT that bears the main current and is composed of a highly doped semiconductor material. It can be understood that the function of the collector 24 layer is to provide a low-resistance path to support the flow of a large amount of current. For example, it can be an N-type semiconductor, serving as a carrier channel for electrons.

[0044] The buffer layer 23 is to reduce the electric field strength between the collector 24 and the first drift region 11, reduce the parasitic capacitance effect under high voltage, and increase the breakdown voltage of the device. The first drift region 11 plays a crucial role in the entire IGBT structure and is the current conduction region of the IGBT. Carriers drift under the action of an externally applied electric field to complete current conduction. Optionally, the first drift region 11 is composed of an N-type semiconductor material to provide a longer drift path, thereby reducing the carrier recombination phenomenon and increasing the current-carrying capacity.

[0045] The function of the modulation layer 12 is to improve the switching performance of the IGBT by adjusting the distribution of the electric field. The modulation layer 12 is usually located above the first drift region 11, and can effectively control the behavior of the gate signal and carriers in the first drift region 11, adjusting the carrier concentration and the electric field distribution. The second drift region 13 is located on the modulation layer 12 and can be silicon oxide or other dielectric materials to avoid direct electrical interference. The modulation column 17 is located below the charge storage layer 14 and partially located in the charge storage layer 14. The modulation layer 12 is located below each modulation column 17 and connects each modulation column 17. Through the capacitive modulation layer 12 composed of the modulation column 17 and the modulation layer 12, the global N-type charge storage layer 14 is compensated, and the source region charge distribution is modulated both laterally and longitudinally, thereby optimizing the dynamic characteristics. Optionally, the modulation column 17 can be a boron-doped modulation column 17.

[0046] Multiple polysilicon gate electrodes 18 are covered by the second dielectric layer 19 and embedded in the charge storage layer 14, the body region 15, and the emitter 16 at equal intervals.

[0047] Among them, the source region doped modulation IGBT structure from bottom to top is the collector metal electrode 25, the collector 24, the buffer layer 23, the first drift region 11, the capacitive modulation layer 12, the charge storage layer 14, the body region 15, the emitter 16, the emitter metal electrode 21, and the passivation layer 22. Optionally, a PI (Polyimide) layer is further included on the passivation layer 22. The capacitive modulation layer 12 on the first drift region 11 includes a layered modulation layer 12 and a columnar modulation column 17.

[0048] By introducing a structure including the modulation column 17 and the modulation layer 12 in the first drift region 11, the source region charge distribution is optimized both laterally and longitudinally, and the N-type carriers introduced by the charge storage layer 14 are compensated, thereby reducing the Miller capacitance and the capacitance inflection point of the device and obtaining better dynamic performance. Therefore, the present invention can reduce the Miller capacitance and the capacitance inflection point of the IGBT while keeping the on-state voltage drop unchanged, and greatly improve the dynamic performance of the device.

[0049] In some embodiments, the modulation column 17 is a boron difluoride (BF2) column, and the boron difluoride column and the modulation layer 12 form a capacitive modulation structure. Boron difluoride, as an efficient modulation material, has unique electrical characteristics and can achieve the control and adjustment of the electric field in this structure. Specifically, the boron difluoride column forms a capacitive structure through combination with the modulation layer 12, and this structure can adjust the electric field distribution under different working conditions, thereby optimizing the movement and concentration distribution of carriers in the first drift region 11. Due to the high dielectric constant and low conductivity of the boron difluoride column, it can effectively adjust the capacitive coupling between the gate signal and the first drift region 11, improving the switching performance and response speed of the IGBT.

[0050] In addition, the use of boron difluoride columns can also improve the stability of the device in high-frequency operation and reduce energy losses during the switching process, thereby improving the efficiency and reliability of the entire IGBT device.

[0051] In some embodiments, the collector 24 is a P-type doped region formed by high-energy boron implantation. In some embodiments, the collector 24 is a P-type doped region formed by high-energy boron implantation technology. Specifically, high-energy boron implantation is a technology that uses high-energy particles to implant boron ions into a semiconductor substrate. In the structure of the IGBT device, the collector 24 region plays a major role in current carrying and has a lower resistivity to support the flow of large currents.

[0052] In some embodiments, the buffer layer 23 is an N-type region formed by annealing of high-energy phosphorus implantation or high-energy hydrogen implantation, and the annealing junction depth is 2 to 30 microns. Optionally, the annealing junction depth can be 2 microns, 5 microns, 10 microns, 15 microns, 20 microns, 25 microns or 30 microns. In this embodiment, the annealing junction depth of the buffer layer 23 ranges from 2 to 30 microns, which helps to optimize the performance of the device, especially when subjected to high voltage and high current, it can effectively improve the current conduction efficiency and the withstand voltage capability of the device.

[0053] In some embodiments, the first drift region 11 is an N-type doped Si material, and the resistivity of the first drift region 11 is 20-130Ω·cm. Optionally, the resistivity of the first drift region 11 may be 20Ω·cm, 30Ω·cm, 50Ω·cm, 80Ω·cm, 100Ω·cm, 120Ω·cm or 130Ω·cm. In this embodiment, the resistivity of the first drift region 11 has an important influence on the performance of the device, especially in high-power and high-frequency applications. The selection of the resistivity of the first drift region 11 is directly related to the switching speed, switching loss and thermal management of the device. The resistivity range of the first drift region 11 is 20-130Ω·cm. If the resistivity is too low, the voltage withstand capability of the device may be reduced under high voltage conditions; if the resistivity is too high, the power loss will increase.

[0054] In some embodiments, the charge storage layer 14 and the emitter 16 are N-type regions formed by phosphorus implantation annealing. In phosphorus implantation annealing, phosphorus atoms are implanted into a semiconductor material, usually a silicon (Si) substrate, and then annealed to uniformly diffuse the phosphorus atoms and form an N-type region with the silicon. In this embodiment, the charge storage layer 14 is formed into an N-type region by a phosphorus implantation annealing process to ensure that the region has sufficient electron concentration to support effective charge storage and release. The emitter 16 is formed into an N-type region by the same phosphorus implantation annealing process, which helps to establish a good electron transfer path between the emitter 16 and the base region.

[0055] In some embodiments, the body region 15 is a P-type region formed by boron implantation and annealing. Boron implantation and annealing involves implanting boron atoms into a silicon substrate to form a P-type region. During the boron implantation and annealing process, boron atoms are implanted into the silicon substrate at high speed and diffused and activated through the annealing process, so that the boron atoms are uniformly distributed within the body region 15 and it is also ensured that boron combines with silicon atoms to form a P-type region.

[0056] In some embodiments, at least one of the second drift region 13, the first dielectric layer 20, and the second dielectric layer 19 is a silicon oxide material doped with phosphorus and boron. The silicon oxide material doped with phosphorus and boron refers to silicon oxide (SiO2) doped with phosphorus (P) and boron (B) elements.

[0057] In some embodiments, referring to Figure 1 , Figure 1 FIG. shows a flowchart of a method for fabricating a source region doped-modulated IGBT structure in one embodiment, including the following steps:

[0058] S11, as Figures 2 - 6 shown, provide a first drift region 11, form a modulation layer 12 on the first drift region 11, form a second drift region 13 on the modulation layer 12, form a charge storage layer 14 on the second drift region 13, form a body region 15 on the charge storage layer 14, and form an emitter 16 on the body region 15.

[0059] S12, as Figure 7 shown, form a first trench penetrating the emitter 16, the body region 15, the charge storage layer 14, and the second drift region 13, and form a modulation column 17 at the inner bottom of the first trench.

[0060] Exemplarily, the modulation column 17 is located on top of the modulation layer 12, penetrates the second drift region 13 and extends into the charge storage layer.

[0061] S13, as Figure 7 shown, form a second dielectric layer 19 on the inner sidewall of the first trench, and fill a polysilicon gate electrode 18 in the second dielectric layer 19.

[0062] S14, as Figure 8 and Figure 9 shown, form a first dielectric layer 20 on the body region 15, form a second trench penetrating the first dielectric layer 20 and the emitter 16 and extending into the body region 15, and form an emitter metal electrode 21 in the second trench and above the first dielectric layer 20, and form a passivation layer 22 on the emitter metal electrode 21.

[0063] S15, as Figure 10 shown, sequentially form a buffer layer 23, a collector 24, and a collector metal electrode 25 at the bottom of the first drift region 11.

[0064] In some embodiments, the modulation column 17 is a boron difluoride column.

[0065] It should be understood that when an element or layer is referred to as "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is referred to as "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Thus, without departing from the teachings of the present invention, the first element, component, region, layer, doping type or part discussed below may be denoted as the second element, component, region, layer or part.

[0066] Spatial relationship terms such as "under", "below", "beneath", "underneath", "above", "over", etc. may be used herein to describe the relationship of one element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms also include different orientations of the device in use and operation. For example, if the device in the figures is flipped, an element or feature described as "under" or "beneath" or "underneath" another element or feature will be oriented "above" the other element or feature. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. In addition, the device may also include additional orientations (such as, rotated 90 degrees or other orientations), and the spatial descriptors used herein are to be interpreted accordingly.

[0067] As used herein, the singular forms "a", "an" and "the" may also include the plural unless the context clearly dictates otherwise. It should also be understood that when the terms "comprises" and / or "comprising" are used in this specification, the presence of the stated features, integers, steps, operations, elements and / or components can be ascertained, but one or more other features, integers, steps, operations, elements, components and / or groups are not precluded from existence or addition. Also, as used herein, the term "and / or" includes any and all combinations of the associated listed items.

[0068] The relevant structures of the embodiments of the present invention should not be limited to the specific shapes shown in the accompanying drawings of the specification, but include shape deviations caused by, for example, manufacturing techniques. The shapes shown in the figures are substantially schematic and do not limit the scope of the present invention.

[0069] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0070] The above-described embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.

Claims

1. A source region doping modulated IGBT structure, characterized in that: Comprising: A collector metal electrode, a collector, a buffer layer, a first drift region, a modulation layer, and a second drift region stacked in sequence; A charge storage layer connected to the modulation layer through a plurality of modulation columns, and the modulation columns and the modulation layer form a capacitive modulation layer to compensate for the N-type charge storage layer; A body region, an emitter, a first dielectric layer, an emitter metal electrode, and a passivation layer stacked in sequence on the charge storage layer; Wherein, a plurality of polysilicon gate electrodes are provided at the bottom of the first dielectric layer. After each polysilicon gate electrode passes through the emitter, the body region, and the charge storage layer, it extends into the modulation column one by one, and a second dielectric layer is coated outside each polysilicon gate electrode; The emitter metal electrode is embedded in the emitter and the first dielectric layer and contacts the body region.

2. The source region doping-modulated IGBT structure according to claim 1, characterized in that: The modulation column is a boron difluoride column, and the boron difluoride column and the modulation layer form a capacitive modulation structure.

3. The source region doping-modulated IGBT structure according to claim 1, characterized in that: The collector is a P-type doped region formed by high-energy boron implantation.

4. The source region doping-modulated IGBT structure according to claim 1, characterized in that: The buffer layer is an N-type region formed by high-energy phosphorus implantation or high-energy hydrogen implantation followed by annealing, and the annealing junction depth is 2 to 30 microns.

5. The source region doping modulated IGBT structure according to claim 1, characterized in that: The first drift region is an N-type doped Si material, and the resistivity of the first drift region is 20 to 130 Ω·cm.

6. The source region doping-modulated IGBT structure according to claim 1, wherein: The charge storage layer and the emitter are N-type regions formed by phosphorus implantation and annealing.

7. The source region doping-modulated IGBT structure according to claim 1, characterized in that: The body region is a P-type region formed by boron implantation and annealing.

8. The source region doping modulated IGBT structure according to claim 1, wherein: At least one of the second drift region, the first dielectric layer, and the second dielectric layer is a silicon oxide material doped with phosphorus and boron.

9. A method for manufacturing a source region doping-modulated IGBT structure according to any one of claims 1-8, characterized in that: Including the following steps: Providing a first drift region, forming a modulation layer on the first drift region, forming a second drift region on the modulation layer, forming a charge storage layer on the second drift region, forming a body region on the charge storage layer, and forming an emitter on the body region; Forming a first trench penetrating the emitter, the body region, the charge storage layer, and the second drift region, and forming a modulation column at the inner bottom of the first trench. The modulation column and the modulation layer form a capacitive modulation layer to compensate for the N-type charge storage layer; Forming a second dielectric layer on the inner sidewall of the first trench and filling a polysilicon gate electrode in the second dielectric layer; Forming a first dielectric layer on the body region, forming a second trench penetrating the first dielectric layer and the emitter and extending into the body region, and forming an emitter metal electrode in the second trench and above the first dielectric layer, and forming a passivation layer on the emitter metal electrode; Sequentially forming a buffer layer, a collector, and a collector metal electrode at the bottom of the first drift region.

10. The preparation method according to claim 9, characterized in that: The modulation column is a boron difluoride column.

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