Preparation method of thin film transistor based on silicon gate electrode

Abstract

The invention discloses a preparation method of a thin film transistor based on a silicon gate electrode, and relates to the technical field of thin film transistors and panel display. The preparation method of the thin film transistor comprises the following steps: S1, selecting heavily doped N-type silicon or heavily doped P-type silicon as a bottom gate electrode; s2, a metal oxide thin film is sputtered on the pretreated bottom gate electrode, the sputtering atmosphere is composed of argon and nitrogen, annealing is conducted in the nitrogen environment after sputtering is completed, and a gate dielectric layer is manufactured; s3, preparing an active layer on the gate dielectric layer; and S4, preparing a source electrode and a drain electrode on the active layer to obtain the thin film transistor based on the silicon gate electrode. According to the preparation method of the thin film transistor based on the silicon gate electrode, in the preparation process of the gate dielectric layer, the defects of a thin film body of the gate dielectric layer are reduced and the contact interface of the gate dielectric layer / the bottom gate electrode is improved by introducing nitrogen in the sputtering atmosphere and annealing, so that the electrical property of the thin film transistor based on the silicon gate electrode is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of thin film transistors and flat panel displays, and in particular to a method for preparing a thin film transistor based on a silicon gate electrode. Background Art

[0002] As a core electronic device, thin film transistors have shown a wide range of application value in many fields such as flat panel displays, sensors, wearable devices and radio frequency identification. The quality of its electrical performance is directly related to the actual effect of these applications. Electrical performance parameters such as mobility, threshold voltage, subthreshold swing and switching ratio together constitute important criteria for measuring the electrical performance of thin film transistors. Mobility is an indicator of the ability of carriers (electrons or holes) to move under the action of an electric field. High mobility means that under the same electric field, carriers can move faster, thereby achieving higher switching speeds and lower driving voltages. The threshold voltage is the minimum voltage required for a thin film transistor to switch from the off state to the on state. Optimizing the threshold voltage can reduce the power consumption of the device and improve its ability to work at low voltages. The subthreshold swing refers to the voltage change required for the current to change by one order of magnitude in the subthreshold region. A smaller subthreshold swing means that the device has better switching characteristics at low voltages and can control the current more accurately. The switching ratio refers to the current ratio of a thin film transistor in the on state and the off state. A high on / off ratio means that the leakage current of the device is extremely low when it is off, and the current is large enough in the on state to achieve efficient current control. By optimizing these electrical performance parameters, the performance of thin film transistors can be continuously improved.

[0003] At present, the main ways to improve the electrical performance of thin film transistors based on silicon gate electrodes include improving active layer materials, optimizing device structures, and improving preparation processes. First, although certain results have been achieved in improving the electrical performance of thin film transistors by improving active layer materials, multiple factors such as the physical and chemical properties of materials and preparation processes need to be considered, which increases the difficulty of research and development and production. Second, optimizing the device structure increases the complexity of the preparation process, requiring more preparation steps and preparation time. Third, the new preparation process needs to be verified and optimized for a long time to ensure its stability and reliability. Although the optimization method of the present invention belongs to a kind of improved preparation process, no new production equipment is introduced, and the electrical performance of thin film transistors based on silicon gate electrodes can be improved only by adjusting the process conditions for preparing the gate dielectric layer.

[0004] For example, the academic journal Micromachines published an article titled "Improving TFT Device Performance by Changing the Thickness of the LZTO / ZTO Dual Active Layer" in Volume 15. The article used p-type silicon as the bottom gate and explored the strategy of using LZTO / ZTO as a double-layer structure to improve the electrical performance of dual-active-layer thin-film transistors. By optimizing the thickness of the ZTO active layer, the mobility and switching ratio of the dual-active-layer thin-film transistor were improved. The main limitation of this technical solution is that it increases the complexity of the device structure.

[0005] For example, Chinese patent CN112908852A discloses a hafnium-doped indium oxide thin film transistor and its preparation method, wherein the transistor is an N-type indium oxide thin film transistor with a bottom gate top contact structure. The electrical performance of the indium oxide thin film transistor is significantly improved by using a silicon-based gate electrode and hafnium doping technology, especially in terms of bias stability and subthreshold swing. The main limitation of this technical solution is that hafnium is a rare metal, and its compounds and hafnium chloride are relatively expensive, which increases the material cost.

[0006] For example, Chinese patent CN104716024A discloses a method for improving the electrical performance of thin-film semiconductor transistors. By using a silicon-based gate electrode and covering the surface of the thin-film semiconductor transistor with an organic layer or an inorganic layer, the electrical performance of the device is significantly improved. This covering layer not only isolates moisture and oxygen in the outside air, reducing the negative impact on device performance, but also reduces surface defect states, thereby improving the carrier transport characteristics. The main limitation of this technical solution is that the introduction of the covering layer increases the complexity of the preparation process. Summary of the invention

[0007] In view of the above problems existing in the prior art, the present invention provides a method for preparing a thin film transistor based on a silicon gate electrode. The main purpose of the present invention is to provide a preparation method that is simple to operate and low in cost, which is used to improve the electrical performance of a thin film transistor based on a silicon gate electrode. The method uses highly doped silicon as a bottom gate electrode. On the one hand, during the preparation process of the gate dielectric layer, by introducing nitrogen in the sputtering atmosphere and post-deposition annealing, a nitrogen-silicon bond can be formed at the interface between the gate dielectric layer and the bottom silicon-based gate electrode, thereby optimizing the contact interface. On the other hand, the introduction of nitrogen enables nitrogen atoms to fill the oxygen vacancies inside the gate dielectric layer film, and replace the positions of oxygen atoms adjacent to the oxygen vacancies, effectively reducing the body defects of the gate dielectric layer film. Due to the improvement of the interface quality of the gate dielectric layer / the bottom silicon-based gate electrode and the reduction of the body defects of the gate dielectric layer film, the electrical performance of the thin film transistor based on the silicon gate electrode is improved.

[0008] The specific technical solutions include the following:

[0009] A method for preparing a thin film transistor based on a silicon gate electrode is provided, comprising the following steps:

[0010] S1. Select heavily doped N-type silicon or heavily doped P-type silicon as the bottom gate electrode and pretreat the bottom gate electrode;

[0011] S2. sputtering a metal oxide film on the pretreated bottom gate electrode, the sputtering atmosphere is composed of argon and nitrogen, and annealing in a nitrogen environment after sputtering to obtain a gate dielectric layer; the metal oxide film material of the gate dielectric layer is aluminum oxide or hafnium oxide;

[0012] S3. Preparing an active layer on the gate dielectric layer;

[0013] S4. Prepare a source electrode and a drain electrode on the active layer. The source electrode and the drain electrode are arranged on the surface of the active layer with an interval, so as to obtain a thin film transistor based on a silicon gate electrode.

[0014] Furthermore, in step S3, the thin film material of the active layer is one or more of indium gallium zinc oxide and indium tin zinc oxide.

[0015] Furthermore, in step S3, the thickness of the active layer is 15-100 nanometers.

[0016] Furthermore, in step S4, the source electrode and the drain electrode are made of one or more materials selected from the group consisting of aluminum, silver, copper and gold.

[0017] Furthermore, in step S4, the thickness of the source electrode and the drain electrode are both 40-100 nanometers.

[0018] Furthermore, in step S1, the thickness of the bottom gate electrode is greater than 100 nanometers.

[0019] Furthermore, in step S2, the thickness of the gate dielectric layer is 20-100 nanometers.

[0020] Furthermore, in step S2, the atmosphere ratio of the sputtering atmosphere is argon:nitrogen=30:(20-50) standard ml / min.

[0021] Preferably, in step S2, the atmosphere ratio of the sputtering atmosphere is argon:nitrogen=30:20 standard ml / min.

[0022] Among them, when the atmosphere ratio of the sputtering atmosphere is argon: nitrogen = 30:20 standard ml / min, the mobility, switching ratio, threshold voltage and subthreshold swing of the thin film transistor based on the silicon gate electrode are optimized and reach saturation.

[0023] Further, in step S2, the sputtering power is 100 - 120 watts, and the sputtering time is 10 - 15 minutes.

[0024] Further, in step S2, the annealing temperature is 340 - 360 degrees Celsius, and the annealing time is 15 - 20 minutes.

[0025] The beneficial effects of the present invention are as follows:

[0026] (1) The present invention does not require changing the device structure, and the operation steps are simple and efficient.

[0027] (2) The process parameter of the nitrogen gas flow rate is convenient to change and shows compatibility, and it is applicable to both long-channel devices and short-channel devices.

[0028] (3) The preparation of the gate dielectric layer, the active layer, and the source-drain electrodes all adopts the sputtering process. The thin film prepared by the sputtering process is denser, more uniform, and has good adhesion, which is beneficial to the growth of the upper thin film and the improvement of the performance of the entire device.

[0029] (4) During the preparation process of the gate dielectric layer of the present invention, by introducing nitrogen in the sputtering atmosphere and annealing after deposition, the bulk defects of the gate dielectric layer thin film are reduced. At the same time, nitrogen-silicon bonds are formed at the contact interface between the gate dielectric layer and the silicon-based gate electrode, optimizing the contact interface, thereby improving the electrical performance of the thin film transistor based on the silicon gate electrode.

[0030] (5) The bottom gate electrode uses highly doped silicon, and the material of the gate dielectric layer is selected as alumina instead of silicon nitride because the trap state at the interface between alumina and silicon is lower, which helps to reduce the leakage current. Moreover, compared with silicon nitride, alumina has a higher dielectric constant, which can realize a thinner effective gate dielectric layer, thereby improving the mobility and switching speed of the thin film transistor based on the silicon gate electrode. Description of the Drawings

[0031] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0032] Figure 1 It is a schematic structural diagram of the thin film transistor based on the silicon gate electrode according to Embodiment 1 of the present invention;

[0033] Figure 2 It is the transfer characteristic curve of the thin film transistor based on the silicon gate electrode according to Embodiment 1 of the present invention;

[0034] Figure 3 It is the transfer characteristic curve of the thin film transistor based on the silicon gate electrode according to Comparative Example 1 of the present invention;

[0035] Figure 4 The transfer characteristic curve of the thin film transistor based on the silicon gate electrode in Comparative Example 2 of the present invention;

[0036] Description of the symbols in the figure:

[0037] 1- bottom gate electrode; 2- gate dielectric layer; 3- active layer; 4- source electrode; 5- drain electrode. DETAILED DESCRIPTION

[0038] The technical solutions in the embodiments of the present invention are described clearly and completely below. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0039] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0040] It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0041] It should be further understood that the term "and / or" used in the present description and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0042] In order to more fully understand the technical content of the present invention, the technical solution of the present invention is further introduced and illustrated in conjunction with specific embodiments below.

[0043] Example 1

[0044] like Figure 1 As shown, Embodiment 1 provides a thin film transistor based on a silicon gate electrode, which includes, from bottom to top, a bottom gate electrode 1, a gate dielectric layer 2, an active layer 3, a source electrode 4 and a drain electrode 5, wherein the source electrode 4 and the drain electrode 5 are arranged on the surface of the active layer 3 at intervals.

[0045] The method for preparing a thin film transistor based on a silicon gate electrode of Example 1 comprises the following steps:

[0046] S1. Select heavily doped N-type silicon as the bottom gate electrode with a thickness of 500 microns and pre-treat the bottom gate electrode. Among them, the pre-treatment is to cut the bottom gate electrode (heavily doped silicon wafer) into a size of 2 cm * 2 cm using a diamond pen, and then perform ultrasonic cleaning in DECON-90, anhydrous ethanol, and deionized water for 20 minutes in sequence. After drying the surface moisture, put it into a drying oven for drying at 120 °C for 60 minutes;

[0047] S2. Sputter a metal oxide thin film on the pre-treated bottom gate electrode. Specifically, place the dried heavily doped silicon wafer in a magnetron sputtering instrument. When the vacuum degree in the chamber is lower than 5E-4 Pa, open the sample baffle for sputtering operation. The sputtering power is 100 watts, the sputtering time is 10 minutes, the sputtering atmosphere is composed of argon and nitrogen, and the atmosphere ratio of the sputtering atmosphere is argon: nitrogen = 30:20 standard milliliters / minute. After sputtering, anneal in a nitrogen environment. The annealing temperature is 350 °C and the annealing time is 15 minutes to obtain the gate dielectric layer. The metal oxide thin film material of the gate dielectric layer is alumina, and the thickness of the gate dielectric layer is 30 nanometers;

[0048] S3. Prepare the active layer on the gate dielectric layer. The thin film material of the active layer is indium gallium zinc oxide, and the thickness of the active layer is 40 nanometers. The specific preparation steps of the active layer are as follows: Take out the sample completed in step S2, paste the active layer mask plate with an aspect ratio of 1000 microns: 1000 microns, place it in a magnetron sputtering instrument. When the vacuum degree in the chamber is lower than 8E-4 Pa, open the sample baffle for sputtering operation. The sputtering power is 80 watts, the sputtering atmosphere ratio is argon: oxygen = 28.5:4.5 standard milliliters / minute, and the sputtering time is 10 minutes to make a 40-nanometer-thick active layer (indium gallium zinc oxide thin film), and anneal in air at 400 °C for 30 minutes;

[0049] S4. Prepare the source electrode and the drain electrode on the active layer. The materials of the source electrode and the drain electrode are both aluminum, and the thicknesses of the source electrode and the drain electrode are both 80 nanometers. The source electrode and the drain electrode are arranged at intervals on the surface of the active layer, that is, a thin film transistor based on a silicon gate electrode is obtained. The specific preparation steps of the source electrode and the drain electrode are as follows: On the sample that has already prepared the bottom gate electrode, the dielectric layer, and the active layer, paste the source electrode and the drain electrode mask plate, and then use a magnetron sputtering instrument. After the vacuum degree in the chamber drops to 8E-4 Pa, start sputtering an 80-nm-thick aluminum electrode. The sputtering power is 100 W, and the sputtering atmosphere is 33 standard milliliters / minute of argon. Finally, a channel with an aspect ratio of 100 microns: 20 microns will be formed on the surface of the IGZO thin film (indium gallium zinc oxide thin film), and anneal in air at 300 °C for 5 minutes.

[0050] Comparative Example 1

[0051] The difference between Comparative Example 1 and Example 1 is that the sputtering atmosphere in step S2 of Comparative Example 1 is argon gas = 30 standard ml / min, and annealing is performed in an air environment after sputtering is completed. The other conditions are the same.

[0052] Comparative Example 2

[0053] The only difference between Comparative Example 2 and Example 1 is that the sputtering atmosphere ratio in step S2 of Comparative Example 2 is argon:nitrogen=30:10 standard ml / min, and the other conditions are the same.

[0054] Figure 2 is a transfer characteristic curve of a thin film transistor based on a silicon gate electrode according to Example 1 of the present invention; Figure 3 The transfer characteristic curve of the thin film transistor based on the silicon gate electrode in Comparative Example 1 of the present invention; Figure 4 2 is the transfer characteristic curve of the thin film transistor based on the silicon gate electrode of the comparative example 2 of the present invention. Figure 2-Figure 4 The transfer characteristic curve of a thin film transistor based on a silicon gate electrode with a sputtered gate dielectric layer in an atmosphere with an argon-oxygen ratio of 30:(0-20)sccm is shown. Figure 2-Figure 4 It can be seen that, compared with the thin film transistor based on silicon gate electrode with argon: nitrogen = 30:0 when sputtering the gate dielectric layer (Comparative Example 1), the mobility of the thin film transistor based on silicon gate electrode with argon: nitrogen = 30:20 when preparing the gate dielectric layer (Example 1) is increased by 303.4%, the threshold voltage is reduced by 38.5%, the switching ratio is increased by 4040.9%, and the subthreshold swing is reduced by 30.0%. Compared with the thin film transistor based on silicon gate electrode with argon: nitrogen = 30:10 when sputtering the gate dielectric layer (Comparative Example 2), the mobility of the thin film transistor based on silicon gate electrode with argon: nitrogen = 30:20 when preparing the gate dielectric layer (Example 1) is increased by 118.1%, the threshold voltage is reduced by 35.1%, the switching ratio is increased by 202.635.%, and the subthreshold swing is reduced by 11.5%. It can be seen that the nitrogen content that can be introduced into the gate dielectric layer is limited. Compared with the sputtering atmosphere ratio of argon:nitrogen = 30:0 and 30:10, when the sputtering atmosphere ratio is argon:nitrogen = 30:20, the mobility, switching ratio, threshold voltage and subthreshold swing of the thin film transistor based on the silicon gate electrode are optimized and reach saturation.

[0055] The electrical performance parameters of the thin film transistors based on silicon gate electrodes of Example 1 and Comparative Examples 1-2 were tested, and the test results are shown in Table 1 below:

[0056] Table 1 Test results of electrical performance parameters of thin film transistors based on silicon gate electrodes in Example 1 and Comparative Examples 1-2

[0057]

[0058] It can be seen from the test results in Table 1 that in the method for preparing a thin film transistor based on a silicon gate electrode of Example 1 of the present invention, by introducing nitrogen during the preparation of the gate dielectric layer, not only can a nitrogen-silicon bond be formed at the contact interface of the gate dielectric layer / the bottom silicon-based gate electrode (bottom gate electrode) to optimize the interface quality, but also nitrogen atoms can fill the oxygen vacancies in the gate dielectric layer and replace the adjacent oxygen atoms, thereby reducing the body defects of the gate dielectric layer, thereby reducing the capture of carriers and improving the electrical performance of the thin film transistor based on the silicon gate electrode.

[0059] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the present invention, and these modifications or replacements should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A method for preparing a thin film transistor based on a silicon gate electrode, characterized in that: The following steps are involved: S1. Select heavily doped N-type silicon or heavily doped P-type silicon as the bottom gate electrode and pretreat the bottom gate electrode; S2. sputtering a metal oxide film on the pretreated bottom gate electrode, the sputtering atmosphere is composed of argon and nitrogen, and annealing in a nitrogen environment after sputtering to obtain a gate dielectric layer; the metal oxide film material of the gate dielectric layer is aluminum oxide or hafnium oxide; S3. Preparing an active layer on the gate dielectric layer; S4. Prepare a source electrode and a drain electrode on the active layer. The source electrode and the drain electrode are arranged on the surface of the active layer with an interval, so as to obtain a thin film transistor based on a silicon gate electrode.

2. The method for preparing a thin film transistor based on a silicon gate electrode according to claim 1, characterized in that: In step S3, the thin film material of the active layer is one or more of indium gallium zinc oxide and indium tin zinc oxide.

3. The method for preparing a thin film transistor based on a silicon gate electrode according to claim 2, characterized in that: In step S3, the thickness of the active layer is 15-100 nanometers.

4. The method for preparing a thin film transistor based on a silicon gate electrode according to claim 1, characterized in that: In step S4, the source electrode and the drain electrode are made of one or more materials selected from the group consisting of aluminum, silver, copper and gold.

5. The method for preparing a thin film transistor based on a silicon gate electrode according to claim 4, characterized in that: In step S4, the thickness of the source electrode and the drain electrode are both 40-100 nanometers.

6. The method for preparing a thin film transistor based on a silicon gate electrode according to claim 1, characterized in that: In step S1, the thickness of the bottom gate electrode is greater than 100 nanometers.

7. The method for preparing a thin film transistor based on a silicon gate electrode according to claim 1, characterized in that: In step S2, the thickness of the gate dielectric layer is 20-100 nanometers.

8. The method for preparing a thin film transistor based on a silicon gate electrode according to claim 1, characterized in that: In step S2, the atmosphere ratio of the sputtering atmosphere is argon:nitrogen=30:(20-50) standard ml / min.

9. The method for preparing a thin film transistor based on a silicon gate electrode according to claim 8, characterized in that: In step S2, the sputtering power is 100-120 watts, and the sputtering time is 10-15 minutes.

10. The method for preparing a thin film transistor based on a silicon gate electrode according to claim 9, characterized in that: In step S2, the annealing temperature is 340-360 degrees Celsius, and the annealing time is 15-20 minutes.

Images