A GaN HEMT with a gate-under ScAlN cap layer and a preparation method thereof

Abstract

The application relates to a GaN HEMT with an under-gate ScAlN cap layer and a preparation method thereof, which comprises a nucleation layer, an AlGaN buffer layer, a GaN channel layer, a gradient AlGaN barrier layer with an Al component of 40% to 10% on a substrate; a first passivation layer on the gradient AlGaN barrier layer, a groove is arranged in the first passivation layer, a gradient component ScAlN cap layer with a Sc component of 10% to 30% is arranged in the groove, and a p-type GaN cap layer is arranged on the gradient component ScAlN cap layer; a gate electrode is arranged on the p-type GaN cap layer; a source electrode and a drain electrode are respectively arranged on the two sides of the gate electrode; the double-cap layer structure has a significant influence on the threshold voltage of the device, optimizes the sensitivity and response speed of the device, and is particularly suitable for the device with the gradient AlGaN barrier layer structure.

Description

Technical Field

[0001] This invention relates to the field of microelectronic device technology, and in particular to a GaN HEMT employing a gate-under ScAlN cap layer and its fabrication method. Background Technology

[0002] With the rapid development of wireless communication technology, the performance requirements for radio frequency (RF) devices are increasing. GaN HEMTs, due to their superior characteristics such as high electron mobility, high breakdown voltage, and high power density, have become core devices in fields such as RF power amplifiers, radar, and satellite communications. However, GaN HEMTs still face some challenges in practical applications, especially in the control of the threshold voltage. Precise control of the threshold voltage is crucial for the device's power consumption, sensitivity, and response speed.

[0003] Traditional GaN HEMT devices typically control the threshold voltage by adjusting the thickness or Al composition of the AlGaN barrier layer. However, this method has limitations, especially in devices with a graded AlGaN barrier layer structure. Since the Al composition of the barrier layer gradually changes from bottom to top, the threshold voltage is primarily determined by the Al concentration at the top. Therefore, traditional control methods struggle to achieve precise control of the threshold voltage, particularly in applications requiring a large adjustment range.

[0004] ScAlN, as a highly polarizable material, exhibits strong spontaneous polarization and piezoelectric polarization, significantly influencing the concentration of two-dimensional electron gas (2DEG) and thus effectively controlling the threshold voltage. The wide bandgap of ScAlN helps improve the breakdown voltage and thermal stability of devices, enhancing overall performance. The high lattice matching between ScAlN and GaN reduces interface defects and improves device reliability. By adjusting the composition and thickness of ScAlN, the 2DEG concentration can be precisely controlled, enabling flexible adjustment of the threshold voltage.

[0005] Therefore, this invention proposes a GaN HEMT device with a gate-under ScAlN cap layer and its fabrication method. By introducing a gate-under gradient ScAlN cap layer, the threshold voltage of the device can be precisely controlled, thereby improving the device's performance and application flexibility. Summary of the Invention

[0006] This invention provides a GaN HEMT device with a gate-under ScAlN cap layer and its fabrication method. The aim is to precisely control the threshold voltage of the device and improve its performance and application flexibility by introducing a gradient-component ScAlN cap layer. This invention involves setting a gradient-component ScAlN cap layer with an Sc composition of 10%–30% under a p-type GaN cap layer. This gradient-component ScAlN cap layer is placed on an AlGaN barrier layer with a gradually increasing Al composition, forming a double-cap layer structure. The Sc composition increases sequentially at equal intervals along the direction from the substrate to the buffer layer, significantly affecting the threshold voltage of the device. This setup is particularly suitable for devices with a gradually increasing AlGaN barrier layer structure.

[0007] This invention provides a GaN HEMT employing a ScAlN cap layer under the gate, comprising:

[0008] A nucleation layer on a substrate, an AlGaN buffer layer on the nucleation layer, a GaN channel layer on the AlGaN buffer layer, and a gradient AlGaN barrier layer on the GaN channel layer with an Al composition of 40% to 10%, wherein the Al composition gradually increases along the direction from the substrate to the buffer layer.

[0009] A first passivation layer is located on a gradient AlGaN barrier layer. A groove is provided in the first passivation layer, and the groove exposes part of the surface of the gradient AlGaN barrier layer. A gradient component ScAlN cap layer with Sc composition of 10% to 30% is disposed in the groove, and a p-type GaN cap layer is disposed on the gradient component ScAlN cap layer.

[0010] The gate is disposed on the p-type GaN cap layer;

[0011] The source trench and drain trench are respectively disposed on both sides of the gate, extending along the surface of the first passivation layer to the surface of the GaN channel layer, with the source disposed in the source trench and the drain disposed in the drain trench.

[0012] The second passivation layer covers the source, drain, gate, and the first passivation layer;

[0013] The Sc component increases sequentially at equal intervals along the direction from the substrate to the buffer layer.

[0014] Furthermore, the thickness of the gradient component ScAlN cap layer is 2–6 nm.

[0015] Furthermore, the Sc components are 16%, 18%, 20%, and 22% respectively along the direction from the substrate to the buffer layer, and the thickness of a single Sc component is 1 nm.

[0016] Furthermore, the Al composition of the gradient AlGaN barrier layer is 30% to 20%, and the thickness of the gradient AlGaN barrier layer is 15 nm.

[0017] Furthermore, the thickness of the p-type GaN cap layer is 20–100 nm, and the doping concentration is 1e17–1e18.

[0018] Furthermore, the AlGaN buffer layer has a thickness of 1–2 μm and an Al molar ratio of 3%–7%.

[0019] Furthermore, the thickness of the GaN channel layer is 10–30 nm, and the thickness of the gradient AlGaN barrier layer is 10–20 nm.

[0020] Furthermore, the first passivation layer is silicon oxide, and the second passivation layer is silicon nitride;

[0021] The nucleation layer is an AlN nucleation layer.

[0022] Furthermore, the AlGaN buffer layer has a thickness of 1.6 μm and an Al molar ratio of 5%; the GaN channel layer has a thickness of 20 nm; and the P-type GaN cap layer has a thickness of 60 nm and a doping concentration of 3e17.

[0023] Furthermore, the distance L between the source and drain SD The gate length is 2–10 μm; G The gate-to-source spacing L is 0.2–1 μm. GS The gate-drain spacing L is 0.9–2 μm. GD The range is 0.9–7 μm.

[0024] Furthermore, the distance L between the source and drain is... SD It is 2.25μm; gate length L G The gate-to-source spacing L is 0.25 μm. GS The gate-drain spacing L is 0.9 μm. GD It is 1.5μm.

[0025] This invention provides a method for fabricating a GaN HEMT employing a ScAlN cap layer under the gate, comprising the following steps:

[0026] A nucleation layer, an AlGaN buffer layer, a GaN channel layer, a gradient AlGaN barrier layer with an Al composition of 40% to 10%, a gradient ScAlN cap layer with an Sc composition of 10% to 30%, and a p-type GaN cap layer are epitaxially grown sequentially on the substrate. The Sc composition increases at equal intervals along the direction from the substrate to the buffer layer, and the Al composition gradually increases along the direction from the substrate to the buffer layer.

[0027] The p-type GaN cap layer and the gradient-component ScAlN cap layer are etched to form the under-gate cap layer region;

[0028] The first passivation layer is deposited and covers the surface of the gradient AlGaN barrier layer on both sides of the gate cap region;

[0029] The first passivation layer on both sides of the gate cap region is etched to the surface of the GaN channel layer to form source grooves and drain grooves;

[0030] Metal is deposited in the source and drain grooves to form the source and drain electrodes;

[0031] A metal is deposited on the p-type GaN cap layer to form the gate;

[0032] A second passivation layer is deposited over the source, drain, gate, and first passivation layer.

[0033] This invention introduces a gradient-component ScAlN cap layer with an Sc composition of 10%–30% under a p-type GaN cap layer. The Sc composition increases sequentially at equal intervals along the direction from the substrate to the buffer layer, precisely controlling the threshold voltage of the device and uniformly distributing the electric field near the gate. This is particularly suitable for devices with a gradient AlGaN barrier layer structure, significantly improving the threshold voltage compared to devices with a fixed Al composition. Furthermore, the introduction of the gradient-component ScAlN cap layer under the gate optimizes the device's sensitivity and response speed, and flattens the electric field near the channel below the gate foot, reducing gate leakage current and enhancing its reliability and lifetime.

[0034] In terms of process preparation, the preparation method of the present invention is relatively simple and easy to industrialize, which can effectively reduce production costs and enhance the market competitiveness of the device. Attached Figure Description

[0035] Figure 1 This is a cross-sectional structural diagram of a GaN HEMT device according to an embodiment of the present invention. Detailed Implementation

[0036] The technical solutions in the embodiments of the present invention will now be clearly and completely described with reference to the accompanying drawings. The described embodiments are merely some, not all, of the embodiments of the present invention. Other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are all within the scope of protection of the present invention. Unless otherwise specified, the experimental methods described in the following embodiments are conventional methods; the reagents and materials, unless otherwise specified, can be obtained from publicly available commercial channels.

[0037] This specification uses spatially relative terms such as “below,” “under,” “down,” “above,” “above,” and “upper” to explain the positioning of one element relative to a second element. These terms are intended to cover different orientations of the device, except for those different from those shown in the figures.

[0038] Furthermore, the use of terms such as "first" and "second" to describe various elements, layers, regions, and sections is not intended to be restrictive. The use of terms such as "having," "containing," "including," and "comprises" are open-ended terms, indicating the presence of the stated elements or features, but not excluding additional elements or features, unless the context clearly indicates otherwise.

[0039] One embodiment of the present invention provides a GaN HEMT employing a ScAlN cap layer under the gate, such as... Figure 1 The device includes a substrate 1 serving as a support layer, which may be a silicon substrate, sapphire substrate, or gallium nitride substrate; in a preferred embodiment, a silicon substrate is used. A nucleation layer 2, an AlGaN buffer layer 3, a GaN channel layer 4, and a graded AlGaN barrier layer 5 are disposed on the substrate 1; in a preferred embodiment, the nucleation layer is an AlN nucleation layer. The AlGaN buffer layer 3 has a thickness of 1–2 μm, an Al molar ratio of 3%–7%, and is undoped; in a preferred embodiment, the AlGaN buffer layer has a thickness of 1.6 μm and an Al molar ratio of 5%. The GaN channel layer 4 is disposed on the AlGaN buffer layer 3 and has a thickness of 10–30 nm.

[0040] A gradient AlGaN barrier layer 5 is disposed on the GaN channel layer 4, with a thickness of 10-20 nm and an Al molar ratio of 40%-10%. The Al composition gradually increases along the direction from the substrate to the buffer layer; in a preferred embodiment, the Al composition is 30%-20%.

[0041] A first passivation layer 11 is disposed on a graded AlGaN barrier layer 5, preferably silicon dioxide. A groove is formed in the first passivation layer 11, exposing a portion of the surface of the graded AlGaN barrier layer 5. A gradient component ScAlN cap layer 6 is disposed in the groove and contacts the barrier layer 5, with a thickness of 2–6 nm. The Sc component in the gradient component ScAlN cap layer 6 is 10%–30%, and the Sc component increases at equal intervals along the direction from the substrate to the buffer layer. In a preferred embodiment, the Sc components along the direction from the substrate to the buffer layer are 16%, 18%, 20%, and 22%, respectively, and the thickness of a single Sc component is 1 nm.

[0042] A p-type GaN cap layer 7 is also disposed in the groove. The p-type GaN cap layer 7 is disposed on the gradient component ScAlN cap layer 6 in the groove, with a thickness of 20-100 nm and a doping concentration of 1e17-1e18. The gradient component ScAlN cap layer 6 and the p-type GaN cap layer 7 stacked thereon constitute the gate under-cap region. In a preferred embodiment, the thickness of the p-type GaN cap layer is 60 nm and the doping concentration is 3e17. The gate 9 is disposed on the p-type GaN cap layer 7, and the gate length is L. G The size ranges from 0.2 to 1 μm.

[0043] It also includes a source trench and a gate trench, located on opposite sides of the gate cap region, with the source 8 disposed in the source trench and the drain 10 disposed in the drain trench. The source and drain trenches extend along the surface of the first passivation layer to the surface of the GaN channel layer 4, exposing a portion of the GaN channel layer surface. The source and drain are respectively connected to the channel layer. The distance L between the source and drain is... SD The spacing between the gate and source is 2–10 μm; GS The distance between the gate and drain is 0.9–2 μm. GD The range is 0.9–7 μm.

[0044] In a preferred embodiment, the distance L between the source and the drain is... SD It is 2.25μm; gate length L G The gate-to-source spacing L is 0.25 μm. GS The gate-drain spacing L is 0.9 μm. GD It is 1.5μm.

[0045] The second passivation layer 12 covers the surfaces of the first passivation layer 11, the source 8, the drain 10, and the gate 9. The second passivation layer is preferably silicon nitride.

[0046] An embodiment of the present invention also provides a method for fabricating the above-mentioned GaN HEMT using a gate-below ScAlN cap layer, comprising the following steps:

[0047] First, a Si substrate was selected and cleaned to remove organic impurities and oxides from its surface. The substrate was cleaned sequentially with acetone and isopropanol, followed by high-temperature annealing at 1000°C for 1 hour to remove oxides from the Si substrate surface.

[0048] Next, epitaxial layers were grown sequentially on the cleaned silicon substrate using MOCVD. First, an AlN nucleation layer was grown at a growth temperature of 860℃ with a thickness of 150–200 nm. During the growth process, TMA was continuously introduced, while NH3 was introduced in a pulsed manner, i.e., NH3 was introduced during time T1 and not during time T2.

[0049] The MOCVD process was continued to grow an AlGaN buffer layer on the AlN nucleation layer. The growth temperature was set at 900℃, and N2, NH3, TMA and TMGa were introduced. The growth thickness was 1μm to 2μm.

[0050] Next, a GaN channel layer was grown on the AlGaN buffer layer. The growth temperature was set to 920℃, and N2, NH3 and TMGa were introduced. The growth thickness was 10nm to 30nm.

[0051] Next, a gradient AlGaN barrier layer is grown on the GaN channel layer using MOCVD process, and N2, NH3, TMGa and TMA are introduced. The growth thickness of the gradient AlGaN layer is 10nm to 20nm, and the flow rate of TMA gradually decreases, thus obtaining an AlGaN layer with a gradient Al element molar content from 40% to 10% from bottom to top.

[0052] A gradient composition ScAlN cap layer was grown on a graded AlGaN barrier layer using MOCVD. The growth temperature was set at 1100℃, and the growth thickness was 2–6 nm; in this preferred embodiment, the growth thickness was 4 nm. N2 was used as the carrier gas, and ScAlN was deposited using a continuously supplied Cp3Sc. The gradient composition ScAlN insertion layer was obtained by changing the Cp3Sc flow rate. The molar ratio of Sc along the substrate upwards was 16%, 18%, 20%, and 22%, respectively, and the thickness of each layer was 1 nm.

[0053] P-type GaN cap layers were continued to be grown on the gradient composition ScAlN cap layer using MOCVD process, with the growth temperature set at 1050℃. N2, NH3, and TMGa and TMg were introduced, with the gas flow rates adjusted appropriately to control the doping concentration. The growth thickness ranged from 20 nm to 100 nm. After growth, an annealing process was used to activate magnesium doping and eliminate defects introduced during the doping process. Annealing was performed at 850℃ in an N2 atmosphere for 40 minutes.

[0054] Next, etching is performed along the surface of the P-type GaN cap layer to the surface of the gradient AlGaN barrier layer, forming the gate under cap layer region, located between the source and drain regions. In this step, the gradient component ScAlN cap layer outside the gate region is completely etched away to form the gate under gradient component ScAlN cap layer structure.

[0055] A first passivation layer is deposited, and then the two sides of the gate cap region are etched along the surface of the first passivation layer to the surface of the GaN channel layer to form source grooves and drain grooves, exposing part of the surface of the GaN channel layer.

[0056] Metal is deposited in the source and drain trenches to form the source and drain that are connected to the GaN channel.

[0057] The first passivation layer on the gate cap region is etched to form a gate trench. The surface of the gate trench exposes the surface of the p-type GaN layer. Metal is deposited in the gate trench to form a gate, which is connected to the p-type GaN cap layer.

[0058] Specifically, the source, drain, and gate are fabricated by depositing a Ti / Al / Ni / Au composite metal layer using electron beam evaporation.

[0059] Finally, a second passivation layer, SiN, is deposited. x It covers the source, drain, and gate.

[0060] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of the present invention shall be considered equivalent substitutions and shall be included within the protection scope of the present invention.

Claims

1. A GaN HEMT employing a gate-under ScAlN cap layer, characterized in that, include: A nucleation layer on a substrate, an AlGaN buffer layer on the nucleation layer, a GaN channel layer on the AlGaN buffer layer, and a gradient AlGaN barrier layer with an Al composition of 40% to 10% on the GaN channel layer, wherein the Al composition gradually increases along the direction from the substrate to the buffer layer. A first passivation layer is located on a gradient AlGaN barrier layer. A groove is provided in the first passivation layer, and the groove exposes part of the surface of the gradient AlGaN barrier layer. A gradient component ScAlN cap layer with Sc composition of 10%~30% is disposed in the groove, and a p-type GaN cap layer is disposed on the gradient component ScAlN cap layer. The gate is disposed on the p-type GaN cap layer; The source trench and drain trench are respectively disposed on both sides of the gate, extending along the surface of the first passivation layer to the surface of the GaN channel layer, with the source disposed in the source trench and the drain disposed in the drain trench. The second passivation layer covers the source, drain, gate, and the first passivation layer; The Sc component increases sequentially at equal intervals along the direction from the substrate to the buffer layer.

2. The GaN HEMT of claim 1, wherein, The thickness of the gradient component ScAlN cap layer is 2~6 nm.

3. The GaN HEMT according to claim 1, characterized in that, The Sc components are 16%, 18%, 20%, and 22% respectively along the direction from the substrate to the buffer layer, and the thickness of a single Sc component is 1 nm.

4. The GaN HEMT according to any one of claims 1 to 3, characterized in that, The Al composition of the gradient AlGaN barrier layer is 30%~20%.

5. The GaN HEMT according to claim 4, characterized in that, The thickness of the p-type GaN cap layer is 20~100nm.

6. The GaN HEMT according to claim 5, characterized in that, The AlGaN buffer layer has a thickness of 1~2μm and an Al molar ratio of 3%~7%.

7. The GaN HEMT according to any one of claims 1 to 3, characterized in that, The thickness of the GaN channel layer is 10~30nm, and the thickness of the gradient AlGaN barrier layer is 10~20nm.

8. The GaN HEMT according to claim 7, characterized in that, The first passivation layer is silicon oxide, and the second passivation layer is silicon nitride; The nucleation layer is an AlN nucleation layer.

9. A method for fabricating a GaN HEMT employing a ScAlN cap layer under the gate, characterized in that, Includes the following steps: A nucleation layer, an AlGaN buffer layer, a GaN channel layer, a gradient AlGaN barrier layer with an Al composition of 40% to 10%, a gradient ScAlN cap layer with an Sc composition of 10% to 30%, and a p-type GaN cap layer are epitaxially grown sequentially on the substrate. The Sc composition increases at equal intervals along the direction from the substrate to the buffer layer, and the Al composition gradually increases along the direction from the substrate to the buffer layer. The p-type GaN cap layer and the gradient-component ScAlN cap layer are etched to form the under-gate cap layer region; The first passivation layer is deposited and covers the surface of the gradient AlGaN barrier layer on both sides of the gate cap region; The first passivation layer on both sides of the gate cap region is etched to the surface of the GaN channel layer to form source grooves and drain grooves; Metal is deposited in the source and drain grooves to form the source and drain electrodes; A metal is deposited on the p-type GaN cap layer to form the gate; A second passivation layer is deposited over the source, drain, gate, and first passivation layer.

10. The preparation method according to claim 9, characterized in that, The Sc components are 16%, 18%, 20%, and 22% respectively along the direction from the substrate to the buffer layer, and the thickness of a single Sc component is 1 nm.

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