Back-contact photovoltaic cell, back-contact photovoltaic cell module and preparation method

Abstract

This application relates to a back-contact photovoltaic cell, a back-contact photovoltaic cell module and a preparation method, and belongs to the technical field of photovoltaic cells. The preparation method of this application includes: providing a substrate, the substrate includes a silicon substrate, and a tunneling oxidation passivation contact structure is arranged on the backlight surface of the silicon substrate, wherein the tunneling oxidation passivation contact structure includes a doped dielectric layer. The local part of the doped dielectric layer can be catalytically doped, and / or the light-receiving surface of the silicon substrate can also be catalytically doped. After the catalytic doping, a metal electrode is formed in ohmic contact with the doped dielectric layer. The back-contact photovoltaic cell prepared according to the preparation method of this application can have the following advantages: the number of photogenerated electrons and photogenerated holes that the back-contact photovoltaic cell can generate is relatively large, and the lifetime of the minority carriers (photogenerated electrons or photogenerated holes) that the back-contact photovoltaic cell can generate is relatively high. Therefore, the photoelectric conversion efficiency of the prepared back-contact photovoltaic cell is relatively large.

Description

Technical Field

[0001] The present application relates to the technical field of photovoltaic cells, and in particular to a back-contact photovoltaic cell, a back-contact photovoltaic cell module, and a preparation method thereof. Background Art

[0002] A back-contact photovoltaic cell is a cell in which both the positive metal electrode and the negative metal electrode are disposed on the light-back side of the cell. The light-receiving surface (also known as the front surface or the front side) of the back-contact photovoltaic cell has a relatively large area, so the photoelectric conversion efficiency of the back-contact photovoltaic cell is relatively large. Since the photoelectric conversion efficiency of the back-contact photovoltaic cell is also positively correlated with the lifetime of minority carriers (electrons or holes), and in the related art, the lifetime of minority carriers in the back-contact photovoltaic cell remains to be improved. Summary of the Invention

[0003] In view of this, the present application provides a back-contact photovoltaic cell, a back-contact photovoltaic cell module, and a preparation method thereof, which can improve the lifetime of minority carriers in the back-contact photovoltaic cell, thereby improving the photoelectric conversion efficiency of the back-contact photovoltaic cell.

[0004] In a first aspect, the present application provides a preparation method of a back-contact photovoltaic cell, the preparation method comprising: providing a substrate, the substrate comprising a silicon substrate, a tunneling oxidation passivation contact structure being disposed on the light-back surface of the silicon substrate, wherein the tunneling oxidation passivation contact structure comprises a doped dielectric layer. The local part of the doped dielectric layer can be catalytically doped, and / or, the light-receiving surface of the silicon substrate can also be catalytically doped. After the catalytic doping, a metal electrode is formed in ohmic contact with the doped dielectric layer.

[0005] Optionally, the doped dielectric layer comprises an N-type doped dielectric layer, and a gas containing phosphine is used as a doping source during the process of catalytically doping the local part of the N-type doped dielectric layer.

[0006] Optionally, after the tunneling oxidation passivation contact structure is disposed and before the local part of the doped dielectric layer is catalytically doped, the preparation method of the present application further comprises removing the silicon glass layer of the doped dielectric layer.

[0007] Optionally, after the local part of the doped dielectric layer is catalytically doped, the preparation method of the present application further comprises forming a mask layer on the doped dielectric layer.

[0008] Optionally, before the light-receiving surface of the silicon substrate is catalytically doped, the preparation method of the present application further comprises texturing the light-receiving surface of the silicon substrate with an alkaline texturing solution.

[0009] Optionally, under the condition that the silicon substrate is an N-type silicon substrate, the method for catalytically doping the light-receiving surface of the silicon substrate comprises using a gas containing phosphine as a doping source.

[0010] Optionally, after locally catalyzing and doping the doped dielectric layer, the light-receiving surface of the silicon substrate is then catalyzed and doped, or, after catalyzing and doping the light-receiving surface of the silicon substrate, the local part of the doped dielectric layer is then catalyzed and doped, or, the local part of the doped dielectric layer and the light-receiving surface of the silicon substrate are simultaneously catalyzed and doped.

[0011] Optionally, the temperature of the catalytic doping is in the range of 350°C to 500°C.

[0012] Optionally, after the catalytic doping and before forming the metal electrode, the preparation method of the present application further includes depositing an aluminum oxide passivation layer on both sides by atomic layer deposition process, and further includes depositing a silicon nitride passivation layer on the aluminum oxide passivation layer by plasma-enhanced chemical vapor deposition.

[0013] According to the above content about the preparation method of the present application, the back-contact photovoltaic cell wafer prepared can have the following beneficial effects: the number of photo-generated electrons and photo-generated holes that the back-contact photovoltaic cell wafer can generate is relatively large, and the lifetime of the minority carriers (photo-generated minority carriers or photo-generated electrons) that the back-contact photovoltaic cell wafer can generate is relatively high. Therefore, the photoelectric conversion efficiency of the back-contact photovoltaic cell wafer prepared can be relatively large.

[0014] In a second aspect, the present application provides a back-contact photovoltaic cell wafer, which is prepared by the preparation method of the back-contact photovoltaic cell wafer described above. According to the above content, it can be known that the photoelectric conversion efficiency of the back-contact photovoltaic cell wafer of the present application is relatively large.

[0015] In a third aspect, the present application provides a back-contact photovoltaic cell module, which includes at least one battery string, and the battery string is formed by electrically connecting the back-contact photovoltaic cell wafers described above. Correspondingly, the back-contact photovoltaic cell module of the present application can have a relatively large photoelectric conversion efficiency.

[0016] It should be understood that the above general description and the following detailed description are only exemplary and do not limit the present application. Description of the Drawings

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0018] Figure 1 It is a partial structural schematic diagram of the substrate in one embodiment, where the substrate includes a silicon substrate and an N-type tunneling oxidation passivation contact structure;

[0019] Figure 2 Schematic diagram of the partial structure of a substrate in an embodiment, where the substrate includes a silicon substrate and an N-type tunneling oxidation passivation contact structure, and the N-type tunneling oxidation passivation contact structure includes an N-type catalytic doping part;

[0020] Figure 3 Schematic diagram of the partial structure of a substrate in an embodiment, where the substrate includes a silicon substrate;

[0021] Figure 4 Schematic diagram of the partial structure of a substrate in an embodiment, where the substrate includes a silicon substrate and a top catalytic doping part;

[0022] Figure 5 Schematic diagram of the structure of a silicon substrate in an embodiment;

[0023] Figure 6 Schematic diagram of the structure of a silicon substrate, a P-type tunneling oxidation passivation contact structure, a borosilicate glass layer, and a wrap plating layer in an embodiment;

[0024] Figure 7 Schematic diagram of the structure of a silicon substrate, a P-type tunneling oxidation passivation contact structure, a borosilicate glass layer, and a wrap plating layer in an embodiment, where a first window is further provided;

[0025] Figure 8 Schematic diagram of the structure of a silicon substrate, a P-type tunneling oxidation passivation contact structure, a borosilicate glass layer, a wrap plating layer, an N-type tunneling oxidation passivation contact structure, and a phosphosilicate glass layer in an embodiment;

[0026] Figure 9 Schematic diagram of the structure of a silicon substrate, a P-type tunneling oxidation passivation contact structure, a borosilicate glass layer, a wrap plating layer, and an N-type tunneling oxidation passivation contact structure in an embodiment;

[0027] Figure 10 Schematic diagram of the structure of a silicon substrate, a P-type tunneling oxidation passivation contact structure, a borosilicate glass layer, a wrap plating layer, and an N-type tunneling oxidation passivation contact structure in an embodiment, where the N-type tunneling oxidation passivation contact structure includes an N-type catalytic doping part;

[0028] Figure 11 Schematic diagram of the structure of a silicon substrate, a P-type tunneling oxidation passivation contact structure, a borosilicate glass layer, a wrap plating layer, an N-type tunneling oxidation passivation contact structure, and a mask layer in an embodiment;

[0029] Figure 12 Schematic diagram of the structure of a silicon substrate, a P-type tunneling oxidation passivation contact structure, a borosilicate glass layer, a wrap plating layer, an N-type tunneling oxidation passivation contact structure, and a mask layer in an embodiment, where a second window is further provided;

[0030] Figure 13 Figure 1 is a schematic structural diagram of a silicon substrate, a P-type tunneling oxidation passivation contact structure, a borosilicate glass layer, an N-type tunneling oxidation passivation contact structure, and a mask layer in an embodiment, wherein a second window is further provided;

[0031] Figure 14 Figure 2 is a schematic structural diagram of a textured silicon substrate, a P-type tunneling oxidation passivation contact structure, a borosilicate glass layer, an N-type tunneling oxidation passivation contact structure, and a mask layer in an embodiment, wherein a second window is further provided;

[0032] Figure 15 Figure 3 is a schematic structural diagram of a textured silicon substrate, a P-type tunneling oxidation passivation contact structure, and an N-type tunneling oxidation passivation contact structure in an embodiment, wherein a second window is further provided;

[0033] Figure 16 Figure 4 is a schematic structural diagram of a top catalytic doping part, a textured silicon substrate, a P-type tunneling oxidation passivation contact structure, and an N-type tunneling oxidation passivation contact structure in an embodiment, wherein a second window is further provided;

[0034] Figure 17 Figure 5 is a schematic structural diagram of a top catalytic doping part, a textured silicon substrate, a P-type tunneling oxidation passivation contact structure, an N-type tunneling oxidation passivation contact structure, and an alumina passivation layer in an embodiment;

[0035] Figure 18 Figure 6 is a schematic structural diagram of a top catalytic doping part, a textured silicon substrate, a P-type tunneling oxidation passivation contact structure, an N-type tunneling oxidation passivation contact structure, an alumina passivation layer, and a silicon nitride passivation layer in an embodiment;

[0036] Figure 19 Figure 7 is a schematic structural diagram of a back-contact photovoltaic cell provided by the present application in an embodiment;

[0037] Figure 20 Figure 8 is a schematic diagram of the minority carrier lifetime comparison between the back-contact photovoltaic cell of the embodiment of the present application and the back-contact photovoltaic cell in the related art;

[0038] Figure 21 Figure 9 is a schematic diagram of the comparison of doping concentration and doping depth between the back-contact photovoltaic cell of the embodiment of the present application and the back-contact photovoltaic cell in the related art.

[0039] Reference numerals:

[0040] 10 - Substrate, 1 - Silicon substrate, 1a - Light - receiving side, 1b - Back - light side, 11 - Light - receiving surface, 111 - Matt surface, 112 - Top catalytic doping part, 12 - Back - light surface, 2 - Tunneling oxidation passivation contact structure, 21 - N - type tunneling oxidation passivation contact structure, 211 - N - region tunneling oxide layer, 212 - N - type doped dielectric layer, 212a - N - type initial doping part, 212b - N - type catalytic doping part, 21a - Phosphosilicate glass layer, 22 - P - type tunneling oxidation passivation contact structure, 221 - P - region tunneling oxide layer, 222 - P - type doped dielectric layer, 22a - Borosilicate glass layer, 2a - First window, 2b - Second window, 2c - Wrap - plating layer, 3 - Mask layer, 4 - Alumina passivation layer, 5 - Silicon nitride passivation layer, 6 - Negative metal electrode, 7 - Positive metal electrode. Detailed implementation manners

[0041] For a better understanding of the technical solutions of the present application, the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0042] It should be clear that the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0043] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "the" and "said" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0044] In the accompanying drawings of this article, direction X and direction Y are perpendicular.

[0045] It should be understood that the term " / and" used herein is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A / and B may represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in this article generally represents an "or" relationship between the associated objects before and after.

[0046] In a first aspect, the present application provides some embodiments of a preparation method for a back - contact photovoltaic cell, wherein the preparation method may include the following content.

[0047] A substrate is provided. The substrate mainly refers to the structure before being fabricated into a back-contact photovoltaic cell that can be put into use. The substrate may include a silicon substrate (also known as a silicon wafer). The surface of the silicon substrate may include a light-receiving surface and a light-blocking surface that are arranged back-to-back in the thickness direction of the silicon substrate. The light-receiving surface is the surface that will be directly irradiated by sunlight in the subsequent back-contact photovoltaic cell to be formed, and the light-blocking surface is the surface that will not be directly irradiated by sunlight in the subsequent back-contact photovoltaic cell to be formed. The light-blocking surface may be irradiated by reflected light in the environment.

[0048] In some embodiments, as shown in Figure 1 the substrate may further include an N-type tunneling oxidation passivation contact structure 21. The N-type tunneling oxidation passivation contact structure 21 is disposed on the light-blocking surface 12 of the silicon substrate 1. Among them, the N-type tunneling oxidation passivation contact structure 21 may include an N-region tunneling oxide layer 211 and an N-type doped dielectric layer 212. The N-region tunneling oxide layer 211 is located between the silicon substrate 1 and the N-type doped dielectric layer 212.

[0049] Among them, the N-region tunneling oxide layer 211 may include at least one of silicon oxide (SiO X ), silicon nitride (SiN X ), and silicon oxynitride (SiON). The thickness dimension (dimension along the Y direction) of the N-region tunneling oxide layer 211 may be in the range of 0.5 nm to 3 nm, and the thickness dimension may specifically be 0.5 nm, 1 nm, 1.5 nm, 2 nm, 2.5 nm, or 3 nm. The N-region tunneling oxide layer 211 combines with the dangling bonds (unpaired electron states formed when the valence bond of an atom in the crystal is not fully combined with other atoms) on the surface of the silicon substrate 1. The N-region tunneling oxide layer 211 can play a good chemical passivation role, which is beneficial to reducing the recombination rate of photo-generated electrons and photovoltaic holes generated in the silicon substrate 1 at the interface between the silicon substrate 1 and the N-region tunneling oxide layer 211.

[0050] In addition, the N-type doped dielectric layer 212 may be doped with at least one N-type element (the elements in the fifth main group of the periodic table of chemical elements), such as N-type elements like phosphorus, arsenic, antimony, etc. The N-type doped dielectric layer 212 may include at least one of polycrystalline silicon, amorphous silicon, and microcrystalline silicon. The N-type doped dielectric layer 212 can have an ohmic contact with a negative metal electrode (not shown in the figure) during the subsequent metallization process.

[0051] The method for forming the N-type doped dielectric layer 212 may include: after forming the N-region tunneling oxide layer 211, an intrinsic dielectric layer (including at least one of polysilicon, amorphous silicon, and microcrystalline silicon) may be formed on the side of the N-region tunneling oxide layer 211 facing away from the silicon substrate 1 by low-pressure chemical vapor deposition (LPCVD). After forming the intrinsic dielectric layer, impurities containing N-type elements are diffused into the intrinsic dielectric layer by a thermal diffusion process to form the N-type doped dielectric layer 212.

[0052] In some embodiments, a substrate including a structure as shown in Figure 1 may be placed in a chemical vapor deposition chamber (not shown in the figure), and a gas containing phosphine is introduced into the chemical vapor deposition chamber. The gas containing phosphine is used as a doping source. A metal wire (not shown in the figure) is also provided in the chemical vapor deposition chamber. Under the condition of energizing the metal wire, the metal wire can generate heat, and the heat-generating metal wire can play a chemical catalytic role on phosphine. This chemical catalytic role can cause phosphine to be catalytically decomposed into some particles, which may include phosphorus atoms and hydrogen atoms. The phosphorus atoms and hydrogen atoms can be doped into or diffused into the N-type doped dielectric layer 212, so that the local part of the N-type doped dielectric layer 212 is catalytically doped.

[0053] Please refer to Figure 2 As shown, after the local part of the N-type doped dielectric layer 212 is catalytically doped, the N-type doped dielectric layer 212 may include an N-type initial doping part 212a and an N-type catalytic doping part 212b. The N-type initial doping part 212a is located between the N-region tunneling oxide layer 211 and the N-type catalytic doping part 212b. It can be understood that the N-type initial doping part 212a is the part of the N-type doped dielectric layer 212 that has not been catalytically doped, and the N-type catalytic doping part 212b is the part of the N-type doped dielectric layer 212 that has been catalytically doped. Therefore, the concentration of N-type elements included in the N-type initial doping part 212a is less than the concentration of N-type elements included in the N-type catalytic doping part 212b. The N-type initial doping part 212a is a lightly doped region relative to the N-type catalytic doping part 212b, and the N-type catalytic doping part 212b is a heavily doped region relative to the N-type initial doping part 212a. A high-low junction (N + / N) can be formed between the N-type catalytic doping part 212b and the N-type initial doping part 212a. This high-low junction (N + / N) can play a field passivation role in the back-contact photovoltaic cell to be prepared subsequently. This field passivation role can promote the migration of photo-generated electrons from the N-type initial doping part 212a to the N-type catalytic doping part 212b, thereby promoting the collection of photo-generated electrons by the negative metal electrode.

[0054] During the local catalytic doping process of the N-type doped dielectric layer 212, the temperature in the chemical vapor deposition chamber is relatively low. In other words, during the catalytic doping process, the temperature of the substrate is lower than that during the formation of the doped dielectric layer using the thermal diffusion process. Therefore, during the catalytic doping process, the N-type elements previously doped into the N-type doped dielectric layer 212 by the thermal diffusion process are not likely to continue to diffuse along the direction (such as direction Y) of the N-region tunneling oxide layer 211 pointing to the silicon substrate 1. That is to say, the N-type elements in the N-type initial doping portion 212a are not likely to diffuse to the interface between the N-region tunneling oxide layer 211 and the silicon substrate 1, and it is not easy to generate more new dangling bonds and new recombination centers (defects that promote the recombination of electrons and holes by providing intermediate energy levels or defect energy levels) at the interface between the N-region tunneling oxide layer 211 and the silicon substrate 1. Thus, the N-region tunneling oxide layer 211 can still well chemically passivate the surface of the silicon substrate 1.

[0055] In some embodiments, during the local catalytic doping process of the N-type doped dielectric layer 212, the temperature in the chemical vapor deposition chamber used can be in the range of 350°C to 500°C, specifically, it can be 350°C, 375°C, 380°C, 385°C, 390°C, 395°C, 400°C, 405°C, 410°C, 415°C, 420°C, 425°C, 450°C, 475°C or 500°C.

[0056] In the related art, after forming the N-type doped dielectric layer using the thermal diffusion process, in order to form a high-low junction (N + / N) in the N-type doped dielectric layer, it is also necessary to use the thermal diffusion process (also known as the post-diffusion process) or other processes that use high temperature (such as greater than 700°C) to promote diffusion, so that the N-type elements in the N-type doped dielectric layer are likely to diffuse to the interface between the N-region tunneling oxide layer and the silicon substrate, thereby making the N-region tunneling oxide layer unable to well chemically passivate the surface of the silicon substrate.

[0057] It can be seen that the embodiments of the preparation method provided in this application can have the following advantages. On the basis of ensuring that the N-region tunneling oxide layer 211 can still well chemically passivate the surface of the silicon substrate 1, a required high-low junction (N + / N) is formed in the N-type doped dielectric layer 212.

[0058] During the local catalytic doping process of the N-type doped dielectric layer 212, due to the relatively low temperature of the substrate environment (for example, in the range of 350 °C to 500 °C), the temperature inside the substrate is also relatively low, making it difficult for the N-type doped dielectric layer 212 to recrystallize and generate more lattice defects, that is, it is not easy to generate more new dangling bonds and new recombination centers in the N-type doped dielectric layer 212, so that the photo-generated electrons generated by the subsequent back-contact photovoltaic cell are not easily recombined in the N-type doped dielectric layer 212.

[0059] In the related art, after forming the N-type doped dielectric layer by using the thermal diffusion process, in order to form a high-low junction (N + / N) in the N-type doped dielectric layer, it is necessary to use the thermal diffusion process (also known as the post-diffusion process) or other processes that promote diffusion by using high temperature (for example, greater than 700 °C). It is easy for the N-type doped dielectric layer to recrystallize and generate more new lattice defects. Correspondingly, it is easy to generate more new dangling bonds and new recombination centers in the N-type doped dielectric layer, so that the photo-generated electrons generated by the back-contact photovoltaic cell that can be prepared are easily recombined in the N-type doped dielectric layer.

[0060] Therefore, the embodiments of the preparation method provided by the present application can have the following advantages, that is, on the basis of ensuring that no more new dangling bonds and recombination centers are generated in the N-type doped dielectric layer 212, a required high-low junction (N + / N) is formed in the N-type doped dielectric layer 212.

[0061] During the local catalytic doping process of the N-type doped dielectric layer 212, phosphorus atoms and hydrogen atoms diffuse synchronously within the N-type doped dielectric layer 212. However, hydrogen atoms preferentially occupy lattice vacancies to reduce the migration barrier of phosphorus atoms, promoting the deeper diffusion of phosphorus atoms into the N-type doped dielectric layer 212. This enables the thickness dimension (dimension along the Y direction) of the N-type catalytic doped portion 212b formed to be relatively large, that is, it is not easy for excessive phosphorus atoms to accumulate on and near the surface of the N-type doped dielectric layer 212, and it is not easy to generate many new lattice defects on and near the surface of the N-type doped dielectric layer 212. The number of new dangling bonds generated is small, which can weaken the adverse effect of Auger recombination. Auger recombination refers to the recombination process in which when an electron and a hole recombine, energy or momentum is transferred through collision to another electron or another hole, causing the transition of that electron or hole. Although some new lattice defects will inevitably be generated within the N-type catalytic doped portion 212b when phosphorus atoms diffuse in the N-type doped dielectric layer 212 to form the N-type catalytic doped portion 212b, thus generating some new dangling bonds. However, phosphorus atoms and hydrogen atoms can diffuse synchronously into the N-type doped dielectric layer 212, enabling hydrogen atoms to migrate synchronously to the newly generated lattice defects and combine with the new dangling bonds, that is, it can further weaken the adverse effect of Auger recombination.

[0062] In the related art, after forming the N-type doped dielectric layer using a thermal diffusion process, in order to form a high-low junction (N + / N) within the N-type doped dielectric layer, it is necessary to use a thermal diffusion process (also known as a post-diffusion process) or other processes that utilize high temperatures to promote diffusion. The thickness of the heavily doped region that can be formed within the N-type doped dielectric layer is relatively small, that is, the heavily doped region is mainly on the surface of the N-type doped dielectric layer, resulting in a relatively large number of lattice defects on the surface of the N-type doped dielectric layer. Correspondingly, the adverse effect of Auger recombination is more obvious, and the field passivation effect that the formed high-low junction (N + / N) can achieve is relatively weak.

[0063] It can be seen that the embodiments of the preparation method provided in this application can have the following advantages. During the process of forming a high-low junction (N + / N) within the N-type doped dielectric layer 212, it can promote the deeper migration of phosphorus atoms into the N-type doped dielectric layer 212 to weaken the adverse effect of Auger recombination. Even if new lattice defects are inevitably generated, the hydrogen atoms doped synchronously with phosphorus atoms into the N-type doped dielectric layer 212 will promptly combine with the new dangling bonds to further weaken the adverse effect of Auger recombination.

[0064] In some embodiments, both the N-type initial doping portion 212a and the N-type catalytic doping portion 212b in the N-type doped dielectric layer 212 will have ohmic contact with the negative metal electrode during subsequent metallization. There is a negative correlation between the magnitude of the contact resistance between the N-type doped dielectric layer 212 and the negative metal electrode and the doping concentration of the N-type doped dielectric layer 212. Since the doping concentration of the N-type catalytic doping portion 212b is greater than that of the N-type initial doping portion 212a, the contact resistance between the N-type catalytic doping portion 212b and the negative metal electrode will be relatively small. As can be seen from the above, the co-diffusion mechanism of phosphorus atoms and hydrogen atoms in the N-type doped dielectric layer 212 can promote the diffusion of phosphorus atoms deeper into the N-type doped dielectric layer 212, so that the thickness dimension of the N-type catalytic doping portion 212b that can be formed is relatively large. After the subsequent metallization process is implemented, the contact area between the N-type catalytic doping portion 212b with a relatively large thickness dimension and the negative metal electrode is relatively large. It can be seen that the contact resistance between the N-type catalytic doping portion 212b with a relatively large thickness dimension and the negative metal electrode is relatively lower, making the photo-generated electrons that can be collected in the N-type catalytic doping portion 212b easier to migrate to the negative metal electrode.

[0065] In the related art, in order to form a heavily doped region with a relatively large thickness dimension in the N-type doped dielectric layer to reduce the contact resistance, it is necessary to increase the doping source concentration or the diffusion source concentration, which will not only further exacerbate the adverse effect of Auger recombination, but also the amplitude of the thickness dimension of the heavily doped region that can be increased is relatively small, that is, the amplitude of the contact resistance that can be reduced is relatively small.

[0066] It can be seen that the embodiments of the preparation method provided in the present application can have the following advantages. On the basis of not further exacerbating the adverse effect of Auger recombination, the contact resistance between the N-type catalytic doping portion 212b and the negative metal electrode can be significantly reduced.

[0067] As can be seen from the above, according to some embodiments of the preparation method provided in the present application, the back-contact photovoltaic cell can take into account the following advantages: the field passivation effect of the high-low junction (N + / N) in the N-type doped dielectric layer 212 is relatively strong, the N-region tunneling oxide layer 211 can still play a good chemical passivation role, the adverse effect of Auger recombination in the N-type doped dielectric layer 212 is relatively weak, and the contact resistance between the N-type doped dielectric layer 212 and the negative metal electrode is relatively small. These advantages together make the photoelectric conversion efficiency of the back-contact photovoltaic cell relatively large.

[0068] In some other embodiments, during the local catalytic doping of the N-type doped dielectric layer 212, not limited to using a gas containing phosphine (PH3) as the doping source, a gas containing arsine (AsH3) and / or stibine (SbH3) can also be used as the doping source.

[0069] In some embodiments, after forming the N-type tunneling oxidation passivation contact structure 21 including the N-region tunneling oxide layer 211 and the N-type doped dielectric layer 212 as shown in Figure 1 Figure, and before locally catalytically doping the N-type doped dielectric layer 212, the silicon glass layer (not shown in the figure) of the N-type doped dielectric layer 212 is removed. The silicon glass layer is located on the side of the N-type doped dielectric layer 212 facing away from the N-region tunneling oxide layer 211, so as to facilitate the diffusion of phosphorus atoms and hydrogen atoms into the N-type doped dielectric layer 212 more easily during the subsequent process of locally catalytically doping the N-type doped dielectric layer 212.

[0070] Among them, the silicon glass layer can mainly be phosphorosilicate glass (PSG).

[0071] In addition, the method for removing the silicon glass layer can include removing it by laser, or the method for removing the silicon glass layer can include removing it by using an acid solution (including hydrofluoric acid and / or hydrochloric acid), or the method for removing the silicon glass layer can include first modifying the silicon glass layer by laser and then removing the silicon glass layer by using an acid solution.

[0072] In some embodiments, after locally catalytically doping the N-type doped dielectric layer 212, a mask layer can be formed on the N-type doped dielectric layer 212, that is to say, a mask layer can be formed on the N-type catalytic doping portion 212b. During the subsequent wet processing of the substrate, the mask layer can be used to protect the locally catalytically doped N-type doped dielectric layer 212 and reduce the possibility of the locally catalytically doped N-type doped dielectric layer 212 being corroded and damaged.

[0073] Among them, the method for forming the mask layer can include: forming a mask layer on the side of the N-type catalytic doping portion 212b facing away from the N-type initial doping portion 212a by using plasma-enhanced chemical vapor deposition (PECVD). The mask layer can include at least one of silicon oxide (SiO X ), silicon nitride (SiN X ), and silicon oxynitride (SiON). The method for forming the mask layer can also include: oxidizing the N-type catalytic doping portion 212b with oxygen or ozone to locally form silicon oxide (SiO X ) inwardly on the surface of the N-type catalytic doping portion 212b. The silicon oxide (SiO X) can be used as a mask layer. The method for forming the mask layer may also include: coating a photoresist on the surface of the N-type catalytic doping portion 212b, and forming the mask layer after the photoresist is exposed.

[0074] In some other embodiments (not shown in the figure), the substrate may also include a P-type tunneling oxide passivation contact structure, and the P-type tunneling oxide passivation contact structure is arranged on the backlight surface of the silicon substrate. Among them, the P-type tunneling oxide passivation contact structure may include a P-region tunneling oxide layer and a P-type doped dielectric layer, and the P-region tunneling oxide layer is located between the silicon substrate and the P-type doped dielectric layer. The doped dielectric layer may be doped with at least one P-type element (a third main group element in the periodic table of chemical elements), such as boron, aluminum, gallium and other P-type elements. The P-type doped dielectric layer may include at least one of polycrystalline silicon, amorphous silicon and microcrystalline silicon. The P-type doped dielectric layer is in ohmic contact with the positive metal electrode during the subsequent metallization process. Accordingly, the method for forming the P-type doped dielectric layer may use LPCVD to form an intrinsic dielectric layer (containing at least one of polycrystalline silicon, amorphous silicon and microcrystalline silicon) on the side of the P-region tunneling oxide layer away from the silicon substrate. After the intrinsic dielectric layer is formed, impurities containing P-type elements are diffused into the intrinsic dielectric layer using a thermal diffusion process to form a P-type doped dielectric layer. A substrate including a P-type doped dielectric layer can be placed in a chemical vapor deposition chamber, and a gas containing borohydride is introduced into the chemical vapor deposition chamber, and the gas containing borohydride is used as a doping source. A metal wire is also provided in the chemical vapor deposition chamber. When the metal wire is energized, the metal wire can generate heat. The heat-generating metal wire can play a chemical catalytic role on borohydride. The chemical catalytic effect can catalytically decompose the borohydride into some particles. These particles may include boron atoms and hydrogen atoms. The boron atoms and hydrogen atoms can be doped into or diffused into the P-type doped dielectric layer, so that the P-type doped dielectric layer is partially catalytically doped. The back-contact photovoltaic cell prepared by the preparation method of this embodiment can also take into account the following advantages: the high-low junction (P + The field passivation effect of the back-contact photovoltaic cell is relatively strong, the tunneling oxide layer in the P region can still play a good chemical passivation role, the adverse effects of Auger recombination in the P-type doped dielectric layer are relatively weak, and the contact resistance between the P-type doped dielectric layer and the positive metal electrode is relatively small. These advantages combined make the photoelectric conversion efficiency of the back-contact photovoltaic cell relatively large.

[0075] In some other embodiments, during the local catalytic doping process of the P-type doped dielectric layer, it is not limited to using a gas containing borohydride (B2H6 or BH3) as a doping source, but a gas containing at least one of alumina (AlH3), gallium monoxide (GaH3) and indium monoxide (InH3) can also be used as a doping source.

[0076] In some embodiments, before locally catalytically doping the P-type doped dielectric layer, the silicon glass layer of the P-type doped dielectric layer, which is located on the side of the P-type doped dielectric layer away from the P-region tunneling oxide layer, can be removed to facilitate the subsequent diffusion of boron atoms and hydrogen atoms into the P-type doped dielectric layer during the process of locally catalytically doping the P-type doped dielectric layer.

[0077] Among them, the silicon glass layer can mainly be phosphosilicate glass (PSG).

[0078] In addition, the method of removing the silicon glass layer can include removing it by using a laser, or the method of removing the silicon glass layer can include removing it by using an acid solution (including hydrofluoric acid and / or hydrochloric acid), or the method of removing the silicon glass layer can include first modifying the silicon glass layer by using a laser and then removing the silicon glass layer by using an acid solution.

[0079] In some embodiments, after locally catalytically doping the P-type doped dielectric layer, a mask layer can be formed on the P-type doped dielectric layer, that is to say, a mask layer can be formed on the P-type catalytic doping part. During the subsequent wet processing of the substrate, the mask layer can be used to protect the locally catalytically doped P-type doped dielectric layer and reduce the possibility of the locally catalytically doped P-type doped dielectric layer being corroded and damaged.

[0080] Among them, the method of forming a mask layer for protecting the P-type doped dielectric layer can refer to the methods of using PECVD, oxidation treatment or photoresist described above, which will not be elaborated here.

[0081] In some embodiments, please refer to Figure 3 As shown, the light-receiving surface 11 of the silicon substrate 1 can also be catalytically doped to form a top catalytic doping part 112 as Figure 4 shown.

[0082] In some embodiments, under the condition that the silicon substrate 1 is an N-type silicon substrate, that is, under the condition that the silicon substrate 1 is also doped with N-type elements, it can include Figure 3The substrate with the shown structure is placed inside a chemical vapor deposition chamber (not shown in the figure). A gas containing phosphine is introduced into the chemical vapor deposition chamber, and the gas containing phosphine is used as a doping source. A metal wire (not shown in the figure) is also arranged inside the chemical vapor deposition chamber. Under the condition of energizing the metal wire, the metal wire can generate heat. The metal wire generating heat can play a chemical catalytic role on phosphine. This chemical catalytic role can cause phosphine to be catalytically decomposed into some particles, and these particles can include phosphorus atoms and hydrogen atoms. The phosphorus atoms and hydrogen atoms can enter or diffuse into the silicon substrate 1 through the light-receiving surface 11 for doping, so as to form a top catalytic doping part 112 located at the top of the silicon substrate 1. The doping concentration of the top catalytic doping part 112 is greater than that of the silicon substrate 1. The top catalytic doping part 112 is a heavily doped region relative to the silicon substrate 1, and the silicon substrate 1 is a lightly doped region relative to the top catalytic doping part 112. A high-low junction (N + / N) can be formed between the top catalytic doping part 112 and the silicon substrate 1. This high-low junction (N + / N) can play a field passivation role in the subsequent back-contact photovoltaic cell to be prepared. This field passivation role can hinder the tendency of the photo-generated holes generated in the silicon substrate 1 to migrate to the light-receiving surface 11 of the silicon substrate 1 or to the top catalytic doping part 112, and reduce the recombination rate of the photo-generated holes at the interface between the silicon substrate 1 and the top catalytic doping part 112, thereby promoting more photo-generated holes to migrate to the positive metal electrode.

[0083] During the catalytic doping process of the light-receiving surface 11 and its vicinity of the silicon substrate 1, since the temperature inside the chemical vapor deposition chamber (for example, within the range of 350 °C to 500 °C) is relatively low, the temperature of the light-receiving surface 11 and its vicinity of the silicon substrate 1 is also relatively low. As a result, the number of lattice defects generated in the light-receiving surface 11 and its vicinity of the silicon substrate 1 is relatively small, and the number of new dangling bonds and new recombination centers generated in the light-receiving surface 11 and its vicinity of the silicon substrate 1 is relatively small. Therefore, the photo-generated holes generated in the subsequent back-contact photovoltaic cell to be prepared are not easily recombined at and near the interface between the silicon substrate 1 and the top catalytic doping part 112, so that relatively more photo-generated holes can migrate to the positive metal electrode.

[0084] During the catalytic doping process of the light-receiving surface 11 and its vicinity of the silicon substrate 1, phosphorus atoms and hydrogen atoms will synchronously diffuse from the light-receiving surface 11 into the silicon substrate 1. Hydrogen atoms can synchronously combine with dangling bonds, and the adverse effect of the Auger recombination generated can be relatively weak. The relevant specific principle has been described above and will not be elaborated here. Therefore, the photo-generated holes generated in the subsequent back-contact photovoltaic cell to be prepared are not easily recombined at and near the interface between the silicon substrate 1 and the top catalytic doping part 112, so that relatively more photo-generated holes can migrate to the positive metal electrode.

[0085] During the catalytic doping process on the light-receiving surface 11 and its vicinity of the silicon substrate 1, the mechanism of the co-diffusion of phosphorus atoms and hydrogen atoms can promote the diffusion of phosphorus atoms from the light-receiving surface 11 deeper into the silicon substrate 1, resulting in a relatively small number of lattice defects generated in the formed top catalytic doping portion 112. Correspondingly, both the light reflectivity and light scattering rate of the top catalytic doping portion 112 are relatively small. When the subsequent back-contact photovoltaic cell to be fabricated is irradiated by sunlight, relatively more light can enter deeper into the silicon substrate 1 through the top catalytic doping portion 112 per unit time, and the number of photo-generated electrons and photo-generated holes that the silicon substrate 1 can generate per unit time is relatively large.

[0086] According to the above, the back-contact photovoltaic cells fabricated according to some embodiments of the preparation method provided in the present application can take into account the following advantages: the number of photo-generated electrons and photo-generated holes that the back-contact photovoltaic cells can generate is relatively large, and the lifetime of the photo-generated holes (minority carriers) that the back-contact photovoltaic cells can generate is relatively high. Therefore, the photoelectric conversion efficiency of the fabricated back-contact photovoltaic cells is relatively large.

[0087] In some other embodiments, during the catalytic doping process on the light-receiving surface 11 and its vicinity of the silicon substrate 1, not limited to using a gas containing phosphine as the doping source, a gas containing arsine and / or stibine can also be used as the doping source.

[0088] In some other embodiments (not shown in the figure), under the condition that the silicon substrate is an N-type silicon substrate, that is, under the condition that the silicon substrate is doped with an N-type element, the substrate can be placed in a chemical vapor deposition chamber, and a gas containing at least one of borane, methylgallium, and indium trihydride is introduced into the chemical vapor deposition chamber. Using the gas containing at least one of borane, methylgallium, and indium trihydride as the doping source, the light-receiving surface of the silicon substrate is catalytically doped to form a top catalytic doping portion located at the top of the silicon substrate.

[0089] In some other embodiments (not shown in the figure), under the condition that the silicon substrate is a P-type silicon substrate, that is, under the condition that the silicon substrate is doped with a P-type element, the substrate can be placed in a chemical vapor deposition chamber, and a gas containing at least one of borane, methylgallium, and indium trihydride is introduced into the chemical vapor deposition chamber. Using the gas containing at least one of borane, methylgallium, and indium trihydride as the doping source, the light-receiving surface of the silicon substrate is catalytically doped to form a top catalytic doping portion located at the top of the silicon substrate.

[0090] In some other embodiments (not shown in the figures), under the condition that the silicon substrate is a P-type silicon substrate, that is, under the condition that the silicon substrate is doped with P-type elements, the substrate can be placed in a chemical vapor deposition chamber, and a gas containing at least one of phosphine, arsine, and stibine is introduced into the chemical vapor deposition chamber. The gas containing at least one of phosphine, arsine, and stibine is used as a doping source to catalytically dope the light-receiving surface of the silicon substrate to form a top catalytic doping portion located on the top of the silicon substrate.

[0091] In some embodiments (not shown in the figures), before the light-receiving surface and its vicinity of the silicon substrate are catalytically doped, an alkaline texturing solution can be used to texture the light-receiving surface of the silicon substrate to form a textured surface (with multiple micron-sized grooves or pyramid structures) on the light-receiving surface of the silicon substrate. The surface area of the textured surface is relatively larger than that of the polished surface. During the catalytic doping process, the number of phosphorus atoms that can enter the silicon substrate through the relatively larger textured surface per unit time is relatively large, and a top catalytic doping portion with a relatively large required doping concentration can be quickly formed. During the catalytic doping process, the number of hydrogen atoms that can enter the silicon substrate through the relatively larger textured surface per unit time is also relatively large. The relatively large number of hydrogen atoms can timely reduce the migration barrier of phosphorus atoms, thereby promoting the rapid diffusion of phosphorus atoms deeper into the silicon substrate. The relatively large number of hydrogen atoms can also fully combine with some newly generated dangling bonds, thereby significantly reducing the adverse effect of Auger recombination.

[0092] Among them, the alkaline texturing solution can include potassium hydroxide (KOH) and / or sodium hydroxide (NaOH).

[0093] In some embodiments, after locally catalytically doping the N-type doped dielectric layer, the light-receiving surface of the silicon substrate can be catalytically doped. Since the temperature in the chemical vapor deposition chamber required for catalytic doping (for example, in the range of 350 °C to 500 °C) is relatively low, it can also be said that the temperature of the substrate during the catalytic doping process is lower than the temperature of the substrate during the formation of the doped dielectric layer using the thermal diffusion process. Therefore, during the process of catalytically doping the light-receiving surface of the silicon substrate, the N-type elements previously doped into the N-type doped dielectric layer by the thermal diffusion process are not easily diffused to the interface between the N-region tunneling oxide layer and the silicon substrate, and it is not easy to generate a relatively large number of new dangling bonds and new recombination centers at the interface between the N-region tunneling oxide layer and the silicon substrate, so that the N-region tunneling oxide layer can still well chemically passivate the surface of the silicon substrate.

[0094] In some other embodiments, after catalytically doping the light-receiving surface of the doped silicon substrate, a part of the N-type doped dielectric layer can be catalytically doped. Among them, after forming the top catalytic doping part on the light-receiving surface of the silicon substrate, then forming an N-type tunneling oxidation passivation contact structure on the backlight surface of the silicon substrate, and then catalytically doping a part of the N-type doped dielectric layer. In the process of forming the N-type doped dielectric layer, a thermal diffusion process needs to be used. The temperature of the thermal diffusion process (for example, greater than 700 °C) is relatively high. The high temperature can promote the continuous diffusion of N-type elements (such as phosphorus atoms) in the formed top catalytic doping part into the silicon substrate to further reduce the number of lattice defects on the surface of the top catalytic doping part. Correspondingly, the light reflectivity and light scattering rate on the surface of the top catalytic doping part can be further reduced. The high temperature can also promote the continuous diffusion of hydrogen atoms that have not combined with dangling bonds in the top catalytic doping part, so that the continuously diffused hydrogen atoms can combine with the remaining dangling bonds, thereby further reducing the adverse effects of Auger recombination.

[0095] In some other embodiments, a part of the N-type doped dielectric layer and the light-receiving surface of the doped silicon substrate can be catalytically doped simultaneously, and the preparation efficiency of the preparation method of this embodiment is relatively high.

[0096] In some embodiments, during the catalytic doping process, the flow rate of the doping source introduced into the chemical vapor deposition chamber can be in the range of 30 standard cubic centimeters per minute (sccm) to 100 standard cubic centimeters per minute (sccm). Among them, the flow rate of the doping source can specifically be 30 sccm, 35 sccm, 40 sccm, 45 sccm, 50 sccm, 55 sccm, 60 sccm, 65 sccm, 70 sccm, 75 sccm, 80 sccm, 85 sccm, 90 sccm, 95 sccm or 100 sccm.

[0097] In some embodiments, during the catalytic doping process, the doping source further includes hydrogen or argon, and hydrogen or argon is used as a carrier gas.

[0098] In some embodiments, during the catalytic doping process, the internal pressure of the chemical vapor deposition chamber can be in the range of 10 millitorr (mTorr) to 15 millitorr (mTorr). Among them, the internal pressure of the chemical vapor deposition chamber can specifically be 10 mTorr, 11 mTorr, 12 mTorr, 13 mTorr, 14 mTorr or 15 mTorr.

[0099] In some embodiments, during the catalytic doping process, the operating power of the wire disposed inside the chemical vapor deposition chamber may be in the range of 3 kilowatts (kW) to 8 kilowatts (kW), and the operating power of the wire may specifically be 3 kW, 3.5 kW, 4 kW, 4.5 kW, 5 kW, 5.5 kW, 6 kW, 6.5 kW, 7 kW, 7.5 kW, or 8 kW.

[0100] In some embodiments, the wire disposed inside the chemical vapor deposition chamber may specifically be a tungsten wire or a tantalum wire.

[0101] In some embodiments, the time for implementing catalytic doping may be in the range of 10 minutes (min) to 30 minutes (min), and the time for implementing catalytic doping may specifically be 10 min, 11 min, 12 min, 13 min, 14 min, 15 min, 16 min, 17 min, 18 min, 19 min, 20 min, 21 min, 22 min, 23 min, 24 min, 25 min, 26 min, 27 min, 28 min, 29 min, or 30 min.

[0102] In some embodiments, the process of using the catalytic action of the wire in the chemical vapor deposition chamber to perform catalytic doping on the substrate may also be referred to as Catalytic Chemical Vapor Deposition (CAT-CVD) or Hot Wire Chemical Vapor Deposition (HWCVD).

[0103] The following content of this article provides a specific embodiment of a method for manufacturing a back-contact photovoltaic cell, as follows.

[0104] Provide a substrate 10 as Figure 5 shown. The substrate 10 includes a silicon substrate 1, and the silicon substrate 1 may be an N-type silicon substrate. The silicon substrate 1 has a light-receiving surface 11 and a backlight surface 12. Above the silicon substrate 1 is a light-receiving side 1a, and below the silicon substrate 1 is a backlight side 1b. After being fabricated into the required back-contact photovoltaic cell, sunlight can directly irradiate the light-receiving surface 11 from the light-receiving side 1a, and the ambient reflected light can irradiate the backlight surface 12 from the backlight side 1b.

[0105] Among them, the direction Y may represent the direction from the backlight side 1b of the silicon substrate 1 to the light-receiving side 1a, or the direction Y may represent the direction from the backlight surface 12 of the silicon substrate 1 to the light-receiving surface 11.

[0106] Polish the light-receiving surface 11 and the backlight surface 12 of the silicon substrate 1 as Figure 5 shown using an alkaline polishing solution.

[0107] Using LPCVD, a P-type tunneling oxide layer 221 and an intrinsic dielectric layer (not shown in the figure) are sequentially deposited on the backlight side 1b of the silicon substrate 1 as Figure 6 shown. Boron is diffused into the intrinsic dielectric layer by a thermal diffusion process to form a P-type doped dielectric layer 222, that is, a P-type tunneling oxide passivation contact structure 22 as Figure 6 shown is formed. Correspondingly, the surface of the P-type doped dielectric layer 222 can be oxidized to form a borosilicate glass layer 22a. The borosilicate glass layer 22a can act as a mask for the P-type doped dielectric layer 222. When the substrate 10 is subsequently wet-processed, the P-type doped dielectric layer 222 is protected by the borosilicate glass layer 22a and is not easily corroded and damaged.

[0108] Please refer to Figure 7 shown. Using a laser to remove the local structure of the borosilicate glass layer 22a and the local structure of the P-type tunneling oxide passivation contact structure 22 to form a first window 2a. The first window 2a penetrates through the borosilicate glass layer 22a and the P-type tunneling oxide passivation contact structure 22 in the Y direction, and a part of the backlight surface 12 of the silicon substrate 1 is exposed by the first window 2a.

[0109] The part of the backlight surface 12 exposed by the first window 2a is polished using an alkaline polishing solution.

[0110] Please refer to Figure 8 shown. Using LPCVD, an N-type tunneling oxide layer 211 and an intrinsic dielectric layer (not shown in the figure) are sequentially deposited on the backlight side of the silicon substrate 1 as Figure 8 shown. Phosphorus is diffused into the intrinsic dielectric layer by a thermal diffusion process to form an N-type doped dielectric layer 212, that is, an N-type tunneling oxide passivation contact structure 21 as Figure 8 shown is formed. Correspondingly, a phosphosilicate glass layer 21a will exist on the surface of the N-type doped dielectric layer 212.

[0111] The phosphosilicate glass layer 21a is removed to form a structure as Figure 9 shown.

[0112] Based on the structure as Figure 9 shown, using a gas containing phosphine as a doping source to catalytically dope the N-type doped dielectric layer 212 so that the N-type doped dielectric layer 212 includes an initial doping part 212a and a catalytic doping part 212b as Figure 10 shown.

[0113] An initial doping part 212a and a catalytic doping part 212b are formed in the catalytic doping part 212b as Figure 11The mask layer 3 shown (e.g., silicon oxide) can act as a mask for the catalytic doping portion 212b. When the substrate 10 is subsequently wet-processed, the catalytic doping portion 212b is protected by the mask layer 3 and is not easily corroded or damaged.

[0114] Based on the structure shown in Figure 11 The local structures of the N-type tunneling oxide passivation contact structure 21, the mask layer 3, the P-type tunneling oxide passivation contact structure 22, and the borosilicate glass layer 22a are removed by laser to form the structure shown in Figure 12 The N-type tunneling oxide passivation contact structure 21 and the P-type tunneling oxide passivation contact structure 22 are alternately arranged and spaced in the X direction. A second window 2b is provided between the N-type tunneling oxide passivation contact structure 21 and the P-type tunneling oxide passivation contact structure 22, and a part of the backlight surface 12 of the silicon substrate 1 is exposed by the second window 2b.

[0115] The wrap-around plating layer 2c (an additional structure formed during the process of forming the tunneling oxide layer and the intrinsic dielectric layer by LPCVD) on the light-receiving side of the silicon substrate 1 is etched in a chain to form the structure shown in Figure 13 Among them, the wrap-around plating layer 2c can be removed by an acid solution containing nitric acid during the chain etching.

[0116] Texturing is performed on the light-receiving surface 11 shown in Figure 13 using an alkaline texturing solution to form the textured surface 111 shown in Figure 14

[0117] The mask layer 3 and the borosilicate glass layer 22a are removed by pickling to form the structure shown in Figure 15

[0118] Using phosphine gas as a doping source, catalytic doping is performed on the textured surface 111 of the light-receiving surface to form the top catalytic doping portion 112 shown in Figure 16 Correspondingly, the top catalytic doping portion 112 also includes the textured surface 111.

[0119] Based on the structure shown in Figure 16 double-sided deposition is performed using the atomic layer deposition process (ALD) to form the structure shown in Figure 17The alumina passivation layer 4 as shown. An aluminum-oxygen-silicon chemical bond (Al-O-Si) can be formed between the alumina passivation layer 4 on the backlight side of the silicon substrate 1 and the N-type catalytic doping portion 212b, that is, the alumina passivation layer 4 can play a good chemical passivation role. Similarly, an aluminum-oxygen-silicon chemical bond (Al-O-Si) can be formed between the alumina passivation layer 4 on the light-receiving side of the silicon substrate 1 and the top catalytic doping portion 112, that is, the alumina passivation layer 4 can play a good chemical passivation role.

[0120] Among them, the thickness dimension (dimension along the direction Y) of the alumina passivation layer 4 can be in the range of 1 nm to 10 nm, and the thickness dimension can specifically be 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 9 nm or 10 nm.

[0121] On the basis of the structure as shown in Figure 17 PECVD double-sided deposition is used to form the silicon nitride passivation layer 5 as shown in Figure 18 The silicon nitride passivation layer 5 can play a good antireflection role, so that more light can enter the silicon substrate 1.

[0122] Among them, the thickness dimension (dimension along the direction Y) of the silicon nitride passivation layer 5 can be in the range of 40 nm to 100 nm, and the thickness dimension can specifically be 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, 85 nm, 90 nm, 95 nm or 100 nm.

[0123] On the basis of the structure as shown in Figure 18 Using a metallization process (including screen printing and sintering), a negative metal electrode 6 that forms an ohmic contact with the N-type doped dielectric layer 212 is formed as shown in Figure 19 And a positive metal electrode 7 that forms an ohmic contact with the P-type doped dielectric layer 222 is formed as shown in Figure 19 Among them, please refer to

[0124] As shown in Figure 19 Both the N-type initial doping portion 212a and the N-type catalytic doping portion 212b of the N-type doped dielectric layer 212 are in ohmic contact with the negative metal electrode 6.

[0125] In a second aspect, the present application provides some embodiments of a back contact photovoltaic cell (Back Contact Solar Cell, BC Solar Cell). The back contact photovoltaic cell can be prepared by the preparation method of the back contact photovoltaic cell described above, and the structure of the prepared back contact photovoltaic cell can be as shown in Figure 19As shown. The back-contact photovoltaic cell includes a silicon substrate 1, a tunneling oxide passivated contact structure 2, a top catalytic doping portion 112, an aluminum oxide passivation layer 4, a silicon nitride passivation layer 5, a negative metal electrode 6, and a positive metal electrode 7. The tunneling oxide passivated contact structure 2 includes an N-type tunneling oxide passivated contact structure 21 and a P-type tunneling oxide passivated contact structure 22. The N-type tunneling oxide passivated contact structure 21 includes an N-region tunneling oxide layer 211 and an N-type doped dielectric layer 212. The P-type tunneling oxide passivated contact structure 22 includes a P-region tunneling oxide layer 221 and a P-type doped dielectric layer 222. The N-type doped dielectric layer 212 includes an N-type initial doping portion 212a and an N-type catalytic doping portion 212b. Accordingly, Figure 19 The photoelectric conversion efficiency of the back-contact photovoltaic cell shown is relatively large. The relevant specific technical effects have been described above and will not be elaborated here.

[0126] Figure 19 The back-contact photovoltaic cell shown can also be referred to as a TBC photovoltaic cell, and its full name can be a photovoltaic cell formed by combining a tunneling oxide passivated contact structure (Tunnel Oxide Passivated Contact, TOPCon) and a back-contact structure (BC).

[0127] Among them, if Figure 19 the silicon substrate 1 of the back-contact photovoltaic cell shown is an N-type silicon substrate, the photo-generated holes generated by the silicon substrate 1 are minority carriers, and there is a positive correlation between the minority carrier lifetime and the photoelectric conversion efficiency. Through comparative tests Figure 19 the minority carrier lifetime of the back-contact photovoltaic cell shown (already catalytically doped) and the minority carrier lifetime of the back-contact photovoltaic cell of the related technology (not catalytically doped), as Figure 20 shown, Figure 19 the minority carrier lifetime range of the back-contact photovoltaic cell shown can be in the range of 700 microseconds (μs) to 2700 microseconds (μs), specifically it can be 700 μs, 800 μs, 900 μs, 1000 μs, 1100 μs, 1200 μs, 1300 μs, 1400 μs, 1500 μs, 1600 μs, 1700 μs, 1800 μs, 1900 μs, 2000 μs, 2100 μs, 2200 μs, 2300 μs, 2400 μs, 2500 μs, 2600 μs, 2700 μs, 2800 μs, 2900 μs, 3000 μs, 3100 μs or 3200 μs. The minority carrier lifetime of the back-contact photovoltaic cell of the related technology (not catalytically doped) is in the range of 380 μs to 600 μs. Therefore, compared with the related technology, the minority carrier lifetime of the back-contact photovoltaic cell of the embodiment of the present application is relatively large, and the photoelectric conversion efficiency of the back-contact photovoltaic cell is relatively large.

[0128] Through comparative tests Figure 19The N-type catalytic doping part 212b (already catalytically doped) of the back-contact photovoltaic cell shown and the heavily doped region (not catalytically doped) of the back-contact photovoltaic cell in the related art differ in doping concentration and doping depth as Figure 21 shown. Compared with the related art, the doping concentration of the N-type catalytic doping part of the back-contact photovoltaic cell in the embodiment of the present application is relatively large and the doping depth is relatively large. Specifically, the doping concentration of the N-type catalytic doping part of the back-contact photovoltaic cell in the embodiment of the present application is greater than 3E+19 cm -3 , and the depth of the N-type catalytic doping part of the back-contact photovoltaic cell in the embodiment of the present application can reach 0.4 microns. Therefore, the N-type catalytic doping part of the back-contact photovoltaic cell in the embodiment of the present application can play a good field passivation role and the adverse effect of Auger recombination generated can be relatively weak.

[0129] In some other embodiments (not shown in the figure), the silicon substrate can be a P-type silicon substrate.

[0130] In a third aspect, the present application provides some embodiments of a back-contact photovoltaic cell module. The back-contact photovoltaic cell module may include a laminate and a frame, and the frame is installed at the edge of the laminate. The laminate may include a photovoltaic glass, a first encapsulation film, a battery string, a second encapsulation film, and a backsheet stacked. Alternatively, the laminate may include a first photovoltaic glass, a first encapsulation film, a battery string, a second encapsulation film, and a second photovoltaic glass. Among them, the battery string may be formed by electrically connecting a plurality of the back-contact photovoltaic cells described above, and the number of battery strings may be one, two or more.

[0131] The above are only the preferred embodiments of the present application and are not used to limit the present application. For those skilled in the art, the present application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A preparation method of a back-contact photovoltaic cell, characterized in that, The preparation method includes: Providing a substrate, which includes a silicon substrate, an N-region tunneling oxide layer, and an intrinsic dielectric layer, and the N-region tunneling oxide layer is located between the backlight surface of the silicon substrate and the intrinsic dielectric layer; Diffusing at least one N-type element into the intrinsic dielectric layer by a thermal diffusion process to form an N-type doped dielectric layer; Using a gas containing phosphine as a doping source to catalytically dope a part of the N-type doped dielectric layer, so as to form an N-type initial doping part and an N-type catalytic doping part in the N-type doped dielectric layer, and making the N-type initial doping part located between the N-region tunneling oxide layer and the N-type catalytic doping part; Controlling the temperature of the substrate during the catalytic doping process to be lower than the temperature of the substrate during the thermal diffusion process; Forming an ohmic contact with a negative metal electrode on the N-type doped dielectric layer.

2. The preparation method of the back-contact photovoltaic cell according to claim 1, wherein, Before forming the N-type doped dielectric layer and before catalytically doping a part of the N-type doped dielectric layer, the preparation method further includes: Removing the phosphosilicate glass layer on the surface of the N-type doped dielectric layer.

3. The preparation method of the back-contact photovoltaic cell according to claim 2, wherein, After catalytically doping a part of the N-type doped dielectric layer, the preparation method further includes: Forming a mask layer on the N-type catalytic doping part.

4. The preparation method of the back-contact photovoltaic cell according to any one of claims 1 to 3, characterized in that, Texturing the light-receiving surface of the silicon substrate with an alkaline texturing solution and catalytically doping the light-receiving surface of the silicon substrate.

5. The preparation method of the back-contact photovoltaic cell according to any one of claims 1 to 3, characterized in that, Under the condition that the silicon substrate is an N-type silicon substrate, using a gas containing phosphine as a doping source to catalytically dope the light-receiving surface of the silicon substrate.

6. The preparation method of the back-contact photovoltaic cell according to any one of claims 1 to 3, characterized in that, After catalytically doping a part of the N-type doped dielectric layer, catalytically doping the light-receiving surface of the silicon substrate, or after catalytically doping the light-receiving surface of the silicon substrate, catalytically doping a part of the N-type doped dielectric layer, or simultaneously catalytically doping a part of the N-type doped dielectric layer and catalytically doping the light-receiving surface of the silicon substrate.

7. The preparation method of the back-contact photovoltaic cell according to any one of claims 1 to 3, characterized in that, During the catalytic doping process, controlling the temperature of the substrate within the range of 350°C to 500°C.

8. The preparation method of the back-contact photovoltaic cell according to any one of claims 1 to 3, characterized in that, Before forming the negative metal electrode after the catalytic doping, the preparation method further includes: Doubly depositing an alumina passivation layer by an atomic layer deposition process; Depositing a silicon nitride passivation layer on the alumina passivation layer by plasma-enhanced chemical vapor deposition.

9. A back-contact photovoltaic cell, characterized in that, The back-contact photovoltaic cell is prepared by the preparation method of the back-contact photovoltaic cell according to any one of claims 1 to 8.

10. A back-contact photovoltaic cell module, characterized in that, The back-contact photovoltaic cell module includes at least one cell string, and the cell string is formed by electrically connecting the back-contact photovoltaic cells according to claim 9.

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