Barrier walls, methods of forming barrier walls, and semiconductor devices including barrier wall structures

Abstract

The present application provides a kind of isolation wall, the method for forming isolation wall and the semiconductor device comprising isolation wall structure, the semiconductor device includes semiconductor substrate, first electronic component and second electronic component, at least one part of the first electronic component and the second electronic component and the second electronic component are arranged in the semiconductor substrate Conductive structure, and the first electronic component and the second electronic component need electrical isolation, the isolation wall includes: insulating medium, the insulating medium is in the vertical direction of the semiconductor substrate, and at least the first electronic component and the second electronic component one of the conductive structure in the semiconductor substrate is enclosed.The semiconductor device of the present application has both high power density and high isolation performance.

Description

TECHNICAL FIELD

[0001] The present application relates to magnetic devices, and in particular to a barrier wall, a method for forming a barrier wall, and a semiconductor device comprising a barrier wall structure. BACKGROUND

[0002] On-chip integrated micro-magnetic devices are thin-film magnetic elements manufactured on a silicon wafer or other substrate using micro-electro-mechanical system technology. "Thin-film" means that the magnetic device is developing from a three-dimensional structure to a planar two-dimensional structure, thus greatly reducing the volume of the magnetic device. This is in line with the development trend of power module integration and miniaturization under the development of high-frequency electronic technology and integrated circuit technology.

[0003] In a power module, magnetic elements such as transformers or inductors in passive devices are essential. In addition to storing and releasing energy during the switching period, magnetic devices also need to have electrical isolation function in some special applications (such as medicine, which must not allow high voltage to be transmitted from the device to the patient's body), at which time a transformer with electrical isolation function is needed.

[0004] In modern technology, micro-magnetic devices are manufactured on a silicon wafer using micro-electro-mechanical system technology. If the silicon wafer is not made into any circuit, even if the manufacturing process includes a process of thinning the silicon wafer, the silicon wafer is still just a blank support. This will occupy the volume space of the micro-magnetic device and reduce the power density of the micro-magnetic device.

[0005] To solve the above problems, one way is to manufacture micro-magnetic devices in a silicon wafer. Since the silicon wafer is a semiconductor material, it has a high resistivity at room temperature, so there will be no short circuit between the turns of the coil or between two coils of the micro-magnetic device. However, under high temperature working conditions, the semiconductor material becomes a conductor, causing short circuit between the turns of the coil and between two coils, resulting in failure. The processing method for this problem can be to grow a layer of dielectric layer at the junction of the coil and the silicon wafer, but the thickness of the dielectric layer grown by this method is thin and has low voltage resistance. This method can be used on inductors, but it is not suitable for transformers. SUMMARY

[0006] In view of the deficiencies of the prior art described above, the technical problem to be solved by the present application is to provide a barrier wall, a method for forming a barrier wall, and a semiconductor device comprising a barrier wall structure, which at least partially solves the deficiencies of the prior art described above.

[0007] As a first aspect of the present application, the technical solution of an embodiment of the barrier wall provided is as follows:

[0008] An isolation wall applied to a semiconductor device, the semiconductor device comprising a semiconductor substrate, a first electronic component and a second electronic component, the first electronic component and the second electronic component each having at least a part of a conductive structure disposed in the semiconductor substrate, and the first electronic component and the second electronic component requiring electrical isolation, wherein the isolation wall comprises: an insulating medium, the insulating medium penetrating the semiconductor substrate in a vertical direction of the semiconductor substrate and at least shielding the conductive structure of one of the first electronic component and the second electronic component disposed in the semiconductor substrate.

[0009] Preferably, the insulating medium has a thickness in the vertical direction of the semiconductor substrate that is the same as a thickness of the semiconductor substrate.

[0010] Preferably, the insulating medium is an organic polymer.

[0011] Preferably, the organic polymer is a polyimide, a benzocyclobutene or an epoxy resin.

[0012] Further, the insulating medium has a dielectric strength that is greater than a dielectric strength of the semiconductor substrate.

[0013] As a second aspect of the present application, embodiments of a method of forming an isolation wall are provided as follows:

[0014] A method of forming the isolation wall of any one of the first aspect, wherein the method comprises:

[0015] A trench providing step of providing a trench on a first surface of the semiconductor substrate, the trench at least shielding the conductive structure of one of the first electronic component and the second electronic component disposed in the semiconductor substrate;

[0016] An insulating medium filling step of filling the trench with the insulating medium and solidifying the insulating medium;

[0017] A substrate thinning step of thinning a second surface of the semiconductor substrate opposite the first surface until the substrate material at the bottom of the trench is completely removed to expose the insulating medium.

[0018] As a second aspect of the present application, embodiments of a transformer comprising an isolation wall structure are provided as follows:

[0019] A semiconductor device comprising a semiconductor substrate, a first electronic component and a second electronic component, each having at least a part of an electrically conductive structure arranged in the semiconductor substrate, and the first electronic component and the second electronic component requiring electrical isolation, characterized in that the semiconductor device further comprises an isolation wall according to any one of the first aspect, the isolation wall at least enclosing the electrically conductive structure of one of the first electronic component and the second electronic component arranged in the semiconductor substrate.

[0020] Preferably, the semiconductor device is a transformer.

[0021] Preferably, the first electronic component comprises a primary side electrically conductive coil winding of the transformer arranged in the semiconductor substrate, and the second electronic component comprises a secondary side electrically conductive coil winding of the transformer arranged in the semiconductor substrate.

[0022] Preferably, the first electronic component comprises a primary side electrically conductive coil winding of the transformer arranged in the semiconductor substrate, and the second electronic component comprises a first part of a secondary side electrically conductive coil winding of the transformer arranged on a first surface of the semiconductor substrate, a second part of the secondary side electrically conductive coil winding of the transformer arranged below a second surface of the semiconductor substrate, and a connecting column arranged in the semiconductor substrate and connecting the first part of the secondary side electrically conductive coil winding of the transformer and the second part of the secondary side electrically conductive coil winding of the transformer.

[0023] Compared with the prior art, the present application has the following beneficial effects:

[0024] The isolation wall of the embodiment of the present application comprises an insulating medium, which penetrates the semiconductor substrate in the vertical direction of the semiconductor substrate and at least encloses the electrically conductive structure of one of the first electronic component and the second electronic component arranged in the semiconductor substrate, not only effectively utilizes the blank area of the semiconductor substrate, reduces the volume of the entire semiconductor device, and improves the power density of the semiconductor device, but also improves the isolation withstand voltage between the first electronic component and the second electronic component in the semiconductor substrate compared with the way of the substrate trench long medium layer, and improves the isolation performance of the high power density semiconductor device. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 is a sectional view of the isolation wall of the first embodiment of the present application along the horizontal direction of the semiconductor substrate;

[0026] Figure 2 A sectional view of the barrier along the vertical direction of the semiconductor substrate for the first embodiment of the present application;

[0027] Figure 3 A flow chart of the method of forming the barrier for the second embodiment of the present application;

[0028] Figure 4 A schematic diagram of the substrate structure after the trench setting step for the second embodiment of the present application;

[0029] Figure 5 A schematic diagram of the substrate structure after the insulating medium filling step for the second embodiment of the present application;

[0030] Figure 6 A schematic diagram of the semiconductor substrate structure after the substrate thinning step for the second embodiment of the present application;

[0031] Figure 7 A first schematic diagram of the transformer containing the barrier for the third embodiment of the present application;

[0032] Figure 8 A Figure 7 A sectional view along the BB' line of the longitudinal section;

[0033] Figure 9 A second schematic diagram of the transformer containing the barrier for the third embodiment of the present application;

[0034] Figure 10 A third schematic diagram of the transformer containing the barrier for the third embodiment of the present application;

[0035] Figure 11 A Figure 10 A sectional view of the transformer along the direction of the semiconductor substrate;

[0036] Figure 12 A Figure 10 An exploded view of the transformer.

[0037] In which, the reference signs are summarized as follows:

[0038] 100 is a semiconductor substrate base material; 110 is a groove; 120 is an insulating medium; 130 is a first electronic component conductive structure in the conductor substrate; 140 is a second electronic component conductive structure in the conductor substrate; 141 is a connection column of the secondary side coil winding; L1 is a medium layer, L2 is a second part coil layer of the secondary side conductive coil winding; L3 is a second part coil layer of the primary side conductive coil winding on the lower surface of the semiconductor substrate (containing the secondary side conductive coil connection column), L4 is a first part coil layer of the primary side conductive coil winding on the upper surface of the semiconductor substrate (containing the primary side conductive coil connection column), L5 is a first part coil layer of the secondary side conductive coil winding above the first surface of the semiconductor substrate (containing the connection column of the primary side conductive coil winding), and L6 is a pad layer of the transformer. DETAILED DESCRIPTION

[0039] The technical solutions in the application will be described clearly and completely below with reference to the drawings. Obviously, the described embodiments are only part of the embodiments of the application, rather than all the embodiments. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the application.

[0040] In the description of the application, it should be noted that the terms "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the application. In addition, the terms "first", "second", "third", "step 1", "step 2" and the like are only for the purpose of description and cannot be understood as indicating or implying relative importance.

[0041] In addition, the technical features involved in different embodiments of the application described below can be combined with each other as long as there is no conflict between them.

[0042] First embodiment

[0043] The embodiment provided is a partition wall, Figure 1 is a sectional view of the partition wall of the first embodiment of the application along the horizontal direction of the semiconductor substrate, Figure 2 is a sectional view of the partition wall of the first embodiment of the application along the vertical direction of the semiconductor substrate, Figure 2 is Figure 1 is a sectional view after being longitudinally divided along the AA' line, please see Figure 1 and Figure 2The isolation wall of the embodiment is applied to a semiconductor device, which includes a semiconductor substrate 100, a first electronic component 130 and a second electronic component 140, the first electronic component 130 and the second electronic component 140 each have at least a part of conductive structures arranged in the semiconductor substrate 100, and the first electronic component 130 and the second electronic component 140 need to be electrically isolated, wherein the isolation wall includes: an insulating medium 120, which is arranged in the semiconductor substrate 100 and penetrates the semiconductor substrate 100 in a vertical direction of the semiconductor substrate 100, and at least shields conductive structures of one of the first electronic component 130 and the second electronic component 140 arranged in the semiconductor substrate 100. Figure 2 It can be seen that the insulating medium 120 penetrates the semiconductor substrate 100 in the vertical direction of the semiconductor substrate 100 and shields the conductive structures of one of the first electronic component 130 and the second electronic component 140 arranged in the semiconductor substrate 100. Figure 1 It can be seen that the insulating medium 120 at least shields the conductive structures of one of the first electronic component 130 and the second electronic component 140 arranged in the semiconductor substrate 100, and specifically, Figure 1 The second electronic component 140 is shielded.

[0044] The semiconductor substrate may, for example, be a silicon substrate, and the semiconductor device may, for example, be a high-voltage power semiconductor device. Figure 1 It can be seen that the insulating medium 120 shields the conductive structures of the second electronic component 140 arranged in the semiconductor substrate 100, and the embodiment can also shield the first electronic component 130 or simultaneously shield the first electronic component 130 and the second electronic component 140, and the specific selection is determined according to design requirements. Figure 2 It can be seen that the thickness of the insulating medium 120 is equal to the thickness of the silicon substrate 100, so that the insulating medium 120 completely separates the first electronic component 130 and the second electronic component 140, and forms an isolation wall with high withstand voltage.

[0045] It should be noted that the shielding in the embodiment does not mean that the insulating medium 120 completely surrounds the shielding object, and the shielding in the embodiment can also be non-enclosed shielding realized by the edge of the semiconductor substrate. The first and second schematic diagrams of the transformer in the third embodiment are both non-enclosed shielding.

[0046] The isolation wall of the embodiment includes an insulating medium, which penetrates a semiconductor substrate in a vertical direction of the semiconductor substrate and at least shields conductive structures of one of a first electronic component and a second electronic component arranged in the semiconductor substrate, which not only effectively utilizes the blank area of the semiconductor substrate, reduces the volume of the entire semiconductor device, and improves the power density of the semiconductor device, but also improves the isolation withstand voltage between the first electronic component and the second electronic component in the semiconductor substrate compared with the mode of the substrate groove and the long medium layer, and improves the isolation performance of the high-power-density semiconductor device.

[0047] Preferably, the thickness of the insulating medium in the vertical direction of the semiconductor substrate is the same as the thickness of the semiconductor substrate, and too thin will make the first electronic component and the second electronic component form an electrical conductor through the non-isolated semiconductor substrate, and the electrical isolation performance will be reduced.

[0048] Preferably, the insulating medium is an organic polymer.

[0049] Preferably, the organic polymer is polyimide, benzocyclobutene (BCB) or epoxy resin, and when polyimide is selected as the insulating medium, the first electronic component and the second electronic component can achieve an isolation withstand voltage of nearly 200KV / mm.

[0050] Further, the dielectric strength of the insulating medium is greater than the dielectric strength of the semiconductor substrate, so as to provide an ideal electrical isolation condition through the high dielectric strength of the insulating medium.

[0051] Second embodiment

[0052] The embodiment provided is a method for forming the isolation wall of any one of the first embodiment, Figure 3 a flowchart of the method for forming the isolation wall of the second embodiment of the present application, Figure 4 a schematic diagram of the substrate structure after the trench setting step of the second embodiment of the present application is completed, Figure 5 a schematic diagram of the substrate structure after the insulating medium filling step of the second embodiment of the present application is completed, Figure 6 a schematic diagram of the semiconductor substrate structure after the substrate thinning step of the second embodiment of the present application is completed, which comprises:

[0053] S100, a trench setting step, setting a trench 110 on the first surface of the semiconductor substrate 100, the trench 110 at least enclosing the conductive structure of one of the first electronic component and the second electronic component in the semiconductor substrate;

[0054] S200, an insulating medium filling step, filling the insulating medium 120 in the trench and solidifying the insulating medium 120;

[0055] S300, a substrate thinning step, thinning the second surface opposite to the first surface of the semiconductor substrate 100 until the substrate material at the bottom of the trench is completely removed to expose the insulating medium 120.

[0056] The method for setting the trench in the S10 trench setting step comprises dry etching or wet etching, and specifically comprises the following steps:

[0057] First, spin a layer of photoresist on the upper surface, pre-bake and cure the photoresist, then expose the photoresist through a designed mask plate, after exposure, you can do the middle baking (or not, depending on the type of photoresist), then put the substrate containing the exposed photoresist into the developing solution for development, after development, do the post-baking treatment (or not, depending on the type of photoresist).

[0058] Then start etching the semiconductor substrate, when dry etching (such as ICP etching) is selected, the etching gas etches the exposed upper surface of the semiconductor substrate through the opening area of the photoresist, thereby forming a trench; if wet etching (solution corrosion) is selected, the etching solution also corrodes the exposed upper surface of the semiconductor substrate through the opening area of the photoresist, thereby forming a trench, after the trench is formed, the photoresist is removed, and the substrate is immersed in a stripping solution.

[0059] In the S200 insulating medium filling step, the insulating medium is an organic material, which can be composed of polyimide or any other suitable material, such as benzocyclobutene (BCB), epoxy resin, etc.; the method of filling the medium is preferably spin coating, which specifically includes the following steps:

[0060] Fix the semiconductor substrate on the spin coating table with the upper surface facing up, use a glue dropper to drop glue on the upper surface of the substrate, and try to cover the entire upper surface of the substrate; then rotate the spin coating table at the set speed to make the insulating medium on the upper surface of the substrate as flat as possible and fill each trench;

[0061] Then translate the substrate to the heating table for pre-curing, the pre-curing time and temperature and the heating rate are according to the set parameters; after pre-curing, the substrate is transferred into a special oven for post-curing, and then the substrate is taken out; then the part of the insulating medium overflowing outside the trench is thinned and removed by chemical mechanical polishing (CMP) equipment, until there is no insulating medium residue on the upper surface 100(1) of the substrate except the trench.

[0062] In the S300 substrate thinning step, the specific method includes using a thinning machine for thinning or using chemical mechanical polishing (CMP) for planarization treatment, until the substrate part at the bottom of the trench is completely ground out, exposing the insulating medium.

[0063] Third embodiment

[0064] This embodiment provides a semiconductor device, which includes a semiconductor substrate, a first electronic component, and a second electronic component. At least a portion of both the first and second electronic components is disposed in the semiconductor substrate, and the first and second electronic components need to be electrically isolated. The semiconductor device also includes an isolation wall according to any one of the first embodiments, which at least encloses the conductive structure of one of the first and second electronic components located in the conductor substrate.

[0065] Preferably, the semiconductor device is a transformer.

[0066] Preferably, the first electronic component includes a primary conductive coil winding of a transformer, disposed in a semiconductor substrate; the second electronic component includes a secondary conductive coil winding of a transformer, disposed in a semiconductor substrate.

[0067] Figure 7 This is a first schematic diagram of a transformer including an isolation wall according to the third embodiment of the present invention. Figure 8 for Figure 7 For a cross-sectional view after longitudinal division along line BB', please refer to [link / reference]. Figure 7 and Figure 8 The first electronic component, 130, located in the conductive substrate, is the primary winding of a transformer, shown as a 5-turn helical coil structure. The second electronic component, 140, also located in the conductive substrate, is the secondary winding of a transformer, also shown as a 5-turn helical coil structure. Considering the high magnetic coupling design of the transformer, the helical ends of the primary and secondary windings are aligned. The insulating medium 120 divides the semiconductor substrate in two. Figure 7 The regions to the left and right of the insulating medium 120, separated by the primary and secondary conductive coil windings, are... Figure 7 It can be seen that the insulating medium 120 encloses the secondary conductive coil winding, and the insulating medium 120 achieves high electrical isolation performance between the primary conductive coil winding and the secondary conductive coil winding of the transformer.

[0068] Figure 9 This is a second schematic diagram of a transformer including an isolation wall according to the third embodiment of the present invention. Please refer to [link / reference]. Figure 9 The first electronic component, with its conductive structure 130 located in the conductive substrate, is the primary winding of a transformer, shown as a planar helical coil structure. The second electronic component, with its conductive structure 140 located in the conductive substrate, is the secondary winding of a transformer, also shown as a planar helical coil structure. The insulating medium 120 divides the semiconductor substrate in two, i.e. Figure 9The region inside the insulating medium 120 and the region outside the insulating medium 120, separated by the primary conductive coil winding and the secondary conductive coil winding, are... Figure 9 It can be seen that the insulating medium 120 encloses the secondary conductive coil winding, and the insulating medium 120 achieves high electrical isolation performance between the primary conductive coil winding and the secondary conductive coil winding of the transformer.

[0069] Preferably, the first electronic component includes a primary conductive coil winding of a transformer, disposed in a semiconductor substrate; the second electronic component includes a first portion of a secondary conductive coil winding of a transformer, a second portion of a secondary conductive coil winding of a transformer, and a connecting post. The first portion of a secondary conductive coil winding of the transformer is disposed above a first surface of the semiconductor substrate, the second portion of a secondary conductive coil winding of the transformer is disposed below a second surface of the semiconductor substrate, and the connecting post is disposed in the semiconductor substrate and connects the first portion of a secondary conductive coil winding of the transformer and the second portion of a secondary conductive coil winding of the transformer.

[0070] Figure 10 This is a third schematic diagram of a transformer including an isolation wall according to the third embodiment of the present invention. Figure 11 for Figure 10 Cross-sectional view of the transformer along the semiconductor substrate. Figure 12 for Figure 10 For an exploded view of the transformer, please refer to [link / reference]. Figures 10 to 12 The first electronic component, 130, located in the conductive substrate, is the primary winding of a transformer, shown as a planar helical coil structure. The second electronic component, 140, located in the conductive substrate, is the connecting post 141 of the secondary winding of the transformer. The secondary winding of the transformer also includes a first portion of coil 142 disposed above the first surface of the semiconductor substrate 100 and a second portion of coil 143 disposed below the second surface of the semiconductor substrate 100. Figure 10 This is a cross-sectional view of the semiconductor substrate 100 along its horizontal direction. Therefore, only the connecting post 141 connecting the first part of the coil 142 and the second part of the coil 143 is visible in the secondary conductive coil winding of the transformer. The insulating medium 120 divides the semiconductor substrate in two. Figure 9 The region inside the insulating medium 120 and the region outside the insulating medium 120, and the connecting post 141 that separates the primary conductive coil winding and the secondary conductive coil winding, are formed by... Figure 10It can be seen that the insulating medium 120 shields the connecting post 141 of the secondary side conductive coil winding, and the insulating medium 120 realizes the high electrical isolation performance of the primary side conductive coil winding and the secondary side conductive coil winding of the transformer. Based on the requirement of magnetic coupling, the first part coil 142 and the second part coil 143 of the secondary side conductive coil winding are preferably arranged to be opposite to the primary side conductive coil winding 130 in a forward direction, and the projection areas are overlapped as much as possible. Since the first part coil 142 and the second part coil 143 of the secondary side winding coil are arranged on the first surface and below the second surface of the semiconductor substrate respectively, the insulating medium is further arranged between the first part coil 142 and the second part coil 143 of the secondary side conductive coil winding and the substrate surface, so that high isolation can be realized between the primary side conductive coil winding 130 and the first part coil 142 and the second part coil 143 of the secondary side conductive coil winding through the insulating medium. However, since the first part coil 142 and the second part coil 143 of the secondary side conductive coil winding need to pass through the semiconductor substrate through the connecting post 141 to realize electrical connection, if there is no isolation wall, the connecting post 141 of the secondary side conductive coil winding arranged in the semiconductor substrate and the primary side conductive coil winding 130 can only be insulated through the semiconductor substrate, or can only be insulated through a thin layer of oxide (such as silicon dioxide) between the connecting post 141 and the substrate, which cannot withstand high voltage isolation. The isolation wall separates the connecting post 141 of the secondary side conductive coil winding and the semiconductor substrate supporting the connecting post 141 from the primary side conductive coil winding 130 and the semiconductor substrate supporting the primary side conductive coil winding 130, and realizes the high isolation electrical requirement through the high dielectric constant of the isolation wall itself.

[0071] The above is only the preferred embodiment of the present application, and it should be pointed out that the above preferred embodiment should not be regarded as a limitation of the present application. For those skilled in the art, several improvements and refinements can be made without departing from the spirit and scope of the present application, and the improvements and refinements of the micro device should also be regarded as the protection scope of the present application, which will not be described in detail here. The protection scope of the present application should be limited by the scope defined in the claims.

Claims

1. An isolation wall applied to a semiconductor device, the semiconductor device being a transformer, the semiconductor device comprising a semiconductor substrate, a first electronic component and a second electronic component, the first electronic component comprising a primary side conductive coil winding of the transformer disposed in the semiconductor substrate, the second electronic component comprising a first part coil of a secondary side conductive coil winding of the transformer disposed on a first surface of the semiconductor substrate, a second part coil of the secondary side conductive coil winding of the transformer disposed under a second surface of the semiconductor substrate, and a connecting post disposed in the semiconductor substrate and connecting the first part coil of the secondary side conductive coil winding of the transformer and the second part coil of the secondary side conductive coil winding of the transformer, at least a part of conductive structures of the first electronic component and the second electronic component being disposed in the semiconductor substrate, and the first electronic component and the second electronic component requiring electrical isolation, characterized in that, The isolation wall comprises: an insulating medium, which is filled in the semiconductor substrate between the first electronic component of the transformer and the second electronic component of the transformer, and which penetrates the semiconductor substrate in the vertical direction of the semiconductor substrate and at least encloses the conductive structure in which one of the first electronic component and the second electronic component is located in the semiconductor substrate.

2. The barrier wall of claim 1, wherein: The thickness of the insulating medium in the vertical direction of the semiconductor substrate is the same as the thickness of the semiconductor substrate.

3. The barrier wall of claim 1, wherein: The insulating medium is an organic polymer.

4. The barrier wall of claim 3, wherein: The organic polymer is polyimide, benzocyclobutene or epoxy resin.

5. The barrier wall of claim 1, wherein: The dielectric strength of the insulating medium is greater than the dielectric strength of the semiconductor substrate.

6. A method of forming the barrier of any one of claims 1 to 5, characterized by, Comprise: A trench setting step of setting a trench between the first electronic component and the second electronic component on the first surface of the semiconductor substrate, the trench at least enclosing the conductive structure in which one of the first electronic component and the second electronic component is located in the semiconductor substrate, and the bottom of the trench not penetrating the semiconductor substrate; an insulating medium filling step of filling the insulating medium in the trench and solidifying the insulating medium; A substrate thinning step of thinning the second surface opposite to the first surface of the semiconductor substrate until the substrate material at the bottom of the trench is completely removed to expose the insulating medium, thereby forming an isolation wall penetrating the semiconductor substrate and isolating the first electronic component and the second electronic component.

7. A semiconductor device comprising a semiconductor substrate, a first electronic component and a second electronic component, each of the first and second electronic components having at least a portion of an electrically conductive structure disposed in the semiconductor substrate, and the first and second electronic components requiring electrical isolation, characterized by: The semiconductor device further comprises the isolation wall of any one of claims 1 to 5, which at least encloses the conductive structure in which one of the first electronic component and the second electronic component is located in the semiconductor substrate; The semiconductor device is a transformer, the first electronic component comprises a primary side conductive coil winding of the transformer, which is arranged in the semiconductor substrate; the second electronic component comprises a first part coil of a secondary side conductive coil winding of the transformer, a second part coil of the secondary side conductive coil winding of the transformer and a connecting column, the first part coil of the secondary side conductive coil winding of the transformer is arranged on the first surface of the semiconductor substrate, the second part coil of the secondary side conductive coil winding of the transformer is arranged below the second surface of the semiconductor substrate, and the connecting column is arranged in the semiconductor substrate and connects the first part coil of the secondary side conductive coil winding of the transformer and the second part coil of the secondary side conductive coil winding of the transformer.

8. The semiconductor device of claim 7, wherein: The semiconductor device is a transformer.

9. The semiconductor device of claim 8, wherein: The first electronic component comprises a primary side conductive coil winding of the transformer, which is arranged in the semiconductor substrate; the second electronic component comprises a secondary side conductive coil winding of the transformer, which is arranged in the semiconductor substrate.

10. The semiconductor device of claim 8, wherein: The first electronic component includes a primary side conductive coil winding of the transformer disposed in the semiconductor substrate; the second electronic component includes a first portion coil of a secondary side conductive coil winding of the transformer disposed on a first surface of the semiconductor substrate, a second portion coil of the secondary side conductive coil winding of the transformer disposed below a second surface of the semiconductor substrate, and a connecting post disposed in the semiconductor substrate and connecting the first portion coil of the secondary side conductive coil winding of the transformer and the second portion coil of the secondary side conductive coil winding of the transformer.

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