Estimation method for inductance core loss, processor and storage medium
By decomposing the PWM waveform and combining the core loss lookup table, the error problem of inductor core loss estimation under the PWM waveform in the prior art is solved, and the accurate estimation of the core loss of the switch converter is achieved, improving the design accuracy.
Patent Information
- Application Number
- CN202510014675.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-06
- Publication Date
- 2025-05-27
- Estimated Expiration
- 2045-01-06
AI Technical Summary
The prior art is difficult to accurately estimate the inductor core loss in switching converters, especially in the case of PWM waveforms, resulting in errors in efficiency evaluation and design.
By obtaining the duty cycle and modulation index of the PWM signal, the PWM waveform is decomposed into symmetric first and second square waves, combined with the core loss lookup table, the core loss in each cycle is calculated, and the total core loss is added to estimate the total core loss.
Accurate estimation of the inductor core loss in the switching converter under the PWM waveform, improving the accuracy of efficiency evaluation and design.
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Figure CN120044326A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of switching converters, and more particularly to a method for estimating the core loss of an inductor, a processor, and a storage medium. Background Art
[0002] The efficiency of a switching converter is one of the important indicators for evaluating its performance. As an important component in a switching converter (such as an inverter), the accurate estimation of the core loss of the inductor is crucial for the overall efficiency evaluation of the switching converter and the design of the switching converter.
[0003] Currently, the most commonly used method for estimating the core loss of an inductor is the Steinmetz formula. However, the Steinmetz formula can only be used to estimate the core loss under a sinusoidal waveform without DC current bias. Subsequently, variants such as the generalized Steinmetz formula and the improved generalized Steinmetz formula have been proposed based on the Steinmetz formula, enabling it to be applied to other shaped waveforms with current DC bias. In an actual switching converter, the waveform at both ends of the inductor is an irregular PWM waveform with inconsistent duty cycles. Using the Steinmetz formula and its variant formulas will still result in errors. Therefore, a method for estimating the core loss for a PWM waveform is needed. Summary of the Invention
[0004] The purpose of the embodiments of the present invention is to provide a method for estimating the core loss of an inductor, a processor, and a storage medium, which can well estimate the core loss of the inductor of a switching converter for a PWM waveform.
[0005] To achieve the above purpose, a first aspect of this application provides a method for estimating the core loss of an inductor, which is applied to a switching converter. The switching converter includes an inductor. The estimation method includes:
[0006] Obtain the duty cycle of each period of the PWM signal input to the switching converter;
[0007] Obtain the modulation index of the switching converter;
[0008] For any period in the PWM signal, decompose the PWM waveform of this period into a symmetric first square wave waveform and a second square wave waveform, where the first period of the first square wave waveform and the second period of the second square wave waveform satisfy: T 1 = 2DT, T 2 = 2(1 - D)T, T 1 is the first period length, T 2 is the second period length, D is the duty cycle, and T is the period length;
[0009] Calculate the phase angle corresponding to the duty cycle of this period in the modulation wave according to the duty cycle and modulation index of this period;
[0010] Determine the output voltage of the switching converter according to the voltage amplitude of the PWM signal and the fundamental angular frequency of the PWM signal;
[0011] Measure the impedance of the load of the switching converter;
[0012] Determine the output current of the switching converter according to the output voltage and the impedance;
[0013] Determine the DC bias current of this period according to the modulation index, the impedance, the voltage amplitude, and the phase angle;
[0014] Find the corresponding first core loss in the core loss look-up table according to the voltage amplitude of the PWM signal, the DC bias current, and the first period, and find the corresponding second core loss in the core loss look-up table according to the voltage amplitude of the PWM signal, the DC bias current, and the second period;
[0015] Determine half of the sum of the first core loss and the second core loss as the core loss of this period;
[0016] Sum up the core losses of all periods in the PWM signal to obtain the total core loss of the PWM signal.
[0017] In the embodiment of the present application, the core loss look-up table is obtained through the following steps:
[0018] Provide a test circuit, which includes a first controllable switch, a second controllable switch, a third controllable switch, and a fourth controllable switch. The first end of the first controllable switch is electrically connected to the second end of the second controllable switch. The first end of the third controllable switch is electrically connected to the first end of the fourth controllable switch. The second end of the first controllable switch is electrically connected to the second end of the third controllable switch. The second end of the second controllable switch is electrically connected to the second end of the fourth controllable switch;
[0019] Provide a DC power supply, and both ends of the DC power supply are respectively electrically connected to the first end of the first controllable switch and the first end of the third controllable switch;
[0020] Provide a plurality of sample inductors, and connect both ends of the sample inductor to be measured among the plurality of sample inductors to the second end of the first controllable switch and the second end of the second controllable switch respectively. The inductance values of the plurality of sample inductors are all known;
[0021] Drive signals are provided to the control terminals of the first controllable switch, the second controllable switch, the third controllable switch, and the fourth controllable switch, so that the first controllable switch and the fourth controllable switch are turned on while the second controllable switch and the third controllable switch are turned off, and the second controllable switch and the third controllable switch are turned on while the first controllable switch and the fourth controllable switch are turned off. The drive signal includes a first part and a second part. The first part turns on the first controllable switch and the fourth controllable switch for a first duration while turning off the second controllable switch and the third controllable switch for the first duration. The second part is a symmetric square wave signal with a duty cycle of 50%;
[0022] Calculate the integral of the quotient of the voltage of the DC power supply and the inductance value of the sample inductor to be measured within the first duration to obtain the DC bias current of the sample inductor to be measured;
[0023] Measure the inductance voltage and inductance current across the sample inductor to be measured;
[0024] Calculate the integral of the product of the inductance voltage and the inductance current within the period of the square wave signal to obtain the core loss during this period;
[0025] Construct the corresponding relationships between the core loss, the DC bias current, the voltage, and the period;
[0026] Change the inductance value of the sample inductor, the voltage of the DC power supply, and the period of the square wave signal to construct different corresponding relationships between the core loss, the DC bias current, the voltage, and the period;
[0027] Form a core loss look-up table with the obtained multiple corresponding relationships.
[0028] In the embodiments of the present application, calculating the phase angle corresponding to the duty cycle of this period in the modulation wave according to the duty cycle and the modulation index of this period includes:
[0029] If the carrier wave of the modulation wave is a sine wave, calculate the phase angle according to formula (1):
[0030]
[0031] If the carrier wave of the modulation wave is a cosine wave, calculate the phase angle according to formula (2):
[0032]
[0033] Among them, is the phase angle, D is the duty cycle, and M is the modulation index.
[0034] In the embodiments of the present application, determining the output voltage of the switching converter according to the voltage amplitude of the PWM signal and the fundamental angular frequency of the PWM signal includes calculating the output voltage according to formula (3):
[0035] Vout = MV DC sinωt (3)
[0036] Wherein, Vout is the output voltage, M is the modulation index, V DC is the voltage amplitude, and ω is the fundamental angular frequency.
[0037] In the embodiments of the present application, determining the output current of the switching converter according to the output voltage and impedance includes calculating the output current according to formula (4):
[0038]
[0039] Wherein, I OUT is the output current, and Z is the load impedance.
[0040] In the embodiments of the present application, determining the DC bias current of this period according to the modulation index, impedance, voltage amplitude, and phase angle includes calculating the DC bias current according to formula (5):
[0041]
[0042] In the embodiments of the present application, the first duration is greater than the period of the symmetric square wave signal.
[0043] In the embodiments of the present application, the first controllable switch, the second controllable switch, the third controllable switch, and the fourth controllable switch include IGBT or MOSFET.
[0044] A second aspect of the present application provides a processor configured to execute the above-mentioned method for estimating the core loss of an inductor.
[0045] A third invention of the present application provides a machine-readable storage medium, on which instructions are stored, and the instructions are used to cause a machine to execute the above-mentioned method for estimating the core loss of an inductor.
[0046] Through the above technical solution, the core loss under the symmetric square wave waveform at different DC biases of current, voltages, and switching frequencies (periods) is obtained through offline testing, and a core loss lookup table regarding the DC bias of current, voltage, and switching frequency is formed. By decomposing the actual PWM waveform into square wave components, the DC bias of current, voltage, and switching frequency of each square wave component are confirmed and the corresponding core loss is obtained in the lookup table, and the core losses of each square wave component are added to obtain the total estimated core loss of the inductor under the PWM waveform. This solution can well estimate the core loss of the inductor of the switching converter for the PWM waveform.
[0047] Other features and advantages of the embodiments of the present invention will be described in detail in the subsequent specific implementation section. Description of the Drawings
[0048] The accompanying drawings are used to provide a further understanding of the embodiments of the present invention, and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the embodiments of the present invention, but do not constitute a limitation to the embodiments of the present invention. In the accompanying drawings:
[0049] Figure 1 It is a schematic flowchart showing the method for estimating the core loss of an inductor according to an embodiment of the present application;
[0050] Figure 2 It is a schematic diagram of the test circuit used to obtain the core loss lookup table in the method for estimating the core loss of an inductor according to an embodiment of the present application;
[0051] Figure 3 Schematically shows according to an embodiment of the present application for Figure 2 The waveform diagram of the drive signal provided to the controllable switch of the shown test circuit;
[0052] Figure 4 It is a schematic diagram showing the division of a PWM signal into two square wave signals in the method for estimating the core loss of an inductor according to an embodiment of the present application. Specific Embodiments
[0053] The following will describe in detail the specific embodiments of the embodiments of the present invention with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only used to illustrate and explain the embodiments of the present invention, and are not used to limit the embodiments of the present invention.
[0054] As the overall inventive concept of the embodiments of the present application, the core loss under a symmetric square wave waveform at different DC current biases, voltages, and switching frequencies is obtained through offline testing, and a core loss lookup table regarding the DC current bias, voltage, and switching frequency is formed. By decomposing the actual PWM waveform into square wave components, the DC current bias, voltage, and switching frequency of each square wave component are confirmed, and the corresponding core loss is obtained from the lookup table. The core losses of each square wave component are added together to obtain the total estimated core loss of the inductor under the PWM waveform.
[0055] Figure 2 It is a schematic diagram of the test circuit used to obtain the core loss lookup table in the method for estimating the core loss of an inductor according to an embodiment of the present application. As Figure 2 shown, the core loss lookup table is obtained through the following steps:
[0056] A test circuit is provided, which includes a first controllable switch S1, a second controllable switch S2, a third controllable switch S3, and a fourth controllable switch S4. The first end of the first controllable switch S1 is electrically connected to the second end of the second controllable switch S2. The first end of the third controllable switch S3 is electrically connected to the first end of the fourth controllable switch S4. The second end of the first controllable switch S1 is electrically connected to the second end of the third controllable switch S3. The second end of the second controllable switch S2 is electrically connected to the second end of the fourth controllable switch S4;
[0057] A DC power supply U is provided, and both ends of the DC power supply U are electrically connected to the first end of the first controllable switch S1 and the first end of the third controllable switch S3 respectively;
[0058] A plurality of sample inductors L are provided. The two ends of the sample inductor L to be measured among the plurality of sample inductors L are electrically connected to the second end of the first controllable switch S1 and the second end of the second controllable switch S2 respectively, and the inductance values of the plurality of sample inductors L are all known;
[0059] Drive signals are provided to the control terminals of the first controllable switch S1, the second controllable switch S2, the third controllable switch S3, and the fourth controllable switch S4, so that the first controllable switch S1 and the fourth controllable switch S4 are turned on while the second controllable switch S2 and the third controllable switch S3 are turned off, and the second controllable switch S2 and the third controllable switch S3 are turned on while the first controllable switch S1 and the fourth controllable switch S4 are turned off. The drive signal includes a first part and a second part. The first part makes the first controllable switch S1 and the fourth controllable switch S4 turn on for a first duration while making the second controllable switch S2 and the third controllable switch S3 turn off for the first duration. The second part is a symmetric square wave signal with a duty cycle of 50%;
[0060] Calculate the integral of the quotient of the voltage of the DC power supply U and the inductance value of the sample inductor L to be measured within the first duration to obtain the DC bias current of the sample inductor L to be measured;
[0061] Measure the inductance voltage and inductance current at both ends of the sample inductor L to be measured;
[0062] Calculate the integral of the product of the inductance voltage and the inductance current within the period of the square wave signal to obtain the core loss of this period;
[0063] Construct the corresponding relationship between the core loss and the DC bias current, voltage, and period;
[0064] Change the inductance value of the sample inductor L, the voltage of the DC power supply U, and the period of the square wave signal to construct different corresponding relationships between the core loss and the DC bias current, voltage, and period;
[0065] Form the obtained multiple corresponding relationships into a core loss look-up table.
[0066] Specifically, referring to Figure 2 and Figure 3 , the drive signals provided to the controllable switches can be complementary first drive signal and second drive signal. The first drive signal is sent to the first controllable switch S1 and the fourth controllable switch S4, and the second drive signal is sent to the second controllable switch S2 and the third controllable switch S3. Here, the complementarity of the first drive signal and the second drive signal can mean that when the first drive signal is at a high level, the second drive signal is at a low level, which can prevent the DC power supply U from short-circuiting. In the example, the examples of the first controllable switch S1, the second controllable switch S2, the third controllable switch S3, and the fourth controllable switch S4 can include, but are not limited to, IGBTs and MOS transistors (MOSFETs). In an embodiment of the present application, the voltage of the DC power supply U is adjustable.
[0067] Select a sample inductor L, and the inductance value of the sample inductor L is known. Connect the sample inductor L between the second ends of the first controllable switch S1 and the second controllable switch S2 (or between the second ends of the third controllable switch S3 and the fourth controllable switch S4). The drive signals input to these four controllable switches are first a long signal. For example, a high level is input to the first controllable switch S1 and the fourth controllable switch S4, then a low level is input to the second controllable switch S2 and the third controllable switch S3, and the signal length is the first duration. The first controllable switch S1 and the third controllable switch S3 are turned on, and the power supply voltage is applied across the sample inductor L to generate an inductor current bias, and its calculation formula can be shown as follows:
[0068]
[0069] where, I B is the inductor current bias, V DC is the voltage of the DC power supply U, L is the inductance value of the sample inductor L, and T1 is the signal length.
[0070] After that, a symmetric square wave signal with a 50% duty cycle is input to the controllable switches. Within one period (switching period) of the square wave signal, the first controllable switch S1, the fourth controllable switch S4, and the second controllable switch S2, the third controllable switch S3 are turned on for the same time. When the first controllable switch S1 and the fourth controllable switch S4 are turned on (at this time, the second controllable switch S2 and the third controllable switch S3 are turned off), the voltage applied across the sample inductor L is equal to the power supply voltage V of the DC power supply U, and the slope of the inductor current change is V DC / L. When the second controllable switch S2 and the third controllable switch S3 are turned on, the voltage applied across the sample inductor L is equal to the negative power supply voltage -V DC , and the slope of the inductor current change is -V DC / L. Since the first controllable switch S1, the fourth controllable switch S4 and the second controllable switch S2, the third controllable switch S3 have the same turn-on time, the net change in the inductor current during the entire switching period is 0. In one example, the signal length T1 can be greater than the switching period of the square wave signal.
[0071] The core loss can be calculated by collecting the voltage across the sample inductor L and the inductor current (for example, using a voltage collector and a current collector), multiplying the two and integrating over the switching period. The calculation formula is:
[0072]
[0073] where Q is the core loss, V L is the inductor voltage, I L is the inductor current, and T is the square wave signal period (switching period). Thus, a corresponding relationship of Q=(I B ,V DC ,1 / T) can be constructed.
[0074] Select sample inductors L with different inductance values, change the voltage of the DC power supply U, change the period of the square wave waveform, and perform various combinations of these three. Repeating the above method, multiple corresponding relationships of Q=(I B ,V DC ,1 / T) can be obtained, and a core loss look-up table can be constructed based on these corresponding relationships.
[0075] In practical applications, the method shown in Figure 1 can be used to estimate the inductor core loss of the switching converter. Examples of the switching converter can include an inverter, which can include an inductor. Figure 1 Schematically shows a schematic flowchart of a method for estimating the inductor core loss according to an embodiment of the present application. As Figure 1 shown, the estimation method can include the following steps.
[0076] Step S1: Obtain the duty cycle of each period of the PWM signal input to the switching converter;
[0077] Step S2: Obtain the modulation index of the switching converter;
[0078] Specifically, the duty cycle of each period of the PWM signal and the modulation index of the switching converter are customized by the designer according to the specific application scenario. Once the modulation waveform is determined, the duty cycle of each switching period of the PWM waveform is determined.
[0079] Step S3: For any period in the PWM signal, decompose the PWM waveform of this period into a symmetric first square wave waveform and a second square wave waveform, where the first period of the first square wave waveform and the second period of the second square wave waveform satisfy: T1 = 2DT, T 2 = 2(1 - D)T, T 1 is the first cycle length, T 2 is the second cycle length, D is the duty cycle, and T is the cycle length;
[0080] As Figure 4 shown, taking a switching cycle with a duty cycle of 0.6 as an example, the waveform of this switching cycle can be decomposed into two symmetric square - wave waveforms. The switching frequency of one waveform is 1 / 1.2Tsw, and the voltage is V DC , and the switching frequency of the other waveform is 1 / 0.8Tsw, and the voltage is V DC . Tsw is this switching cycle.
[0081] Step S4: Calculate the phase angle corresponding to the duty cycle of this cycle in the modulation wave according to the duty cycle and modulation index of this cycle;
[0082] The calculation of the DC bias current first requires calculating the phase corresponding to the duty cycle of this cycle (switching cycle) in the modulation waveform. The calculation formula is as follows:
[0083] If the carrier is a sine wave (sine function):
[0084] If the carrier is a cosine wave (cosine function):
[0085] Where, is this phase, and M is the inverter modulation index.
[0086] The output voltage of the inverter can be expressed as:
[0087] Vout = MV DC sinωt
[0088] Where, Vout is the output voltage of the inverter, and ω is the fundamental angular frequency of the PWM signal.
[0089] Step S5: Measure the impedance of the load of the switch - mode converter;
[0090] The output current of the inverter can be calculated according to the load:
[0091]
[0092] Where, Z is the load impedance.
[0093] Step S6: Determine the DC bias current of this cycle according to the modulation index, impedance, voltage amplitude, and phase angle;
[0094] Specifically, the DC bias current can be calculated according to the following formula:
[0095]
[0096] Step S7: Find the corresponding first core loss in the core loss look-up table according to the voltage amplitude, DC bias current, and the first period of the PWM signal, and find the corresponding second core loss in the core loss look-up table according to the voltage amplitude, DC bias current, and the second period of the PWM signal;
[0097] Step S8: Determine half of the sum of the first core loss and the second core loss as the core loss of this period;
[0098] Step S9: Sum the core losses of all periods in the PWM signal to obtain the total core loss of this PWM signal.
[0099] Specifically, taking the switching period with a duty cycle of 0.6 as an example, after calculating the DC bias current I B , the first core loss and the second core loss corresponding to Q 1 =(V DC , I B , 1 / 1.2T sw ) and Q 1 =(V DC , I B , 1 / 0.8T sw ) can be found in the core loss look-up table respectively. Since the actual switching period is composed of taking half of each of the two decomposed symmetric square waves, the core losses under the two symmetric square wave waveforms need to be added and then divided by 2 to obtain the core loss under the actual switching period. By analogy to all the switching periods in the entire PWM waveform, the total core loss under this PWM waveform can be obtained after adding them. The total core loss is expressed by the formula as follows:
[0100]
[0101] where Q 总 is the total core loss, n is the number of switching periods in the PWM waveform, and Q n is the sum of the first core loss and the second core loss of the nth switching period.
[0102] The embodiment of the present application also provides a processor configured to execute the method for estimating the inductance core loss in the above embodiment.
[0103] The embodiment of the present application also provides a machine-readable storage medium, on which instructions are stored, and the instructions are used to make the machine execute the method for estimating the inductance core loss in the above embodiment.
[0104] Through the above technical solution, the core loss under a symmetric square wave waveform at different DC current biases, voltages, and switching frequencies (periods) is obtained through offline testing, and a core loss lookup table regarding the DC current bias, voltage, and switching frequency is formed. By decomposing the actual PWM waveform into square wave components, the DC current bias, voltage, and switching frequency of each square wave component are confirmed, and the corresponding core loss is obtained from the lookup table. The core losses of each square wave component are added together to obtain the total estimated core loss of the inductor under the PWM waveform. This solution can well estimate the core loss of the inductor of the switching converter for the PWM waveform.
[0105] It should be noted that the term "including", "comprising", or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, commodity, or device including a series of elements not only includes those elements but also includes other elements not explicitly listed, or further includes elements inherent to such process, method, commodity, or device. Without more limitations, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, commodity, or device including the element.
[0106] The above are only embodiments of the present application and are not used to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the scope of the claims of the present application.
Claims
1. A method for estimating inductor core loss, characterized in that: Applied to a switching converter, the switching converter includes an inductor, and the estimation method includes: Obtaining the duty cycle of each cycle of the PWM signal input to the switching converter; Obtaining a modulation index of the switching converter; For any period of the PWM signal, decompose the PWM waveform of the period into a symmetrical first square wave waveform and a second square wave waveform, wherein the first period of the first square wave waveform and the second period of the second square wave waveform satisfy: T1=2DT, T2=2(1-D)T, T1 is the first period length, T2 is the second period length, D is the duty cycle, and T is the period length; Calculate the phase angle corresponding to the duty cycle of the cycle in the modulation wave according to the duty cycle of the cycle and the modulation index; measuring the impedance of a load of the switching converter; Determining a DC bias current of the cycle according to the modulation index, the impedance, the voltage amplitude, and the phase angle; Finding a corresponding first magnetic core loss in a magnetic core loss lookup table according to the voltage amplitude of the PWM signal, the DC bias current, and the first period, and finding a corresponding second magnetic core loss in a magnetic core loss lookup table according to the voltage amplitude of the PWM signal, the DC bias current, and the second period; Determine half of the sum of the first magnetic core loss and the second magnetic core loss as the magnetic core loss of the cycle; The core losses of all cycles in the PWM signal are summed to obtain the total core loss of the PWM signal.
2. The estimation method according to claim 1, characterized in that The core loss lookup table is obtained by the following steps: A test circuit is provided, the test circuit comprising a first controllable switch, a second controllable switch, a third controllable switch and a fourth controllable switch, wherein a first end of the first controllable switch is electrically connected to a second end of the second controllable switch, a first end of the third controllable switch is electrically connected to a first end of the fourth controllable switch, a second end of the first controllable switch is electrically connected to a second end of the third controllable switch, and a second end of the second controllable switch is electrically connected to a second end of the fourth controllable switch; Providing a DC power supply, wherein two ends of the DC power supply are electrically connected to the first end of the first controllable switch and the first end of the third controllable switch respectively; Providing a plurality of sample inductors, and electrically connecting two ends of a sample inductor to be tested among the plurality of sample inductors to the second end of the first controllable switch and the second end of the second controllable switch respectively, wherein the inductance values of the plurality of sample inductors are all known; Providing a driving signal to the control ends of the first controllable switch, the second controllable switch, the third controllable switch, and the fourth controllable switch, so that the first controllable switch and the fourth controllable switch are turned on while the second controllable switch and the third controllable switch are turned off, and the second controllable switch and the third controllable switch are turned on while the first controllable switch and the fourth controllable switch are turned off. The driving signal includes a first part and a second part, the first part turns on the first controllable switch and the fourth controllable switch for a first duration while the second controllable switch and the third controllable switch are turned off for the first duration, and the second part is a symmetrical square wave signal with a duty cycle of 50%; Calculating the integral of the quotient of the voltage of the DC power supply and the inductance value of the inductor of the sample to be tested within the first time period to obtain the DC bias current of the inductor of the sample to be tested; Measuring the inductor voltage and inductor current at both ends of the inductor of the sample to be tested; Calculating the integral of the product of the inductor voltage and the inductor current within a period of the square wave signal to obtain the magnetic core loss of the period; Construct the corresponding relationship between core loss and DC bias current, voltage and period; The inductance value of the sample inductor, the DC power supply voltage, and the period of the square wave signal are changed to construct the corresponding relationship between different core losses and DC bias current, voltage, and period; The obtained multiple corresponding relationships are used to form a core loss lookup table.
3. The estimation method according to claim 1, characterized in that The step of calculating the phase angle corresponding to the duty cycle of the cycle in the modulation wave according to the duty cycle of the cycle and the modulation index includes: If the carrier of the modulated wave is a sine wave, the phase angle is calculated according to formula (1): If the carrier of the modulated wave is a cosine wave, the phase angle is calculated according to formula (2): in, is the phase angle, D is the duty cycle, and M is the modulation index.
4. The estimation method according to claim 1, characterized in that: Determining the output voltage of the switching converter according to the voltage amplitude of the PWM signal and the fundamental angular frequency of the PWM signal includes calculating the output voltage according to formula (3): Vout=MV DC sinωt (3) Wherein, Vout is the output voltage, M is the modulation index, V DC is the voltage amplitude, and ω is the fundamental angular frequency.
5. The estimation method according to claim 4, characterized in that: Determining the output current of the switching converter according to the output voltage and the impedance includes calculating the output current according to formula (4): Among them, I OUT is the output current, and Z is the load impedance.
6. The estimation method according to claim 1, characterized in that: Determining the DC bias current of the cycle according to the modulation index, the impedance, the voltage amplitude and the phase angle includes calculating the DC bias current according to formula (5):
7. The estimation method according to claim 2, characterized in that: The first duration is greater than a period of the symmetrical square wave signal.
8. The estimation method according to claim 2, characterized in that: The first controllable switch, the second controllable switch, the third controllable switch and the fourth controllable switch include IGBTs or MOSFETs.
9. A processor, characterized in that: The method is configured to execute the method for estimating the inductor core loss according to any one of claims 1 to 8.
10. A machine-readable storage medium having instructions stored thereon, the instructions being used to enable a machine to execute the method for estimating inductor core loss according to any one of claims 1 to 8.
Citation Information
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