IAP online upgrading module and method

Abstract

The invention provides an IAP (Internet Application Protocol) online upgrading module and method, and the IAP online upgrading module comprises a DRAM (Dynamic Random Access Memory), a clock reset device and a FLASH controller, the DRAM is connected with the MCU and is used for executing cache processing on an upgrading program input by the MCU; the clock reset device is used for executing reset jump of the IAP system; the FLASH controller is connected with the MCU, the DRAM, the clock reset device and the FLASH and is used for executing an IAP operation process corresponding to an IAP operation instruction through interaction with the DRAM, the clock reset device and the FLASH according to the IAP operation instruction input by the MCU; the IAP running process comprises a program running process, a program upgrading process and a reset skipping process which are sequentially executed based on a preset execution sequence; according to the method, the IAP online program upgrading based on the hardware module is realized, the software development cost is reduced, the chip is ensured to complete the program switching operation in a safe state, the chip is prevented from entering an abnormal state, and the running stability of the chip is effectively improved.

Description

Technical Field

[0001] The present invention relates to the field of circuit control, and more particularly to an IAP online upgrade module and method. Background Art

[0002] The IAP online upgrade method has been widely used because the entire program upgrade process does not require the chip to be powered on and off again, nor does it require a dedicated programmer.

[0003] Specifically, the IAP online upgrade method usually divides the FLASH storage area inside the chip into a BootLoader area and an application program area; when an upgrade and update of the application program needs to be performed, new program data is written from the serial port; when the chip detects the update, it automatically runs the program in the BootLoader area to receive the serial port data, and based on the received upgrade program data, updates the application program stored in the application program area; however, the existing IAP online upgrade methods are often implemented by software compilation, the software design process is relatively complex, and the professional requirements for software designers are relatively high; when the design is inappropriate, it is easy to cause conflicts between the BootLoader program and the application program; and when implementing IAP by software, the switching between the BootLoader program and the application program is achieved by software forced jump, and the forced jump easily causes the chip to enter an abnormal state; in addition, when implementing IAP by software, it may cause misoperations on the BootLoader area. Once the BootLoader program is rewritten, the chip must be sent back to the factory for repair, resulting in cost waste.

[0004] Therefore, how to implement IAP online upgrade based on a hardware module has become a technical problem to be solved in this field. Summary of the Invention

[0005] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide an IAP online upgrade module and method, which are used to solve the problems that the existing IAP online upgrade method is implemented by a software program, its design process is relatively complex and not easy to implement, and it is easy to cause the chip to enter an abnormal state during execution.

[0006] To achieve the above object and other related objects, the present invention first provides an IAP online upgrade module, which is connected to an MCU and a FLASH to form an IAP system; wherein, the FLASH stores a BootLoader program, an application program, IAP identification information, and storage feature information; the storage feature information is information for characterizing the storage information of the BootLoader area in the FLASH, the storage information of the application program area, and the program startup method.

[0007] The IAP online upgrade module includes:

[0008] A DRAM, connected to the MCU, for performing cache processing on the upgrade program input by the MCU;

[0009] A clock resetter, used for performing the reset jump of the IAP system;

[0010] A FLASH controller, connected to the MCU, DRAM, clock resetter and FLASH, for executing the IAP running process corresponding to the IAP running instruction according to the IAP running instruction input by the MCU through interacting with the DRAM, clock resetter and FLASH; wherein, the IAP running process includes a program running process, a program upgrade process and a reset jump process; each process is executed in sequence based on a preset execution order.

[0011] In an embodiment of the present invention, the program running process includes:

[0012] In response to a program start instruction, the FLASH controller reads the stored feature information in the FLASH, and causes the MCU to execute the program corresponding to the stored feature information;

[0013] The program upgrade process includes:

[0014] In response to a program upgrade instruction, the FLASH controller controls the DRAM to cache the upgrade program, and the FLASH controller respectively interacts with the DRAM and the FLASH to store the upgrade program into the FLASH;

[0015] And, the reset jump process includes:

[0016] In response to a reset jump instruction, the FLASH controller controls the clock resetter to execute the jump between the BootLoader program and the application program.

[0017] In an embodiment of the present invention, the program running process includes:

[0018] Obtain the program start mode and obtain the jump offset;

[0019] When the program start mode is the BootLoader program start, the FLASH controller obtains the starting address of the BootLoader area according to the jump offset, and causes the MCU to read and execute the BootLoader program corresponding to the starting address; or, when the program start mode is the application program start, based on the jump offset, obtain the program running address of the application program area, and cause the MCU to read and execute the application program corresponding to the program running address.

[0020] In an embodiment of the present invention, when the program startup mode is the startup of the BootLoader program, after the MCU reads and executes the BootLoader program, the program running process further includes: controlling the clock resetter to perform a reset jump to jump to execute the application program.

[0021] In an embodiment of the present invention, the program running process further includes: obtaining the size of the BootLoader area in the storage feature information to obtain the jump offset based on the size of the BootLoader area, and locking the corresponding BootLoader area in the FLASH.

[0022] In an embodiment of the present invention, the program upgrade process includes:

[0023] Outputting cache instructions to the DRAM to cause the DRAM to cache the upgrade program according to the cache instructions; and, determining the register address corresponding to the upgrade program according to the storage feature information; and transmitting the upgrade program cached in the DRAM to the FLASH for storage according to the register address.

[0024] In an embodiment of the present invention, when the program executed before the program upgrade process is the application program, the FLASH controller controls the clock resetter to perform a reset jump to jump to execute the BootLoader program, and while executing the BootLoader program, execute the program upgrade process.

[0025] In an embodiment of the present invention, the program upgrade process further includes:

[0026] After the upgrade program is stored in the FLASH, performing verification on the stored upgrade program; if the verification passes, resetting the program upgrade instruction; if the verification fails, re-executing the program upgrade process

[0027] In an embodiment of the present invention, the caching process of the upgrade program includes:

[0028] Grouping the upgrade program to obtain sub-data of each group of upgrade programs

[0029] Caching the sub-data of a single group of upgrade programs in the FLASH mapping area of the DRAM;

[0030] Causing the MCU to configure the register address in the FLASH, obtaining the register address corresponding to the current group of upgrade program sub-data; using the area in the FLASH corresponding to the register address as the operation area;

[0031] Write the group of upgrade program sub-data in the DRAM buffer into the operation area;

[0032] Re-execute the caching and writing process for the next group of sub-data of the current group of upgrade program sub-data until exiting.

[0033] In an embodiment of the present invention, the reset jump process includes:

[0034] Obtain the jump target address and the reset jump instruction output by the MCU;

[0035] In response to the reset jump instruction, generate a reset instruction and a jump offset;

[0036] Send the reset instruction to the clock resetter to cause the clock resetter to perform a system reset;

[0037] After reset, add the jump offset to the jump target address to obtain the program running address, so that the MCU reads the program corresponding to the program running address in the FLASH based on this program running address and executes the program

[0038] In an embodiment of the present invention, the FLASH controller includes: a register address module, a storage feature module, a main control module, and a timing module; wherein, the register address module is connected to the MCU and the main control module and is used to store the register address information sent by the MCU; the storage feature module is connected to the MCU, the main control module, and the FLASH and is used to read and analyze the internal storage feature information of the FLASH to obtain an analysis result; the timing module is connected to the main control module, the MCU, and the FLASH and is used to obtain the corresponding program running address according to the jump offset output by the main control module and the jump target address output by the MCU; the main control module includes a first connection end to a fifth connection end, the first connection end is connected to the register address module and is used to obtain the register address information sent by the register address module; the second connection end is connected to the storage feature module and is used to obtain the analysis information of the storage feature information; the third end is connected to the timing module and is used to output the jump offset to the timing module; the fourth connection end is connected to the clock resetter and is used to send a reset instruction to the clock resetter; the fifth connection end is connected to the DRAM and is used to send the cache instruction to the DRAM and read the upgrade program cached in the DRAM; and, the sixth connection end is connected to the FLASH to store the read upgrade program in the FLASH.

[0039] The present application also provides an IAP online upgrade method, which executes the IAP running process based on the IAP online upgrade module described in any one of the above; the method includes:

[0040] Obtain the storage feature information in the FLASH; based on the storage feature information, start the program running process corresponding to the storage feature information; during the execution of the program running process, monitor the program upgrade instruction, and when the program upgrade instruction is detected, use the DRAM to cache the upgrade program, and perform the program upgrade process by interacting with the DRAM and the FLASH based on the FLASH controller, so as to store the upgrade program in the FLASH.

[0041] As described above, the IAP online upgrade module and method provided by the present invention construct an IAP online upgrade module by setting the connection relationship between the DRAM, the clock resetter and the FLASH controller; and utilize the interaction between the FLASH controller in the IAP online upgrade module, the DRAM, the clock resetter, the MCU and the FLASH to realize the IAP online program upgrade based on the hardware module, simplify the development process of the IAP upgrade function, and reduce the software development cost; and the present application adopts a software and hardware collaborative operation method to realize the jump, so that the chip completes the program switching operation in the two regions in a safe state, prevents the chip from entering an abnormal state, and effectively improves the stability of the chip operation. Description of the Drawings

[0042] Figure 1 It shows a schematic diagram of an application scenario of the IAP online upgrade module provided by the present application in an embodiment;

[0043] Figure 2 It shows a schematic diagram of the structure of the IAP online upgrade module provided by the present application in an embodiment;

[0044] Figure 3 It shows a timing relationship diagram of each sub-process during the reset jump process described in the present application;

[0045] Figure 4 It shows a schematic diagram of the structure of the FLASH controller described in the present application in an embodiment;

[0046] Figure 5 It shows a schematic flowchart of the IAP online upgrade method provided by the present application in an embodiment;

[0047] Figure 6 It shows a schematic flowchart of the IAP running process (when the program startup mode is the BootLoader program startup) described in the present application;

[0048] Figure 7 It is a schematic flow chart showing the IAP operation process described in this application (when the program startup method is application startup). Detailed implementation manners

[0049] The following uses specific specific examples to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, without conflict, the following embodiments and the features in the embodiments can be combined with each other.

[0050] It should be noted that in the following description, reference is made to the accompanying drawings, which describe several embodiments of the present application. It should be understood that other embodiments can also be used, and mechanical composition, structure, electrical, and operational changes can be made without departing from the spirit and scope of the present application. The following detailed description should not be considered restrictive, and the scope of the embodiments of the present application is only defined by the claims of the published patent. The terms used herein are only for describing specific embodiments and are not intended to limit the present application.

[0051] Also, as used in this application, the singular forms "a", "an", and "the" are also intended to include the plural forms unless the context indicates otherwise. It should be further understood that the terms "comprising", "including" indicate the presence of the described features, operations, elements, components, items, types, and / or groups, but do not exclude the presence, occurrence, or addition of one or more other features, operations, elements, components, items, types, and / or groups. The terms "or" and "and / or" used herein are interpreted as inclusive, or meaning any one or any combination. Thus, "A, B, or C" or "A, B, and / or C" means "any one of the following: A; B; C; A and B; A and C; B and C; A, B, and C". An exception to this definition will occur only when the combination of elements, functions, or operations is inherently mutually exclusive in some way.

[0052] In order to make the purpose, technical solution, and advantages of the present invention clearer, through the following embodiments and in combination with the accompanying drawings, a further detailed description of the technical solutions in the embodiments of the present invention is provided. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the invention.

[0053] To facilitate the understanding of the technical solution of this application, before a detailed description of this application, the nouns and terms involved in the embodiments of this application are explained as follows:

[0054] IAP: During the process of running the user's application program, a part of the FLASH area is programmed so that after the product is released, the firmware program in the product can be upgraded through the reserved communication port. This is the implementation method of the upgrade.

[0055] BootLoader: A program segment that runs before the operating system kernel to complete tasks such as initializing the system hardware settings, bringing the software and hardware environment of the system to a suitable state.

[0056] To solve the problem that the existing IAP implementation method is software-based and prone to program conflicts when the software design is unreasonable, which may lead to abnormal operation of the chip, etc., this application provides an IAP online upgrade module and an IAP online upgrade method to implement IAP online upgrade based on hardware functional components.

[0057] Please refer to Figure 1 , which shows a schematic diagram of the application scenario of the IAP online upgrade module provided by this application in an embodiment; as Figure 1 shown, the IAP online upgrade module is connected to the MCU and the FLASH to form an IAP system for realizing program upgrade; the IAP online upgrade module interacts with the FLASH according to the IAP operation instruction transmitted by the MCU, and stores the upgrade program transmitted by the MCU into the FLASH to realize the online program upgrade of IAP.

[0058] Among them, the inside of the FLASH is provided with: a BootLoader area, an application program area, an IAP identification area, and a storage feature area, which are used to store the BootLoader program, the application program, the IAP identification information, and the storage feature information respectively;

[0059] Specifically, the storage feature information is TRIM / CONFIG information, including:

[0060] The size of the BootLoader area, the size of the application program area, and the program startup method in the FLASH; among them, the program startup method includes starting with the BootLoader program or starting with the application program; that is, after the chip is powered on, the area in the FLASH that is read first is the BootLoader area or the application program area.

[0061] In this embodiment, the IAP operation instruction includes a program startup instruction, a program upgrade instruction, and a reset jump instruction.

[0062] Specifically, the program startup instruction is an instruction to start and execute the BootLoader program or the application program after the chip is powered on;

[0063] The program upgrade instruction is an instruction to store the input upgrade program into the FLASH;

[0064] The reset jump instruction is an instruction used to interrupt the currently executing BootLoader program to jump to execute the application program, or to interrupt the currently executing application program to jump to execute the BootLoader program.

[0065] Please refer to Figure 2 , which shows a schematic structural diagram of the IAP online upgrade module provided by the present application in a specific embodiment. As Figure 2 shown, the IAP online upgrade module includes:

[0066] DRAM, a clock resetter, and a FLASH controller;

[0067] Among them, the MCU is connected to the FLASH and is used to execute the program stored in the FLASH;

[0068] The DRAM is connected to the FLASH controller and the MCU, and is used to perform cache processing on the upgrade program input by the MCU according to the cache instruction transmitted by the FLASH controller;

[0069] The clock resetter is connected to the FLASH controller and is used to perform a reset jump of the entire IAP system according to the reset instruction output by the FLASH controller;

[0070] The FLASH controller is connected to the MCU, DRAM, clock resetter, and FLASH, and is used to interact with the DRAM, clock resetter, and FLASH respectively according to the IAP operation instruction input by the MCU to execute the IAP operation process corresponding to the IAP operation instruction;

[0071] Among them, the IAP operation process includes a program operation process, a program upgrade process, and a reset jump process; each process is executed in sequence based on a preset execution order.

[0072] In this embodiment, the program operation process includes:

[0073] In response to the program start instruction, the FLASH controller reads the stored feature information in the FLASH and causes the MCU to execute the program corresponding to the stored feature information;

[0074] The program upgrade process includes:

[0075] In response to the program upgrade instruction, the FLASH controller controls the DRAM to cache the upgrade program, and the FLASH controller stores the upgrade program in the FLASH by interacting with the DRAM and the FLASH respectively;

[0076] The reset jump process includes:

[0077] In response to the reset jump instruction, the FLASH controller controls the clock resetter to perform a jump between the BootLoader program and the application program.

[0078] In a specific embodiment, the execution manner of the program running process includes:

[0079] Obtain the program startup mode in the stored feature information and obtain the jump offset; wherein, the jump offset is the program offset determined according to the size of the BootLoader area;

[0080] When the program startup mode is the BootLoader program startup, the FLASH controller obtains the starting address of the BootLoader area according to the jump offset; the FLASH controller enables the MCU to read the corresponding BootLoader program according to this starting address and execute the BootLoader program.

[0081] When the program startup mode is the application program startup, the FLASH controller obtains the program running address of the application program area according to the jump offset; the FLASH controller enables the MCU to read the corresponding application program according to this program running address and execute the application program.

[0082] It should be noted that when the program startup mode is the BootLoader program startup, after the BootLoader program is executed, the FLASH controller enables the clock resetter to perform a reset jump to jump to the application program area and execute the application program.

[0083] Optionally, the execution manner of the program running process further includes:

[0084] The FLASH controller reads the stored feature information and obtains the size of the BootLoader area and the size of the application program area in the stored feature information; based on the size of the BootLoader area, lock the corresponding BootLoader area, that is, the BootLoader program cannot be erased and written; and, the FLASH controller obtains the jump offset based on the size of the BootLoader area.

[0085] In an optional embodiment, the execution manner of the program upgrade process includes:

[0086] The MCU outputs a program upgrade instruction to the FLASH controller; the FLASH controller reads the stored feature information in the FLASH according to the program upgrade instruction, and outputs a cache instruction to the DRAM, so that the DRAM receives the upgrade program transmitted by the MCU according to this cache instruction and caches the upgrade program; and, the FLASH controller determines the register address corresponding to the upgrade program according to the stored feature information, and transmits the upgrade program cached in the DRAM to the FLASH for storage according to this register address.

[0087] It should be noted that when the program executed before the program upgrade process is an application program, the program upgrade process further includes: the FLASH controller performs a reset jump to jump to the BootLoader area and execute the BootLoader program; and while executing the BootLoader program, execute the program upgrade process.

[0088] In a specific embodiment, the program upgrade instruction contains IAP identification information. After the FLASH controller receives the program upgrade instruction, it obtains the IAP identification information in the program upgrade instruction; detects whether the IAP identification information is an upgrade identification. When it detects that the IAP identification information is an upgrade identification, it generates a cache instruction and sends the cache instruction to the DRAM.

[0089] Further, after storing the upgrade program in the FLASH, when the program upgrade process is executed, it further includes:

[0090] The FLASH controller performs a check on the stored upgrade program; when the check passes, the IAP identification information is reset, that is, the IAP identification information is set to a non-upgrade identification; when the check fails, the IAP identification information is continued to be retained to re-execute the program upgrade process.

[0091] In a specific embodiment, the process of transmitting the upgrade program cached in the DRAM to the FLASH for storage includes:

[0092] The upgrade program is divided into several groups of upgrade program sub-data, and each group of the upgrade program sub-data is respectively cached in the FLASH mapping area of the DRAM;

[0093] Among them, the FLASH mapping area is a pre-defined area in the DRAM for realizing data mapping between the DRAM and the FLASH; the size of the FLASH mapping area is not less than the data size of a single group of the upgrade program sub-data.

[0094] For a single set of the upgrade program sub-data, the execution includes:

[0095] Cache the current set of upgrade program sub-data into the FLASH mapping area of the DRAM;

[0096] The MCU configures the register address in the FLASH as the register address corresponding to this set of upgrade program sub-data; the MCU sends a write instruction to the FLASH controller; after sending, the MCU enters the idle mode;

[0097] After receiving the write instruction, the FLASH controller extracts the register address therein; takes the area in the FLASH corresponding to this register address as the operation area, erases the operation area, and writes the upgrade program data of this set in the DRAM buffer area into the operation area one by one;

[0098] For each set of the upgrade program sub-data, the above process is executed until the upgrade program transmission is completed.

[0099] In an optional embodiment, the reset jump process includes:

[0100] The MCU outputs the jump target address and the reset jump instruction to the FLASH controller; wherein, the jump target address is the preset original program address.

[0101] After receiving the reset jump instruction, the FLASH controller generates a reset instruction and a jump offset; sends the reset instruction to the clock resetter to make the clock resetter perform a system reset, that is, to make the entire IAP system return to the reset state.

[0102] After the reset, the FLASH controller adds the current jump target address and the jump offset to obtain the current program running address; based on the current program running address, reads the program corresponding to this program running address in the FLASH and executes the program.

[0103] To more clearly show the timing relationship of each sub-process in the reset jump process; please refer to Figure 3 , which shows the timing relationship diagram of each sub-process in the reset jump process.

[0104] As Figure 3As shown, after setting the jump target address iap_addr_reg, the FLASH controller sends a reset instruction iap_rst to the clock resetter; after receiving the reset instruction iap_rst, the clock resetter starts the reset iap_rstn, and at the same time, feeds back the reset identification signal iap_rst_rsy of the started reset to the FLASH controller; and after receiving the reset identification signal iap_rst_rsy, the FLASH controller loads the current jump target address AA into the jump offset progaddr_offset to obtain a new FLASH running address AD, that is, 00 + AA. After the reset is completed, the MCU restarts running the program based on the new FLASH running address AD, and the jump is completed.

[0105] It should be noted that during the IAP operation, when the clock resetter performs a system reset, the FLASH controller is not affected by this system reset.

[0106] In some optional embodiments, the FLASH controller is as Figure 4 shown, and includes: a register address module, a storage feature module, a main control module, and a timing module;

[0107] Among them, the register address module is connected to the MCU and the main control module, and is used to store the register address information sent by the MCU and send the register address information to the main control module;

[0108] The storage feature module is connected to the MCU, the main control module, and the FLASH, and is used to read and analyze the storage feature information inside the FLASH according to the instructions sent by the MCU, and send the analysis result to the main control module;

[0109] The timing module is connected to the main control module, the MCU, and the FLASH, and is used to obtain the corresponding program running address according to the jump offset output by the main control module and the jump target address output by the MCU, and send the program running address to the FLASH;

[0110] The main control module includes a first connection end to a fifth connection end;

[0111] Among them, the first connection end is connected to the register address module and is used to obtain the register address information sent by the register address module;

[0112] The second connection end is connected to the storage feature module and is used to obtain the analysis information of the storage feature information;

[0113] The third end is connected to the timing module and is used to output the jump offset to the FLASH;

[0114] The fourth connection terminal is connected to the DRAM and is used to interact with the DRAM, including sending the cache instruction to the DRAM and reading the upgraded program cached in the DRAM.

[0115] In addition, the fifth connection terminal is connected to the clock resetter and is used to send a reset instruction to the clock resetter.

[0116] In a specific embodiment, the timing module includes an adder calculator, which is used to add the jump offset output by the main control module to the jump target address output by the MCU, and use the added result as the program running address.

[0117] To solve the technical problems existing in the prior art, the present application also provides an IAP online upgrade method, which executes the IAP running process of online upgrade based on the IAP online upgrade module provided in the above embodiment.

[0118] Please refer to Figure 5 , which shows a schematic flow chart of the IAP online upgrade method provided by the present application in an embodiment; as Figure 5 shown, the method includes the following steps:

[0119] S301, in response to the power-on startup instruction, obtain the storage feature information in the FLASH;

[0120] Among them, the storage feature information is information used to characterize the storage situation of each area in the FLASH and the program startup method; the program startup method is the area in the FLASH that is first read after the chip is powered on.

[0121] In a specific embodiment, the storage feature information is the TRIM / CONFIG information of the FLASH, which includes the size of the BootLoader area, the size of the application program area, and the program startup method in the FLASH.

[0122] S302, based on the storage feature information, start the program running process corresponding to the storage feature information;

[0123] Specifically, when the program startup method is the BootLoader program startup, the FLASH controller automatically sets the starting address of the BootLoader area as the current program running address; the FLASH controller reads the corresponding BootLoader program according to this starting address and starts to execute the BootLoader program;

[0124] When the program startup mode is the startup of the application program, the FLASH controller obtains the program running address of the application program according to the jump offset; the FLASH controller reads the corresponding application program according to this program running address and starts to execute the application program.

[0125] S303. During the execution of the program running process, monitor the program upgrade instruction. When the program upgrade instruction is detected, use DRAM to cache the upgrade program, and through the interaction with DRAM and FLASH, execute the program upgrade process to store the upgrade program into FLASH.

[0126] Specifically, during the execution of the BootLoader program, monitor whether the program upgrade instruction is input. If so, execute the program upgrade process. If not, continue to execute the BootLoader program process until a reset jump occurs, that is, jump to the application program area and execute the application program.

[0127] During the execution of the application program, monitor whether the program upgrade instruction is input. If so, jump to execute the BootLoader program, and while executing the BootLoader program, execute the program upgrade process. After the program upgrade is completed, jump to execute the application program. If not, continue to execute the application program until an interruption occurs.

[0128] In this embodiment, the implementation manner of the program upgrade process is the same as that in the above embodiment, and the implementation manner of the reset jump process is the same as that in the above embodiment, which will not be elaborated here.

[0129] In a specific implementation manner, when the program startup mode is the startup of the BootLoader program, the specific implementation process of the IAP operation is as Figure 6 shown and includes the following steps:

[0130] S501. Execute the BootLoader program and detect the IAP flag bit at the same time; if the IAP flag bit is detected as the upgrade flag, then execute S502, otherwise execute S505;

[0131] S502. Cache the upgrade program into DRAM, and transfer the upgrade program to FLASH for storage by configuring the register address in FLASH;

[0132] S503. Read back the upgrade program and verify the upgrade program; after the verification passes, clear the IAP flag bit;

[0133] S504. Execute the reset jump process to jump to and execute the application program;

[0134] S505. During the execution of the application program, monitor for IAP upgrade instructions. When an IAP upgrade instruction is detected, set the IAP flag bit to the upgrade flag and execute the reset jump process to jump to and execute the BootLoader program;

[0135] Wherein, the IAP upgrade instruction is an instruction for upgrading the application program to execute.

[0136] In a specific embodiment, the monitoring of the IAP upgrade instruction includes:

[0137] The FLASH controller monitors whether an IAP request is input. If so, it detects whether the application program processes the IAP request.

[0138] If so, it indicates that the IAP upgrade instruction is detected; if not, it indicates that the IAP upgrade instruction is not detected.

[0139] S506. Return to execute step S501.

[0140] In a specific embodiment, when the program startup mode is startup from the application program area, the specific implementation process of the IAP running process is as Figure 7 shown and includes the following steps:

[0141] S601. While executing the application program, monitor for IAP upgrade instructions. When an IAP upgrade instruction is detected, set the IAP flag bit to the upgrade flag and execute the reset jump process to jump to and execute the BootLoader program;

[0142] S602. While executing the BootLoader program, cache the upgrade program in the DRAM and transfer the upgrade program to be stored in the FLASH by configuring the register address in the FLASH;

[0143] S603. Read back the upgrade program and verify the upgrade program. After the verification passes, clear the IAP flag bit;

[0144] S604. Execute the reset jump process to jump to and execute the application program;

[0145] S605. Return to execute S601.

[0146] In summary, for the IAP online upgrade module and method provided by the present application, an IAP online upgrade module is constructed by setting the connection relationships among the DRAM, the clock resetter, and the FLASH controller; and by means of the interaction among the FLASH controller, the DRAM, the clock resetter, the MCU, and the FLASH in the IAP online upgrade module, the IAP online program upgrade based on the hardware module is realized, the development process of the IAP upgrade function is simplified, and the software development cost is reduced; and the present application realizes the jump by means of the software and hardware collaborative operation, so that the chip completes the switching operation of the programs in the two regions in the safe state, preventing the chip from entering an abnormal state, effectively improving the stability of the chip operation; and the IAP online upgrade module and method provided by the present application can be compatible with the software implementation mode at the same time, support multiple IAP operation schemes, and improve the scalability and flexibility of the IAP online upgrade method.

[0147] The above embodiments are only illustrative of the principles and effects of the present invention, rather than limiting the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes completed by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. An IAP online upgrade module, characterized in that it is connected to the MCU and the FLASH to form an IAP system; wherein, the BootLoader program, the application program, the IAP identification information, and the storage feature information are stored in the FLASH; the storage feature information is information used to characterize the storage information of the BootLoader area, the storage information of the application program area, and the program startup method in the FLASH; the IAP online upgrade module includes: a DRAM, which is connected to the MCU and used to perform cache processing on the upgrade program input by the MCU; a clock resetter, which is used to perform the reset jump of the IAP system; a FLASH controller, which is connected to the MCU, the DRAM, the clock resetter, and the FLASH, and is used to execute the IAP operation process corresponding to the IAP operation instruction according to the IAP operation instruction input by the MCU through interacting with the DRAM, the clock resetter, and the FLASH; wherein, the IAP operation process includes a program operation process, a program upgrade process, and a reset jump process; each process is executed in sequence based on a preset execution order.

2. The IAP online upgrade module according to claim 1, characterized in that the program operation process includes: in response to a program startup instruction, the FLASH controller reads the storage feature information in the FLASH and causes the MCU to execute the program corresponding to the storage feature information; the program upgrade process includes: in response to a program upgrade instruction, the FLASH controller controls the DRAM to cache the upgrade program, and the FLASH controller interacts with the DRAM and the FLASH respectively to store the upgrade program in the FLASH; and, the reset jump process includes: in response to a reset jump instruction, the FLASH controller controls the clock resetter to perform the jump between the BootLoader program and the application program.

3. The IAP online upgrade module according to claim 1 or 2, characterized in that the program operation process includes: obtaining the program startup method and obtaining the jump offset; when the program startup method is to start the BootLoader program, the FLASH controller obtains the starting address of the BootLoader area according to the jump offset, and causes the MCU to read and execute the BootLoader program corresponding to the starting address; or, when the program startup method is to start the application program, based on the jump offset, obtain the program operation address of the application program area, and cause the MCU to read and execute the application program corresponding to the program operation address.

4. The IAP online upgrade module according to claim 3, characterized in that When the program startup mode is the startup of the BootLoader program, after the MCU reads and executes the BootLoader program, the program running process further includes: controlling the clock resetter to perform a reset jump to jump to execute the application program.

5. The IAP online upgrade module according to claim 3, wherein, the program running process further includes: obtaining the size of the BootLoader area in the storage feature information, obtaining the jump offset based on the size of the BootLoader area, and locking the corresponding BootLoader area in the FLASH.

6. The IAP online upgrade module according to claim 1 or 2, wherein, the program upgrade process includes: outputting a cache instruction to the DRAM to enable the DRAM to cache the upgrade program according to the cache instruction; and, determining the register address corresponding to the upgrade program according to the storage feature information; and transmitting the upgrade program cached in the DRAM to the FLASH for storage according to the register address.

7. The IAP online upgrade module according to claim 6, wherein, when the program executed before the program upgrade process is an application program, the FLASH controller controls the clock resetter to perform a reset jump to jump to execute the BootLoader program, and while executing the BootLoader program, execute the program upgrade process.

8. The IAP online upgrade module according to claim 6, wherein, the program upgrade process further includes: after the upgrade program is stored in the FLASH, performing a check on the stored upgrade program; if the check passes, resetting the program upgrade instruction; if the check fails, re-executing the program upgrade process.

9. The IAP online upgrade module according to claim 6, wherein, the caching process of the upgrade program includes: grouping the upgrade program to obtain each group of upgrade program sub-data caching a single group of upgrade program sub-data into the FLASH mapping area of the DRAM; enabling the MCU to configure the register address in the FLASH, obtaining the register address corresponding to the current group of upgrade program sub-data; using the area in the FLASH corresponding to the register address as the operation area; writing the sub-data of this group of upgrade program data in the DRAM buffer into the operation area; re-executing the caching and writing process for the next group of sub-data of the current group of upgrade program sub-data until exiting.

10. The IAP online upgrade module according to claim 6, wherein, the reset jump process includes: obtaining the jump target address and the reset jump instruction output by the MCU; responding to the reset jump instruction, generating a reset instruction and a jump offset; sending the reset instruction to the clock resetter to enable the clock resetter to perform a system reset; After reset, add the jump target address to the jump offset to obtain the program running address, so that the MCU reads the program corresponding to the program running address in the FLASH based on this program running address and executes the program.

11. The IAP online upgrade module according to claim 10, characterized in that the FLASH controller includes: a register address module, a storage feature module, a main control module, and a timing module; wherein, the register address module is connected to the MCU and the main control module, and is used to store the register address information sent by the MCU; the storage feature module is connected to the MCU, the main control module, and the FLASH, and is used to read and analyze the storage feature information inside the FLASH to obtain an analysis result; the timing module is connected to the main control module, the MCU, and the FLASH, and is used to obtain the corresponding program running address according to the jump offset output by the main control module and the jump target address output by the MCU; the main control module includes a first connection end to a fifth connection end. The first connection end is connected to the register address module and is used to obtain the register address information sent by the register address module; the second connection end is connected to the storage feature module and is used to obtain the analysis information of the storage feature information; the third end is connected to the timing module and is used to output the jump offset to the timing module; the fourth connection end is connected to the clock resetter and is used to send a reset instruction to the clock resetter; the fifth connection end is connected to the DRAM and is used to send the cache instruction to the DRAM and read the upgraded program cached in the DRAM; and, the sixth connection end is connected to the FLASH to store the read upgraded program into the FLASH.

12. An IAP online upgrade method, characterized in that based on the IAP online upgrade module according to any one of claims 1 to 11 above, execute the IAP running process; the method includes: obtain the storage feature information in the FLASH; Based on the storage feature information, start the program running process corresponding to the storage feature information; during the execution of the program running process, monitor the program upgrade instruction. When the program upgrade instruction is detected, use the DRAM to cache the upgrade program, and based on the interaction between the FLASH controller and the DRAM and the FLASH, execute the program upgrade process to store the upgrade program into the FLASH.

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