Design Method and Implementation Circuit of Discrete Local Active Memristor
Through the design method and implementation circuit of discrete local active memristors, the problem of poor adaptability of continuous models in pulse timing coding and digital systems is solved, and a high reliability and accuracy memristor is realized, which is suitable for neuromorphic computing and chaotic encryption and other fields.
Patent Information
- Application Number
- CN202510533812.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-27
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2045-04-27
AI Technical Summary
In the existing memristor research, it is difficult for continuous models to accurately characterize the discrete activation characteristics of pulse timing encoding, and the digital system has poor adaptability, resulting in poor reliability and accuracy, and the immature material preparation process leads to insufficient stability.
The design method of discrete local active memristors is adopted, including determining the discrete iterative computing model and modular framework, selecting nonlinear function modules through sine functions and cosine functions, designing discrete local active memristors, and implementing hardware through analog and digital implementation circuits.
It realizes discrete local active memristor with good reliability, accuracy and adaptability, and is suitable for neuromorphic computing and chaotic encryption. Analog circuits have the characteristics of high real-time and low latency, and digital circuits have the characteristics of strong anti-interference ability and high flexibility.
Smart Images
Figure CN120046555B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of electronic circuit design, and particularly relates to a design method and implementation circuit of a discrete locally active memristor. Background Art
[0002] As the fourth basic circuit element following resistors, capacitors, and inductors, memristors have shown great potential in the fields of neuromorphic computing, chaotic encryption, etc. due to their unique synapse-like characteristics and non-linear dynamics characteristics.
[0003] At the present stage, the research on memristors mostly focuses on continuous models. However, such continuous models have two key limitations: 1) The essential contradiction between the continuous model and biological discrete dynamics: The action potential firing of biological neurons is driven by discrete events (such as the gating mechanism of ion channels), and the continuous model is difficult to accurately describe the discrete activation characteristics required for pulse timing coding; 2) Poor adaptability to digital systems: When the continuous model is implemented on digital hardware such as microcontrollers (MCUs), field-programmable gate arrays (FPGAs), etc., discretization approximation is required, and the process of discretization approximation is prone to cumulative quantization errors and distortion of dynamic characteristics. Therefore, the reliability and accuracy of existing continuous model memristors are relatively poor.
[0004] In addition, due to the immature material preparation process, existing memristive devices generally have the defect of insufficient stability; therefore, the technical solution based on the circuit equivalent model has become the mainstream solution for the current implementation of memristors. At present, this type of solution is mainly divided into two implementation methods: analog circuits and digital circuits; however, no matter which circuit implementation method is used, the existing solutions cannot effectively solve the contradictions between the continuous model and biological discrete dynamics and digital system compatibility. Summary of the Invention
[0005] One object of the present invention is to provide a design method of a discrete locally active memristor with high reliability, good accuracy, and good adaptability.
[0006] Another object of the present invention is to provide an implementation circuit of a discrete locally active memristor.
[0007] The design method of the discrete locally active memristor provided by the present invention includes the following steps:
[0008] S1. Based on the input voltage, input current, and state variable of the discrete locally active memristor in the DC state, determine the discretized iterative operation model of the discrete locally active memristor;
[0009] S2. According to the discretized iterative operation model determined in step S1, determine the modular framework of the discrete locally active memristor including a non-linear function module;
[0010] S3. Based on the modular framework determined in step S2, select the non-linear function module based on the sine function and cosine function to complete the design of the discrete local active memristor.
[0011] The specific steps of the said step S1 include the following steps:
[0012] The discretized iterative operation form of the discrete local active memristor is expressed as: In the formula is the input voltage at under the DC state; is the output current at under the DC state; is the state variable at under the DC state; is the memductance function; is the non-linear modulation function; is the scaling factor.
[0013] The specific steps of the said step S2 include the following steps:
[0014] The modular framework of the discrete local active memristor includes:
[0015] Implement the iteration of the state variable through the forward difference algorithm;
[0016] The first non-linear function module is used to implement the memductance function of the discrete local active memristor, and the second non-linear function module is used to implement the non-linear modulation function of the discrete local active memristor;
[0017] Use the multiplier module to implement the product of the memductance function of the discrete local active memristor and the input voltage;
[0018] Implement the addition operation through the accumulator module.
[0019] The said step S3 includes the following steps:
[0020] According to the modular framework determined in step S2, select the sine function and cosine function as the non-linear function module to complete the design of the discrete local active memristor.
[0021] The specific steps of the said step S3 include the following steps:
[0022] There are 4 types of the designed discrete local active memristors: Type discrete local active memristor, expressed as: ;
[0023] Type discrete locally active memristor, expressed as: ;
[0024] Type discrete locally active memristor, expressed as: ;
[0025] Type discrete locally active memristor, expressed as: ;
[0026] In the formula a is the first amplitude adjustment coefficient; b is the second amplitude adjustment coefficient; is the first angular frequency adjustment coefficient; is the second angular frequency adjustment coefficient.
[0027] The present invention also provides an implementation circuit of a discrete locally active memristor, including an analog implementation circuit and a digital implementation circuit;
[0028] Based on a sample and hold circuit, an operational amplifier, and an operational function editor, an analog implementation circuit of a discrete locally active memristor is implemented;
[0029] Based on a control chip, a digital implementation circuit of a discrete locally active memristor is implemented.
[0030] The described analog implementation circuit specifically includes a staircase wave function generator, a NOT gate, a first sample and hold circuit, a second sample and hold circuit, a first proportional gain circuit, a second proportional gain circuit, a first operational function editor, a second operational function editor, a multiplier, a first operational amplifier, a second operational amplifier, a sine voltage source, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, and a seventh resistor;
[0031] The negative electrode of the staircase wave function generator is grounded; the positive electrode of the staircase wave function generator is connected to the first input terminal of the first sample and hold circuit and the input terminal of the NOT gate simultaneously; the output terminal of the NOT gate is connected to the first input terminal of the second sample and hold circuit; the second input terminal of the first sample and hold circuit is connected to the output terminal of the second operational amplifier, and the output terminal of the first sample and hold circuit is connected to the second input terminal of the second sample and hold circuit; the output terminal of the second sample and hold circuit is connected to the inverting input terminal of the first operational amplifier through the first resistor, and the output terminal of the second sample and hold circuit is also connected to the inverting input terminal of the first operational amplifier through the series-connected second proportional gain circuit, the second operational function editor and the second resistor, and the output terminal of the second sample and hold circuit is further connected to the second input terminal of the multiplier through the series-connected first proportional gain circuit and the first operational function editor; the negative electrode of the sine voltage source is grounded, the positive electrode of the sine voltage source is directly connected to the first input terminal of the multiplier, and the positive electrode of the sine voltage source is also connected to the inverting input terminal of the first operational amplifier through the third resistor; the output terminal of the multiplier is grounded through the seventh resistor; the non-inverting input terminal of the first operational amplifier is grounded; the inverting input terminal of the first operational amplifier is further connected to the output terminal of the first operational amplifier through the fourth resistor; the output terminal of the first operational amplifier is connected to the inverting input terminal of the second operational amplifier through the fifth resistor; the non-inverting input terminal of the second operational amplifier is grounded, and the inverting input terminal of the second operational amplifier is further connected to the output terminal of the second operational amplifier through the sixth resistor;
[0032] Among them, the first sample and hold circuit and the second sample and hold circuit are used to implement differential calculation, the first operational amplifier is used to implement proportional addition and subtraction operations, and the second operational amplifier is used to implement the reverse function.
[0033] The described digital implementation circuit is specifically a digital circuit composed of a control chip of model STM32F407ZGT6; the discretized iterative operation of the discrete local active memristor is realized through the control chip, so as to realize the discrete local active memristor with a digital circuit.
[0034] The design method and implementation circuit of the discrete local active memristor provided by the present invention, through the determination of the discretized iterative operation model and modular framework of the discrete local active memristor, not only realizes the design of the discrete local active memristor and the corresponding circuit implementation, but also has higher reliability, better accuracy and better adaptability of the present invention. Description of the Drawings
[0035] Figure 1 It is a schematic flow chart of the method of the present invention.
[0036] Figure 2 It is a schematic diagram of the modeling framework structure of the discrete local active memristor of the method of the present invention.
[0037] Figure 3Schematic diagram of the POP curve of the discrete locally active memristor of the method of the present invention; among them, Figure 3 (a) is the type and type discrete locally active memristor POP curves, Figure 3 (b) is the type and type discrete locally active memristor POP curves.
[0038] Figure 4 For the II-type discrete locally active memristor of the method of the present invention in the DC state V - I curve schematic diagram; among them, Figure 4 (a) is the periodic orbit curves at angular frequencies and ; Figure 4 (b) is the periodic orbit curves at angular frequencies and ;
[0039] Figure 5 For the schematic diagram of the hysteresis curves presented by the II-type discrete locally active memristor of the method of the present invention under different excitation parameters; among them, Figure 5 (a) is the hysteresis curves with the excitation amplitude changing successively at angular frequencies and ; Figure 5 (b) is the hysteresis curves with the excitation frequency changing successively at angular frequencies and ; Figure 5 (c) is the hysteresis curves with the excitation amplitude changing successively at angular frequencies and ; Figure 5 (d) is the hysteresis curves with the excitation frequency changing successively at angular frequencies and ;
[0040] Figure 6 For the circuit schematic diagram of the analog implementation circuit of the present invention.
[0041] Figure 7 For the PSIM simulation experiment result diagram of the analog implementation circuit corresponding to the II-type discrete locally active memristor of the present invention; among them, Figure 7 (a) is the hysteresis curves with the excitation amplitude changing successively at angular frequencies and ; Figure 7 (b) is the hysteresis curves with the excitation frequency changing successively at angular frequencies and ; Figure 7 (c) is the hysteresis curves with the excitation amplitude changing successively at angular frequencies and hysteresis curves with the excitation amplitude changing sequentially at Figure 7 (d) shows the angular frequency and hysteresis curves with the excitation frequency changing sequentially at
[0042] Figure 8 is the circuit schematic diagram of the digital implementation circuit and the peripheral auxiliary circuit of the present invention.
[0043] Figure 9 is the PSIM simulation experimental result diagram of the digital implementation circuit corresponding to the type-II discrete local active memristor of the present invention; among them, Figure 9 (a) shows the hysteresis curves with the excitation amplitude changing sequentially at the angular frequency and ; Figure 9 (b) shows the hysteresis curves with the excitation frequency changing sequentially at the angular frequency and ; Figure 9 (c) shows the hysteresis curves with the excitation amplitude changing sequentially at the angular frequency and ; Figure 9 (d) shows the hysteresis curves with the excitation frequency changing sequentially at the angular frequency and . Specific Embodiments
[0044] As Figure 1 shown is the schematic diagram of the method flow of the method of the present invention: The design method of the discrete local active memristor disclosed in the present invention includes the following steps:
[0045] S1. Based on the input voltage, input current, and state variable of the discrete local active memristor in the DC state, determine the discretized iterative operation model of the discrete local active memristor; specifically, it includes the following steps:
[0046] The discretized iterative operation form of the discrete local active memristor is shown as Figure 2 as follows: In the formula, is the input voltage at the moment in the DC state; is the output current at the moment in the DC state; is the state variable at the moment in the DC state; is the memductance function; is the non-linear modulation function; is the scale factor.
[0047] S2. Based on the discretization iterative operation model determined in step S1, determine the modular framework of the discrete local active memristor including a non-linear function module; specifically, it includes the following steps:
[0048] The modular framework of the discrete local active memristor includes:
[0049] Through the forward difference algorithm, the iteration of the state variable is realized, that is, the calculation of is realized;
[0050] The first non-linear function module is used to realize the memductance function of the discrete local active memristor, and the second non-linear function module is used to realize the non-linear modulation function of the discrete local active memristor;
[0051] Use a multiplier module to realize the product of the memductance function of the discrete local active memristor and the input voltage;
[0052] Realize the addition operation through an accumulation module;
[0053] Connect the above parts to realize the discretization iterative operation of the discrete local active memristor.
[0054] S3. Based on the modular framework determined in step S2, select non-linear function modules based on sine and cosine functions to complete the design of the discrete local active memristor; it includes the following steps:
[0055] Based on the modular framework determined in step S2, select sine and cosine functions as non-linear function modules based on the non-linearity, boundedness, and periodicity characteristics of trigonometric functions to complete the design of the discrete local active memristor.
[0056] Specifically, it includes the following steps:
[0057] There are 4 types of designed discrete local active memristors: Type discrete local active memristor, expressed as: ;
[0058] Type discrete local active memristor, expressed as: ;
[0059] Type discrete local active memristor, expressed as: ;
[0060] Type discrete local active memristor, expressed as: ;
[0061] In the formula a is the first amplitude adjustment coefficient; b is the second amplitude adjustment coefficient; is the first angular frequency adjustment coefficient; is the second angular frequency adjustment coefficient; The parameters a and b are used to regulate the dynamic amplitude of the non - linear function, and the parameters and are used to regulate the angular frequency of the non - linear function.
[0062] The following is a numerical simulation experiment to prove that the 4 - type discrete local active memristor provided by the present invention can exhibit different memristive characteristics under different parameter groups, and at the same time, the DC characteristics and AC characteristics are tested.
[0063] The DC characteristics of the discrete local active memristor can be verified by non - volatility and local activity. The non - volatility is judged by the POP (Power - off Plot) curve, which records the state trajectory and two or more negative - slope intersection points (stable equilibrium points) that appear in the power - off state and intersect with the axis. When the discrete DC excitation signal and the second state equation of the discrete local active memristor can be simplified to: ; The state trajectory intersects with the axis within the variable interval to generate five and four different equilibrium points respectively, as shown in Figure 3 . Figure 3 (a) shows that the two stable equilibrium points ( , ) in the , type and , , ) are located in different negative - slope regions, while the three unstable equilibrium points ( , , ) are located in different positive - slope regions. Figure 3 (b) shows that the two stable equilibrium points ( , ) in the , type and , ) are located in different negative - slope regions, while the three unstable equilibrium points ( , ) are located in different positive - slope regions. It should be noted that the above only discusses the change of the POP curve state trajectory in the finite variable interval. If the variable interval is extended, it is not difficult to find that the POP curve has infinitely many negative - slope regions and negative - slope equilibrium points. Obviously, the discrete local active memristor with two or more stable equilibrium points is non - volatile.
[0064] Then, the local active characteristics of the discrete local active memristor can be verified by the V - I curve in the DC state, where V and I represent the input voltage and output current in the DC state respectively. The state variable in the DC state is expressed as . Let , and we can get: ;
[0065] V and I The relationship between and is expressed as: where the memristor parameters are set to , , and the type memristor is used to verify the local active characteristics of this memristor, as shown in Figure 4 . Figure 4 (a) shows that when the angular frequencies and , the V - I curve in the DC state enters the periodic orbit and exhibits hysteresis characteristics. Figure 4 (b) shows that when the angular frequencies and , the V - I curve in the DC state enters the quasi-periodic orbit that never intersects. Through a large number of simulation experiments, it is found that when the angular frequencies and are not 0, there is always a locally active region with a negative slope in the V - I curve in the DC state, that is, the local active characteristics of this memristor are verified. Let . If Q is a rational number, that is, and are not relatively prime, the V - I curve shows a periodic orbit; if Q is an irrational number, that is, and are relatively prime, the V - I curve shows a quasi-periodic orbit (never intersecting).
[0066] The AC characteristics of the discrete local active memristor can be verified by the three fingerprint features. At both ends of the type memristor with the above memristor parameters, a discrete sine excitation signal 。The initial state of the memristor is set to , the excitation amplitude and the frequency are respectively controlled to change, presenting a shrinking hysteresis curve in the voltage-current plane, as shown in Figure 5 . When the angular frequency and , Figure 5 (a) shows that , when the excitation amplitude is successively applied , the area of the hysteresis sidelobe region shows a monotonic shrinking trend as the excitation amplitude decreases; Figure 5 (b) shows that when , when the excitation frequency is successively assigned , the area of the hysteresis sidelobe region gradually decreases as the excitation frequency increases, gradually tending to a single-valued function. Similarly, when the angular frequency and , Figure 5 (c) and Figure 5 (d) show the same process as in the previous set of parameters. Obviously, the three fingerprint characteristics of the discrete local active memristor are well demonstrated, that is, the AC characteristics of the memristor are verified in Figure 5 .
[0067] As hardware carriers for the physical implementation of memristors, analog circuits and digital circuits show significant complementarity in performance characteristics and application scenarios. Analog circuits have the characteristics of high real-time performance, high bandwidth and low latency, while digital circuits have advantages such as strong anti-interference ability, high flexibility and hardware repeatability. Therefore, based on the above discrete local active memristor, this application designs an analog simulation circuit and a digital hardware circuit to verify the effectiveness and hardware realizability of the model.
[0068] The present invention also provides an implementation circuit for a discrete local active memristor, including an analog implementation circuit and a digital implementation circuit;
[0069] An analog implementation circuit for a discrete local active memristor is realized based on a sample and hold circuit, an operational amplifier and an operational function editor;
[0070] A digital implementation circuit for a discrete local active memristor is realized based on a control chip.
[0071] PSIM has become an important tool for the design and verification of memristor circuits due to its advantages such as fast simulation speed and clear waveform visualization. Due to the sine and cosine functions included in the discrete local active memristor model, problems such as limited dynamic range and nonlinear distortion are faced in the hardware implementation of analog circuits. Therefore, this application verifies the feasibility of the analog circuit implementation scheme by constructing a simulation experimental circuit based on PSIM.
[0072] The analog implementation circuit constructed in this application, as Figure 6 shown, specifically includes a staircase wave function generator , a NOT gate D, a first sample and hold circuit , a second sample and hold circuit , a first proportional gain circuit , a second proportional gain circuit , a first operation function editor , a second operation function editor , a multiplier, a first operational amplifier , a second operational amplifier , a sine voltage source , a first resistor , a second resistor , a third resistor , a fourth resistor , a fifth resistor , a sixth resistor and a seventh resistor ;
[0073] The negative terminal of the staircase wave function generator is grounded; the positive terminal of the staircase wave function generator is simultaneously connected to the first input terminal of the first sample and hold circuit and the input terminal of the NOT gate; the output terminal of the NOT gate is connected to the first input terminal of the second sample and hold circuit; the second input terminal of the first sample and hold circuit is connected to the output terminal of the second operational amplifier, and the output terminal of the first sample and hold circuit is connected to the second input terminal of the second sample and hold circuit; the output terminal of the second sample and hold circuit is connected to the inverting input terminal of the first operational amplifier through the first resistor, and the output terminal of the second sample and hold circuit is also connected to the inverting input terminal of the first operational amplifier through the series-connected second proportional gain circuit, second operation function editor and second resistor, and the output terminal of the second sample and hold circuit is further connected to the second input terminal of the multiplier through the series-connected first proportional gain circuit and first operation function editor; the negative terminal of the sine voltage source is grounded, the positive terminal of the sine voltage source is directly connected to the first input terminal of the multiplier, and the positive terminal of the sine voltage source is also simultaneously connected to the inverting input terminal of the first operational amplifier through the third resistor; the output terminal of the multiplier is grounded through the seventh resistor; the non-inverting input terminal of the first operational amplifier is grounded; the inverting input terminal of the first operational amplifier is further connected to the output terminal of the first operational amplifier through the fourth resistor; the output terminal of the first operational amplifier is connected to the inverting input terminal of the second operational amplifier through the fifth resistor; the non-inverting input terminal of the second operational amplifier is grounded, and the inverting input terminal of the second operational amplifier is further connected to the output terminal of the second operational amplifier through the sixth resistor;
[0074] Among them, the first sample and hold circuit and the second sample and hold circuit are used to implement differential calculation, the first operational amplifier is used to implement proportional addition and subtraction operations, and the second operational amplifier is used to implement the reverse function.
[0075] The difference between the sample-and-hold circuits can be used to implement the differential calculation of the iterative equation, and the operational amplifier is used to implement the proportional addition and subtraction operations and the inversion function. The discrete local active memristor circuit state equation can be written as: Where and are the voltage dimension forms of the internal state variables, and represent the input voltage and output current in the circuit respectively, g = 1 is the multiplier gain. The resistors are set to , , ; the peak-to-peak voltage set by the staircase wave function generator is 3 V, the frequency is 10 kHz, and the duty cycle is 50%; the sine voltage source is configured as , .
[0076] By adjusting the excitation amplitude and frequency in the sine voltage source, the three fingerprint characteristics of the above-mentioned memristor can be verified in the simulation circuit. In the PSIM circuit simulation, the "time step", "total duration" and "sampling duration" are set to , 0.6 s and 0.5 s respectively. Figure 7 (a) and Figure 7 (b) respectively show the hysteresis curves presented when the angular frequency and , the excitation frequency and amplitude in the sine voltage source are fixed respectively, the excitation amplitude decreases in turn and the excitation frequency increases in turn. Figure 7 (c) and Figure 7 (d) respectively show the same process when the angular frequency changes to and . Figure 7 The PSIM circuit experimental simulation results in Figure 5 are basically consistent with the numerical simulation results in
[0077] The digital implementation circuit constructed by the present invention, as shown in Figure 8 , can adopt the circuit composed of the control chip of model STM32F407ZGT6; the discretized iterative operation of the discrete local active memristor is realized through the control chip, so as to realize the discrete local active memristor; Figure 8 In
[0078] In the dual-channel synchronous output mode of the oscilloscope, channel A outputs the excitation voltage signal, and channel B outputs the memristor current signal, forming an X-Y oscilloscope observation mode. The hardware experimental results captured by the oscilloscope are integrated through Photoshop software. Figure 9 The hysteresis curves generated by the type-II discrete local active memristor under different excitation parameters are respectively shown, which Figure 5 are basically consistent with the numerical simulation results in
[0079] The above-mentioned simulation implementation based on PSIM and the digital hardware implementation based on MCU further illustrate the effectiveness of the design method and implementation circuit of the discrete local active memristor of the present invention, the rationality of the design scheme, and the feasibility of the circuit implementation.
Claims
1. A design method for a discrete local active memristor, characterized in that It includes the following steps: S1. Based on the input voltage, input current, and state variables of the discrete local active memristor in the DC state, determine the discretized iterative operation model of the discrete local active memristor; specifically, it includes the following steps: The discretized iterative operation form of the discrete locally active memristor is expressed as: where is the input voltage at in the DC state; is the output current at in the DC state; is the state variable at in the DC state; is the memductance function; is the non-linear modulation function; is the scaling factor; S2. According to the discretized iterative operation model determined in step S1, determine the modular framework of the discrete local active memristor including a non-linear function module; S3. According to the modular framework determined in step S2, select a non-linear function module based on the sine function and cosine function to complete the design of the discrete local active memristor.
2. The design method of the discrete locally active memristor according to claim 1, characterized in that The specific steps of step S2 include the following: The modular framework of the discrete local active memristor includes: Implement the iteration of the state variable through the forward difference algorithm ; The first non-linear function module For implementing the memductance function of a discrete local active memristor , the second non-linear function module For implementing the non-linear modulation function of a discrete local active memristor ; Use a multiplier module to implement the product of the memductance function of the discrete local active memristor and the input voltage; Implement the addition operation through an accumulator module.
3. The design method of the discrete locally active memristor according to claim 2, characterized in that The specific steps of step S3 include the following: According to the modular framework determined in step S2, select the sine function and / or cosine function as the non-linear function module to complete the design of the discrete local active memristor.
4. The design method of the discrete local active memristor according to claim 3, characterized in that The specific steps of step S3 include the following: The designed discrete locally active memristors, with a total of 4 types: Type of discrete locally active memristor, denoted as ; A type of discrete locally active memristor, denoted as ; The type of discrete locally active memristor, denoted as ; Type discrete local active memristor, denoted as ; In the formula a is the first amplitude adjustment coefficient; b is the second amplitude adjustment coefficient; is the first angular frequency adjustment coefficient; is the second angular frequency adjustment coefficient.
5. An implementation circuit of a discrete locally active memristor obtained by using the design method of the discrete locally active memristor described in any one of claims 1 to 4, characterized in that It includes an analog implementation circuit and a digital implementation circuit; Based on a sample and hold circuit, an operational amplifier, and an operational function editor, implement the analog implementation circuit of the discrete local active memristor; Based on a control chip, implement the digital implementation circuit of the discrete local active memristor.
6. The implementation circuit according to claim 5, wherein The specific analog implementation circuit includes a staircase wave function generator, a NOT gate, a first sample and hold circuit, a second sample and hold circuit, a first proportional gain amplifier, a second proportional gain amplifier, a first operational function editor, a second operational function editor, a multiplier, a first operational amplifier, a second operational amplifier, a sine voltage source, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, and a seventh resistor; The negative electrode of the staircase wave function generator is grounded; the positive electrode of the staircase wave function generator is simultaneously connected to the first input terminal of the first sample and hold circuit and the input terminal of the NOT gate; the output terminal of the NOT gate is connected to the first input terminal of the second sample and hold circuit; the second input terminal of the first sample and hold circuit is connected to the output terminal of the second operational amplifier, and the output terminal of the first sample and hold circuit is connected to the second input terminal of the second sample and hold circuit; the output terminal of the second sample and hold circuit is connected to the inverting input terminal of the first operational amplifier through the first resistor, and the output terminal of the second sample and hold circuit is also connected to the inverting input terminal of the first operational amplifier through the series-connected second proportional gain circuit, the second operational function editor, and the second resistor; the output terminal of the second sample and hold circuit is further connected to the second input terminal of the multiplier through the series-connected first proportional gain circuit and the first operational function editor; the negative electrode of the sine voltage source is grounded, the positive electrode of the sine voltage source is directly connected to the first input terminal of the multiplier, and the positive electrode of the sine voltage source is also connected to the inverting input terminal of the first operational amplifier through the third resistor; the output terminal of the multiplier is grounded through the seventh resistor; the non-inverting input terminal of the first operational amplifier is grounded; the inverting input terminal of the first operational amplifier is further connected to the output terminal of the first operational amplifier through the fourth resistor; the output terminal of the first operational amplifier is connected to the inverting input terminal of the second operational amplifier through the fifth resistor; the non-inverting input terminal of the second operational amplifier is grounded, and the inverting input terminal of the second operational amplifier is further connected to the output terminal of the second operational amplifier through the sixth resistor; Among them, the first sample and hold circuit and the second sample and hold circuit are used to implement differential calculation, the first operational amplifier is used to implement proportional addition and subtraction operations, and the second operational amplifier is used to implement the reverse function.
7. The implementation circuit according to claim 5, characterized in that The digital implementation circuit is specifically a digital circuit composed of a control chip of model STM32F407ZGT6; the discretized iterative operation of the discrete local active memristor is realized through the control chip, so as to implement the discrete local active memristor with a digital circuit.