Electronic device and manufacturing method thereof

Abstract

The invention provides an electronic device and a manufacturing method thereof, and the electronic device comprises an electronic unit which comprises a semiconductor structure and a first crack arrest layer, and the first crack arrest layer is disposed at a first side of the semiconductor structure; the second crack arrest layer is arranged on a second side of the semiconductor structure, and the first side is opposite to the second side; and a first insulating layer surrounding the electronic unit, wherein the Young modulus of the first crack arrest layer is smaller than that of the second crack arrest layer.

Description

Technical Field

[0001] The present disclosure relates to an electronic device and a manufacturing method thereof, and particularly to an electronic device including a crack arrest layer and a manufacturing method thereof. Background Art

[0002] With the progress of electronic device technology, most current electronic products pursue being thin, light, short, and small, or develop towards a high integration level, that is, a single electronic device can have multiple functions. The more functions an electronic product has, the greater the demand for chips, and the integration density must be continuously increased.

[0003] In the manufacturing process of general electronic devices, a grinding step can be performed to thin the chip or improve the flatness of the chip. However, with the requirement of thinning, the chip is likely to be damaged or even cracked during the thinning step or subsequent processes.

[0004] Therefore, there is an urgent need to provide a manufacturing method of an electronic device and an electronic device to improve the known defects. Summary of the Invention

[0005] The present disclosure provides an electronic device, characterized in that it includes: an electronic unit including a semiconductor structure and a first crack arrest layer disposed on a first side of the semiconductor structure; a second crack arrest layer disposed on a second side of the semiconductor structure, wherein the first side is opposite to the second side; and a first insulating layer surrounding the electronic unit; wherein the Young's modulus of the first crack arrest layer is less than the Young's modulus of the second crack arrest layer.

[0006] The present disclosure also provides a method for manufacturing an electronic device, which is characterized by including the following steps: providing an electronic unit and a second crack arrest layer on a first carrier, wherein the electronic unit includes a semiconductor structure and a first crack arrest layer, the first crack arrest layer is disposed on a first side of the semiconductor structure, the second crack arrest layer is disposed on a second side of the semiconductor structure, and the first side is opposite to the second side; disposing a first insulating layer on the first carrier, the electronic unit, and the second crack arrest layer, such that the first insulating layer surrounds the electronic unit to form a first encapsulation structure; flipping the first encapsulation structure and disposing the flipped first encapsulation structure on a second carrier; patterning the first insulating layer to form a through hole; disposing a circuit structure and a second insulating layer on the first encapsulation structure to form a second encapsulation structure; flipping the second encapsulation structure and disposing the flipped second encapsulation structure on a third carrier; grinding the first insulating layer and a part of the second crack arrest layer to expose a part of the electronic unit; disposing a metal layer on the electronic unit and the first insulating layer; and disposing a third insulating layer on the first insulating layer, and the third insulating layer surrounds the metal layer; wherein the Young's modulus of the first crack arrest layer is less than the Young's modulus of the second crack arrest layer.

[0007] The present disclosure further provides a method for manufacturing an electronic device, which is characterized by including the following steps: providing an electronic unit on a first carrier, wherein the electronic unit includes a semiconductor structure and a first crack arrest layer, the first crack arrest layer is disposed on a first side of the semiconductor structure; disposing a first insulating layer on the first carrier such that the first insulating layer surrounds the electronic unit; disposing a second crack arrest layer on the electronic unit and the first insulating layer to form a first encapsulation structure, wherein the second crack arrest layer is disposed on a second side of the semiconductor structure, and the first side is opposite to the second side; disposing a metal layer and a third insulating layer on the first encapsulation structure; grinding a part of the metal layer and the third insulating layer to expose a part of the metal layer to form a second encapsulation structure; flipping the second encapsulation structure and disposing the flipped second encapsulation structure on a second carrier; disposing a circuit structure and a second insulating layer on the flipped second encapsulation structure; and disposing a conductive material on the circuit structure; wherein the Young's modulus of the first crack arrest layer is less than the Young's modulus of the second crack arrest layer. Description of the Drawings

[0008] Figures 1A to 1E Schematic diagram of a method for manufacturing an electronic device according to an embodiment of the present disclosure.

[0009] Figures 2A to 2E Schematic diagram of a method for manufacturing an electronic device according to an embodiment of the present disclosure.

[0010] Figure 3A Cross-sectional schematic diagram of an electronic device according to an embodiment of the present disclosure.

[0011] Figure 3B and Figure 3C are respectively Figure 3A partial enlarged views of

[0012] Figure 4 is a cross-sectional schematic view of an electronic device of an disclosed embodiment.

[0013] Figure 5 is a cross-sectional schematic view of an electronic device of an disclosed embodiment.

[0014] Figure 6 is a cross-sectional schematic view of an electronic device of an disclosed embodiment.

[0015] Figure 7 is a cross-sectional schematic view of an electronic device of an disclosed embodiment.

[0016] In the above drawings, the meanings of the reference numerals are as follows:

[0017] 1 Electronic unit

[0018] 1a Cut-off part

[0019] 1s1, 11s1 Side walls

[0020] 11 First crack stopping layer

[0021] 111, 141 Openings

[0022] 12 Semiconductor structure

[0023] 12s1 First side

[0024] 12s2 Second side

[0025] 13 Pad

[0026] 14 Passivation layer

[0027] 2 Second crack stopping layer

[0028] 2a Protrusion

[0029] 21 Opening

[0030] 3 First insulating layer

[0031] 31, 32 Through holes

[0032] 4 Circuit structure

[0033] 4’ Another circuit structure

[0034] 4a First part

[0035] 4b Second part

[0036] 4c Part III

[0037] 5 Second insulating layer

[0038] 5a First part

[0039] 5a1, 5b1 openings

[0040] 5b Second part

[0041] 6 Metal layer

[0042] 61 First sub - metal layer

[0043] 62 Second sub - metal layer

[0044] 6a, 8a First part

[0045] 6b, 8b Second part

[0046] 7 Third insulating layer

[0047] 8 Connecting element

[0048] 9 Insulating layer

[0049] 91, 92 perforations

[0050] B Circuit board

[0051] C1 First carrier

[0052] C2 Second carrier

[0053] C3 Third carrier

[0054] C11, C21, C31 Release layers

[0055] G Grinder

[0056] H1, H2 perforations

[0057] IL1, IL2, IL3 Another insulating layer

[0058] IL1h, IL2h, IL3h perforations

[0059] IL1s, IL2s Side walls

[0060] M Conductive material

[0061] M’ Another conductive material

[0062] PL Protective layer

[0063] PS1 First encapsulation structure

[0064] PS2 Second encapsulation structure

[0065] Thicknesses of T1 and T2

[0066] First width W1

[0067] Second width W2

[0068] X and Y directions

[0069] Normal direction Z Detailed implementation manners

[0070] The following are specific embodiments to illustrate the implementation manners of the present disclosure. Those skilled in the art can easily understand other advantages and effects of the present disclosure from the content disclosed in this specification. The present disclosure can also be implemented or applied through other different specific embodiments. Various details in this specification can also be modified and changed according to different viewpoints and applications without departing from the spirit of this creation.

[0071] It should be noted that in this article, unless otherwise specified, an element with "a" does not limit to having only one such element, but can have one or more such elements. Furthermore, the ordinal numbers such as "first" and "second" used in the specification and claims are used to modify the elements of the claims, and they do not inherently imply or represent that the claimed element has any previous ordinal number, nor do they represent the order of one claimed element and another claimed element, or the order in the manufacturing method. The use of these ordinal numbers is only to clearly distinguish one claimed element with a certain name from another claimed element with the same name.

[0072] Throughout this specification and claims of the present disclosure, certain terms will be used to refer to specific elements. Those skilled in the art should understand that electronic device manufacturers may use different names to refer to the same element. This article does not intend to distinguish those elements with the same function but different names. In the following specification and claims, words such as "include", "contain", and "have" are open-ended words, so they should be interpreted as meaning "including but not limited to...". Therefore, when the description of the present disclosure uses the terms "include", "contain", and / or "have", it specifies the existence of the corresponding features, regions, steps, operations, and / or components, but does not exclude the existence of one or more corresponding features, regions, steps, operations, and / or components.

[0073] In the text, the terms "about", "approximately", "substantially", and "essentially" generally mean within 10%, 5%, 3%, 2%, 1%, or 0.5% of a given value or range. The given quantity is an approximate quantity, that is, the meaning of "about", "approximately", "substantially", and "essentially" may still be implied even without specific mention of "about", "approximately", "substantially", or "essentially". In addition, the terms "ranging from a first value to a second value" and "ranging between a first value and a second value" mean that the range includes the first value, the second value, and other values therebetween.

[0074] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It is understood that these terms, such as those defined in commonly used dictionaries, should be interpreted to have a meaning consistent with the relevant art and the background or context of this disclosure, and should not be interpreted in an idealized or overly formal manner unless specifically defined herein.

[0075] In addition, relative terms such as "below" or "bottom" and "above" or "top" may be used in the embodiments to describe the relative relationship of one element of the drawing to another element. It is understood that if the device in the drawing is flipped so that it is upside down, the element described on the "below" side will become the element on the "above" side. When a corresponding member (such as a film layer or region) is referred to as "on another member", it may be directly on the other member, or there may be other members therebetween. On the other hand, when a member is referred to as "directly on another member", there are no members therebetween. Additionally, when a member is referred to as "on another member", there is an up-down relationship between the two in the top-down view direction, and this member may be above or below the other member, and this up-down relationship depends on the orientation of the device.

[0076] In the present disclosure, the measurements of distance, width, length, and thickness can be obtained by measuring with an optical microscope, and the distance, width, length, and thickness can be measured from the cross-sectional image in an electron microscope, but the present disclosure is not limited thereto. Additionally, there may be a certain error between any two values or directions being compared. If the first value is equal to the second value, it implies that there may be an error of about 10% between the first value and the second value; if the first direction is perpendicular to the second direction, the angle between the first direction and the second direction can range between 80 degrees and 100 degrees; if the first direction is parallel to the second direction, the angle between the first direction and the second direction can range between 0 degrees and 10 degrees.

[0077] In the present disclosure, the definition of roughness judgment can be observed by SEM. On an uneven surface, it can be seen that there is a distance difference between the peaks and valleys of the surface undulations. The measurement of roughness judgment can include using SEM, Transmission electron microscope (TEM), etc. to observe the condition of the surface undulations at an appropriate same magnification, and the roughness range is obtained by comparing the undulation conditions of samples of a unit length (for example, 10 μm). Herein, "appropriate magnification" means a range (Rz) or average roughness (Ra) in which at least 10 undulating peaks of at least one surface can be seen within the field of view at this magnification.

[0078] It should be noted that the technical solutions provided in different embodiments below can be mutually replaced, combined or used in mixture to form another embodiment without violating the spirit of the present disclosure.

[0079] The electronic device of the present disclosure may be, for example, a semiconductor device and may be applicable to any kind of device. The electronic device of the present disclosure may, for example, include a display device, a sensing device, an antenna device, a touch device, a splicing device, or other suitable electronic devices, but is not limited thereto. The display device of the present disclosure may be a non-self-luminous display device or a self-luminous display device, such as a liquid crystal display (Liquid Crystal Display), a cholesteric liquid crystal display (Cholesteric Liquid Crystal Display), an electrophoretic display (Electro-Phoretic Display), an organic light emitting diode display (organic light emitting diode Display), a light emitting diode display (light emitting diode Display), but is not limited thereto. The display device may include light emitting diodes, a light conversion layer, or other suitable materials, or a combination of the above, but is not limited thereto. The light emitting diodes may, for example, include organic light emitting diodes (organic light emitting diode, OLED), mini light emitting diodes (mini LED), micro light emitting diodes (micro LED), or quantum dot light emitting diodes (quantum dot LED, which may include QLED, QDLED), but is not limited thereto. The light conversion layer may include a wavelength conversion material and / or a light filtering material. The light conversion layer may, for example, include fluorescence, phosphor, quantum dot (Quantum Dot, QD), other suitable materials, or a combination of the above, but is not limited thereto. The sensing device may, for example, include a biosensor, a touch sensor, a fingerprint sensor, other suitable sensors, or a combination of the above types of sensors. The antenna device may, for example, be a liquid crystal antenna or other types of antenna, but is not limited thereto. The splicing device may, for example, include a splicing display device or a splicing antenna device, but is not limited thereto. The electronic device may include electronic components, and the electronic components may include passive components, active components, or a combination of the above, such as capacitors, resistors, inductors, varactor diodes (Varactor Diodes), variable capacitors, filters, diodes, transistors, sensors, microelectromechanical system components (MEMS), chips (chip), etc., but is not limited thereto. It should be noted that the electronic device of the present disclosure may be various combinations of the above devices, but is not limited thereto..The manufacturing method of the electronic device in the present disclosure can be applied, for example, in a wafer-level package (WLP) process or a panel-level package (PLP) process. The wafer-level package or panel-level package process may include a chip-first process or a chip-last process, but is not limited thereto. The electronic device of the present disclosure can be applied, for example, to a power module, a semiconductor packaging device, but is not limited thereto. The electronic device may include a system-on-a-chip (SoC), a system-in-a-package (SiP), an antenna-in-package (AiP), or various combinations of the above devices, but is not limited thereto.

[0080] Figures 1A to 1E Schematic diagram of the manufacturing method of the electronic device according to an embodiment of the present disclosure.

[0081] In an embodiment of the present disclosure, the manufacturing method of the electronic device may include the following steps: As Figure 1A shown, provide an electronic unit 1 and a second crack stop layer 2 on a first carrier C1. The electronic unit 1 includes a semiconductor structure 12 and a first crack stop layer 11. The first crack stop layer 11 is disposed on a first side 12s1 of the semiconductor structure 12, and the second crack stop layer 2 is disposed on a second side 12s2 of the semiconductor structure 12, wherein the first side 12s1 and the second side 12s2 are opposite to each other. Then, dispose a first insulating layer 3 on the first carrier C1, the electronic unit 1, and the second crack stop layer 2, so that the first insulating layer 3 surrounds the electronic unit 1. Among them, the electronic unit 1, the second crack stop layer 2, and the first insulating layer 3 form a first packaging structure PS1.

[0082] In an embodiment of the present disclosure, as Figure 1A shown, the electronic unit 1 may include pads 13, and the pads 13 may be electrically connected to the semiconductor structure 12 to output signals from the electronic unit 1 or input signals into the electronic unit 1. In an embodiment of the present disclosure, as Figure 1A shown, the first crack stop layer 11 may include an opening 111, and the opening 111 exposes the pads 13. In an embodiment of the present disclosure, as Figure 1A shown, the first insulating layer 3 also surrounds the second crack stop layer 2. In an embodiment of the present disclosure, as Figure 1A shown, a release layer C11 may be selectively disposed between the first carrier C1 and the electronic unit 1. Thus, it is beneficial to the subsequent separation step of the first carrier C1 and the electronic unit 1. According to some embodiments, the material of the pads 13 includes aluminum, copper, or other conductive materials.

[0083] In the present disclosure, suitable methods can be used separately to set the first insulating layer 3 and the release layer C11. The suitable methods include dip coating, spin coating, roll coating, blade coating, spraying, deposition, or a combination of the foregoing, but the present disclosure is not limited thereto. In the present disclosure, the opening 111 of the first crack arrest layer 11 can be formed by, for example, mechanical perforation, laser perforation, yellow light process, or a combination thereof, but the present disclosure is not limited to the above methods.

[0084] In the present disclosure, the material of the first carrier C1 can include glass, quartz, sapphire, ceramics, plastics, BT substrates, steel plates, other suitable substrate materials, or a combination of the foregoing, but the present disclosure is not limited thereto. In the present disclosure, the electronic unit 1 can include passive components and active components, such as capacitors, resistors, inductors, diodes, transistors, etc., but the present disclosure is not limited thereto. The diode can include a light-emitting diode or a photodiode. In the present disclosure, the material of the first crack arrest layer 11 can include organic materials or inorganic materials. Organic materials include polyimide (PI), poly-p-xylylene (also known as parylene), benzocyclobutene (BCB), epoxy resin, polycarbonate, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polymers, or other suitable organic materials, but the present disclosure is not limited thereto. Inorganic materials include silicon oxide, silicon nitride, silicon oxynitride, or other suitable inorganic materials, but the present disclosure is not limited thereto. In the present disclosure, the material of the second crack arrest layer 2 can include polymers, polymers, epoxy resins, silicon oxide, silicon nitride, metals, or other suitable materials, but the present disclosure is not limited thereto. In the present disclosure, the Young's modulus of the first crack arrest layer 11 is different from that of the second crack arrest layer 2. In the present disclosure, the Young's modulus of the first crack arrest layer 11 is less than that of the second crack arrest layer 2. For example, the Young's modulus of the first crack arrest layer 11 can be between 5 GPa and 15 GPa, and the Young's modulus of the second crack arrest layer 2 can be between 100 GPa and 150 GPa, but the present disclosure is not limited thereto. In the present disclosure, the thermal conductivity of the second crack arrest layer 2 is greater than that of the first crack arrest layer 11. Thus, the heat dissipation effect of the electronic unit 1 can be improved. The thermal conductivity of the first crack arrest layer 11 can be, for example, less than 5 Wm -1 K -1 , and the thermal conductivity of the second crack arrest layer 2 can be, for example, greater than or equal to 5 Wm -1 K -1 and less than or equal to 550 Wm -1 K -1, but the present disclosure is not limited thereto. The first crack stopping layer 11 and the second crack stopping layer 2 can be used to protect the components in the electronic unit 1 and reduce damage to the electronic unit 1 in subsequent processing steps. In the present disclosure, the material of the first insulating layer 3 may include epoxy resin, polymer, other suitable materials, or a combination of the above, but the present disclosure is not limited thereto. According to some embodiments, the first insulating layer 3 may be, for example, a molding compound, and may further include filler particles. The material of the filler particles includes silicon dioxide, other suitable materials, or a combination of the above, but the present disclosure is not limited thereto. According to some embodiments, along the normal direction Z of the electronic unit 1, the thickness of the first insulating layer 3 may be greater than the thickness of the electronic unit 1. Thus, it helps to slow down the warping during the manufacturing process of the electronic device, but is not limited thereto.

[0085] Next, as Figure 1A and Figure 1B shown, flip the first package structure PS1 and place the flipped first package structure PS1 on the second carrier C2. Pattern the first insulating layer 3 to form vias 31. Then, dispose the circuit structure 4 and the second insulating layer 5 on the flipped first package structure PS1 respectively. Among them, the electronic unit 1, the second crack stopping layer 2, the first insulating layer 3, the circuit structure 4, and the second insulating layer 5 form the second package structure PS2.

[0086] In the present disclosure, the "flip the first package structure" refers to, for example, flipping the first package structure PS1 by 180° in the normal direction Z of the electronic unit 1. At this time, as Figure 1A and Figure 1B shown, the second crack stopping layer 2 will be flipped from being disposed above the electronic unit 1 to being disposed below the electronic unit 1, and the first crack stopping layer 11 will be flipped from being disposed below the semiconductor structure 12 to being disposed above the semiconductor structure 12.

[0087] In an embodiment of the present disclosure, as Figure 1B shown, the circuit structure 4 may be disposed in the vias 31 of the first insulating layer 3 and the openings 111 of the first crack stopping layer 11, and the circuit structure 4 may be electrically connected to the semiconductor structure 12 through the pads 13 of the electronic unit 1. In an embodiment of the present disclosure, as Figure 1B shown, a release layer C21 may be selectively disposed between the second carrier C2 and the second package structure PS2. Thus, it is beneficial to the subsequent separation step of the second carrier C2 and the second package structure PS2.

[0088] In an embodiment of the present disclosure, before the step of disposing the first encapsulation structure PS1 after flipping on the second carrier C2, the step of removing the first carrier C1 may further be included. In the present disclosure, the first carrier C1 may be removed by applying an external force to the first carrier C1. The "external force" may include, for example, physical, chemical or optical external forces, stresses such as heating, laser, ultraviolet light, mechanical force, etc., or a combination of the foregoing, but the present disclosure is not limited thereto.

[0089] In the present disclosure, any suitable method may be used for patterning. For example, it may include a yellow light process and an etching method. Among them, the etching method may include dry etching, wet etching or a combination thereof, but the present disclosure is not limited thereto. In the present disclosure, any suitable method may be used to dispose the circuit structure 4. Suitable methods may include electroplating, electroless plating, chemical vapor deposition, physical vapor deposition, atomic layer deposition (ALD), sputtering, lamination, coating method or a combination of the foregoing, but the present disclosure is not limited thereto. The "coating method" may be, for example, dip coating, spin coating, roll coating, blade coating, spray coating or a combination of the foregoing, but the present disclosure is not limited thereto. In the present disclosure, the method of disposing the second insulating layer 5 may be similar to the method of disposing the first insulating layer 3, and will not be elaborated herein.

[0090] In the present disclosure, the material of the second carrier C2 may be the same as or different from that of the first carrier C1, which will not be elaborated herein. In the present disclosure, the material of the circuit structure 4 may include a metal material, a metal oxide material, an alloy thereof, or a combination thereof. For example, it may include gold, silver, copper, palladium, platinum, ruthenium, aluminum, cobalt, nickel, titanium, molybdenum, manganese, indium zinc oxide (IZO), indium tin oxide (ITO), indium tin zinc oxide (ITZO), indium gallium zinc oxide (IGZO), aluminum zinc oxide (AZO), or a combination of the above, but the present disclosure is not limited thereto. In the present disclosure, the material of the second insulating layer 5 may include glass, polyimide (PI), poly-p-xylylene (also known as Parylene), benzocyclobutene (BCB), epoxy resin, polycarbonate (PC), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), a polymer, or other suitable materials, but the present disclosure is not limited thereto. According to some embodiments, the circuit structure 4 may be, for example, a redistribution layer, and may be electrically connected to each chip or electronic unit through a solder ball or other bonding elements. The circuit structure 4 may include at least one conductive layer and at least one insulating layer, or may re-route the circuit and / or further increase the circuit fan-out area, or different electronic units may be electrically connected to each other through the redistribution structure. Alternatively, the redistribution layer may be a substrate used as electrical interface wiring between one connection and another connection. The purpose of the redistribution layer is to extend the connection to a wider pitch or re-distribute the connection to another connection with a different pitch.

[0091] Then, as Figure 1C and Figure 1D shown, flip the second package structure PS2 and place the flipped second package structure PS2 on the third carrier C3. Then, grind the first insulating layer 3 and a part of the second crack stop layer 2 to expose a part of the electronic unit 1. Then, dispose a metal layer 6 on the electronic unit 1 and the first insulating layer 3.

[0092] In the present disclosure, the "flip the second package structure" refers, for example, to flipping the second package structure PS2 by 180° in the normal direction Z of the electronic unit 1. At this time, as Figure 1B and Figure 1C shown, the second crack stop layer 2 will be flipped from being disposed below the electronic unit 1 to being disposed above the electronic unit 1, the first crack stop layer 11 will be flipped from being disposed above the semiconductor structure 12 to being disposed below the semiconductor structure 12, and the circuit structure 4 and the second insulating layer 5 will be flipped from being disposed in the first package structure PS1 (as Figure 1Aflipped upward as shown) to be disposed below the first encapsulation structure PS1 (such as Figure 1A shown). According to some embodiments, after forming the encapsulation structure PS1, the metal layer 6 can be first disposed on the electronic unit 1 and the first insulating layer 3, and then after flipping, the circuit structure 4 can be disposed. That is, the metal layer 6 and the circuit structure 4 are respectively disposed on opposite sides of the electronic unit 1, and there is no limitation on the priority order of disposing the metal layer 6 and the circuit structure 4.

[0093] In an embodiment of the present disclosure, as Figure 1C shown, the release layer C31 can be selectively disposed between the third carrier C3 and the second encapsulation structure PS2. Thus, it is beneficial to the subsequent separation step of the third carrier C3 and the second encapsulation structure PS2. In an embodiment of the present disclosure, as Figure 1C shown, the first insulating layer 3 and a part of the second crack stopping layer 2 can be ground by a grinding machine G, so as to thin the thickness of the second encapsulation structure PS2 and expose a part of the second crack stopping layer 2. In an embodiment of the present disclosure, before the step of disposing the flipped second encapsulation structure PS2 on the third carrier C3, the step of removing the second carrier C2 may further be included, wherein the method of removing the second carrier C2 may be similar to the method of removing the first carrier C1, and will not be described herein again. In the present disclosure, the thickness of the second crack stopping layer 2 before the grinding step is greater than or equal to the thickness of the second crack stopping layer 2 after the grinding step.

[0094] In an embodiment of the present disclosure, as Figure 1D shown, after the step of grinding the first insulating layer 3 and a part of the second crack stopping layer 2, it may selectively include: patterning the first insulating layer 3 and the second crack stopping layer 2 respectively, so as to expose a part of the electronic unit 1 and a part of the circuit structure 4 disposed in the through hole 31 of the first insulating layer 3. More specifically, the first insulating layer 3 is patterned to form a through hole 32, and the through hole 31 communicates with the through hole 32, wherein the through hole 32 exposes a part of the circuit structure 4 disposed in the through hole 31 of the first insulating layer 3; the second crack stopping layer 2 is patterned to form an opening 21, and the opening 21 exposes a part of the electronic unit 1. In the present disclosure, any suitable method can be used to perform the steps of patterning the first insulating layer 3 and the second crack stopping layer 2, and the suitable method can be as described above and will not be described herein again. According to some embodiments, the steps of patterning the first insulating layer 3 and the second crack stopping layer 2 can be omitted.

[0095] In an embodiment of the present disclosure, although not shown in the figures, the first insulating layer 3 and a part of the second crack arresting layer 2 may also be ground by a grinding machine G, so as to expose a part of the electronic unit 1 and a part of the circuit structure 4 disposed in the through holes 31 of the first insulating layer 3. Therefore, in some embodiments, the step of patterning the first insulating layer 3 to form the through holes 32 and / or the step of patterning the second crack arresting layer 2 to form the openings 21 may be selectively omitted.

[0096] In an embodiment of the present disclosure, as Figure 1D shown, a metal layer 6 may be disposed in the openings 21 of the second crack arresting layer 2 and the through holes 32 of the first insulating layer 3. The metal layer 6 may include a first sub-metal layer 61 and a second sub-metal layer 62, and the second sub-metal layer 62 is disposed on the first sub-metal layer 61. Among them, a part of the first sub-metal layer 61 may be in contact with the electronic unit 1 through the opening 21 of the second crack arresting layer 2, and a part of the first sub-metal layer 61 may be in contact with and electrically connected to the circuit structure 4 disposed in the through holes 31 of the first insulating layer 3 through the through holes 32 of the first insulating layer 3. In the present disclosure, a suitable method may be used to dispose the metal layer 6, and the suitable method includes electroplating, electroless plating, chemical vapor deposition, physical vapor deposition, sputtering or a combination of the foregoing, but the present disclosure is not limited thereto. In the present disclosure, the material of the metal layer 6 includes gold, silver, copper, titanium, chromium, nickel, cobalt, their alloys or a combination of the above, but the present disclosure is not limited thereto.

[0097] Next, as Figure 1E shown, a third insulating layer 7 is disposed on the first insulating layer 3, and the third insulating layer 7 surrounds the metal layer 6. Then, the third carrier C3 is removed, so that an electronic device of an embodiment of the present disclosure (such as Figure 3A shown) can be formed.

[0098] In the present disclosure, the method of disposing the third insulating layer 7 may be similar to the method of disposing the first insulating layer 3, and the method of removing the third carrier C3 may be similar to the method of removing the first carrier C1, which will not be elaborated herein. In the present disclosure, the third insulating layer 7 may be formed using the same or different material as the first insulating layer 3, and the material of the third insulating layer 7 may be similar to that of the first insulating layer 3, which will not be elaborated herein.

[0099] In an embodiment of the present disclosure, as Figure 1EAs shown, before the step of disposing the third insulating layer 7 on the first insulating layer 3, it further includes: disposing a connecting element 8 on the metal layer 6. In the present disclosure, suitable methods can be used to dispose the connecting element 8, and the suitable methods include electroplating, electroless plating, chemical vapor deposition, physical vapor deposition, sputtering, coating method, or a combination of the foregoing, but the present disclosure is not limited thereto. In the present disclosure, the connecting element 8 can be formed of a material having a heat-conducting or electrically-conducting effect, and the suitable materials include gold, silver, copper, palladium, platinum, ruthenium, aluminum, cobalt, nickel, titanium, molybdenum, manganese, indium zinc oxide (IZO), indium tin oxide (ITO), indium tin zinc oxide (ITZO), indium gallium zinc oxide (IGZO), aluminum zinc oxide (AZO), or a combination of the above, but the present disclosure is not limited thereto.

[0100] Figures 2A to 2E Schematic diagram of a manufacturing method of an electronic device according to an embodiment of the present disclosure. Among them, Figures 2A to 2E The manufacturing method of Figures 1A to 1E is similar, except for the following differences.

[0101] In an embodiment of the present disclosure, the manufacturing method of the electronic device may include the following steps: As Figure 2A shown, providing a plurality of electronic units 1 on a first carrier C1, the electronic unit 1 includes a semiconductor structure 12 and a first crack stopping layer 11, and the first crack stopping layer 11 is disposed on a first side 12s1 of the semiconductor structure 12. After that, disposing a first insulating layer 3 on the first carrier C1 to make the first insulating layer 3 surround the electronic unit 1. Then, disposing a second crack stopping layer 2 on the electronic unit 1 and the first insulating layer 3, wherein the second crack stopping layer 2 is disposed on a second side 12s2 of the semiconductor structure 12. The electronic unit 1, the second crack stopping layer 2, and the first insulating layer 3 form a first encapsulation structure PS1.

[0102] In an embodiment of the present disclosure, as Figure 2A shown, the electronic unit 1 may include a pad 13, and the pad 13 can be electrically connected to the semiconductor structure 12 to output a signal from the electronic unit 1 or input a signal into the electronic unit 1. In an embodiment of the present disclosure, as Figure 2A shown, at this time, the first crack stopping layer 11 may not have an opening 111 exposing the pad 13 (as Figure 1A shown), however, in other embodiments, at this time, the first crack stopping layer 11 may also include an opening 111 as Figure 1A shown, and the opening 111 exposes the pad 13, which will not be elaborated here. In an embodiment of the present disclosure, as Figure 2A shown, a peeling layer C11 can be selectively disposed between the first carrier C1 and the electronic unit 1, so that it is beneficial to the subsequent separation step of the first carrier C1 and the electronic unit 1. In an embodiment of the present disclosure, as Figure 2AAs shown, a part of the second crack stop layer 2 may protrude from the electronic unit 1. More specifically, the second crack stop layer 2 may include a protruding portion 2a which does not overlap with the electronic unit 1 in the top view direction Z of the electronic unit 1. Thus, it is beneficial to the subsequent grinding steps. In an embodiment of the present disclosure, as Figure 2B shown, a part of the second crack stop layer 2 may be in contact with the side wall 1s1 of the electronic unit 1. In an embodiment of the present disclosure, the second crack stop layer 2 may be selectively patterned such that the second crack stop layer 2 forms an opening 21 as Figure 1D shown, but the present disclosure is not limited thereto.

[0103] In the present disclosure, suitable methods may be used to dispose the second crack stop layer 2. The suitable methods include electroplating, electroless plating, chemical vapor deposition, physical vapor deposition, sputtering, coating method or a combination of the foregoing, but the present disclosure is not limited thereto. In the present disclosure, the method of disposing the first insulating layer 3 may be as described above and will not be elaborated herein. In the present disclosure, the materials of the first carrier C1, the first crack stop layer 11, the second crack stop layer 2, the first insulating layer 3 and the electronic unit 1 may be as described above and will not be elaborated herein. In the present disclosure, the Young's modulus of the first crack stop layer 11 is different from that of the second crack stop layer 2. In the present disclosure, the Young's modulus of the first crack stop layer 11 is less than that of the second crack stop layer 2. For example, the Young's modulus of the first crack stop layer 11 may be between 5 GPa and 15 GPa, and the Young's modulus of the second crack stop layer 2 may be between 100 GPa and 150 GPa, but the present disclosure is not limited thereto. In the present disclosure, the thermal conductivity of the second crack stop layer 2 is greater than that of the first crack stop layer 11. Thus, the heat dissipation effect of the electronic unit 1 can be improved. The thermal conductivity of the first crack stop layer 11 is, for example, less than 5 Wm -1 K -1 , and the thermal conductivity of the second crack stop layer 2 is, for example, greater than or equal to 5 Wm -1 K -1 and less than or equal to 500 Wm -1 K -1 , but the present disclosure is not limited thereto. The first crack stop layer 11 and the second crack stop layer 2 can be used to protect the components in the electronic unit 1 and reduce damage to the electronic unit 1 during subsequent processing steps.

[0104] Next, as Figure 2B and Figure 2C shown, a metal layer 6 and a third insulating layer 7 are disposed on the first packaging structure PS1, wherein the third insulating layer 7 can cover the metal layer 6 and surround the second crack stop layer 2. Then, the third insulating layer 7 and a part of the metal layer 6 are ground by a grinding machine G to expose a part of the metal layer 6. Among them, the electronic unit 1, the second crack stop layer 2, the first insulating layer 3, the ground metal layer 6 and the third insulating layer 7 form a second packaging structure PS2.

[0105] In the present disclosure, the methods of disposing the metal layer 6 and the third insulating layer 7 may be as described above respectively, and will not be elaborated herein. In addition, the materials of the metal layer 6 and the third insulating layer 7 may be as described above, and will not be elaborated herein.

[0106] After that, as Figure 2D shown, pattern the metal layer 6 such that the metal layer 6 has a comb-like structure, and the comb-like structure can improve the heat dissipation effect of the electronic unit 1. In an embodiment of the present disclosure, the step of patterning the metal layer 6 of Figure 2D may be selectively omitted and the next step may be directly carried out. In the present disclosure, any suitable method may be used to carry out the step of patterning the metal layer 6. For example, it may include a yellow light process and an etching method. Among them, the etching method may include dry etching, wet etching or a combination thereof, but the present disclosure is not limited thereto.

[0107] Next, as Figure 2E shown, flip Figure 2D the second package structure PS2 shown and dispose the flipped second package structure PS2 on the second carrier C2. After that, pattern the first crack stopping layer 11 to form an opening 111, and the opening 111 exposes the pad 13. Then, dispose the circuit structure 4 on the flipped second package structure PS2 and in the opening 111 of the first crack stopping layer 11, and dispose the second insulating layer 5 on the circuit structure 4. Among them, the circuit structure 4 may be electrically connected to the semiconductor structure 12 through the pad 13 of the electronic unit 1. Next, dispose a conductive material M on the circuit structure 4, and the circuit structure 4 may transmit signals from the outside to the electronic unit 1 through the conductive material M, or output signals from the electronic unit 1 to the outside. After that, remove the second carrier C2, thereby an electronic device of an embodiment of the present disclosure can be formed (for example Figure 5 shown).

[0108] In the present disclosure, the "flipping the second package structure" refers to, for example, flipping the second package structure PS2 by 180° in the normal direction Z of the electronic unit 1. At this time, as Figure 2D and Figure 2E shown, the second crack stopping layer 2 and the metal layer 6 will be flipped from being disposed above the electronic unit 1 to being disposed below the electronic unit 1, and the first crack stopping layer 11 will be flipped from being disposed below the semiconductor structure 12 to being disposed above the semiconductor structure 12.

[0109] In an embodiment of the present disclosure, as Figure 2EAs shown, the circuit structure 4 includes a first part 4a and a second part 4b, and the second insulating layer 5 includes a first part 5a and a second part 5b. Among them, the first part 5a of the second insulating layer 5 is located between the first insulating layer 3 and the second part 5b of the second insulating layer 5. The first part 4a of the circuit structure 4 is electrically connected to the semiconductor structure 12 through the pad 13, and the second part 4b of the circuit structure 4 is electrically connected to the first part 4a of the circuit structure 4 through the opening 5a1 of the first part 5a of the second insulating layer 5.

[0110] In an embodiment of the present disclosure, as Figure 2E shown, the release layer C21 can be selectively disposed between the second carrier C2 and the flipped second package structure PS2. Thus, it is beneficial to the subsequent separation step of the second carrier C2 and the flipped second package structure PS2. In an embodiment of the present disclosure, before the step of disposing the flipped second package structure PS2 on the second carrier C2, the step of removing the first carrier C1 may further be included.

[0111] In the present disclosure, the methods of disposing the circuit structure 4 and the second insulating layer 5 and the method of removing the first carrier C1 can be as described above and will not be elaborated herein. In the present disclosure, the method of patterning the first crack stopping layer 11 may be the same as or different from the method of patterning the first insulating layer 3. Suitable methods include the yellow light process and the etching method. Among them, the etching method may include dry etching, wet etching, or a combination thereof, but the present disclosure is not limited thereto. In the present disclosure, the opening 5a1 of the first part 5a of the second insulating layer 5 can be formed by patterning the first part 5a of the second insulating layer 5. Suitable methods include the laser process, the yellow light process, the etching process, or other suitable patterning steps. Among them, the etching method may include dry etching, wet etching, or a combination thereof, but the present disclosure is not limited thereto. In the present disclosure, the materials of the second carrier C2, the circuit structure 4, and the second insulating layer 5 can be as described above and will not be elaborated herein. In the present disclosure, the conductive material M may include tin, silver, copper, nickel, gold, their alloys, or a combination of the above, but the present disclosure is not limited thereto.

[0112] Figure 3A It is a cross-sectional schematic diagram of an electronic device according to an embodiment of the present disclosure. Figure 3B and Figure 3C are respectively Figure 3A partial enlarged views of

[0113] In an embodiment of the present disclosure, as Figure 3AAs shown, the electronic device may include: an electronic unit 1, including a semiconductor structure 12 and a first crack arrest layer 11, wherein the first crack arrest layer 11 is disposed on a first side 12s1 of the semiconductor structure 12; a second crack arrest layer 2, disposed on a second side 12s2 of the semiconductor structure 12, wherein the first side 12s1 is opposite to the second side 12s2; and a first insulating layer 3, surrounding the electronic unit 1. Through the design of the first crack arrest layer 11 and the second crack arrest layer 2, the present disclosure can reduce the damage caused during the manufacturing process of the electronic unit 1 and improve the product yield of the electronic device. In the present disclosure, the Young's modulus of the first crack arrest layer 11 may be less than that of the second crack arrest layer 2, so that the reliability of the electronic device can be improved.

[0114] In an embodiment of the present disclosure, as Figure 3A shown, the electronic unit 1 may include pads 13, and the electronic unit 1 can output or input signals through the pads 13. In an embodiment of the present disclosure, as Figure 3A shown, the first crack arrest layer 11 may include an opening 111, and the opening 111 exposes the pad 13; the second crack arrest layer 2 may include at least one opening 21, and the opening 21 exposes a part of the electronic unit 1. Specifically, in a direction along the vertical direction Z (e.g., the X direction), the semiconductor structure 12 has a first width W1, and the opening 21 has a second width W2 (e.g., the bottom width of the opening 21), wherein the sum of the second widths W2 of the openings 21 is less than or equal to the first width W1, and the ratio of the sum of the second widths W2 of the openings 21 to the first width W1 is greater than or equal to 0.5 and less than or equal to 1, thereby improving the heat dissipation characteristics of the electronic device, but not limited thereto. In an embodiment of the present disclosure, as Figure 3A shown, the thickness T1 of the first crack arrest layer 11 may be greater than or equal to the thickness T2 of the second crack arrest layer 2. The thickness T1 of the first crack arrest layer 11 may, for example, be between 5 micrometers and 30 micrometers (5 µm ≤ T1 ≤ 30 µm); the thickness T2 of the second crack arrest layer 2 may, for example, be between 0.5 micrometers and 10 micrometers (0.5 µm ≤ T2 ≤ 10 µm), but the present disclosure is not limited thereto. When the thicknesses of the first crack arrest layer 11 and the second crack arrest layer 2 meet the above limitations, the reliability of the electronic device can be improved. In an embodiment of the present disclosure, as Figure 3A shown, the first insulating layer 3 also surrounds the second crack arrest layer 2. In an embodiment of the present disclosure, as Figure 3A shown, the first insulating layer 3 may include a through hole H1, and the through hole H1 penetrates the first insulating layer 3. More specifically, the through hole H1 includes through holes 31 and 32, and the through holes 31 and 32 communicate with each other and penetrate the first insulating layer 3.

[0115] In an embodiment of the present disclosure, as Figure 3BAs shown, the side wall 11s1 of the first crack arresting layer 11 may be approximately parallel to the top view direction Z of the electronic unit 1, but the present disclosure is not limited thereto. In other embodiments, as Figure 3C shown, the side wall 11s1 of the first crack arresting layer 11 may not be parallel to the top view direction Z of the electronic unit 1. For example, the side wall 11s1 of the first crack arresting layer 11 may form an acute angle with the top view direction Z of the electronic unit 1. Thus, the contact area between the first insulating layer 3 and the electronic unit 1 can be increased, and the reliability of the electronic device can be improved.

[0116] In an embodiment of the present disclosure, as Figure 3A shown, the electronic device may further include: a circuit structure 4, and the circuit structure 4 may be electrically connected to the semiconductor structure 12 through the pad 13 of the electronic unit 1. In an embodiment of the present disclosure, as Figure 3A shown, the electronic device may further include: a metal layer 6, which is disposed on the electronic unit 1, the second crack arresting layer 2, and the first insulating layer 3. Among them, the metal layer 6 is electrically connected to the circuit structure 4. More specifically, the metal layer 6 may include a first portion 6a and a second portion 6b, and the first portion 6a is separated from the second portion 6b. Among them, the first portion 6a is disposed in the opening 21 of the second crack arresting layer 2 and contacts a part of the electronic unit 1, and the second portion 6b is disposed in the through hole 32 of the first insulating layer 3 and contacts and is electrically connected to the circuit structure 4. In an embodiment of the present disclosure, as Figure 3A shown, the projected area of the first portion 6a of the metal layer 6 may be greater than or equal to the projected area of the electronic unit 1, but the present disclosure is not limited thereto. The first portion 6a of the metal layer 6 may have a heat dissipation effect. Signals may be output or input to the electronic unit 1 through the second portion 6b of the metal layer 6 and the circuit structure 4. In an embodiment of the present disclosure, as Figure 3A shown, the metal layer 6 may include a first sub-metal layer 61 and a second sub-metal layer 62, and the second sub-metal layer 62 is disposed on the first sub-metal layer 61. Among them, the first sub-metal layer 61 of the first portion 6a may contact the electronic unit 1 through the opening 21 of the second crack arresting layer 2, and the first sub-metal layer 61 of the second portion 6b may contact and be electrically connected to the circuit structure 4 through the through hole 32 of the first insulating layer 3.

[0117] In an embodiment of the present disclosure, as Figure 3A shown, the electronic device may further include: a second insulating layer 5, which is disposed on one side of the circuit structure 4; and a third insulating layer 7, which is disposed on the first insulating layer 3 and surrounds the metal layer 6. In an embodiment of the present disclosure, as Figure 3A shown, the second insulating layer 5 is disposed closer to the first side 12s1 than the second side 12s2 of the semiconductor structure 12, and the third insulating layer 7 is disposed closer to the second side 12s2 than the first side 12s1 of the semiconductor structure 12. In an embodiment of the present disclosure, as Figure 3AAs shown, the electronic device may further include: a connection element 8 disposed on the metal layer 6 and electrically connected to the metal layer 6. More specifically, the connection element 8 may include a first portion 8a and a second portion 8b, with the first portion 8a separated from the second portion 8b. Among them, the first portion 8a of the connection element 8 is disposed on the first portion 6a of the metal layer 6, and the second portion 8b of the connection element 8 is disposed on the second portion 6b of the metal layer 6. In an embodiment of the present disclosure, as Figure 3A shown, the surface of the connection element 8 is non-coplanar with the surface of the third insulating layer 7, but the present disclosure is not limited thereto.

[0118] In the present disclosure, the first crack stopping layer 11, the second crack stopping layer 2, the first insulating layer 3, the circuit structure 4, the second insulating layer 5, the metal layer 6, the third insulating layer 7

[0119] and the materials and other features of the connection element 8 may be as described above and will not be elaborated here.

[0120] Figure 4 is a cross-sectional schematic diagram of the electronic device according to an embodiment of the present disclosure. Among them, Figure 4 the electronic device of Figure 3A is similar, except for the following differences.

[0121] In an embodiment of the present disclosure, as Figure 4 shown, the electronic device may further include an insulating layer 9 disposed on the first insulating layer 3, where the insulating layer 9 is located between the first insulating layer 3 and the third insulating layer 7. In an embodiment of the present disclosure, as Figure 4 shown, the insulating layer 9 may surround the electronic unit 1 and the second crack stopping layer 2.

[0122] In an embodiment of the present disclosure, as Figure 4 shown, a part of the second crack stopping layer 2 protrudes from the electronic unit 1. More specifically, the second crack stopping layer 2 may include a protruding portion 2a, which does not overlap with the electronic unit 1 in the top-down direction Z of the electronic unit 1. In an embodiment of the present disclosure, as Figure 4 shown, the protruding portion 2a of the second crack stopping layer 2 may be in contact with the side wall 1s1 of the electronic unit 1. In an embodiment of the present disclosure, the protruding portion 2a may have a structure such as an "L" shape or a mirror "L" shape, but the present disclosure is not limited thereto. The protruding portion 2a can increase the contact area between the second crack stopping layer 2 and the insulating layer 9, and can improve the reliability of the electronic device.

[0123] In an embodiment of the present disclosure, as Figure 4 shown, the first insulating layer 3 may include a through hole 31, and the insulating layer 9 may include through holes 91 and 92. The through hole 31, the through holes 91 and 92 communicate with each other to form a through hole H2, and the through hole H2 may penetrate through the first insulating layer 3 and the insulating layer 9.

[0124] In the present disclosure, the material of the insulating layer 9 may be as described above and will not be elaborated herein.

[0125] Figure 5 An electronic device according to an embodiment of the present disclosure. Among them, Figure 5 The electronic device is similar to Figure 3A except for the following differences.

[0126] In the present disclosure, Figure 5 The manufacturing method of the electronic device may be similar to, for example, the method shown in Figures 2A to 2E and will not be elaborated herein.

[0127] In an embodiment of the present disclosure, as shown in Figure 5 , a part of the second crack stopper layer 2 protrudes from the electronic unit 1. More specifically, the second crack stopper layer 2 may include a protruding portion 2a, and in the top view direction Z of the electronic unit 1, the protruding portion 2a does not overlap with the electronic unit 1. In an embodiment of the present disclosure, as shown in Figure 5 , the protruding portion 2a of the second crack stopper layer 2 may contact the side wall 1s1 of the electronic unit 1. In an embodiment of the present disclosure, the protruding portion 2a may have, for example, an "L" shape or a mirror "L" shape structure, but the present disclosure is not limited thereto. The protruding portion 2a can increase the contact area between the second crack stopper layer 2 and the first insulating layer 3 and can improve the reliability of the electronic device. In addition, after the circuit structure 4 and the second insulating layer 5 are formed separately, they can be joined to the electronic unit 1 through another conductive material M'. Among them, at least one sub-layer of the second insulating layer 5 (for example, the first part 5a or the second part 5b of the second insulating layer 5) includes a through hole (for example, the opening 5a1 of the first part 5a or the opening 5b1 of the second part 5b), and the through hole can penetrate the sub-layer (for example, through silicon via or through glass via), thereby improving the flexibility of forming the electronic device. In addition, as shown in Figure 5 , the electronic device may include another circuit structure 4', disposed in the opening 111 of the first crack stopper layer 11, and the another circuit structure 4' can be electrically connected to the electronic unit 1 through the pad 13. In an embodiment of the present disclosure, the electronic device may include another insulating layer IL3, disposed between the electronic unit 1 and the circuit structure 4, and another conductive material M' may be disposed in the through hole IL3h of the another insulating layer IL3. In the present disclosure, the material of the another circuit structure 4' is similar to that of the circuit structure 4 and will not be elaborated herein. The another conductive material M' may include tin, silver, copper, nickel, gold, their alloys or a combination of the above, but the present disclosure is not limited thereto. The material of the another insulating layer IL3 may include silicon nitride, silicon oxide, silicon oxynitride, silicon carbonitride or a combination thereof, but the present disclosure is not limited thereto.

[0128] In an embodiment of the present disclosure, since the steps of patterning the second crack stop layer 2 and the first insulating layer 3 can be omitted, the second crack stop layer 2 may not have an opening 21 as shown in Figure 3A , and the first insulating layer may not have a via H1 as shown in Figure 3A . In an embodiment of the present disclosure, as shown in Figure 5 , the circuit structure 4 is disposed on the first side 12s1 of the semiconductor structure 12 and is electrically connected to the semiconductor structure 12 through the pad 13 of the electronic unit 1. More specifically, the circuit structure 4 includes a first portion 4a and a second portion 4b, and the second insulating layer 5 includes a first portion 5a and a second portion 5b. Among them, the first portion 5a of the second insulating layer 5 is located between the first insulating layer 3 and the second portion 5b of the second insulating layer 5. The first portion 4a of the circuit structure 4 is electrically connected to the semiconductor structure 12 through another conductive material M', another circuit structure 4' and the pad 13, and the second portion 4b of the circuit structure 4 is electrically connected to the first portion 4a of the circuit structure 4 disposed in the opening 5a1 of the first portion 5a of the second insulating layer 5. In an embodiment of the present disclosure, as shown in Figure 5 , the metal layer 6 is disposed on the second crack stop layer 2 and is electrically separated from the circuit structure 4. The metal layer 6 may have a comb-like structure, and the comb-like structure can improve the heat dissipation effect of the electronic unit.

[0129] In an embodiment of the present disclosure, as shown in Figure 5 , the electronic device may further include a conductive material M, and the conductive material M can be electrically connected to the semiconductor structure 12 through the circuit structure 4, another conductive material M', another circuit structure 4' and the pad 13, so as to output a signal from the electronic unit 1 to the outside or input a signal from the outside to the electronic unit 1. In the present disclosure, the conductive material M may include tin, silver, copper, nickel, gold, their alloys or a combination of the above, but the present disclosure is not limited thereto.

[0130] Figure 6 is an electronic device according to an embodiment of the present disclosure. Among them, Figure 6 The electronic device is similar to Figure 3A , except for the following differences.

[0131] In an embodiment of the present disclosure, as shown in Figure 6 , a part of the second crack stop layer 2 protrudes from the electronic unit 1. More specifically, the second crack stop layer 2 may include a protruding portion 2a, and in the top view direction Z of the electronic unit 1, the protruding portion 2a does not overlap with the electronic unit 1. In an embodiment of the present disclosure, as shown in Figure 6As shown, the protruding portion 2a of the second crack arrest layer 2 can be in contact with the side wall 1s1 of the electronic unit 1. In an embodiment of the present disclosure, the protruding portion 2a can have, for example, a "1"-shaped structure, but the present disclosure is not limited thereto. The protruding portion 2a can increase the contact area between the second crack arrest layer 2 and the first insulating layer 3, and can improve the reliability of the electronic device.

[0132] In an embodiment of the present disclosure, as Figure 6 shown, the electronic unit 1 can have a missing corner portion 1a, and the second crack arrest layer 2 can cover the missing corner portion 1a. The "missing corner portion" refers to, for example, an uneven surface of the second side 12s2 of the semiconductor structure 12. The missing corner portion 1a can increase the contact area between the second crack arrest layer 2 and the electronic unit 1, and can improve the reliability of the electronic device.

[0133] Figure 7 is an electronic device according to an embodiment of the present disclosure. Among them, Figure 7 the electronic device is similar to Figure 3A except for the following differences.

[0134] In an embodiment of the present disclosure, as Figure 7 shown, the electronic unit 1 can include a passivation layer 14 disposed between the first crack arrest layer 11 and the semiconductor structure 12. Among them, the passivation layer 14 has an opening 141, and the pad 13 is disposed in the opening 141, and the first crack arrest layer 11 exposes the pad 13. The second crack arrest layer 2 can include a protruding portion 2a, and the protruding portion 2a is in contact with the side wall 1s1 of the electronic unit 1. Among them, the protruding portion 2a can have, for example, a "1"-shaped structure, but the present disclosure is not limited thereto. The first insulating layer 3 surrounds the electronic unit 1 and the second crack arrest layer 2. In the present disclosure, the opening 141 of the passivation layer 14 can be formed by, for example, mechanical drilling, laser drilling, yellow light process or a combination thereof, but the present disclosure is not limited to the above methods. In the present disclosure, the material of the passivation layer 14 can include silicon nitride, silicon oxide, silicon oxynitride, silicon carbonitride or a combination thereof, but the present disclosure is not limited thereto.

[0135] In an embodiment of the present disclosure, as Figure 7 shown, the circuit structure 4 includes a first portion 4a and a second portion 4b, and the second insulating layer 5 includes a first portion 5a and a second portion 5b. Among them, the first portion 5a of the second insulating layer 5 is located between the first insulating layer 3 and the second portion 5b of the second insulating layer 5. The first portion 4a of the circuit structure 4 is electrically connected to the semiconductor structure 12 through the pad 13, and the second portion 4b of the circuit structure 4 is electrically connected to the first portion 4a of the circuit structure 4 through the opening 5a1 of the first portion 5a of the second insulating layer 5.

[0136] In an embodiment of the present disclosure, as Figure 7As shown, the electronic device further includes another insulating layer IL1 disposed on the second insulating layer 5. The another insulating layer IL1 has a through hole IL1h. The circuit structure 4 further includes a third part 4c disposed in the through hole IL1h of the another insulating layer IL1. Wherein, the second part 4b of the circuit structure 4 is located between the first part 4a and the third part 4c, and the third part 4c of the circuit structure 4 is electrically connected to the second part 4b. In the present disclosure, the through hole IL1h of the another insulating layer IL1 can be formed by, for example, mechanical drilling, laser drilling, yellow light process or a combination thereof, but the present disclosure is not limited to the above methods. In the present disclosure, the material of the another insulating layer IL1 can include silicon nitride, silicon oxide, silicon oxynitride, silicon carbonitride or a combination thereof, but the present disclosure is not limited thereto.

[0137] In an embodiment of the present disclosure, the first crack stopping layer 11 can include a first filler, the second insulating layer 5 can include a second filler, and the another insulating layer IL1 can include a third filler. Wherein, the size of the first filler is smaller than the size of the second filler, and the size of the second filler is smaller than the size of the third filler. The "size of the filler" refers to, for example, the particle size distribution (D50) of the filler or the average particle size of the filler. In the present disclosure, the materials of the first filler, the second filler and the third filler can be the same or different. The materials of the first filler, the second filler and the third filler can each include silicon dioxide, titanium oxide, aluminum oxide, silicon carbide, graphene, other heat dissipation materials, other suitable materials or a combination of the above, but the present disclosure is not limited thereto.

[0138] In an embodiment of the present disclosure, as Figure 7 shown, the metal layer 6 is disposed on the second side 12s2 of the semiconductor structure 12. Wherein, the second crack stopping layer 2 is disposed between the semiconductor structure 12 and the metal layer 6. More specifically, the metal layer 6 can include a first sub-metal layer 61 and a second sub-metal layer 62. The first sub-metal layer 61 is disposed between the second sub-metal layer 62 and the second crack stopping layer 2. Wherein, the first sub-metal layer 61 can be in contact with and electrically connected to the second crack stopping layer 2. The second sub-metal layer 62 of the metal layer 6 can have a comb-like structure. The comb-like structure can improve the heat dissipation effect of the electronic unit.

[0139] In an embodiment of the present disclosure, as Figure 7 shown, the electronic unit 1 can be electrically connected to a circuit board B through a conductive material M so as to drive or control the electronic unit 1. More specifically, the electronic unit 1 can be electrically connected to the circuit structure 4 through the pad 13 and electrically connected to the conductive material M through the circuit structure 4, so as to transmit a signal from the circuit board B to the electronic unit 1, or transmit a signal from the electronic unit 1 to the circuit board B. In an embodiment of the present disclosure, as Figure 7As shown, the electronic device further includes another insulating layer IL2 disposed on another insulating layer IL1. The another insulating layer IL2 has a through hole IL2h, and the conductive material M can be disposed in the through hole IL2h. In the present disclosure, the circuit board B may include a rigid circuit board or a flexible circuit board, such as a printed circuit board (PCB) or a flexible printed circuit (FPC), but the present disclosure is not limited thereto. In the present disclosure, the conductive material M may include tin, silver, copper, nickel, gold, their alloys, or a combination of the above, but the present disclosure is not limited thereto. In the present disclosure, the through hole IL2h of the another insulating layer IL2 can be formed by, for example, mechanical drilling, laser drilling, yellow light process, or a combination thereof, but the present disclosure is not limited to the above methods. In the present disclosure, the material of the another insulating layer IL2 may include silicon nitride, silicon oxide, silicon oxynitride, silicon carbonitride, or a combination thereof, but the present disclosure is not limited thereto.

[0140] In an embodiment of the present disclosure, as Figure 7 shown, the electronic device may include a protective layer PL disposed between the circuit board B and the circuit structure 4. More specifically, the protective layer PL may surround or cover the conductive material M, the another insulating layer IL1, and / or the another insulating layer IL2. In an embodiment of the present disclosure, as Figure 7 shown, the protective layer PL may be in contact with the side wall IL1s of the another insulating layer IL1 and / or the side wall IL2s of the another insulating layer IL2. The protective layer PL can be used to block the entry of external air or moisture, and can improve the reliability of the electronic device. In the present disclosure, the material of the protective layer PL may include glass glue, optical glue, silicone glue, hot melt glue, AB glue, light-curing glue, polymer glue material, resin, or a combination thereof, but the present disclosure is not limited thereto.

[0141] By providing the first crack arrest layer 11 and the second crack arrest layer 2, the present disclosure can be used to protect the components in the electronic unit 1, reduce the damage to the electronic unit 1 in subsequent processing steps, and thus improve the yield of the electronic device.

[0142] The above specific embodiments should be construed as illustrative only and not in any way limiting the remainder of the present disclosure.

Claims

1. An electronic device, characterized in that: include: An electronic unit includes a semiconductor structure and a first crack-stop layer, wherein the first crack-stop layer is disposed on a first side of the semiconductor structure; a second crack-stop layer disposed on a second side of the semiconductor structure, wherein the first side is opposite to the second side; and a first insulating layer surrounding the electronic unit; Wherein, the Young's modulus of the first crack-stopping layer is smaller than the Young's modulus of the second crack-stopping layer.

2. The electronic device according to claim 1, characterized in that: The thickness of the first crack-stopping layer is greater than or equal to the thickness of the second crack-stopping layer.

3. The electronic device according to claim 1, characterized in that: The first insulating layer surrounds the second crack-stopping layer.

4. The electronic device according to claim 1, characterized in that: Also includes: A circuit structure is electrically connected to the semiconductor structure through a pad of the electronic unit, wherein the pad is exposed by the first crack-stop layer.

5. The electronic device according to claim 4, characterized in that: Also includes: A metal layer is disposed on the electronic unit, the second crack-stop layer and the first insulating layer, wherein the metal layer is electrically connected to the circuit structure.

6. The electronic device according to claim 5, characterized in that: Also includes: a second insulating layer, disposed on one side of the circuit structure; as well as A third insulating layer is disposed on the first insulating layer and surrounds the metal layer.

7. The electronic device according to claim 5, characterized in that: Also includes: A connecting element is disposed on the metal layer and electrically connected to the metal layer.

8. The electronic device according to claim 1, characterized in that: The second crack-stopping layer includes an opening, and the opening exposes a portion of the electronic unit.

9. The electronic device according to claim 1, characterized in that: A portion of the second crack-stop layer protrudes out of the electronic unit.

10. The electronic device according to claim 1, characterized in that: The first insulating layer includes a through hole, and the through hole penetrates the first insulating layer.

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