Photoelectric liquid interconnection structure of system-on-chip, assembly method of photoelectric liquid interconnection structure and system-on-chip

Abstract

The invention discloses a photoelectric liquid interconnection structure of a system-on-chip, an assembly method of the photoelectric liquid interconnection structure and the system-on-chip. The photoelectric liquid interconnection structure comprises a heat dissipation microsystem, a wafer-level substrate and a power supply microsystem interconnection structural member which are stacked in a layered manner, the power supply microsystem comprises a power supply board II for preliminarily distributing an external power supply, and a power supply board I for inputting and controlling signals and secondarily distributing current preliminarily distributed by the power supply board II; the interconnection structural member comprises an elastic needle connector used for current transmission and signal transmission between the first power supply board and the second power supply board, and a fuzz button connector used for signal transmission and current transmission between the first power supply board and the wafer-level substrate and having a double-sided elastic contact function. Assembling is carried out by adopting a layered stacking connection mode and a step-by-step assembling method, high-density integration and high-precision interconnection of modules / components are achieved, and the technical problem that an existing on-chip system cannot achieve high-density and high-precision signal transmission, system power supply and heat dissipation in a limited space is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of fabricating optoelectro - liquid interconnection structures between multiple semiconductor chips on or within an insulating substrate, and particularly refers to an optoelectro - liquid interconnection structure for a system - on - wafer, an assembly method thereof, and a system - on - wafer. Background Art

[0002] In the field of semiconductor manufacturing, with the continuous increase in data scale, Moore's Law is no longer sufficient to meet the computing requirements, and thus the system - on - wafer has been proposed. A system - on - wafer (SoW) refers to a complete computer system integrating basic hardware facilities such as a processor, memory, storage, and peripheral interfaces. It is an embeddable full - function computer with the characteristics of high integration, low power consumption, and high performance.

[0003] The substrate used for the system - on - wafer is the entire wafer. The wafer is not diced, and a redistribution process is used for wiring. Active devices such as switches, operational amplifiers, analog - to - digital converters, and logic unit circuits are fabricated using semiconductor processes according to the system functions. Alternatively, devices may not be fabricated according to the system application requirements, and only the redistribution process is used for wiring, and the entire wafer is used to replace the traditional substrate. All functional circuits and active units are integrated on the wafer. The system - on - wafer can integrate thousands of sensing, radio frequency, computing, storage, communication, etc. modules on a single wafer.

[0004] However, the system - on - wafer has the following technical problems that need to be urgently solved: First, the interface interconnection problem. The number of interfaces for the wafer to communicate externally and supply power can reach more than 10,000, and the node pitch is usually within 0.9 mm. A reliable connection device is required for accurate signal transmission of the wafer. Second, the installation problem. The thickness of the wafer is usually within 1 mm, and the size is more than 8 inches. The wafer will warp during the production process, and it is necessary to ensure that the wafer is uniformly stressed during installation to avoid breakage. Third, the signal extraction, system power supply, and heat dissipation problems. The system - on - wafer has a high integration density, high power consumption, and complex interconnection network. It is necessary to ensure accurate signal transmission, system power supply, and heat dissipation of the system - on - wafer within a limited space. Summary of the Invention

[0005] Aiming at the deficiencies in the above - mentioned background art, the present invention proposes an optoelectro - liquid interconnection structure for a system - on - wafer, an assembly method thereof, and a system - on - wafer, which are used to solve the technical problem that the existing system - on - wafer cannot achieve high - density and high - precision signal transmission, system power supply, and heat dissipation within a limited space.

[0006] The technical solution of the present application is as follows: An optoelectronic liquid interconnection structure for a system-on-chip, comprising a heat dissipation microsystem, a wafer-level substrate, and a power microsystem interconnection structure member stacked in layers. The power microsystem includes a power supply board two for initially distributing external power, and a power supply board one for signal input and control and for secondarily distributing the current initially distributed by the power supply board two. The interconnection structure member includes a spring pin connector for current transmission and signal transmission between the power supply board one and the power supply board two, and a pogo pin connector for signal transmission and current transmission between the power supply board one and the wafer-level substrate and having a double-sided elastic contact function.

[0007] Based on the above technical solution, as a preferred technical solution, the heat dissipation microsystem includes a cold plate two for actively dissipating heat from the wafer-level substrate, a cold plate one for actively dissipating heat from the power microsystem, and a metal heat spreader for natural heat dissipation of the power microsystem.

[0008] Based on the above technical solution, as a preferred technical solution, the cold plate two, the wafer-level substrate, the pogo pin connector, the power supply board one, the cold plate one, the power supply board two, and the metal heat spreader are stacked in sequence.

[0009] Based on the above technical solution, as a preferred technical solution, a groove for accommodating the wafer-level substrate is provided on the cold plate two. The pogo pin connector includes a housing body for pressing the edge of the wafer-level substrate. The housing body is detachably connected to an inner housing body, and a plurality of pogo pin assemblies for signal transmission and current transmission between the power supply board two and the wafer-level substrate are provided on the inner housing body.

[0010] Based on the above technical solution, as a preferred technical solution, the pogo pin assembly includes an insulator detachably connected to the inner housing body. The insulator is inserted with a plurality of pogo pins through pogo pin fixing caps, and both ends of the pogo pins are elastically in contact with the power supply board one and the wafer-level substrate respectively.

[0011] Based on the above technical solution, as a preferred technical solution, the pogo pin is a beryllium copper gold-plated part, and the insulator is connected with a dust-proof cover for dust-proofing the pogo pins.

[0012] Based on the above technical solution, as a preferred technical solution, the spring pin connector includes a spring pin connector two for current transmission between the power supply board one and the power supply board two, and a spring pin connector one for current transmission and signal transmission between the power supply board one and the power supply board two. Both the spring pin connector one and the spring pin connector two pass through the cold plate one and are in interference fit with the cold plate one.

[0013] Based on the above technical solutions, as a preferred technical solution, a first positioning structure for alignment and a first connecting member for pressing are provided between the second cold plate, the wafer-level substrate, and the pin button connector; a second positioning structure for alignment is provided between the pin button connector and the first power supply board, and an avoidance structure for avoiding components on the first power supply board and the second power supply board is provided on the first cold plate. A second connecting member for pressing is provided between the second cold plate, the wafer-level substrate, the outer housing, the first power supply board, and the first cold plate.

[0014] Based on the above technical solutions, as a preferred technical solution, a third positioning structure for alignment is provided between the first cold plate and the second power supply board, and an avoidance structure for avoiding components of the second power supply board is provided on the metal heat sink plate. A third connecting member for pressing is provided between the first cold plate, the second power supply board, and the metal heat sink plate.

[0015] An assembly method for an optoelectronic liquid interconnection structure for a system-on-chip, assembling the optoelectronic liquid interconnection structure for a system-on-chip according to any one of the above technical solutions according to the following steps; Step 1: First, place the wafer-level substrate in the groove of the second cold plate through the first positioning structure, and then connect the outer housing of the pin button connector to the second cold plate through the first connecting member to pre-press the wafer-level substrate. Step 2: First, install the pin button assembly onto the inner housing of the pin button connector, then assemble the inner housing to the outer housing, and then install the first power supply board above the pin button connector through the second positioning structure. Step 3: First, press-fit the first pin connector and the second pin connector of the pin connector to the first cold plate respectively, and then press the second cold plate, the wafer-level substrate, the outer housing, the first power supply board, and the first cold plate through the second connecting member, so that the pins of the pin connector are in full contact with the first power supply board, and the two ends of the pin buttons of the pin button connector are in full contact with the first power supply board and the wafer-level substrate respectively. Step 4: First, install the second power supply board above the first cold plate through the third positioning structure, and then press the metal heat sink plate, the second power supply board, and the first cold plate through the third connecting member.

[0016] A system-on-chip includes a chassis provided with an optical signal interface, a power interface, and a liquid cooling interface. The chassis is provided with the optoelectronic liquid interconnection structure for a system-on-chip according to any one of the above technical solutions. The optical signal interface is connected to the wafer-level substrate through an optical module connected to the power micro-system. The power interface is connected to the power micro-system, and the liquid cooling interface is connected to the heat dissipation micro-system.

[0017] Based on the above technical solutions, as a preferred technical solution, the liquid cooling interface includes a blind-mate floating fluid connector and a diverter. The blind-mate floating fluid connector is connected to the chassis, and the diverter is connected to the heat dissipation micro-system.

[0018] The technical solution disclosed by the present invention has the following beneficial effects: 1. The optoelectro-hydraulic interconnection structure for the system-on-chip in the present invention provides an interconnection structure integrating light, electricity, and liquid for the core processing unit of the system-on-chip. It is assembled by means of layered stacking connection and step-by-step assembly method, realizing high-density integration and high-precision interconnection of modules / components, meeting the signal extraction, power supply, and heat dissipation requirements of the core processing unit of the system-on-chip, and solving the technical problems that the existing system-on-chip cannot achieve high-density and high-precision signal transmission, system power supply, and heat dissipation in a limited space.

[0019] 2. In the present invention, a hairpin button connector with double-sided elastic contact function is used for signal transmission and current transmission between the second power supply board and the wafer-level substrate, which can realize power supply and signal interconnection between the wafer-level substrate and the second power supply board within a node pitch ≤ 0.9 mm and a height ≤ 4 mm, and solve the problem of signal extraction at the ten-thousand-way level of the wafer-level substrate.

[0020] 3. Since the wafer-level substrate will warp, in order to prevent the hairpin button connector from crushing the wafer-level substrate during the installation process, a step-by-step installation method is adopted to gradually flatten the wafer-level substrate and reduce the risk of crushing. At the same time, due to the large number of signal extractions from the wafer-level substrate, in order to facilitate later fault troubleshooting and reduce replacement costs, a modular design concept is adopted for the design of the hairpin button connector. At the same time, in order to ensure the alignment accuracy of signal extraction, a positioning structure is used for precise positioning.

[0021] 4. In order to meet the complex signal transmission and power supply requirements of the system-on-chip, the present invention uses the end-face elastic contact method of the hairpin button connector and the spring pin connector to transmit signals, realizing low-profile and high-density interconnection of the system-on-chip. At the same time, since both the hairpin button connector and the spring pin connector adopt the end-face elastic contact method, it is also convenient for disassembly and replacement during later maintenance.

[0022] 5. The thermal power consumption of the system-on-chip is mainly concentrated on the wafer-level substrate, the first power supply board, and the second power supply board. In order to solve the problem of high-power heat dissipation of the system-on-chip, the present invention uses the second cold plate to dissipate heat from the wafer-level substrate, and designs a cold plate between the wafer-level substrate, the first power supply board, and the second power supply board for heat dissipation; uses the first cold plate to dissipate heat from the first power supply board and the second power supply board, and microchannels are arranged on both the first cold plate and the second cold plate to increase the heat dissipation density; both the first cold plate and the second cold plate adopt an integrated structure and function design, and the first cold plate avoids the components on the first power supply board and the second power supply board to reduce the volume of the system-on-chip, further improving the low-profile and high-density interconnection of the system-on-chip. Both the first cold plate and the second cold plate adopt the embedded method of micro liquid-cooling connectors, which can not only support the optoelectro-hydraulic interconnection structure components but also improve the liquid-cooling heat dissipation efficiency.

[0023] 6. The chassis of the on-chip system is connected to the core processing unit by means of integrated signal transmission of optical interfaces, electrical interfaces and liquid cooling interfaces. Signal transmission is achieved through the optical interface, power supply for the on-chip system is achieved through the electrical interface, and heat dissipation of the on-chip system is achieved through the liquid cooling interface. The overall chassis is designed modularly for easy disassembly. The liquid cooling interface, optical interface and electrical interface are respectively arranged on both sides or two sides of the system, facilitating later debugging. Description of the Drawings

[0024] In order to more clearly illustrate the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0025] Figure 1 It is a top view of the optoelectronic-liquid interconnect structure for the on-chip system after connecting the optoelectronic interfaces; Figure 2 It is Figure 1 The cross-sectional view of the A-A plane in Figure 3 It is Figure 1 The cross-sectional view of the B-B plane in Figure 4 It is Figure 1 The cross-sectional view of the C-C plane in Figure 5 It is a schematic cross-sectional view of the overall architecture of the optoelectronic-liquid interconnect structure for the on-chip system; Figure 6 It is a three-dimensional structure schematic diagram of the optoelectronic-liquid interconnect structure for the on-chip system after connecting the optoelectronic interfaces; Figure 7 It is Figure 6 The exploded view of Figure 8 It is a partial architecture schematic diagram of the shag button connector connecting the first power supply board and the wafer-level substrate; Figure 9 It is a three-dimensional exploded view of the shag button connector; Figure 10 It is Figure 9 The exploded view of the shag button assembly in Figure 11 It is a schematic diagram of the installation process of the second cold plate, wafer-level substrate, shag button connector and the first power supply board; Figure 12 It is a schematic diagram of the installation process of the first cold plate; Figure 13 It is a schematic diagram of the installation process of the second power supply board and the metal heat sink; Figure 14 It is an enlarged schematic diagram when the contact parts of multiple shag buttons are placed separately; Figure 15 It is a schematic enlarged structure diagram of the spring pin connector I; Figure 16 It is a schematic enlarged structure diagram of the spring pin connector II; Figure 17 It is a schematic enlarged structure diagram of different types of spring pin contacts in the spring pin connector; Figure 18 It is a schematic three-dimensional structure diagram of the system-on-chip; Figure 19 It is a schematic diagram of the liquid cooling path of the system-on-chip; Figure 20 It is a schematic diagram of the optical signal transmission path of the system-on-chip; Figure 21 It is a schematic diagram of the current transmission path of the system-on-chip.

[0026] Explanation of the reference numerals in the drawings: Thermal management microsystem 1, cold plate I 101, cold plate II 102, metal heat spreader 103; Wafer-level substrate 2; Power microsystem 3, power supply board I 301, power supply board II 302, optical module 303; Spring pin connector 4, spring pin connector I 401, spring pin connector II 402; Fuzzy button connector 5, outer housing 501, inner housing 502, fuzzy button assembly 503; Insulator 5031, fuzzy button 5032, dust cover 5033, fuzzy button fixing cap 5034, connecting screw 5035; Chassis 6, optical signal interface 601, power interface 602, liquid cooling interface 603; Blind mating floating fluid connector 6031, liquid distributor 6032; Positioning structure I 701, positioning structure II 702, positioning structure III 703; Connector I 801, connector II 802, connector III 803, connector IV 804. Detailed implementation manners

[0027] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the core concept of the present invention and the following embodiments, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0028] In the field of integrated circuit technology, the present invention proposes a design of an optoelectro-hydraulic system based on a system-on-chip, and specifically provides a design scheme for an optoelectro-hydraulic system of an on-chip interconnection system.

[0029] The core of the on-chip interconnection system is its core processing unit, which includes interconnection structural components, a wafer-level substrate, a general interface connector, a power microsystem, a heat dissipation microsystem, and structural components. The overall assembly is carried out in a tile-stacking manner.

[0030] In the present invention, relying on an 8-inch wafer system prototype, the core processing unit is designed and developed, with key consideration given to the optical, electrical, and fluid interconnection requirements of the core processing unit, including support structural components, assembly structural components, and a heat dissipation circulation system, etc., to achieve the comprehensive integration of modules / components, meet the requirements of power supply, heat dissipation, and external data I / O interfaces, and solve the problem of realizing high-density and high-precision integration within a limited space of the on-chip system.

[0031] Embodiment 1, an optoelectro-hydraulic interconnection structure for an on-chip system, as Figures 1 to 4 shown, without an external chassis, includes a heat dissipation microsystem 1, a wafer-level substrate 2, and a power microsystem 3 interconnection structural components stacked in layers. Among them, the power microsystem 3 performs optoelectronic transmission for the wafer-level substrate 2, and the heat dissipation microsystem 1 dissipates heat for the wafer-level substrate 2 and the power microsystem 3; the interconnection structural components include optoelectronic transmission structural components between the wafer-level substrate 2 and the power microsystem 3, and also include fastening structural components for connecting and pressing tightly between the heat dissipation microsystem 1, the wafer-level substrate 2, and the power microsystem 3. More importantly, the heat dissipation microsystem 1, the wafer-level substrate 2, and the power microsystem 3 interconnection structural components are all arranged in layers and stacked in sequence.

[0032] Specifically, the power microsystem 3 includes a power supply board two 302 for initially distributing external power, and a power supply board one 301 for signal input and control and for secondarily distributing the current initially distributed by the power supply board two 302. The interconnection structural components include a spring pin connector 4 for current transmission and signal transmission between the power supply board one 301 and the power supply board two 302, and a hairpin button connector 5 for signal transmission and current transmission between the power supply board one 301 and the wafer-level substrate 2 and having a double-sided elastic contact function.

[0033] Among them, the core contact part in the spring pin connector 4 is a spring pin, which can realize the transmission of current and signals between boards. The height and the number of cores of the spring pin connector 4 can be determined according to the actual situation, and those skilled in the art can select its performance according to actual needs. Preferably, the typical parameters of the spring pin connector 4 are as follows: Working current 1 A / 5A (according to actual requirements) Insulation resistance ≥1000 MΩ Dielectric withstand voltage 100V AC standard atmospheric pressure Insulation resistance ≤80mΩ Among them, as Figure 10As shown, the core contact in the hairpin button connector 5 is the hairpin button 5032. To ensure the node pitch, it is preferred to use a hairpin button 5032 with a φ0.38 specification to achieve the transmission of current and signals and provide axial float. Through rigorous dimension chain design and precise advanced processing technology, the consistency and reliability of the hairpin button connector 5 are ensured, and the products can be interchangeable. Preferably, the typical parameters of the hairpin button connector 5 are as follows: Working current 1A single core Insulation resistance ≥250 MΩ Dielectric withstand voltage 250V AC standard atmospheric pressure Transmission rate 6.5Gbps Insertion loss ≥ -3dB Return loss ≤ -5dB Near-end crosstalk ≤ -30dB Characteristic impedance 99 ± 15Ω Based on the above embodiments, as a preferred embodiment, the heat dissipation micro-system 1 includes a cold plate two 102 for active heat dissipation of the wafer-level substrate 2, a cold plate one 101 for active heat dissipation of the power micro-system 3, and a metal heat pipe 103 for natural heat dissipation of the power micro-system 3.

[0034] Specifically, the metal heat pipe 103 avoids the components above the power supply board two 302 and simultaneously performs natural heat dissipation on the power supply board two 302.

[0035] The spring pin connector 4 is located between the power supply board one 301 and the power supply board two 302 to achieve the transmission of current and control signals between the power supply board one 301 and the power supply board two 302.

[0036] The power supply board two 302 performs preliminary distribution of the external power supply to achieve the first-level conversion of the power supply.

[0037] The cold plate one 101 avoids the components of the power supply board one 301 and the power supply board two 302 to achieve active heat dissipation of the power supply board one 301 and the power supply board two 302. At the same time, it provides support for the spring pin connector 4 to achieve an integrated design of structural functions.

[0038] The power supply board one 301, as Figure 2 and Figure 5 shown, is equipped with an optical module 303 to achieve signal input and control. At the same time, it undertakes the current of the power supply board one 301 to achieve secondary distribution of the power supply.

[0039] The hairpin button connector 5 achieves ten-thousand-channel signal transmission and power transmission between the power supply board one 301 and the wafer system.

[0040] The cold plate two 102 performs active heat dissipation on the chips integrated on the wafer.

[0041] Based on the above embodiments, as a preferred embodiment, as Figure 5 shown, the cold plate two 102, the wafer-level substrate 2, the hairpin button connector 5, the power supply board one 301, the cold plate one 101, the power supply board two 302, and the metal heat pipe 103 are stacked in sequence. That is, in Figure 5Among them, the second cold plate 102, the wafer-level substrate 2, the hairpin button connector 5, the first power supply board 301, the first cold plate 101, the second power supply board 302, and the metal heat sink 103 are stacked in sequence from bottom to top.

[0042] Based on the above embodiments, as a preferred embodiment, as Figures 5 to 9 shown, a groove for accommodating the wafer-level substrate 2 is provided on the second cold plate 102. The hairpin button connector 5 includes a housing 501 for pressing the edge of the wafer-level substrate 2. The housing 501 is detachably connected to an inner housing 502, and a plurality of hairpin button components 503 for signal transmission and current transmission between the second power supply board 302 and the wafer-level substrate 2 are provided on the inner housing 502.

[0043] That is, an 8-inch wafer system needs to lead out tens of thousands of signals to the upper power supply board 1, and the signal node pitch ≤ 0.9 mm. To solve the low-profile signal interconnection between the wafer-level substrate and the first power supply board 301, a hairpin button connector 5 with double-sided elastic contact is proposed, which can realize power and signal interconnection between the wafer-level substrate and the first power supply board 301 within a 0.9 mm node pitch and a 4 mm height.

[0044] The hairpin button connector 5 is set as a detachable housing 501, an inner housing 502, and a plurality of hairpin button components 503. It can not only flatten the wafer-level substrate 2 step by step by means of step-by-step installation to prevent the hairpin button connector 5 from crushing the wafer-level substrate 2 during installation and reduce the crushing risk, but also facilitate the later fault troubleshooting of the wafer-level substrate 2 with a large number of signal leads and reduce the replacement cost. Preferably, the inner housing 502 of the hairpin button connector 5 is arranged at the central position of the housing 501, and 9 hairpin button components 503 are arranged in an array on the inner housing 502.

[0045] Based on the above embodiments, as a preferred embodiment, as Figure 10 shown, the hairpin button component 503 includes an insulator 5031 detachably connected to the inner housing 502, and a plurality of hairpin buttons 5032 are inserted into the insulator 5031 through hairpin button fixing caps 5034. As Figure 8 shown. Both ends of the hairpin button 5032 are elastically in contact with the first power supply board 301 and the wafer-level substrate 2.

[0046] Based on the above embodiments, as a preferred embodiment, as Figure 14 shown, the hairpin button 5032 is a beryllium copper gold-plated part. As Figure 10As shown, the insulator 5031 is connected with a dust-proof cover 5033 for dust-proofing the wool button 5032. The dust-proof cover 5033 can be connected to the insulator 5031 through connecting screws 5035, or other connection methods can also be adopted. The dust-proof cover 5033 is used for dust-proofing the insulator 5031 and the wool button 5032 mounted thereon before and / or during the assembly of the optoelectronic liquid interconnection structure, that is, when the wool button connector 5 is not assembled to the second cold plate 102, when the wool button assembly 503 is not assembled to the inner housing 502, and when the first power supply board 301 is not assembled above the wool button connector 5, the dust-proof cover 5032 can be used for dust-proofing.

[0047] Based on the above embodiments, as a preferred embodiment, as Figure 5 and 7 shown, the spring pin connector 4 includes a second spring pin connector 402 for current transmission between the first power supply board 301 and the second power supply board 302, and a first spring pin connector 401 for current transmission and signal transmission between the first power supply board 301 and the second power supply board 302. Both the first spring pin connector 401 and the second spring pin connector 402 pass through the first cold plate 101 and are in interference fit with the first cold plate 101.

[0048] The first spring pin connector 401 realizes current transmission and control signal transmission between the first power supply board 301 and the second power supply board 302.

[0049] The second spring pin connector 402 is located between the first power supply board 301 and the second power supply board 302, and realizes current transmission between the first power supply board 301 and the second power supply board 302.

[0050] As Figures 15 to 17 shown, both the first spring pin connector 401 and the second spring pin connector 402 include a spring pin housing and spring pin contact parts inside. The spring pin housing passes through the first cold plate 101 and is in interference fit with the first cold plate 101, and both ends of the spring pin contact parts can stretch relative to the spring pin housing. Among them, the first spring pin connector 401 includes both elastic contact parts for current transmission and elastic contact parts for optical signal transmission, while the second spring pin connector 402 only has elastic contact parts for current transmission.

[0051] Based on the above embodiments, as a preferred embodiment, as Figure 11 shown, a first positioning structure 701 for alignment and a first connecting part 801 for pressing are provided between the second cold plate 102, the wafer-level substrate 2, and the wool button connector 5. The first positioning structure 701 is used for guiding and positioning when the second cold plate 102, the wafer-level substrate 2, and the wool button connector 5 are stacked layer by layer, and the first connecting part 801 is used for pressing and fixing after the second cold plate 102, the wafer-level substrate 2, and the wool button connector 5 are stacked layer by layer.

[0052] For the positioning structure 701, it is preferably to adopt the cooperation form of positioning dowels and positioning holes. For the number and size of the positioning dowels, those skilled in the art can select according to actual needs. The positioning holes include through holes arranged at the edge of the wafer-level substrate 2, blind holes arranged at the top of the cold plate 102, and blind holes arranged at the bottom of the hairpin connector 5. The middle part of the positioning dowel penetrates through the through hole on the wafer substrate 2, and both ends of the positioning dowel are inserted into the blind holes on the cold plate 102 and the hairpin connector 5 respectively. Of course, for the blind holes on the cold plate 102 and the hairpin connector 5, through holes can be used for replacement, or one uses a blind hole and the other uses a through hole. In addition, the positioning structure 701 can also adopt other structural forms. For example, positioning protrusions are respectively arranged at the top of the cold plate 102 and the bottom of the hairpin connector 5, and the positioning protrusions are adapted to the grooves or through holes arranged on the wafer-level substrate 2.

[0053] For the connecting member 801, it is preferably to adopt a threaded connecting member, and it can also adopt a clamping connecting member for interference connection, or an elastic connecting member for press connection, or even an adhesive connecting member for bonding, or welding, etc. The threaded connecting member is the preferred choice, which is convenient for making corresponding connection holes and also for connection operations. Of course, under the guidance of this technical solution, those skilled in the art can fully implement other connection forms except the threaded connecting member.

[0054] A positioning structure 702 for alignment is provided between the hairpin connector 5 and the power supply board 301. Similar to the positioning structure 701, the positioning structure 702 preferably adopts the cooperation form of positioning dowels and positioning holes. The positioning holes include blind holes or through holes respectively arranged on the hairpin connector 5 and the power supply board 301. In addition, the positioning structure 702 can also adopt other structural forms. For example, mutually adapted plugging structures, such as protrusions and grooves, pins and slots, etc., are respectively arranged on the hairpin connector 5 and the power supply board 301.

[0055] As Figure 12 shown, an avoidance structure is provided on the cold plate 101 for avoiding the components on the power supply board 301 and the power supply board 302. A connecting member 802 for pressing is provided between the cold plate 102, the wafer-level substrate 2, the outer housing 501, the power supply board 301, and the cold plate 101.

[0056] Similarly to the connecting member 1 801, the connecting member 2 802 is preferably a threaded connecting member, and can also be an interference connection using a snap - on connecting member, or a press - connection using an elastic connecting member, or even an adhesive connection using a viscous connecting member, or welding, etc. The threaded connecting member is the preferred choice, which is convenient for making corresponding threaded connection holes and also for connection operations. Of course, under the guidance of this technical solution, those skilled in the art can fully implement other connection forms except the threaded connecting member.

[0057] On the basis of the above - mentioned embodiment, as a preferred embodiment, as Figure 13 shown, a positioning structure 3 703 for alignment is provided between the cold plate 1 101 and the power supply plate 2 302. Similarly to the positioning structure 1 701, the positioning structure 3 703 preferably adopts the form of cooperation between a positioning pin and a positioning hole, and the positioning holes include blind holes or through - holes respectively arranged on the cold plate 1 101 and the power supply plate 2 302. In addition, the positioning structure 3 703 can also adopt other structural forms, such as respectively arranging mutually adapted plug - in structures on the cold plate 1 101 and the power supply plate 2 302, such as protrusions and grooves, pins and slots, etc.

[0058] An avoidance structure for avoiding the components of the power supply plate 2 302 is provided on the metal heat spreader 103, and a connecting member 3 803 for pressing is provided between the cold plate 1 101, the power supply plate 2 302, and the metal heat spreader 103. Similarly to the connecting member 1 801, the connecting member 3 803 is preferably a threaded connecting member, and can also be an interference connection using a snap - on connecting member, or a press - connection using an elastic connecting member, or even an adhesive connection using a viscous connecting member, or welding, etc. The threaded connecting member is the preferred choice, which is convenient for making corresponding threaded connection holes and also for connection operations. Of course, under the guidance of this technical solution, those skilled in the art can fully implement other connection forms except the threaded connecting member.

[0059] Furthermore, the power supply plate 2 302 and the cold plate 1 101 are connected by a connecting member 4 804. Similarly to the connecting member 1 801, the connecting member 3 803 is preferably a threaded connecting member, and can also be an interference connection using a snap - on connecting member, or a press - connection using an elastic connecting member, or even an adhesive connection using a viscous connecting member, or welding, etc.

[0060] An assembly method for an optoelectronic - liquid interconnection structure for a system - on - chip, as Figures 11 to 13 shown, assembles the optoelectronic - liquid interconnection structure for a system - on - chip according to the following steps as described in any one of the above - mentioned embodiments: Step 1: First, place the wafer-level substrate 2 in the groove of the cold plate 2 102 through the positioning structure 1 701. Then, connect the outer shell 501 of the pin button connector 5 to the cold plate 2 102 through the connecting piece 1 801 to pre-compress the wafer-level substrate 2.

[0061] That is, as Figure 11 shown, since the wafer system will warp after chip mounting and encapsulation, to prevent the pin button connector from crushing the wafer during installation, a step-by-step installation method is adopted to gradually flatten the wafer and reduce the risk of crushing. The specific installation steps are as follows. First, install the wafer system, namely the wafer-level substrate 2, the cold plate 2 102, and the outer shell 501 of the pin button connector 5, and pre-compress the wafer-level substrate 2. At this time, the wafer-level substrate 2 is basically flattened. Then, install the pin button assembly 503 onto the inner shell 502 of the pin button connector 5. This part adopts a modular design concept, dividing the wafer lead-out signals into 9 blocks, which is convenient for later fault troubleshooting and reduces replacement costs. At the same time, to ensure the alignment accuracy of the signal lead-out, positioning pins are used for precise positioning.

[0062] Step 2: First, install the pin button assembly 503 onto the inner shell 502 of the pin button connector 5. Then, assemble the inner shell 502 to the outer shell 501, and install the power supply board 1 301 above the pin button connector 5 through the positioning structure 2 702.

[0063] Step 3: First, press-fit the pin connector 1 401 and the pin connector 2 402 of the spring pin connector 4 onto the cold plate 1 101 respectively. Then, tighten the cold plate 2 102, the wafer-level substrate 2, the outer shell 501, the power supply board 1 301, and the cold plate 1 101 through the connecting piece 2 802, so that the pins of the spring pin connector 4 are in full contact with the power supply board 1 301, and both ends of the pin button 5032 of the pin button connector 5 are in full contact with the power supply board 1 301 and the wafer-level substrate 2 respectively.

[0064] That is, as Figure 12 shown, the pin connector 1 401 and the pin connector 2 402 of the spring pin connector 4 are press-fitted with the cold plate 1 101 with silicon-metal microchannels to form a component. Then, it is connected to the cold plate 2 102 with silicon-metal microchannels through screws and sufficient pressing force is applied, so that the pins of the spring pin connector 4 are in full contact with the power supply board 1 301, and both ends of the pin button 5032 of the pin button connector 5 are in full contact with the power supply board 1 301 and the wafer-level substrate 2 respectively.

[0065] Step 4: First, install the power supply board 2 302 above the cold plate 1 101 through the positioning structure 3 703. Then, tighten the metal heat sink 103, the power supply board 2 302, and the cold plate 1 101 through the connecting piece 3 803.

[0066] That is, as Figure 13As shown in the figure, the metal heat spreader 103, the second power supply board 302 and the first cold plate 101 are fixed together using screws, and a positioning pin is used to accurately position the second power supply board 302.

[0067] A system-on-chip, such as Figure 18 As shown in the figure, it includes a chassis 6 provided with an optical signal interface 601, a power interface 602, and a liquid cooling interface 603. Inside the chassis 6, there is an optoelectronic liquid interconnection structure for the system-on-chip described in any one of the above embodiments. The optical signal interface 601 is connected to the wafer-level substrate 2 through an optical module 303 connected to the power micro-system 3. The power interface 602 is connected to the power micro-system 3, and the liquid cooling interface 603 is connected to the heat dissipation micro-system 1.

[0068] Based on the above embodiments, as a preferred embodiment, the liquid cooling interface 603 includes a blind-mate floating fluid connector 6031 and a liquid distributor 6032. The blind-mate floating fluid connector 6031 is connected to the chassis 6, and the liquid distributor 6032 is connected to the heat dissipation micro-system 1.

[0069] Specifically, the optoelectronic liquid interconnection structure for the system-on-chip is the core processing unit of the system-on-chip. After the core processing unit is assembled, the problem of its external interface connection needs to be solved. To ensure the normal operation of the system, the system requires optical, electrical, and liquid external interfaces, as follows: As Figure 19 As shown in the figure, it is a schematic diagram of the liquid cooling path of the system-on-chip. Among them, the external liquid cooling heat dissipation medium reaches the on-chip interconnection chassis panel through the liquid cooling pipeline, and then enters the on-chip interconnection system through the interface of the blind-mate floating fluid connector 6031 installed on the chassis panel. Then, it reaches the first cold plate 101 and the second cold plate 102 through the liquid distributor 6032 respectively. The principle of the reverse transmission process of the liquid cooling heat dissipation medium is the same as above.

[0070] As Figure 20 As shown in the figure, it is a schematic diagram of the optical signal transmission path of the system-on-chip. Among them, the external optical signal reaches the on-chip interconnection chassis panel through the fiber optic connector assembly, and then enters the optical module 303 through the MT-type optical cable assembly. The optical module 303 preferably uses a transceiving integrated digital optical module to realize the conversion of optical signals to electrical signals, and finally reaches the second power supply board 302 and the wafer-level substrate 2 for signal processing. The wafer-level substrate 2 is the processing chip on the wafer system, and the principle of the external output of the signal is the same as above.

[0071] As Figure 21As shown in the figure, it is a schematic diagram of the current transmission path of the system on crystal. Among them, the external electrical signal reaches the panel of the on-crystal interconnection chassis through a small cable assembly, and then reaches the second power supply board 302 through the cable assembly. Through the second power supply board 302, after the power supply processes the external voltage and current, it is transmitted to the first power supply board 301 through the spring pin connector 4, and finally reaches the wafer system through the hair button connector 5 to realize the power supply transmission of the wafer. The wafer system is the wafer-level substrate 2 mentioned above. The principle of the reverse transmission process of the electrical signal is the same as above.

[0072] The details not described in this invention are all conventional technical means well known to those skilled in the art.

[0073] The above content shows and describes the basic principle, main features and beneficial effects of the present invention. The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. An optoelectronic liquid interconnection structure for an on-wafer system, characterized in that: The invention comprises a heat dissipation microsystem (1), a wafer-level substrate (2), and a power supply microsystem (3) interconnection structure which are stacked in layers. The power supply microsystem (3) comprises a second power supply board (302) for initially distributing external power, a first power supply board (301) for signal input and control and for secondary distribution of the current initially distributed by the second power supply board (302), and the interconnection structure comprises a spring pin connector (4) for current transmission and signal transmission between the first power supply board (301) and the second power supply board (302), and a wool button connector (5) for signal transmission and current transmission between the first power supply board (301) and the wafer-level substrate (2) and having a double-sided elastic contact function.

2. The optoelectronic liquid interconnection structure for an on-wafer system according to claim 1, characterized in that: The heat dissipation microsystem (1) comprises a second cold plate (102) for actively dissipating heat from a wafer-level substrate (2), a first cold plate (101) for actively dissipating heat from a power microsystem (3), and a metal heat sink (103) for naturally dissipating heat from the power microsystem (3).

3. The optoelectronic liquid interconnection structure for an on-wafer system according to claim 2, characterized in that: The second cold plate (102), the wafer-level substrate (2), the button connector (5), the first power supply plate (301), the first cold plate (101), the second power supply plate (302), and the metal heat spreader (103) are stacked in sequence.

4. The optoelectronic liquid interconnection structure for an on-wafer system according to claim 2 or 3, characterized in that: The second cold plate (102) is provided with a groove for accommodating a wafer-level substrate (2); the button connector (5) comprises an outer shell (501) for pressing the edge of the wafer-level substrate (2); the outer shell (501) is detachably connected to an inner shell (502); and the inner shell (502) is provided with a plurality of button components (503) for signal transmission and current transmission between the second power supply plate (302) and the wafer-level substrate (2).

5. The optoelectronic liquid interconnection structure for an on-wafer system according to claim 4, characterized in that: The wool button assembly (503) comprises an insulator (5031) detachably connected to the inner shell (502); a plurality of wool buttons (5032) are inserted into the insulator (5031) via a wool button fixing cap (5034); and two ends of the wool buttons (5032) are in elastic contact with a power supply board 1 (301) and a wafer-level substrate (2), respectively.

6. The optoelectronic liquid interconnection structure for an on-wafer system according to claim 5, characterized in that: The fur button (5032) is a beryllium copper gold-plated part, and the insulator (5031) is connected to a dust cover (5033) for protecting the fur button (5032) from dust.

7. The optoelectronic liquid interconnection structure for an on-wafer system according to any one of claims 2-3, 5-6, characterized in that: The spring pin connector (4) comprises a spring pin connector 2 (402) for current transmission between power supply board 1 (301) and power supply board 2 (302), and a spring pin connector 1 (401) for current transmission and signal transmission between power supply board 1 (301) and power supply board 2 (302). Both the spring pin connector 1 (401) and the spring pin connector 2 (402) pass through the cold plate 1 (101) and are interference fit with the cold plate 1 (101).

8. The optoelectronic liquid interconnection structure for an on-wafer system according to claim 7, characterized in that: A positioning structure (701) for alignment and a connecting piece (801) for pressing are arranged between the second cold plate (102), the wafer-level substrate (2) and the button connector (5); a positioning structure (702) for alignment is arranged between the button connector (5) and the first power supply board (301); a avoiding structure for avoiding components on the first power supply board (301) and the second power supply board (302) is arranged on the first cold plate (101); and a connecting piece (802) for pressing is arranged between the second cold plate (102), the wafer-level substrate (2), the outer shell (501), the first power supply board (301) and the first cold plate (101).

9. The optoelectronic liquid interconnection structure for an on-wafer system according to any one of claims 2-3, 5-6, and 8, characterized in that: A positioning structure three (703) for alignment is provided between the cold plate one (101) and the power supply plate two (302), an avoidance structure for avoiding components of the power supply plate two (302) is provided on the metal heat spreader (103), and a connecting piece three (803) for pressing is provided between the cold plate one (101), the power supply plate two (302), and the metal heat spreader (103).

10. A method for assembling an optoelectronic liquid interconnection structure for an on-wafer system, characterized in that: Assemble the optoelectronic liquid interconnect structure for an on-wafer system according to any one of claims 2 to 9 according to the following steps; Step 1: firstly, the wafer-level substrate (2) is placed in the groove of the second cold plate (102) through the first positioning structure (701), and then the outer shell (501) of the button connector (5) is connected to the second cold plate (102) through the first connecting piece (801), so as to pre-tighten the wafer-level substrate (2); Step 2: first install the fur button assembly (503) onto the inner shell (502) of the fur button connector (5), then assemble the inner shell (502) onto the outer shell (501), and then install the power supply board 1 (301) onto the top of the fur button connector (5) through the positioning structure 2; Step 3: firstly, the spring pin connector 1 (401) and the spring pin connector 2 (402) of the spring pin connector (4) are respectively interference fit with the cold plate 1 (101), and then the cold plate 2 (102), the wafer-level substrate (2), the outer shell (501), the power supply board 1 (301), and the cold plate 1 (101) are pressed together by the connecting piece 2 (802), so that the spring pin of the spring pin connector (4) is in full contact with the power supply board 1 (301), and the two ends of the fur button (5032) of the fur button connector (5) are respectively in full contact with the power supply board 1 (301) and the wafer-level substrate (2); Step 4: First, install the power supply board 2 (302) above the cold plate 1 (101) through the positioning structure 3 (703), and then press the metal heat spreader (103), the power supply board 2 (302), and the cold plate 1 (101) together through the connecting piece 3 (803).

11. An on-wafer system, comprising a chassis (6) provided with an optical signal interface (601), a power interface (602), and a liquid cooling interface (603), characterized in that: The chassis (6) is provided with the optoelectronic-liquid interconnection structure for the wafer-level system according to any one of claims 1 to 9, the optical signal interface (601) is connected to the wafer-level substrate (2) via an optical module (303) connected to the power microsystem (3), the power interface (602) is connected to the power microsystem (3), and the liquid cooling interface (603) is connected to the heat dissipation microsystem (1).

12. The optoelectronic-liquid interconnection structure, assembly method and on-wafer system of claim 11, characterized in that: The liquid cooling interface (603) comprises a blind-plug floating fluid connector (6031) and a liquid distributor (6032), wherein the blind-plug floating fluid connector (6031) is connected to the chassis (6), and the liquid distributor (6032) is connected to the heat dissipation microsystem (1).

Images