Surface acoustic wave resonance device and forming method thereof

Abstract

The invention discloses a surface acoustic wave resonance device and a forming method thereof, and the structure comprises an interdigital electrode structure which comprises a plurality of first electrode strips and a plurality of second electrode strips, each first electrode strip comprises a first terminal part and a second terminal part which are opposite to each other, and each second electrode strip comprises a third terminal part and a fourth terminal part which are opposite to each other; the first dielectric layer is positioned on the piezoelectric layer; the first load part and the second load part are located on the first dielectric layer, the first load part is located on the plurality of first terminal parts and the plurality of third terminal parts, and the second load part is located on the plurality of second terminal parts and the plurality of fourth terminal parts; the second dielectric layer is positioned on the first dielectric layer; and the third load part and the fourth load part are located on the second dielectric layer, the third load part is located on the plurality of first terminal parts and the plurality of third terminal parts, and the fourth load part is located on the plurality of second terminal parts and the plurality of fourth terminal parts, so that the surface acoustic wave resonance device is excited to form a piston mode, and a high-order transverse parasitic mode is effectively inhibited.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to a surface acoustic wave resonator device and a method for forming the same. Background Art

[0002] The radio frequency (RF) front-end chip of a wireless communication device includes a power amplifier, an antenna switch, a radio frequency filter, a multiplexer, a low-noise amplifier, etc. Among them, the radio frequency filter includes a piezoelectric surface acoustic wave (SAW) filter, a piezoelectric bulk acoustic wave (BAW) filter, a micro-electro-mechanical system (MEMS) filter, an integrated passive devices (IPD) filter, etc.

[0003] The quality factor value (Q value) of the surface acoustic wave resonator device is relatively high. The radio frequency filter with low insertion loss and high out-of-band rejection is made of the surface acoustic wave resonator device, that is, the surface acoustic wave resonator device, which is the mainstream radio frequency filter used in wireless communication devices such as mobile phones and base stations at present.

[0004] However, the performance of the existing surface acoustic wave resonator device still needs to be improved. Summary of the Invention

[0005] The technical problem solved by the present invention is to provide a surface acoustic wave resonator device and a method for forming the same, so as to improve the performance of the surface acoustic wave resonator device.

[0006] To solve the above technical problems, the technical solution of the present invention provides a surface acoustic wave resonator device, comprising: a piezoelectric layer; an interdigital electrode structure located on the surface of the piezoelectric layer, the interdigital electrode structure including a first bus bar and a second bus bar arranged in parallel along a first direction, a plurality of first electrode strips connected to the first bus bar, and a plurality of second electrode strips connected to the second bus bar, the plurality of first electrode strips and the plurality of second electrode strips being parallel to the first direction and arranged along a second direction, the first direction and the second direction being perpendicular to each other, and the plurality of first electrode strips and the plurality of second electrode strips being arranged in an alternating and spaced manner; a first gap region, an overlapping region, and a second gap region arranged in sequence along the first direction between the first bus bar and the second bus bar, the first electrode strip and the second electrode strip overlapping each other along the second direction in the overlapping region, the first electrode strip including a first overlapping portion and a first extending portion, the first overlapping portion being located in the overlapping region, the first extending portion being located in the first gap region, the first overlapping portion including a first terminal portion and a second terminal portion opposite to each other in the first direction, and a first intermediate sub-portion located between the first terminal portion and the second terminal portion, the first terminal portion being connected to the first extending portion, the first extending portion being connected to the first bus bar, the second electrode strip including a second overlapping portion and a second extending portion, the second overlapping portion being located in the overlapping region, the second extending portion being located in the second gap region, the second overlapping portion including a third terminal portion and a fourth terminal portion opposite to each other in the first direction, and a second intermediate sub-portion located between the third terminal portion and the fourth terminal portion, the fourth terminal portion being connected to the second extending portion, the second extending portion being connected to the second bus bar, a first gap being provided between the third terminal portion and the first bus bar, and a second gap being provided between the second terminal portion and the second bus bar; a first dielectric layer located on the piezoelectric layer, the first dielectric layer covering the interdigital electrode structure; a first load portion and a second load portion located on the first dielectric layer, and the first load portion being located on a plurality of the first terminal portions and a plurality of the third terminal portions, the second load portion being located on a plurality of the second terminal portions and a plurality of the fourth terminal portions; a second dielectric layer located on the first dielectric layer, the second dielectric layer covering the first load portion and the second load portion; a third load portion and a fourth load portion located on the second dielectric layer, and the third load portion being located on a plurality of the first terminal portions and a plurality of the third terminal portions, the fourth load portion being located on a plurality of the second terminal portions and a plurality of the fourth terminal portions, the third load portion and the fourth load portion being used to suppress parasitic resonances excited by the first load portion and the second load portion.

[0007] Optionally, the first load portion has a first width in the first direction, and the ratio of the first width to the acoustic wave wavelength excited by the interdigital electrode structure ranges from 1:10 to 2:1; the second load portion has a second width in the first direction, and the ratio of the second width to the acoustic wave wavelength excited by the interdigital electrode structure ranges from 1:10 to 2:1.

[0008] Optionally, the third load portion has a third width in the first direction, and the ratio of the third width to the acoustic wave wavelength excited by the interdigital electrode structure ranges from 1:10 to 2:1; the fourth load portion has a fourth width in the first direction, and the ratio of the fourth width to the acoustic wave wavelength excited by the interdigital electrode structure ranges from 1:10 to 2:1.

[0009] Optionally, the thickness range of the first load portion is 0.2% to 10% of the acoustic wave wavelength excited by the interdigital electrode structure; the thickness range of the second load portion is 0.2% to 10% of the acoustic wave wavelength excited by the interdigital electrode structure.

[0010] Optionally, the thickness range of the third load portion is 0.2% to 10% of the acoustic wave wavelength excited by the interdigital electrode structure; the thickness range of the fourth load portion is 0.2% to 10% of the acoustic wave wavelength excited by the interdigital electrode structure.

[0011] Optionally, there is a first distance between the first load portion and the interdigital electrode structure, and the ratio of the first distance to the thickness of the interdigital electrode structure is greater than 0.5; there is a second distance between the second load portion and the interdigital electrode structure, and the ratio of the second distance to the thickness of the interdigital electrode structure is greater than 0.5.

[0012] Optionally, the first load portion includes a plurality of first load sub - portions, and one first load sub - portion is located on one first electrode strip or one second electrode strip; the second load portion includes a plurality of second load sub - portions, and one second load sub - portion is located on one first electrode strip or one second electrode strip.

[0013] Optionally, the first load portion extends in the second direction, and the first load portion spans a plurality of the first electrode strips and a plurality of the second electrode strips; the second load portion extends in the second direction, and the second load portion spans a plurality of the first electrode strips and a plurality of the second electrode strips.

[0014] Optionally, the third load portion includes a plurality of third load sub-portions, and one of the third load sub-portions is located on one of the first electrode bars or one of the second electrode bars; the fourth load portion includes a plurality of fourth load sub-portions, and one of the fourth load sub-portions is located on one of the first electrode bars or one of the second electrode bars.

[0015] Optionally, the third load portion extends along the second direction, and the third load portion straddles a plurality of the first electrode bars and a plurality of the second electrode bars; the fourth load portion extends along the second direction, and the fourth load portion straddles a plurality of the first electrode bars and a plurality of the second electrode bars.

[0016] Optionally, the first load portion further extends onto the first gap region; the second load portion further extends onto the second gap region.

[0017] Optionally, the third load portion further extends onto the first gap region; the fourth load portion further extends onto the second gap region.

[0018] Optionally, the interdigital electrode structure further includes: a plurality of first dummy electrode bars connected to the first bus, there is a third gap between the first dummy electrode bars and the second electrode bars, the plurality of first dummy electrode bars are parallel to the first direction, and the first dummy electrode bars and the first electrode bars are arranged in an alternating and spaced manner; a plurality of second dummy electrode bars connected to the second bus, there is a fourth gap between the second dummy electrode bars and the first electrode bars, the plurality of second dummy electrode bars are parallel to the first direction, and the second dummy electrode bars and the second electrode bars are arranged in an alternating and spaced manner.

[0019] Optionally, the first load portion further extends onto the first dummy electrode bars; the second load portion further extends onto the second dummy electrode bars.

[0020] Optionally, the third load portion further extends onto the first dummy electrode bars; the fourth load portion further extends onto the second dummy electrode bars.

[0021] Optionally, the density of the first load portion, the second load portion, the third load portion, and the fourth load portion is greater than the density of the first dielectric layer.

[0022] Optionally, the materials of the first load portion, the second load portion, the third load portion, and the fourth load portion include metal materials, insulating dielectric materials, or semiconductor materials; the metals include aluminum, copper, copper-aluminum alloy, platinum, or molybdenum.

[0023] Optionally, the materials of the first dielectric layer and the second dielectric layer include silicon oxide, silicon nitride, silicon oxynitride, or doped silicon oxide, and the dopants include one or both of carbon and fluorine.

[0024] Accordingly, the technical solution of the present invention further provides a method for forming a surface acoustic wave resonator device, including: providing a piezoelectric layer; forming an interdigital electrode structure on the surface of the piezoelectric layer, the interdigital electrode structure including a first bus and a second bus arranged in parallel along a first direction, a plurality of first electrode strips connected to the first bus, and a plurality of second electrode strips connected to the second bus, the plurality of first electrode strips and the plurality of second electrode strips being parallel to the first direction and arranged along a second direction, the first direction and the second direction being perpendicular to each other, and the plurality of first electrode strips and the plurality of second electrode strips being arranged in an alternating and spaced manner; there are a first gap region, an overlapping region, and a second gap region arranged in sequence along the first direction between the first bus and the second bus, the first electrode strip and the second electrode strip overlapping each other along the second direction in the overlapping region, the first electrode strip including a first overlapping portion and a first extending portion, the first overlapping portion being located in the overlapping region, the first extending portion being located in the first gap region, the first overlapping portion including a first terminal portion and a second terminal portion opposite to each other in the first direction, and a first intermediate sub-portion located between the first terminal portion and the second terminal portion, the first terminal portion being connected to the first extending portion, the first extending portion being connected to the first bus, the second electrode strip including a second overlapping portion and a second extending portion, the second overlapping portion being located in the overlapping region, the second extending portion being located in the second gap region, the second overlapping portion including a third terminal portion and a fourth terminal portion opposite to each other in the first direction, and a second intermediate sub-portion located between the third terminal portion and the fourth terminal portion, the fourth terminal portion being connected to the second extending portion, the second extending portion being connected to the second bus, there is a first gap between the third terminal portion and the first bus, and there is a second gap between the second terminal portion and the second bus; forming a first dielectric layer on the piezoelectric layer, the first dielectric layer covering the interdigital electrode structure; forming a first load portion and a second load portion on the first dielectric layer, and the first load portion being located on the plurality of first terminal portions and the plurality of third terminal portions, the second load portion being located on the plurality of second terminal portions and the plurality of fourth terminal portions; forming a second dielectric layer on the first dielectric layer, the second dielectric layer covering the first load portion and the second load portion; forming a third load portion and a fourth load portion on the second dielectric layer, and the third load portion being located on the plurality of first terminal portions and the plurality of third terminal portions, the fourth load portion being located on the plurality of second terminal portions and the plurality of fourth terminal portions, the third load portion and the fourth load portion being used to suppress parasitic resonances excited by the first load portion and the second load portion.

[0025] Optionally, the forming method of the first load portion and the second load portion includes: forming a first load material layer on the first dielectric layer; patterning the first load material layer to form the first load portion and the second load portion.

[0026] Optionally, the forming method of the first load portion, the second load portion and the second dielectric layer includes: forming the first load portion on the surface of the first dielectric layer; forming a second sub-dielectric layer on the surface of the first dielectric layer; forming the second load portion on the surface of the second sub-dielectric layer; forming a third sub-dielectric layer on the surface of the second sub-dielectric layer, and using the second sub-dielectric layer and the third sub-dielectric layer as the second dielectric layer.

[0027] Optionally, the forming method of the third load portion and the fourth load portion includes: forming a second load material layer on the surface of the second dielectric layer; patterning the second load material layer to form the third load portion and the fourth load portion.

[0028] Optionally, the forming method of the third load portion and the fourth load portion includes: forming the third load portion on the surface of the second dielectric layer; forming a third dielectric layer on the surface of the second dielectric layer, and the third dielectric layer covers the third load portion; forming the fourth load portion on the surface of the third dielectric layer.

[0029] Optionally, the forming method of the third load portion and the fourth load portion includes: forming the fourth load portion on the surface of the second dielectric layer; forming a third dielectric layer on the surface of the second dielectric layer and the surface of the fourth load portion; forming the third load portion on the surface of the third dielectric layer.

[0030] Optionally, it further includes: after forming the second dielectric layer and before forming the third load portion and the fourth load portion, testing the S21 parameter performance of the surface acoustic wave resonator device to obtain a preliminary performance result; selecting the reference dimensions of the third load portion and the fourth load portion according to the preliminary performance result; forming the third load portion and the fourth load portion on the second dielectric layer according to the reference dimensions.

[0031] Optionally, the first load portion is further formed on the first gap region; the second load portion is further formed on the second gap region.

[0032] Optionally, the third load portion is further formed on the first gap region; the fourth load portion is further formed on the second gap region.

[0033] Optionally, the method for forming the interdigital electrode structure further includes: forming a plurality of first dummy electrode bars connected to the first bus, with a third gap between the first dummy electrode bars and the second electrode bars, the plurality of first dummy electrode bars being parallel to the first direction, and the first dummy electrode bars and the first electrode bars being arranged in an alternating and spaced manner; forming a plurality of second dummy electrode bars connected to the second bus, with a fourth gap between the second dummy electrode bars and the first electrode bars, the plurality of second dummy electrode bars being parallel to the first direction, and the second dummy electrode bars and the second electrode bars being arranged in an alternating and spaced manner.

[0034] Optionally, the first load portion is further formed on the first dummy electrode bars; the second load portion is further formed on the second dummy electrode bars.

[0035] Optionally, the third load portion is further formed on the first dummy electrode bars; the fourth load portion is further formed on the second dummy electrode bars.

[0036] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0037] In the surface acoustic wave resonator device provided by the technical solution of the present invention, by providing a first load portion and a third load portion on the first terminal portion of the first electrode bar and the third terminal portion of the second electrode bar, and providing a second load portion and a fourth load portion on the second terminal portion of the first electrode bar and the fourth terminal portion of the second electrode bar, the acoustic wave velocity in the end region of the interdigital electrode structure is made less than that in the middle region, so that the surface acoustic wave resonator device is excited to form a piston mode, thereby preventing the excitation of higher-order lateral parasitic modes, only exciting the first-order mode, and restricting the acoustic energy within the resonance region, which can effectively suppress higher-order lateral parasitic modes and improve the quality factor (Q) of the surface acoustic wave resonator device. In addition, compared with only providing the first load portion and the second load portion, the provision of the third load portion and the fourth load portion can play a supplementary role, that is, on the basis of the first load portion and the second load portion, suppressing the parasitic resonance excited by the first load portion and the second load portion, further suppressing higher-order lateral parasitic modes, and further improving the quality factor of the surface acoustic wave resonator device.

[0038] Further, the first load portion (the third load portion) extends along the second direction, and the first load portion (the third load portion) straddles a plurality of the first electrode bars and a plurality of the second electrode bars; the second load portion (the fourth load portion) extends along the second direction, and the second load portion (the fourth load portion) straddles a plurality of the first electrode bars and a plurality of the second electrode bars, making the manufacturing process of the first load portion (the third load portion) and the second load portion (the fourth load portion) easier, and the reduction of the sound velocity in the end region more obvious, further suppressing the high-order lateral parasitic modes, and further improving the quality factor of the surface acoustic wave resonator device.

[0039] Further, the interdigital electrode structure further includes a plurality of first dummy electrode bars connected to the first bus, and a plurality of second dummy electrode bars connected to the second bus, which can reduce the leakage of acoustic energy.

[0040] Further, there is a first distance between the first load portion and the interdigital electrode structure, and the ratio of the first distance to the thickness of the interdigital electrode structure is greater than 0.5; there is a second distance between the second load portion and the interdigital electrode structure, and the ratio of the second distance to the thickness of the interdigital electrode structure is greater than 0.5, restricting the first distance and the second distance to avoid electrostatic breakdown caused by too small a first distance or too small a second distance.

[0041] In the method for forming a surface acoustic wave resonator device provided by the technical solution of the present invention, by providing a first load portion and a third load portion on the first terminal portion of the first electrode bar and the third terminal portion of the second electrode bar, and providing a second load portion and a fourth load portion on the second terminal portion of the first electrode bar and the fourth terminal portion of the second electrode bar, so that the acoustic wave velocity in the end region of the interdigital electrode structure is less than that in the middle region, enabling the surface acoustic wave resonator device to excite a piston mode, so that high-order lateral parasitic modes cannot be excited, only the first-order mode is excited, and the acoustic energy is restricted within the resonance region, which can effectively suppress high-order lateral clutter and improve the quality factor (Q) of the surface acoustic wave resonator device. In addition, compared with only providing the first load portion and the second load portion, the provision of the third load portion and the fourth load portion can play a supplementary role, that is, on the basis of the first load portion and the second load portion, suppressing the parasitic resonance excited by the first load portion and the second load portion, further suppressing the high-order lateral parasitic modes, and further improving the quality factor of the surface acoustic wave resonator device.

[0042] Further, the first load portion (the third load portion) extends along the second direction, and the first load portion (the third load portion) straddles a plurality of the first electrode bars and a plurality of the second electrode bars; the second load portion (the fourth load portion) extends along the second direction, and the second load portion (the fourth load portion) straddles a plurality of the first electrode bars and a plurality of the second electrode bars, making the manufacturing process of the first load portion (the third load portion) and the second load portion (the fourth load portion) easier, and the reduction of the sound velocity in the end region more obvious, further suppressing the high-order lateral parasitic modes, and further improving the quality factor of the surface acoustic wave resonator device.

[0043] Further, the interdigital electrode structure further includes a plurality of first dummy electrode bars connected to the first bus, and a plurality of second dummy electrode bars connected to the second bus, which can reduce the leakage of acoustic energy.

[0044] Further, there is a first distance between the first load portion and the interdigital electrode structure, and the ratio of the first distance to the thickness of the interdigital electrode structure is greater than 0.5; there is a second distance between the second load portion and the interdigital electrode structure, and the ratio of the second distance to the thickness of the interdigital electrode structure is greater than 0.5. The purpose of limiting the first distance and the second distance is to avoid electrostatic breakdown caused by too small a first distance or too small a second distance. Description of the Drawings

[0045] Figure 1 and Figure 2 is a schematic structural diagram of a surface acoustic wave resonator device;

[0046] Figures 3 to 13 is a schematic structural diagram of each step of the method for forming a surface acoustic wave resonator device according to Embodiment 1 of the present invention;

[0047] Figures 14 to 17 is a schematic structural diagram of each step of the method for forming a surface acoustic wave resonator device according to Embodiment 2 of the present invention;

[0048] Figures 18 to 21 is a schematic structural diagram of each step of the method for forming a surface acoustic wave resonator device according to Embodiment 3 of the present invention;

[0049] Figures 22 to 25 is a schematic structural diagram of each step of the method for forming a surface acoustic wave resonator device according to Embodiment 4 of the present invention;

[0050] Figures 26 to 34 is a schematic structural diagram of each step of the method for forming a surface acoustic wave resonator device according to Embodiment 5 of the present invention;

[0051] Figures 35 to 38 is a schematic structural diagram of each step of the method for forming a surface acoustic wave resonator device according to Embodiment 6 of the present invention. Detailed implementation manners

[0052] It should be noted that the "surface" and "upper" in the present invention are used to describe the relative positional relationship in space and do not limit whether there is direct contact.

[0053] As described in the background art, the performance of the surface acoustic wave resonator device still needs to be improved. Now, a surface acoustic wave resonator device will be described and analyzed in combination.

[0054] Figure 1 and Figure 2 are schematic structural diagrams of a surface acoustic wave resonator device.

[0055] Please refer to Figure 1 and Figure 2 , Figure 1 is a top view structural diagram omitting the protective layer, Figure 2 is Figure 1 a cross-sectional structural diagram along the AA1 direction in

[0056] In the above surface acoustic wave resonator device, acoustic waves will excite higher-order transverse modes, generating clutter between the resonant frequency and the anti-resonant frequency of the resonator, significantly deteriorating the performance within the passband of the filter.

[0057] To solve the above problems, the technical solution of the present invention provides a surface acoustic wave resonator device and a method for forming the same. By providing a first load portion and a third load portion on the first terminal portion of the first electrode strip and the third terminal portion of the second electrode strip, and providing a second load portion and a fourth load portion on the second terminal portion of the first electrode strip and the fourth terminal portion of the second electrode strip, the acoustic wave velocity in the end region of the interdigital electrode structure is made less than that in the middle region, so that the surface acoustic wave resonator device is excited to form a piston mode, thereby preventing the excitation of higher-order transverse parasitic modes, only exciting the first-order mode, and restricting the acoustic energy within the resonant region, effectively suppressing higher-order transverse clutter, and improving the quality factor (Q) of the surface acoustic wave resonator device. In addition, compared with only providing the first load portion and the second load portion, the setting of the third load portion and the fourth load portion can play a supplementary role, that is, on the basis of the first load portion and the second load portion, suppressing the parasitic resonance excited by the first load portion and the second load portion, further suppressing higher-order transverse parasitic modes, and further improving the quality factor of the surface acoustic wave resonator device.

[0058] To make the above objects, features, and beneficial effects of the present invention more obvious and understandable, the following will describe the specific embodiments of the present invention in detail with reference to the accompanying drawings.

[0059] Figures 3 to 13 It is a schematic structural diagram of each step of the method for forming the surface acoustic wave resonator device according to the first embodiment of the present invention.

[0060] Please refer to Figures 3 to 5 , Figure 3 is Figure 4 and Figure 5 top view structural diagram, Figure 4 is Figure 3 in the MM1 direction along the cross-sectional structure diagram, Figure 5 is Figure 3Schematic cross-sectional structure diagram along the NN1 direction, providing a piezoelectric layer 200; a interdigital electrode structure is formed on the surface of the piezoelectric layer 200, and the interdigital electrode structure includes a first bus 211 and a second bus 212 arranged in parallel along a first direction X, a plurality of first electrode bars 221 connected to the first bus 211, and a plurality of second electrode bars 222 connected to the second bus 212. The plurality of first electrode bars 221 and the plurality of second electrode bars 222 are both parallel to the first direction X and arranged along a second direction Y. The first direction X and the second direction Y are perpendicular to each other. The plurality of first electrode bars 221 and the plurality of second electrode bars 222 are arranged in an alternating and spaced manner; there are a first gap region g1, an overlapping region c, and a second gap region g2 arranged in sequence along the first direction X between the first bus 211 and the second bus 212. The first electrode bars 221 and the second electrode bars 222 overlap each other along the second direction Y in the overlapping region c. The first electrode bar 221 includes a first overlapping portion and a first extending portion 2210. The first overlapping portion is located in the overlapping region c, and the first extending portion 2210 is located in the first gap region g1. The first overlapping portion includes a first terminal portion 2211 and a second terminal portion 2212 opposite to each other in the first direction X, and a first intermediate sub-portion 221c located between the first terminal portion 2211 and the second terminal portion 2212. The first terminal portion 2211 is connected to the first extending portion 2210, and the first extending portion 2210 is connected to the first bus 211. The second electrode bar 222 includes a second overlapping portion and a second extending portion 2220. The second overlapping portion is located in the overlapping region c, and the second extending portion 2220 is located in the second gap region g2. The second overlapping portion includes a third terminal portion 2223 and a fourth terminal portion 2224 opposite to each other in the first direction X, and a second intermediate sub-portion 222c located between the third terminal portion 2223 and the fourth terminal portion 2224. The fourth terminal portion 2224 is connected to the second extending portion 2220, and the second extending portion 2220 is connected to the second bus 212. There is a first gap (not shown in the figure) between the third terminal portion 2223 and the first bus 211, and a second gap (not shown in the figure) between the second terminal portion 2212 and the second bus 212.

[0061] In this embodiment, the piezoelectric layer 200 is a piezoelectric substrate and can be used to form a Temperature Compensated Surface Acoustic Wave (TC-SAW) filter.

[0062] In another embodiment, a substrate and a bonding layer are further provided, and the substrate and the piezoelectric layer are joined through the bonding layer, with the substrate and the piezoelectric layer located on both sides of the bonding layer, which can be used to form a thin-film surface acoustic wave (TF-SAW) filter.

[0063] In this embodiment, between adjacent first electrode strips 221 and between adjacent second electrode strips 222, there is the same center pitch dimension L in the second direction Y, and the acoustic wavelength excited by the interdigital electrode structure is equal to the center pitch dimension L.

[0064] In this embodiment, the thickness of the interdigital electrode structure is d1.

[0065] Please refer to Figure 6 and Figure 7 , Figure 6 The view direction of Figure 4 is the same as that of Figure 7 , and the view direction of Figure 5 is the same as that of

[0066] In this embodiment, the formation process of the first dielectric layer 201 includes a chemical vapor deposition process.

[0067] The material of the first dielectric layer 201 includes silicon oxide, silicon nitride, silicon oxynitride, or doped silicon oxide, and the dopant includes one or both of carbon and fluorine.

[0068] In this embodiment, the material of the first dielectric layer 201 is silicon oxide. Both the first dielectric layer and the subsequently formed second dielectric layer play a role in temperature compensation.

[0069] In other embodiments, the first dielectric layer and the second dielectric layer can play a role in protecting the interdigital electrode structure.

[0070] Please refer to Figures 8 to 10 , Figure 8 is a top view structural schematic diagram omitting the first dielectric layer, Figure 9 is Figure 8 a cross-sectional structural schematic diagram along the MM1 direction in Figure 10 is Figure 8 a cross-sectional structural schematic diagram along the NN1 direction in

[0071] The thickness m1 of the first load portion 202 ranges from 0.2% to 10% of the acoustic wave wavelength excited by the interdigital electrode structure; the thickness m2 of the second load portion 203 ranges from 0.2% to 10% of the acoustic wave wavelength excited by the interdigital electrode structure.

[0072] The first load portion 202 has a first width w1 in the first direction X, and the ratio of the first width w1 to the acoustic wave wavelength excited by the interdigital electrode structure ranges from 1:10 to 2:1; the second load portion 203 has a second width w2 in the first direction X, and the ratio of the second width w2 to the acoustic wave wavelength excited by the interdigital electrode structure ranges from 1:10 to 2:1.

[0073] The density of the first load portion 202 and the second load portion 203 is greater than the density of the first dielectric layer 201.

[0074] Specifically, the materials of the first load portion 202 and the second load portion 203 include metal materials, insulating dielectric materials or semiconductor materials; the metals include aluminum, copper, copper-aluminum alloy, platinum or molybdenum. In this embodiment, the materials of the first load portion 202 and the second load portion 203 are molybdenum.

[0075] In this embodiment, the forming method of the first load portion 202 and the second load portion 203 includes: forming a first load material layer (not shown in the figure) on the first dielectric layer 201; patterning the first load material layer to form the first load portion 202 and the second load portion 203. Here, the first load portion 202 and the second load portion 203 are at the same height.

[0076] In another embodiment, the first load portion and the second load portion are at different heights; the forming method of the first load portion, the second load portion and the second dielectric layer includes: forming the first load portion on the surface of the first dielectric layer; forming a second sub-dielectric layer on the surface of the first dielectric layer, the second sub-dielectric layer covering the first load portion; forming the second load portion on the surface of the second sub-dielectric layer; forming a third sub-dielectric layer on the surface of the second sub-dielectric layer, the third sub-dielectric layer covering the second load portion, and using the second sub-dielectric layer and the third sub-dielectric layer as the second dielectric layer.

[0077] In this embodiment, the first load portion 202 includes a plurality of first load sub-portions, and one first load sub-portion is located on one first electrode strip 221 or one second electrode strip 222; the second load portion 203 includes a plurality of second load sub-portions, and one second load sub-portion is located on one first electrode strip 221 or one second electrode strip 222.

[0078] In another embodiment, the first load portion extends along the second direction, and the first load portion straddles a plurality of the first electrode strips and a plurality of the second electrode strips; the second load portion extends along the second direction, and the second load portion straddles a plurality of the first electrode strips and a plurality of the second electrode strips.

[0079] In yet another embodiment, the first load portion further extends onto the first gap region; the second load portion further extends onto the second gap region.

[0080] There is a first distance h1 between the first load portion 202 and the interdigital electrode structure, and the ratio of the first distance to the thickness d1 of the interdigital electrode structure is greater than 0.5; there is a second distance h2 between the second load portion 203 and the interdigital electrode structure, and the ratio of the second distance h2 to the thickness d1 of the interdigital electrode structure is greater than 0.5. Here, the purpose of restricting the first distance h1 and the second distance h2 is to reduce possible electrostatic breakdown caused by the first distance h1 being too small or the second distance h2 being too small.

[0081] In this embodiment, the first distance h1 is equal to the second distance h2. In another embodiment, the first distance and the second distance may be different.

[0082] Please refer to Figures 11 to 13 , Figure 11 which is a top view structural schematic diagram omitting the first dielectric layer and the second dielectric layer, Figure 12 is Figure 11 a cross-sectional structural schematic diagram along the MM1 direction in Figure 13 is Figure 11 a cross-sectional structural schematic diagram along the NN1 direction in . A second dielectric layer 204 is formed on the first dielectric layer 201, and the second dielectric layer 204 covers the first load portion 202 and the second load portion 203; a third load portion 205 and a fourth load portion 206 are formed on the second dielectric layer 204, and the third load portion 205 is located on a plurality of the first terminal portions 2211 and a plurality of the third terminal portions 2223, and the fourth load portion 206 is located on a plurality of the second terminal portions 2212 and a plurality of the fourth terminal portions 2224.

[0083] So far, by providing the first load portion 202 and the third load portion 205 on the first terminal portion 2211 of the first electrode bar 221 and the third terminal portion 2223 of the second electrode bar 222, and providing the second load portion 203 and the fourth load portion 206 on the second terminal portion 2212 of the first electrode bar 221 and the fourth terminal portion 2224 of the second electrode bar 222, the acoustic wave velocity in the end region of the interdigital electrode structure is made less than that in the middle region, enabling the surface acoustic wave resonator device to excite and form a piston mode, so that higher-order lateral parasitic modes cannot be excited, only the first-order mode is excited, and the acoustic energy is confined within the resonance region, effectively suppressing higher-order lateral clutter and improving the quality factor (Q) of the surface acoustic wave resonator device. Additionally, compared with only providing the first load portion 202 and the second load portion 203, the provision of the third load portion 205 and the fourth load portion 206 can play a supplementary role, that is, on the basis of the first load portion 202 and the second load portion 203, suppressing the parasitic resonance excited by the first load portion and the second load portion, further suppressing higher-order lateral parasitic modes, and further improving the quality factor of the surface acoustic wave resonator device.

[0084] In this embodiment, after forming the second dielectric layer 204 and before forming the third load portion 205 and the fourth load portion 206, the S21 parameter performance of the surface acoustic wave resonator device is tested to obtain preliminary performance results; according to the preliminary performance results, the reference dimensions of the third load portion 205 and the fourth load portion 206 are selected; and according to the reference dimensions, the third load portion 205 and the fourth load portion 206 are formed on the second dielectric layer 204.

[0085] It should be noted here that the reference dimensions include thickness, width, etc. For an embodiment with only the first load portion 202 and the second load portion 203 provided, if the quality index of the surface acoustic wave resonator device is not achieved, rework or product scrapping may be required. However, by providing the third load portion 205 and the fourth load portion 206, the product performance can be improved to meet the performance index, reducing the cost problems caused by rework or product scrapping.

[0086] The thickness m3 of the third load portion 205 ranges from 0.2% to 10% of the acoustic wave wavelength excited by the interdigital electrode structure; the thickness m4 of the fourth load portion 206 ranges from 0.2% to 10% of the acoustic wave wavelength excited by the interdigital electrode structure.

[0087] The third load portion 205 has a third width w3 in the first direction X, and the ratio of the third width w3 to the acoustic wavelength excited by the interdigital electrode structure ranges from 1:10 to 2:1; the fourth load portion 206 has a fourth width w4 in the first direction X, and the ratio of the fourth width w4 to the acoustic wavelength excited by the interdigital electrode structure ranges from 1:10 to 2:1.

[0088] The material of the second dielectric layer 204 includes silicon oxide, silicon nitride, silicon oxynitride, or doped silicon oxide, and the dopant includes one or both of carbon and fluorine. In this embodiment, the material of the second dielectric layer 204 is silicon oxide.

[0089] In this embodiment, the materials of the first dielectric layer 201 and the second dielectric layer 204 are the same.

[0090] In other embodiments, the materials of the first dielectric layer and the second dielectric layer may be different. For example, the material of the first dielectric layer is silicon oxide, and the material of the second dielectric layer is silicon nitride.

[0091] The formation process of the second dielectric layer 204 includes a chemical vapor deposition process.

[0092] The densities of the third load portion 205 and the fourth load portion 206 are greater than the density of the first dielectric layer 201.

[0093] Specifically, the materials of the third load portion 205 and the fourth load portion 206 include metal materials, insulating dielectric materials, or semiconductor materials; the metal includes aluminum, copper, copper-aluminum alloy, platinum, or molybdenum. In this embodiment, the materials of the third load portion 205 and the fourth load portion 206 are molybdenum.

[0094] In this embodiment, the formation methods of the third load portion 205 and the fourth load portion 206 include: forming a second load material layer (not shown in the figure) on the surface of the second dielectric layer 204; patterning the second load material layer to form the third load portion 205 and the fourth load portion 206.

[0095] In this embodiment, the third load portion 205 and the fourth load portion 206 are at the same height.

[0096] In another embodiment, the third load portion and the fourth load portion are at different heights.

[0097] In another embodiment, the method for forming the third load portion and the fourth load portion includes: forming the third load portion on the surface of the second dielectric layer; forming a third dielectric layer on the surface of the second dielectric layer, the third dielectric layer covering the third load portion; and forming the fourth load portion on the surface of the third dielectric layer.

[0098] In yet another embodiment, the method for forming the third load portion and the fourth load portion includes: forming the fourth load portion on the surface of the second dielectric layer; forming a third dielectric layer on the surface of the second dielectric layer and on the surface of the fourth load portion; and forming the third load portion on the surface of the third dielectric layer.

[0099] In still another embodiment, the method for forming the third load portion and the fourth load portion includes: forming a second load material layer on the surface of the second dielectric layer; patterning the second load material layer to form the third load portion and the fourth load portion. Based on the different heights of the first load portion and the second load portion, the heights of the third load portion and the fourth load portion are also different.

[0100] In this embodiment, the third load portion 205 includes a plurality of third load sub-portions, and one of the third load sub-portions is located on one of the first electrode bars 221 or one of the second electrode bars 222; the fourth load portion 206 includes a plurality of fourth load sub-portions, and one of the fourth load sub-portions is located on one of the first electrode bars 221 or one of the second electrode bars 222.

[0101] In another embodiment, the third load portion extends along the second direction, and the third load portion straddles a plurality of the first electrode bars and a plurality of the second electrode bars; the fourth load portion extends along the second direction, and the fourth load portion straddles a plurality of the first electrode bars and a plurality of the second electrode bars.

[0102] In yet another embodiment, the third load portion is further formed on the first gap region; the fourth load portion is further formed on the second gap region.

[0103] Correspondingly, an embodiment of the present invention further provides a surface acoustic wave resonator device formed by the above method. Please continue to refer to Figures 11 to 13, comprising: a piezoelectric layer 20; an interdigital electrode structure located on the surface of the piezoelectric layer 200, the interdigital electrode structure including a first bus bar 211 and a second bus bar 212 arranged in parallel along a first direction X, a plurality of first electrode bars 221 connected to the first bus bar 211, and a plurality of second electrode bars 222 connected to the second bus bar 212. The plurality of first electrode bars 221 and the plurality of second electrode bars 222 are both parallel to the first direction X and arranged along a second direction Y. The first direction X and the second direction Y are perpendicular to each other, and the plurality of first electrode bars 221 and the plurality of second electrode bars 222 are arranged in an alternating and spaced manner; there are a first gap region g1, an overlapping region c, and a second gap region g2 arranged in sequence along the first direction X between the first bus bar 211 and the second bus bar 212. The first electrode bars 221 and the second electrode bars 222 overlap each other along the second direction Y in the overlapping region c. The first electrode bar 221 includes a first overlapping portion and a first extending portion 2210. The first overlapping portion is located in the overlapping region c, and the first extending portion 2210 is located in the first gap region g1. The first overlapping portion includes a first terminal portion 2211 and a second terminal portion 2212 opposite to each other in the first direction X, and a first intermediate sub-portion 221c located between the first terminal portion 2211 and the second terminal portion 2212. The first terminal portion 2211 is connected to the first extending portion 2210, and the first extending portion 2210 is connected to the first bus bar 211. The second electrode bar 222 includes a second overlapping portion and a second extending portion 2220. The second overlapping portion is located in the overlapping region c, and the second extending portion 2220 is located in the second gap region g2. The second overlapping portion includes a third terminal portion 2223 and a fourth terminal portion 2224 opposite to each other in the first direction X, and a second intermediate sub-portion 222c located between the third terminal portion 2223 and the fourth terminal portion 2224. The fourth terminal portion 2224 is connected to the second extending portion 2220, and the second extending portion 2220 is connected to the second bus bar 212. There is the first gap between the third terminal portion 2223 and the first bus bar 211, and there is the second gap between the second terminal portion 2212 and the second bus bar 212; a first dielectric layer 201 located on the piezoelectric layer 200, the first dielectric layer 201 covering the interdigital electrode structure; a first load portion 202 and a second load portion 203 located on the first dielectric layer 201, and the first load portion 202 is located on a plurality of the first terminal portions 2211 and a plurality of the third terminal portions 2223, and the second load portion 203 is located on a plurality of the second terminal portions 2212 and a plurality of the fourth terminal portions 2224; a second dielectric layer 204 located on the first dielectric layer 201, the second dielectric layer 204 covering the first load portion 202 and the second load portion 203;A third load portion 205 and a fourth load portion 206 located on the second dielectric layer 204, and the third load portion 205 is located on a plurality of the first terminal portions 2211 and a plurality of the third terminal portions 2223, and the fourth load portion 206 is located on a plurality of the second terminal portions 2212 and a plurality of the fourth terminal portions 2224.;

[0104] So far, by providing a first load portion 202 on the first terminal portion of the first electrode bar 221 and the third load portion 205 on the third terminal portion 2223 of the second electrode bar 222, and providing a second load portion 203 and a fourth load portion 206 on the second terminal portion 2212 of the first electrode bar 221 and the fourth terminal portion 2224 of the second electrode bar 222, the acoustic wave velocity in the end region of the interdigital electrode structure is made less than that in the middle region, so that the surface acoustic wave resonator device is excited to form a piston mode, thereby preventing the excitation of higher-order lateral parasitic modes, only exciting the first-order mode, and restricting the acoustic energy within the resonance region, which can effectively suppress higher-order lateral clutter and improve the quality factor (Q) of the surface acoustic wave resonator device. In addition, compared with only providing the first load portion 202 and the second load portion 203, the setting of the third load portion 205 and the fourth load portion 206 can play a supplementary role, that is, on the basis of the first load portion 202 and the second load portion 203, suppressing the parasitic resonance excited by the first load portion and the second load portion, further suppressing higher-order lateral parasitic modes, and further improving the quality factor of the surface acoustic wave resonator device.

[0105] The first load portion 202 has a first width w1 in the first direction X, and the ratio range of the first width w1 to the acoustic wave wavelength excited by the interdigital electrode structure is from 1:10 to 2:1; the second load portion 203 has a second width w2 in the first direction X, and the ratio range of the second width w2 to the acoustic wave wavelength excited by the interdigital electrode structure is from 1:10 to 2:1.

[0106] The third load portion 205 has a third width w3 in the first direction X, and the ratio range of the third width w3 to the acoustic wave wavelength excited by the interdigital electrode structure is from 1:10 to 2:1; the fourth load portion 206 has a fourth width w4 in the first direction X, and the ratio range of the fourth width w4 to the acoustic wave wavelength excited by the interdigital electrode structure is from 1:10 to 2:1.

[0107] The thickness m1 of the first load portion 202 ranges from 0.2% to 10% of the acoustic wave wavelength excited by the interdigital electrode structure; the thickness m2 of the second load portion 203 ranges from 0.2% to 10% of the acoustic wave wavelength excited by the interdigital electrode structure.

[0108] The thickness m3 of the third load portion 205 ranges from 0.2% to 10% of the acoustic wave wavelength excited by the interdigital electrode structure; the thickness m4 of the fourth load portion 206 ranges from 0.2% to 10% of the acoustic wave wavelength excited by the interdigital electrode structure.

[0109] There is a first distance h1 between the first load portion 202 and the interdigital electrode structure, and the ratio of the first distance to the thickness d1 of the interdigital electrode structure is greater than 0.5; there is a second distance h2 between the second load portion 203 and the interdigital electrode structure, and the ratio of the second distance to the thickness d1 of the interdigital electrode structure is greater than 0.5. Here, the purpose of restricting the first distance h1 and the second distance h2 is to avoid electrostatic breakdown caused by the first distance h1 being too small or the second distance h2 being too small.

[0110] In this embodiment, the first load portion 202 includes a plurality of first load sub-portions, and one first load sub-portion is located on one first electrode strip 221 or one second electrode strip 222; the second load portion 203 includes a plurality of second load sub-portions, and one second load sub-portion is located on one first electrode strip 221 or one second electrode strip 222.

[0111] In another embodiment, the first load portion extends along the second direction, and the first load portion straddles a plurality of the first electrode strips and a plurality of the second electrode strips; the second load portion extends along the second direction, and the second load portion straddles a plurality of the first electrode strips and a plurality of the second electrode strips.

[0112] In yet another embodiment, the first load portion further extends onto the first gap region; the second load portion further extends onto the second gap region.

[0113] In this embodiment, the third load portion 205 includes a plurality of third load sub-portions, and one third load sub-portion is located on one first electrode strip 221 or one second electrode strip 222; the fourth load portion 206 includes a plurality of fourth load sub-portions, and one fourth load sub-portion is located on one first electrode strip 221 or one second electrode strip 222.

[0114] In another embodiment, the third load portion extends along the second direction, and the third load portion straddles a plurality of the first electrode strips and a plurality of the second electrode strips; the fourth load portion extends along the second direction, and the fourth load portion straddles a plurality of the first electrode strips and a plurality of the second electrode strips.

[0115] In yet another embodiment, the third load portion further extends onto the first gap region; the fourth load portion further extends onto the second gap region.

[0116] In this embodiment, the densities of the first load portion 202, the second load portion 203, the third load portion 205, and the fourth load portion 206 are greater than the density of the first dielectric layer 201.

[0117] The materials of the first load portion 202, the second load portion 203, the third load portion 205, and the fourth load portion 206 include metallic materials, insulating dielectric materials, or semiconductor materials; the metal includes aluminum, copper, copper-aluminum alloy, platinum, or molybdenum. In this embodiment, the materials of the first load portion 202, the second load portion 203, the third load portion 205, and the fourth load portion 206 are all molybdenum.

[0118] The materials of the first dielectric layer 201 and the second dielectric layer 204 include silicon oxide, silicon nitride, silicon oxynitride, or doped silicon oxide, and the dopant includes one or both of carbon and fluorine.

[0119] In this embodiment, the materials of the first dielectric layer 201 and the second dielectric layer 204 are both silicon oxide. Here, the first dielectric layer and the second dielectric layer play a role in temperature compensation.

[0120] In other embodiments, the first dielectric layer and the second dielectric layer can play a role in protecting the interdigital electrode structure.

[0121] Figures 14 to 17 It is a schematic structural diagram of each step of the method for forming a surface acoustic wave resonator device according to Embodiment 2 of the present invention.

[0122] The main difference between this embodiment and Embodiment 1 lies in that the structures of the first load portion, the second load portion, the third load portion, and the fourth load portion are different.

[0123] Please continue to refer to Figures 3 to 7 on the basis of Figures 14 to 15 , Figure 14 is a top view structural diagram with the first dielectric layer omitted, Figure 15 is Figure 14 a cross-sectional structural diagram along the MM1 direction in . A first load portion 302 and a second load portion 303 are formed on the first dielectric layer 201, and the first load portion 302 is located on a plurality of the first terminal portions 2211 and a plurality of the third terminal portions 2223, and the second load portion 303 is located on a plurality of the second terminal portions 2212 and a plurality of the fourth terminal portions 2224.

[0124] In this embodiment, the first load portion 302 extends along the second direction Y, and the first load portion 302 straddles a plurality of the first electrode strips 221 and a plurality of the second electrode strips 222; the second load portion 303 extends along the second direction Y, and the second load portion 303 straddles a plurality of the first electrode strips 221 and a plurality of the second electrode strips 222.

[0125] Here, compared with the first embodiment, the manufacturing process of the first load portion 302 and the second load portion 303 can be made easier, and the reduction of the sound velocity in the end region is more obvious, further suppressing the high-order lateral parasitic modes and further improving the quality factor of the surface acoustic wave resonator device.

[0126] Please refer to Figure 16 and Figure 17 , Figure 16 which is a top view structural schematic diagram omitting the first dielectric layer and the second dielectric layer, Figure 17 and Figure 16 is a cross-sectional structural schematic diagram along the MM1 direction in

[0127] In this embodiment, a second dielectric layer 304 is formed on the first dielectric layer 201, and the second dielectric layer 304 covers the first load portion 302 and the second load portion 303; a third load portion 305 and a fourth load portion 306 are formed on the second dielectric layer 304, and the third load portion 305 is located on a plurality of the first terminal portions 2211 and a plurality of the third terminal portions 2223, and the fourth load portion 306 is located on a plurality of the second terminal portions 2212 and a plurality of the fourth terminal portions 2224.

[0128] Here, compared with the first embodiment, the manufacturing process of the third load portion 305 and the fourth load portion 306 can be made easier, and the reduction of the sound velocity in the end region is more obvious, further suppressing the high-order lateral parasitic modes and further improving the quality factor of the surface acoustic wave resonator device.

[0129] In this embodiment, for the structure of the surface acoustic wave resonator device except for the structures of the first load portion, the second load portion, the third load portion and the fourth load portion, please refer to the description of the first embodiment, and details are not described herein again.

[0130] Correspondingly, Embodiment 2 of the present invention further provides a surface acoustic wave resonator device formed by the above method. Please continue to refer to Figures 16 to 17 .

[0131] The main difference between this embodiment and the first embodiment is that the structures of the first load portion, the second load portion, the third load portion, and the fourth load portion are different.

[0132] Specifically, in this embodiment, the first load portion 302 extends along the second direction Y, and the first load portion 302 straddles a plurality of the first electrode strips 221 and a plurality of the second electrode strips 222; the second load portion 303 extends along the second direction Y, and the second load portion 303 straddles a plurality of the first electrode strips 221 and a plurality of the second electrode strips 222; the third load portion 305 extends along the second direction Y, and the third load portion 305 straddles a plurality of the first electrode strips 221 and a plurality of the second electrode strips 222; the fourth load portion 306 extends along the second direction Y, and the fourth load portion 306 straddles a plurality of the first electrode strips 221 and a plurality of the second electrode strips 222.

[0133] In the above structure, the manufacturing process of the first load portion (third load portion) and the second load portion (fourth load portion) can be made easier, and the reduction of the sound velocity in the end region is more obvious, further suppressing the higher-order transverse parasitic modes and further improving the quality factor of the surface acoustic wave resonator.

[0134] It should be noted that for the structures of other parts of the surface acoustic wave resonator, please refer to the relevant descriptions in the first embodiment and will not be elaborated here.

[0135] Figures 18 to 21 It is a schematic structural diagram of each step of the method for forming the surface acoustic wave resonator according to the third embodiment of the present invention.

[0136] The main difference between this embodiment and the above embodiment is that the structures of the first load portion, the second load portion, the third load portion, and the fourth load portion are different.

[0137] Please continue to refer to Figures 3 to 7 on the basis of Figures 18 to 19 , Figure 18 is a top view structural diagram omitting the first dielectric layer, Figure 19 is Figure 18Schematic cross-sectional structure diagram along the MM1 direction. A first load portion 402 and a second load portion 403 are formed on the first dielectric layer 201. The first load portion 402 is located on a plurality of the first terminal portions 2211 and a plurality of the third terminal portions 2223. The first load portion 402 extends along the second direction Y. The first load portion 402 straddles a plurality of the first electrode bars 221 and a plurality of the second electrode bars 222, and is also formed on the first gap region g1. The second load portion 403 is located on a plurality of the second terminal portions 2212 and a plurality of the fourth terminal portions 2224. The second load portion 403 extends along the second direction Y. The second load portion 403 straddles a plurality of the first electrode bars 221 and a plurality of the second electrode bars 222, and is also formed on the second gap region g2.

[0138] Compared with Embodiment 2, in this embodiment, the first load portion 402 is also formed on the first gap region g1, and the second load portion 403 is also formed on the second gap region g2, reducing the sound velocity in the end region, further suppressing higher-order transverse parasitic modes, and further improving the quality factor of the surface acoustic wave resonator device.

[0139] Please refer to Figures 20 to 21 , Figure 20 is a top view structure diagram omitting the first dielectric layer and the second dielectric layer. Figure 21 is Figure 20 Schematic cross-sectional structure diagram along the MM1 direction. A second dielectric layer 404 is formed on the first dielectric layer 201. The second dielectric layer 404 covers the first load portion 402 and the second load portion 403. A third load portion 405 and a fourth load portion 406 are formed on the second dielectric layer 404. The third load portion 405 is located on a plurality of the first terminal portions 2211 and a plurality of the third terminal portions 2223. The third load portion 405 extends along the second direction Y. The third load portion 405 straddles a plurality of the first electrode bars 221 and a plurality of the second electrode bars 222, and is also formed on the first gap region g1. The fourth load portion 406 is located on a plurality of the second terminal portions 2212 and a plurality of the fourth terminal portions 2224. The fourth load portion 406 extends along the second direction Y. The fourth load portion 406 straddles a plurality of the first electrode bars 221 and a plurality of the second electrode bars 222, and is also formed on the second gap region g2.

[0140] Compared with Embodiment 2, in this embodiment, the third load portion 405 is also formed on the first gap region g1, and the fourth load portion 406 is also formed on the second gap region g2, reducing the sound velocity in the end region, further suppressing higher-order transverse parasitic modes, and further improving the quality factor of the surface acoustic wave resonator device.

[0141] Correspondingly, Embodiment 3 of the present invention further provides a surface acoustic wave resonator formed by the above method. Please continue to refer to Figures 20 to 21 .

[0142] The main difference between this embodiment and the above embodiment is that the structures of the first load portion, the second load portion, the third load portion, and the fourth load portion are different.

[0143] Specifically, compared with Embodiment 2, in this embodiment, the first load portion 402 is further formed on the first gap region g1, and the second load portion 403 is further formed on the second gap region g2; the third load portion 405 is further formed on the first gap region g1, and the fourth load portion 406 is further formed on the second gap region g2. This makes the reduction of the sound velocity in the end region more obvious, further suppresses the high-order lateral parasitic modes, and further improves the quality factor of the surface acoustic wave resonator.

[0144] It should be noted that for the structures of other parts of the surface acoustic wave resonator, please refer to the relevant descriptions in Embodiment 1, which will not be elaborated here.

[0145] Figures 22 to 25 It is a schematic structural diagram of each step of the method for forming the surface acoustic wave resonator according to Embodiment 4 of the present invention.

[0146] The main difference between this embodiment and the above embodiment is that the structures of the first load portion, the second load portion, the third load portion, and the fourth load portion are different.

[0147] Please continue to refer to Figures 3 to 7 on the basis of Figures 22 to 23 , Figure 22 is a top view structural diagram with the first dielectric layer omitted, Figure 23 is Figure 22 a cross-sectional structural diagram along the MM1 direction in . On the first dielectric layer 201, a first load portion 502 and a second load portion 503 are formed. The first load portion 502 is located on a plurality of the first terminal portions 2211 and a plurality of the third terminal portions 2223, and is further formed on the first gap region g1. The second load portion 503 is located on a plurality of the second terminal portions 2212 and a plurality of the fourth terminal portions 2224, and is further formed on the second gap region g2.

[0148] In this embodiment, the first load portion 502 includes a plurality of first load sub-portions, and one of the first load sub-portions is located on one of the first electrode strips 221 or one of the second electrode strips 222; the second load portion 503 includes a plurality of second load sub-portions, and one of the second load sub-portions is located on one of the first electrode strips 221 or one of the second electrode strips 222.

[0149] Compared with the first embodiment, in this embodiment, the first load portion 502 is further formed on the first gap region g1, and the second load portion 503 is further formed on the second gap region g2, so that the reduction of the sound velocity in the end region is more obvious, further suppressing the higher-order transverse parasitic modes and further improving the quality factor of the surface acoustic wave resonator device.

[0150] Please refer to Figures 24 to 25 , Figure 24 which is a top view structural schematic diagram omitting the first dielectric layer and the second dielectric layer. Figure 25 is Figure 24 a cross-sectional structural schematic diagram along the MM1 direction in , a second dielectric layer 504 is formed on the first dielectric layer 201, and the second dielectric layer 504 covers the first load portion 502 and the second load portion 503; a third load portion 505 and a fourth load portion 506 are formed on the second dielectric layer 504, and the third load portion 505 is located on a plurality of the first terminal portions 2211 and a plurality of the third terminal portions 2223, and is further formed on the first gap region g1, and the fourth load portion 506 is located on a plurality of the second terminal portions 2212 and a plurality of the fourth terminal portions 2224, and is further formed on the second gap region g2.

[0151] In this embodiment, the third load portion 505 includes a plurality of third load sub-portions, and one of the third load sub-portions is located on one of the first electrode strips 221 or one of the second electrode strips 222; the fourth load portion 506 includes a plurality of fourth load sub-portions, and one of the fourth load sub-portions is located on one of the first electrode strips 221 or one of the second electrode strips 222.

[0152] Compared with the first embodiment, in this embodiment, the third load portion 505 is further formed on the first gap region g1, and the fourth load portion 506 is further formed on the second gap region g2, so that the reduction of the sound velocity in the end region is more obvious, further suppressing the higher-order transverse parasitic modes and further improving the quality factor of the surface acoustic wave resonator device.

[0153] Correspondingly, Embodiment 4 of the present invention further provides a surface acoustic wave resonator device formed by the above method. Please continue to refer to Figures 24 to 25 .

[0154] The main difference between this embodiment and the first embodiment lies in that the structures of the first load portion, the second load portion, the third load portion, and the fourth load portion are different.

[0155] Compared with the first embodiment, in this embodiment, the first load portion 502 is further formed on the first gap region g1, and the second load portion 503 is further formed on the second gap region g2; the third load portion 505 is further formed on the first gap region g1, and the fourth load portion 506 is further formed on the second gap region g2. This makes the reduction of the sound velocity in the end region more obvious, further suppresses the high-order lateral parasitic modes, and further improves the quality factor of the surface acoustic wave resonator device.

[0156] It should be noted that for the structures of other parts of the surface acoustic wave resonator device, please refer to the relevant descriptions in the first embodiment and will not be elaborated here.

[0157] Figures 26 to 34 It is a schematic structural diagram of each step of the method for forming the surface acoustic wave resonator device according to the fifth embodiment of the present invention.

[0158] The main difference between this embodiment and the above embodiments lies in that the structure of the interdigital electrode structure is different.

[0159] Here, compared with the above embodiments, in this embodiment, the interdigital electrode structure is provided with a plurality of first dummy electrode strips and a plurality of second dummy electrode strips, which can reduce the leakage of acoustic energy and will be described in detail below.

[0160] Please refer to Figures 26 to 28 , Figure 26 is Figure 27 and Figure 28 a top view structural diagram, Figure 27 is Figure 26 a cross-sectional structural diagram along the EE1 direction in Figure 28 is Figure 26Schematic cross-sectional structure diagram along the FF1 direction, providing a piezoelectric layer 600; a interdigital electrode structure is formed on the surface of the piezoelectric layer 600. The interdigital electrode structure includes a first bus 611 and a second bus 612 arranged in parallel along a first direction X, a plurality of first electrode bars 621 connected to the first bus 611, and a plurality of second electrode bars 622 connected to the second bus 612. The plurality of first electrode bars 621 and the plurality of second electrode bars 622 are both parallel to the first direction X and arranged along a second direction Y. The first direction X and the second direction Y are perpendicular to each other. The plurality of first electrode bars 621 and the plurality of second electrode bars 622 are arranged in an alternating and spaced manner. There are a first gap region G1, an overlapping region C, and a second gap region G2 arranged in sequence along the first direction X between the first bus 611 and the second bus 612. The first electrode bar 621 and the second electrode bar 622 overlap each other along the second direction Y in the overlapping region C. The first electrode bar 621 includes a first overlapping portion and a first extending portion 6210. The first overlapping portion is located in the overlapping region C, and the first extending portion 6210 is located in the first gap region G1. The first overlapping portion includes a first terminal portion 6211 and a second terminal portion 6212 opposite to each other in the first direction X, and a first intermediate sub-portion 621c located between the first terminal portion 6211 and the second terminal portion 6212. The first terminal portion 6211 is connected to the first extending portion 6210, and the first extending portion 6210 is connected to the first bus 611. The second electrode bar 622 includes a second overlapping portion and a second extending portion 6220. The second overlapping portion is located in the overlapping region C, and the second extending portion 6220 is located in the second gap region G2. The second overlapping portion includes a third terminal portion 6223 and a fourth terminal portion 6224 opposite to each other in the first direction X, and a second intermediate sub-portion 622c located between the third terminal portion 6223 and the fourth terminal portion 6224. The fourth terminal portion 6224 is connected to the second extending portion 6220, and the second extending portion 6220 is connected to the second bus 612.

[0161] In this embodiment, the interdigital electrode structure further includes: a plurality of first dummy electrode bars 631 connected to the first bus 611. There is a third gap g3 between the first dummy electrode bars 631 and the second electrode bars 622. The plurality of first dummy electrode bars 631 are parallel to the first direction X, and the first dummy electrode bars 631 are arranged in an alternating and spaced manner with the first electrode bars 621; a plurality of second dummy electrode bars 632 connected to the second bus 612. There is a fourth gap g4 between the second dummy electrode bars 632 and the first electrode bars 621. The plurality of second dummy electrode bars 632 are parallel to the first direction X, and the second dummy electrode bars 632 are arranged in an alternating and spaced manner with the second electrode bars 622.

[0162] Please refer to Figures 29 to 31 , Figure 29 which is Figure 30 a top - view structural schematic diagram of Figure 31 and Figure 30 which is Figure 29 a cross - sectional structural schematic diagram along the EE1 direction in Figure 31 and Figure 29 which is

[0163] a cross - sectional structural schematic diagram along the FF1 direction in. A first dielectric layer 601 is formed on the piezoelectric layer 600, and the first dielectric layer 601 covers the interdigital electrode structure; a first load portion 602 and a second load portion 603 are formed on the first dielectric layer 601, and the first load portion 602 is located on a plurality of the first terminal portions 6211 and a plurality of the third terminal portions 6223, and the second load portion 603 is located on a plurality of the second terminal portions 6212 and a plurality of the fourth terminal portions 6224.

[0164] In this embodiment, the first load portion 602 is further formed on the first dummy electrode strip 631; the second load portion 603 is further formed on the second dummy electrode strip 632.

[0165] In another embodiment, the first load portion is only located on a plurality of the first terminal portions and a plurality of the third terminal portions, and the second load portion is only located on a plurality of the second terminal portions and a plurality of the fourth terminal portions.

[0166] Please refer to Figures 32 to 34 , Figure 32 which is Figure 33 a top - view structural schematic diagram of Figure 34 and Figure 33 which is Figure 32 a cross - sectional structural schematic diagram along the EE1 direction in Figure 34 and Figure 32 which is a cross - sectional structural schematic diagram along the FF1 direction in. A second dielectric layer 604 is formed on the first dielectric layer 601, and the second dielectric layer 604 covers the first load portion 602 and the second load portion 603; a third load portion 605 and a fourth load portion 606 are formed on the second dielectric layer 604, and the third load portion 605 is located on a plurality of the first terminal portions 6211 and a plurality of the third terminal portions 6223, and the fourth load portion 606 is located on a plurality of the second terminal portions 6212 and a plurality of the fourth terminal portions 6224.

[0167] In this embodiment, the third load portion 605 is further formed on the first dummy electrode strip 631; the fourth load portion 606 is further formed on the second dummy electrode strip 632.

[0168] In another embodiment, the third load portion is only located on a plurality of the first terminal portions and a plurality of the third terminal portions, and the fourth load portion is only located on a plurality of the second terminal portions and a plurality of the fourth terminal portions.

[0169] In yet another embodiment, the third load portion extends along the second direction, and the third load portion straddles a plurality of the first electrode strips and a plurality of the second electrode strips; the fourth load portion extends along the second direction, and the fourth load portion straddles a plurality of the first electrode strips and a plurality of the second electrode strips.

[0170] Correspondingly, Embodiment 5 of the present invention further provides a surface acoustic wave resonator device formed by the above method. Please continue to refer to Figures 32 to 34, comprising: a piezoelectric layer 600; an interdigital electrode structure located on the surface of the piezoelectric layer 600, the interdigital electrode structure including a first bus bar 611 and a second bus bar 612 arranged in parallel along a first direction X, a plurality of first electrode strips 621 connected to the first bus bar 611, and a plurality of second electrode strips 622 connected to the second bus bar 612. The plurality of first electrode strips 621 and the plurality of second electrode strips 622 are both parallel to the first direction X and arranged along a second direction Y. The first direction X and the second direction Y are perpendicular to each other. The plurality of first electrode strips 621 and the plurality of second electrode strips 622 are arranged in an alternating and spaced manner. There are a first gap region G1, an overlapping region C, and a second gap region G2 arranged in sequence along the first direction X between the first bus bar 611 and the second bus bar 612. The first electrode strips 621 and the second electrode strips 622 overlap each other along the second direction Y in the overlapping region C. The first electrode strip 621 includes a first overlapping portion and a first extension portion 6210. The first overlapping portion is located in the overlapping region C, and the first extension portion 6210 is located in the first gap region G1. The first overlapping portion includes a first terminal portion 6211 and a second terminal portion 6212 opposite to each other in the first direction X, and a first intermediate sub-portion 621c located between the first terminal portion 6211 and the second terminal portion 6212. The first terminal portion 6211 is connected to the first extension portion 6210, and the first extension portion 6210 is connected to the first bus bar 611. The second electrode strip 622 includes a second overlapping portion and a second extension portion 6220. The second overlapping portion is located in the overlapping region C, and the second extension portion 6220 is located in the second gap region G2. The second overlapping portion includes a third terminal portion 6223 and a fourth terminal portion 6224 opposite to each other in the first direction X, and a second intermediate sub-portion 622c located between the third terminal portion 6223 and the fourth terminal portion 6224. The fourth terminal portion 6224 is connected to the second extension portion 6220, and the second extension portion 6220 is connected to the second bus bar 612; a first dielectric layer 601 located on the piezoelectric layer 600, the first dielectric layer 601 covering the interdigital electrode structure; a first load portion 602 and a second load portion 603 located on the first dielectric layer 601, and the first load portion 602 is located on a plurality of the first terminal portions 6211 and a plurality of the third terminal portions 6223, and the second load portion 603 is located on a plurality of the second terminal portions 6212 and a plurality of the fourth terminal portions 6224; a second dielectric layer 604 located on the first dielectric layer 601, the second dielectric layer 604 covering the first load portion 602 and the second load portion 603;A third load portion 605 and a fourth load portion 606 located on the second dielectric layer 604, and the third load portion 605 is located on a plurality of the first terminal portions 6211 and a plurality of the third terminal portions 6223, and the fourth load portion 606 is located on a plurality of the second terminal portions 6212 and a plurality of the fourth terminal portions 6224.

[0171] In this embodiment, the interdigital electrode structure further includes: a plurality of first dummy electrode strips 631 connected to the first bus 611, a third gap g3 is provided between the first dummy electrode strips 631 and the second electrode strips 622, a plurality of the first dummy electrode strips 631 are parallel to the first direction X, and the first dummy electrode strips 631 and the first electrode strips 621 are arranged in an alternating and spaced manner; a plurality of second dummy electrode strips 632 connected to the second bus 612, a fourth gap g4 is provided between the second dummy electrode strips 632 and the first electrode strips 621, a plurality of the second dummy electrode strips 632 are parallel to the first direction X, and the second dummy electrode strips 632 and the second electrode strips 622 are arranged in an alternating and spaced manner.

[0172] Here, the interdigital electrode structure adds a plurality of first dummy electrode strips 631 and a plurality of second dummy electrode strips 632, which can reduce the leakage of acoustic energy.

[0173] In this embodiment, the first load portion 602 is further formed on the first dummy electrode strips 631; the second load portion 603 is further formed on the second dummy electrode strips 632.

[0174] In another embodiment, the first load portion is only located on a plurality of the first terminal portions and a plurality of the third terminal portions, and the second load portion is only located on a plurality of the second terminal portions and a plurality of the fourth terminal portions.

[0175] In still another embodiment, the first load portion extends along the second direction, and the first load portion straddles a plurality of the first electrode strips and a plurality of the second electrode strips; the second load portion extends along the second direction, and the second load portion straddles a plurality of the first electrode strips and a plurality of the second electrode strips.

[0176] In this embodiment, the third load portion 605 is further formed on the first dummy electrode strips 631; the fourth load portion 606 is further formed on the second dummy electrode strips 632.

[0177] In another embodiment, the third load portion is only located on a plurality of the first terminal portions and a plurality of the third terminal portions, and the fourth load portion is only located on a plurality of the second terminal portions and a plurality of the fourth terminal portions.

[0178] In yet another embodiment, the third load portion extends along the second direction, and the third load portion straddles a plurality of the first electrode strips and a plurality of the second electrode strips; the fourth load portion extends along the second direction, and the fourth load portion straddles a plurality of the first electrode strips and a plurality of the second electrode strips.

[0179] It should be noted that for the structures of other parts of the surface acoustic wave resonator device, please refer to the relevant descriptions in Embodiment 1, and details are not described herein again.

[0180] Figures 35 to 38 It is a schematic structural diagram of each step of the formation method of the surface acoustic wave resonator device according to Embodiment 6 of the present invention.

[0181] The main difference between this embodiment and the above embodiment is that:

[0182] In the above embodiment, the first load portion and the second load portion are at the same height, and the third load portion and the fourth load portion are also at the same height.

[0183] In this embodiment, the first load portion and the second load portion may be at different heights, and the third load portion and the fourth load portion may also be at different heights.

[0184] Here, compared with the above embodiment, the parameters (such as materials, thicknesses, etc.) of the first load portion and the second load portion are set differently, so that the resonance frequencies of the first load layer and the second load layer are different, so that the parasitic resonances introduced by the first load layer and the parasitic resonances introduced by the second load layer can cancel each other or partially cancel each other, thereby weakening the split parasitics brought about by introducing the first load layer and the second load layer.

[0185] Furthermore, the parameters (such as materials, thicknesses, etc.) of the third load portion and the fourth load portion are set differently, so that the resonance frequencies of the third load layer and the fourth load layer are different, so that the parasitic resonances introduced by the third load layer and the parasitic resonances introduced by the fourth load layer can cancel each other or partially cancel each other, thereby weakening the split parasitics brought about by introducing the third load layer and the fourth load layer.

[0186] Next, a detailed description will be given to the formation method of the surface acoustic wave resonator device in this embodiment.

[0187] Please continue to refer to Figures 3 to 7 on the basis of Figures 35 to 36 , Figure 35 is a top view structural diagram omitting the first dielectric layer and the second dielectric layer. Figure 36 is Figure 35Schematic cross-sectional structure diagram along the MM1 direction. A first load portion 702 is formed on the surface of the first dielectric layer 201, and the first load portion 702 is located on a plurality of the first terminal portions 2211 and a plurality of the third terminal portions 2223; a second sub-dielectric layer 7042 is formed on the surface of the first dielectric layer 201; a second load portion 703 is formed on the surface of the second sub-dielectric layer 7042, and the second load portion 703 is located on a plurality of the second terminal portions 2212 and a plurality of the fourth terminal portions 2224; a third sub-dielectric layer 7043 is formed on the surface of the second sub-dielectric layer 7042. Using the second sub-dielectric layer 7042 and the third sub-dielectric layer 7043 as the second dielectric layer 704, the second dielectric layer 704 covers the first load portion 702 and the second load portion 703.

[0188] Please refer to Figures 37 to 38 , Figure 37 is a top view structure diagram omitting the first dielectric layer, the second dielectric layer and the third dielectric layer. Figure 38 is Figure 37 Schematic cross-sectional structure diagram along the MM1 direction. A third load portion 705 is formed on the surface of the second dielectric layer 704; a third dielectric layer 707 is formed on the surface of the second dielectric layer 704; a fourth load portion 706 is formed on the surface of the third dielectric layer 707.

[0189] In this embodiment, the third load portion 705 is closer to the piezoelectric layer 200 than the fourth load portion 706.

[0190] In another embodiment, the fourth load portion is closer to the piezoelectric layer than the third load portion; the forming methods of the third load portion and the fourth load portion include: forming the fourth load portion on the surface of the second dielectric layer; forming a third dielectric layer on the surface of the second dielectric layer and the surface of the fourth load portion; forming the third load portion on the surface of the third dielectric layer.

[0191] Correspondingly, Embodiment Six of the present invention further provides a surface acoustic wave resonator formed by the above method. Please continue to refer to Figures 37 to 38 .

[0192] The main difference between this embodiment and Embodiment One is that:

[0193] In this embodiment, the parameters (such as materials, thicknesses, etc.) of the first load portion and the second load portion are set differently. So that the resonance frequencies of the first load layer and the second load layer are differentiated, so that the parasitic resonances introduced by the first load layer and the parasitic resonances introduced by the second load layer can cancel each other or partially cancel each other, thereby weakening the split mode brought about by introducing the first load layer and the second load layer.

[0194] In this embodiment, the parameters (such as materials, thickness, etc.) of the third load portion and the fourth load portion are set differently, so that the resonance frequencies of the third load layer and the fourth load layer are different, and the parasitic resonances introduced by the third load layer and the parasitic resonances introduced by the fourth load layer can cancel or partially cancel each other, thereby weakening the split mode caused by the introduction of the third load layer and the fourth load layer.

[0195] It should be noted that for the structures of other parts of the surface acoustic wave resonator device, please refer to the relevant descriptions in Embodiment 1, which will not be elaborated here.

[0196] Furthermore, it should be noted that in the above embodiments, the materials, thicknesses or widths of the first load portion and the second load portion are different, and the materials, thicknesses or widths of the third load portion and the fourth load portion are different.

[0197] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.

Claims

1. A surface acoustic wave resonance device, characterized in that: include: Piezoelectric layer; an interdigitated electrode structure located on the surface of the piezoelectric layer, the interdigitated electrode structure comprising a first bus and a second bus arranged in parallel along a first direction, a plurality of first electrode strips connected to the first bus, and a plurality of second electrode strips connected to the second bus, the plurality of first electrode strips and the plurality of second electrode strips are parallel to the first direction and arranged along the second direction, the first direction and the second direction are perpendicular to each other, and the plurality of first electrode strips and the plurality of second electrode strips are arranged in a staggered manner; A first gap region, an overlap region, and a second gap region are sequentially arranged along the first direction between the first bus and the second bus, the first electrode strip and the second electrode strip overlap each other along the second direction in the overlap region, the first electrode strip comprises a first overlap portion and a first extension portion, the first overlap portion is located in the overlap region, the first extension portion is located in the first gap region, the first overlap portion comprises a first terminal portion and a second terminal portion opposite to each other in the first direction, and a first intermediate sub-portion located between the first terminal portion and the second terminal portion, the first terminal portion is connected to the first extension portion, and the first extension portion is connected to the first bus, the second electrode strip comprises a second overlap portion and a second extension portion, the second overlap portion is located in the overlap region, the second extension portion is located in the second gap region, the second overlap portion comprises a third terminal portion and a fourth terminal portion opposite to each other in the first direction, and a second intermediate sub-portion located between the third terminal portion and the fourth terminal portion, the fourth terminal portion is connected to the second extension portion, the second extension portion is connected to the second bus, a first gap is provided between the third terminal portion and the first bus, and a second gap is provided between the second terminal portion and the second bus; a first dielectric layer located on the piezoelectric layer, the first dielectric layer covering the interdigital electrode structure; a first load portion and a second load portion located on the first dielectric layer, the first load portion being located on a plurality of the first terminal portions and a plurality of the third terminal portions, and the second load portion being located on a plurality of the second terminal portions and a plurality of the fourth terminal portions; a second dielectric layer located on the first dielectric layer, wherein the second dielectric layer covers the first load portion and the second load portion; A third load unit and a fourth load unit are located on the second dielectric layer, and the third load unit is located on a number of the first terminal units and a number of the third terminal units, and the fourth load unit is located on a number of the second terminal units and a number of the fourth terminal units, and the third load unit and the fourth load unit are used to suppress parasitic resonances excited by the first load unit and the second load unit.

2. The surface acoustic wave resonator device according to claim 1, characterized in that: The first load portion has a first width in the first direction, and the ratio of the first width to the wavelength of the sound wave excited by the interdigitated electrode structure is in the range of 1:10 to 2:1; the second load portion has a second width in the first direction, and the ratio of the second width to the wavelength of the sound wave excited by the interdigitated electrode structure is in the range of 1:10 to 2:

1.

3. The surface acoustic wave resonator device according to claim 1, characterized in that: The third load portion has a third width in the first direction, and the ratio of the third width to the wavelength of the sound wave excited by the interdigitated electrode structure is in the range of 1:10 to 2:1; the fourth load portion has a fourth width in the first direction, and the ratio of the fourth width to the wavelength of the sound wave excited by the interdigitated electrode structure is in the range of 1:10 to 2:

1.

4. The surface acoustic wave resonator device according to claim 1, characterized in that: The thickness of the first load portion ranges from 0.2% to 10% of the wavelength of the acoustic wave excited by the interdigital electrode structure; the thickness of the second load portion ranges from 0.2% to 10% of the wavelength of the acoustic wave excited by the interdigital electrode structure.

5. The surface acoustic wave resonator device according to claim 1, characterized in that: The thickness of the third load portion ranges from 0.2% to 10% of the wavelength of the acoustic wave excited by the interdigital electrode structure; the thickness of the fourth load portion ranges from 0.2% to 10% of the wavelength of the acoustic wave excited by the interdigital electrode structure.

6. The surface acoustic wave resonator device according to claim 1, characterized in that: There is a first distance between the first load portion and the interdigital electrode structure, and the ratio of the first distance to the thickness of the interdigital electrode structure is greater than 0.5; there is a second distance between the second load portion and the interdigital electrode structure, and the ratio of the second distance to the thickness of the interdigital electrode structure is greater than 0.

5.

7. The surface acoustic wave resonator device according to claim 1, characterized in that: The first load section includes a plurality of first load subsections, one of which is located on one of the first electrode strips or one of the second electrode strips; the second load section includes a plurality of second load subsections, one of which is located on one of the first electrode strips or one of the second electrode strips.

8. The surface acoustic wave resonator device according to claim 1, characterized in that: The first load portion extends along the second direction, and the first load portion crosses over a number of the first electrode strips and a number of the second electrode strips; the second load portion extends along the second direction, and the second load portion crosses over a number of the first electrode strips and a number of the second electrode strips.

9. The surface acoustic wave resonator device according to claim 1, characterized in that: The third load section includes a plurality of third load sub-sections, one of which is located on one of the first electrode strips or one of the second electrode strips; the fourth load section includes a plurality of fourth load sub-sections, one of which is located on one of the first electrode strips or one of the second electrode strips.

10. The surface acoustic wave resonator device according to claim 1, characterized in that: The third load portion extends along the second direction, and the third load portion crosses over a number of the first electrode strips and a number of the second electrode strips; the fourth load portion extends along the second direction, and the fourth load portion crosses over a number of the first electrode strips and a number of the second electrode strips.

11. The surface acoustic wave resonator device according to claim 1, characterized in that: The first load portion further extends to the first gap region; the second load portion further extends to the second gap region.

12. The surface acoustic wave resonator device according to claim 1, characterized in that: The third load portion further extends to the first gap region; and the fourth load portion further extends to the second gap region.

13. The surface acoustic wave resonator device according to claim 1, characterized in that: The interdigitated electrode structure also includes: a plurality of first dummy electrode strips connected to the first bus, a third gap being provided between the first dummy electrode strips and the second electrode strips, a plurality of the first dummy electrode strips being parallel to the first direction, and the first dummy electrode strips being arranged in an alternating pattern with the first electrode strips; and a plurality of second dummy electrode strips connected to the second bus, a fourth gap being provided between the second dummy electrode strips and the first electrode strips, a plurality of the second dummy electrode strips being parallel to the first direction, and the second dummy electrode strips being arranged in an alternating pattern with the second electrode strips.

14. The surface acoustic wave resonator device according to claim 13, characterized in that: The first load portion further extends to the first dummy electrode strip; the second load portion further extends to the second dummy electrode strip.

15. The surface acoustic wave resonator device according to claim 13, characterized in that: The third load portion further extends to the first dummy electrode strip; and the fourth load portion further extends to the second dummy electrode strip.

16. The surface acoustic wave resonator device according to claim 1, characterized in that: Densities of the first load portion, the second load portion, the third load portion, and the fourth load portion are greater than density of the first dielectric layer.

17. The surface acoustic wave resonator device according to claim 16, characterized in that: The materials of the first load part, the second load part, the third load part and the fourth load part include metal materials, insulating dielectric materials or semiconductor materials; the metal includes aluminum, copper, copper-aluminum alloy, platinum or molybdenum.

18. The surface acoustic wave resonator device according to claim 1, characterized in that: The materials of the first dielectric layer and the second dielectric layer include silicon oxide, silicon nitride, silicon oxynitride, or silicon oxide containing dopants, and the dopants include one or both of carbon and fluorine.

19. A method for forming a surface acoustic wave resonator device, characterized in that: include: providing a piezoelectric layer; An interdigitated electrode structure is formed on the surface of the piezoelectric layer, wherein the interdigitated electrode structure includes a first bus and a second bus arranged in parallel along a first direction, a plurality of first electrode strips connected to the first bus, and a plurality of second electrode strips connected to the second bus, wherein the plurality of first electrode strips and the plurality of second electrode strips are parallel to the first direction and arranged along the second direction, the first direction and the second direction are perpendicular to each other, and the plurality of first electrode strips and the plurality of second electrode strips are arranged in a staggered manner; A first gap region, an overlap region, and a second gap region are sequentially arranged along the first direction between the first bus and the second bus, the first electrode strip and the second electrode strip overlap each other along the second direction in the overlap region, the first electrode strip comprises a first overlap portion and a first extension portion, the first overlap portion is located in the overlap region, the first extension portion is located in the first gap region, the first overlap portion comprises a first terminal portion and a second terminal portion opposite to each other in the first direction, and a first intermediate sub-portion located between the first terminal portion and the second terminal portion, the first terminal portion is connected to the first extension portion, and the first extension portion is connected to the first bus, the second electrode strip comprises a second overlap portion and a second extension portion, the second overlap portion is located in the overlap region, the second extension portion is located in the second gap region, the second overlap portion comprises a third terminal portion and a fourth terminal portion opposite to each other in the first direction, and a second intermediate sub-portion located between the third terminal portion and the fourth terminal portion, the fourth terminal portion is connected to the second extension portion, the second extension portion is connected to the second bus, a first gap is provided between the third terminal portion and the first bus, and a second gap is provided between the second terminal portion and the second bus; A first dielectric layer is formed on the piezoelectric layer, wherein the first dielectric layer covers the interdigital electrode structure; a first load portion and a second load portion are formed on the first dielectric layer, wherein the first load portion is located on a plurality of the first terminal portions and a plurality of the third terminal portions, and the second load portion is located on a plurality of the second terminal portions and a plurality of the fourth terminal portions; forming a second dielectric layer on the first dielectric layer, wherein the second dielectric layer covers the first load portion and the second load portion; A third load part and a fourth load part are formed on the second dielectric layer, and the third load part is located on a number of the first terminal parts and a number of the third terminal parts, and the fourth load part is located on a number of the second terminal parts and a number of the fourth terminal parts, and the third load part and the fourth load part are used to suppress parasitic resonances excited by the first load part and the second load part.

20. The method for forming a surface acoustic wave resonator device according to claim 19, wherein: The method for forming the first load part and the second load part comprises: forming a first load material layer on the first dielectric layer; and patterning the first load material layer to form the first load part and the second load part.

21. The method for forming a surface acoustic wave resonator device according to claim 19, wherein: The method for forming the first load part, the second load part and the second dielectric layer includes: forming the first load part on the surface of the first dielectric layer; forming a second sub-dielectric layer on the surface of the first dielectric layer; forming the second load part on the surface of the second sub-dielectric layer; forming a third sub-dielectric layer on the surface of the second sub-dielectric layer, and taking the second sub-dielectric layer and the third sub-dielectric layer as the second dielectric layer.

22. The method for forming a surface acoustic wave resonator device according to claim 19, wherein: The method for forming the third load part and the fourth load part comprises: forming a second load material layer on the surface of the second dielectric layer; and patterning the second load material layer to form the third load part and the fourth load part.

23. The method for forming a surface acoustic wave resonator device according to claim 19, wherein: The method for forming the third load part and the fourth load part comprises: forming the third load part on the surface of the second dielectric layer; forming a third dielectric layer on the surface of the second dielectric layer; and forming the fourth load part on the surface of the third dielectric layer.

24. The method for forming a surface acoustic wave resonator device according to claim 19, wherein: The method for forming the third load part and the fourth load part comprises: forming the fourth load part on the surface of the second dielectric layer; forming a third dielectric layer on the surface of the second dielectric layer and the surface of the fourth load part; and forming the third load part on the surface of the third dielectric layer.

25. The method for forming a surface acoustic wave resonator device according to claim 19, wherein: Also includes: After forming the second dielectric layer and before forming the third load part and the fourth load part, testing the S21 parameter performance of the surface acoustic wave resonator device to obtain preliminary performance results; selecting reference sizes of the third load part and the fourth load part according to the preliminary performance results; A third load part and a fourth load part are formed on the second dielectric layer according to the reference size.

26. The method for forming a surface acoustic wave resonator device according to claim 19, wherein: The first load portion is also formed on the first gap region; the second load portion is also formed on the second gap region.

27. The method for forming a surface acoustic wave resonator device according to claim 19, wherein: The third load unit is further formed on the first gap region; and the fourth load unit is further formed on the second gap region.

28. The method for forming a surface acoustic wave resonator device according to claim 19, wherein: The method for forming the interdigitated electrode structure also includes: forming a plurality of first dummy electrode strips connected to the first bus, a third gap being provided between the first dummy electrode strips and the second electrode strips, a plurality of the first dummy electrode strips being parallel to the first direction, and the first dummy electrode strips being arranged in an alternating pattern with the first electrode strips; forming a plurality of second dummy electrode strips connected to the second bus, a fourth gap being provided between the second dummy electrode strips and the first electrode strips, a plurality of the second dummy electrode strips being parallel to the first direction, and the second dummy electrode strips being arranged in an alternating pattern with the second electrode strips.

29. The method for forming a surface acoustic wave resonator device according to claim 28, wherein: The first load part is also formed on the first dummy electrode strip; the second load part is also formed on the second dummy electrode strip.

30. The method for forming a surface acoustic wave resonator device according to claim 28, wherein: The third load part is also formed on the first dummy electrode strip; and the fourth load part is also formed on the second dummy electrode strip.

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