Transmit-receive synchronization system

By designing a synchronizer and connector for wireless transceiver and synchronization systems, using node signals to generate synchronization signals and add marks to the data signals, the existing system's performance degradation and high cost in environments of poor signal reception is solved, and efficient and low-cost wireless data synchronization is achieved.

CN120050763APending Publication Date: 2025-05-27SUZHOU NIANJI INTELLIGENT TECH CO LTD
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Patent Information

Application Number
CN202510205978.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-24
Publication Date
2025-05-27

AI Technical Summary

Technical Problem

The existing wireless transmission and reception synchronization systems have degraded performance in environments where signal reception is poor or blocked, and are costly, and the different synchronization technologies are only suitable for specific types of communication systems, limiting their wide application.

Method used

A transceiver synchronization system is designed to connect to the receiver through a synchronizer, receive node signals and generate synchronization signals, and the connectors are connected to the transmitter. Markers are added to the data signal based on the synchronization signal to realize synchronization between the data signal and the node signal.

Benefits of technology

It realizes the synchronization of wireless data transmission and reception without relying on external clock sources or signal sources, and the transmission can reach the ms level.

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Abstract

The invention discloses a transmitting and receiving synchronization system, which is used for a transmitter and a receiver, the transmitting and receiving synchronization system comprises a synchronizer and a connector, and the synchronizer is connected with the receiver to receive a node signal for representing a marked node and generate a synchronization signal based on the node signal. The connector is in communication connection with the synchronizer to receive the synchronizing signal, and when the connector is connected with the transmitter, the transmitter is controlled to add a mark in a data signal sent by the transmitter based on the synchronizing signal. According to the transmitting and receiving synchronization system, in the process that the transmitter transmits data to the receiver, the transmitter punches the label into the data signal transmitted by the transmitter based on the node signal of the receiver through the connector and the synchronizer, synchronization of the data signal and the node signal is achieved, and it is ensured that high time precision is achieved in the data transmission process.
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Description

Technical Field

[0001] The present invention belongs to the field of wireless communication technology, and particularly relates to a transceiver synchronization system. Background Art

[0002] Wireless transceiver synchronizers rely on wireless communication technology to achieve synchronization between devices, which includes using technologies such as radio frequency, Wi-Fi, Bluetooth, NFC, etc. for data transmission. This technology consists of two parts: wireless transmission and wireless synchronization. In most cases, wireless transmission transfers large amounts of data with short sending intervals; while wireless synchronization mostly sends only short data at a time as a synchronization signal to ensure the synchronization of the sent data and the received data.

[0003] Current solutions include wireless synchronization systems based on GPS, inductive synchronizers, satellite clock synchronizer ATS3000, synchronous Ethernet technology, etc. Most of these synchronization methods rely on external reference signals such as GPS, which may cause the system to degrade in performance in environments with poor signal reception or blockage, and the introduced GPS module may increase the cost of the system. Some synchronization technologies such as synchronous Ethernet technology based on the physical layer bit stream can provide carrier-grade clock synchronization, but it is relatively complex to implement. At the same time, different synchronization technologies may only be applicable to specific types of communication systems, which limits the wide application of synchronization technologies.

[0004] The information disclosed in this background art section is only intended to enhance the overall understanding of the present invention and should not be regarded as an admission or any form of suggestion that this information constitutes prior art already known to those of ordinary skill in the art. Summary of the Invention

[0005] The purpose of the present invention is to provide a transceiver synchronization system that can simply, stably, and at low cost achieve data synchronization between wireless transceivers.

[0006] To achieve the above purpose, the technical solution provided by a specific embodiment of the present invention is as follows:

[0007] A transceiver synchronization system for a transmitter and a receiver, the transceiver synchronization system includes: a synchronizer connected to the receiver to receive a node signal for characterizing a marker node, and generating a synchronization signal based on the node signal; a connector communicatively connected to the synchronizer to receive the synchronization signal, and when the connector is connected to the transmitter, controlling the transmitter to add a marker to the data signal it sends based on the synchronization signal.

[0008] In one or more embodiments of the present invention, the connector includes a first control module and a first communication module connected to each other. The first control module is communicatively connected to a synchronizer through the first communication module to receive a synchronization signal. When the first control module is connected to a transmitter, it controls the transmitter to add a mark to the data signal transmitted by the transmitter based on the synchronization signal.

[0009] In one or more embodiments of the present invention, the connector further includes a first interface connected to the first control module, and a battery module connected to the first control module, the first communication module, and the first interface. The battery module is used to supply power to the first control module and the first communication module. The first interface is used to connect to a transmitter to achieve a communication connection between the first control module and the transmitter, or to connect to an external power source to achieve a connection between the battery module and the external power source.

[0010] In one or more embodiments of the present invention, the connector further includes a switch module connected to the battery module, the first interface, and the first control module. The first control module is further used to generate a switch signal, and the switch module controls the on-off between the battery module and the first interface based on the switch signal.

[0011] In one or more embodiments of the present invention, the switch module includes a first transistor, a second transistor, a first resistor, a second resistor, and a third resistor. The first end of the first transistor, the first end of the first resistor, and the first end of the second resistor are connected to the first interface. The second end of the first transistor is connected to the battery module. The control end of the first transistor and the second end of the first resistor are connected to the second end of the second transistor. The first end of the second transistor is connected to the ground voltage. The first end of the third resistor is connected to the first control module to receive the switch signal, and the second end of the third resistor is connected to the second end of the second resistor and the control end of the second transistor.

[0012] In one or more embodiments of the present invention, the connector further includes a switching module. The first control module is further used to generate a switching signal. The switching module is connected to the first control module to receive the switching signal, and the switching module is connected to the status pin of the first interface to generate a status signal based on the switching signal.

[0013] In one or more embodiments of the present invention, the connector further includes a wireless module. The first control module is further used to receive the data signal transmitted by the transmitter. The first control module is communicatively connected to a receiver through the wireless module to send the data signal to the receiver.

[0014] In one or more embodiments of the present invention, the synchronizer includes a second control module and a second communication module connected to each other. The second control module is connected to a receiver to receive node signals, and the second control module is configured to control the second communication module to generate a synchronization signal based on the node signals.

[0015] In one or more embodiments of the present invention, the synchronizer further includes a conversion module connected to the receiver and the second control module, and the conversion module is configured to perform signal conversion between the receiver and the second control module.

[0016] In one or more embodiments of the present invention, the synchronization signal is a radio frequency signal or a Bluetooth signal.

[0017] Compared with the prior art, in the process of the transmitter sending data to the receiver in the transceiver synchronization system of the present invention, by using a connector and a synchronizer, based on the node signals of the receiver, the transmitter tags the data signals in the data signals it sends, realizing the synchronization of the data signals and the node signals, and ensuring a high time accuracy in the data transmission process. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments recorded in the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0019] Figure 1 It is a system structure diagram of a transceiver synchronization system in an embodiment of the present invention.

[0020] Figure 2 It is a circuit schematic diagram of a first interface in an embodiment of the present invention.

[0021] Figure 3 It is a circuit schematic diagram of a switch module in an embodiment of the present invention.

[0022] Figure 4 It is a circuit schematic diagram of a switching module in an embodiment of the present invention.

[0023] Figure 5 It is a circuit schematic diagram of a charging unit in an embodiment of the present invention.

[0024] Figure 6 It is a circuit schematic diagram of a first power supply unit in an embodiment of the present invention.

[0025] Figure 7 It is a circuit schematic diagram of a second power supply unit in an embodiment of the present invention.

[0026] Figure 8 This is the circuit schematic diagram of the third power supply unit in an embodiment of the present invention.

[0027] Figure 9 This is the circuit schematic diagram of the first communication module in an embodiment of the present invention.

[0028] Figure 10 This is the circuit schematic diagram of the wireless module in an embodiment of the present invention.

[0029] Figure 11 This is the circuit schematic diagram of the first control module in an embodiment of the present invention.

[0030] Figure 12 This is the circuit schematic diagram of the second interface in an embodiment of the present invention.

[0031] Figure 13 This is the circuit schematic diagram of the fourth power supply unit in an embodiment of the present invention.

[0032] Figure 14 This is the circuit schematic diagram of the fifth power supply unit in an embodiment of the present invention.

[0033] Figure 15 This is the circuit schematic diagram of the conversion module in an embodiment of the present invention.

[0034] Figure 16 This is the circuit schematic diagram of the second control module in an embodiment of the present invention.

[0035] Figure 17 This is the circuit schematic diagram of the second communication module in an embodiment of the present invention. Detailed implementation manners

[0036] In order to enable those skilled in the art of the present technology to better understand the technical solutions in the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

[0037] The "coupling", "connection", or "linkage" in the specification includes both direct connection and indirect connection. Indirect connection is a connection through an intermediate medium, such as a connection through an electrical conduction medium, which may have parasitic inductance or parasitic capacitance; indirect connection may also include a connection through other active or passive devices on the basis of achieving the same or similar functional purposes, such as a connection through circuits or components such as switches, follower circuits, etc. Additionally, in the invention, words such as "first", "second", etc. are mainly used to distinguish one technical feature from another technical feature, and do not necessarily require or imply that there is a certain actual relationship, quantity, or order between these technical features.

[0038] In the detailed description of the specification, reference is made to the accompanying drawings that form a part thereof, in which like reference numerals always refer to like components, and which are shown by way of exemplary embodiments that may be implemented. It should be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present application. Accordingly, the following detailed description should not be construed in a limiting sense.

[0039] The various operations in the specification may be described serially as a number of discrete actions or operations in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be construed to imply that these operations must be order-dependent. Specifically, these operations may not be performed in the order presented. The described operations may be performed in a different order than the described embodiments. Various additional operations may be performed in additional embodiments and / or the described operations may be omitted.

[0040] For the purposes of the present application, the phrase "A and / or B" means (A), (B), or (A and B). For the purposes of the present application, the phrase "A, B, and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C).

[0041] Various components and devices may be referred to or shown herein in the singular form (e.g., "MOS transistor", "transistor", "switch", etc.), but this is merely for convenience of discussion, and any element referred to in the singular may include a plurality of such elements in accordance with the teachings herein.

[0042] The specification describes the use of the phrases "in one embodiment", "in other embodiments", or "in some embodiments", which may each refer to one or more of the same or different embodiments. Additionally, the terms "comprising", "including", "having", etc. used with respect to the embodiments of the present application are synonymous.

[0043] As Figure 1As shown in the figure, the transceiver synchronization system in an embodiment of the present invention is used for a transmitter and a receiver. The transceiver synchronization system includes a synchronizer 10 and a connector 20.

[0044] Among them, the synchronizer 10 is connected to the receiver to receive a node signal for characterizing a marked node, and generates a synchronization signal based on the node signal. The connector 20 is communicatively connected to the synchronizer 10 to receive the synchronization signal. When the connector 20 is connected to the transmitter, it controls the transmitter to add a mark to the data signal it transmits based on the synchronization signal.

[0045] As Figure 1 shown, the connector 20 includes a first control module 11, a first communication module 12, a first interface 13, a switch module 14, a battery module 15, a switching module 16, and a wireless module 17.

[0046] Among them, the first control module 11 is connected to the first communication module 12, and the first control module 11 is communicatively connected to the synchronizer 10 through the first communication module 12 to receive the synchronization signal.

[0047] The first interface 13 is connected to the first control module 11, and the first interface 13 is connected to the battery module 15 through the switch module 14. The first interface 13 is used to connect to the transmitter to realize the communication connection between the first control module 11 and the transmitter, or to connect to an external power supply to realize the connection between the switch module 14 and the external power supply.

[0048] When the first control module 11 is connected to the transmitter, it controls the transmitter to add a mark to the data signal it transmits based on the synchronization signal. The first control module 11 is also used to generate a switch signal CHARGE_CTRL. The switch module 14 is connected to the first control module 11 to receive the switch signal CHARGE_CTRL, and the switch module 14 controls the on-off between the battery module 15 and the first interface 13 based on the switch signal CHARGE_CTRL.

[0049] The first control module 11 is also used to generate a switching signal PB7. The switching module 16 is connected to the first control module 11 to receive the switching signal PB7, and the switching module 16 is connected to the status pin of the first interface 13 to generate a status signal S_ID based on the switching signal PB7.

[0050] The battery module 15 is connected to the first control module 11 and the first communication module 12 to supply power to the first control module 11 and the first communication module 12.

[0051] The wireless module 17 is connected to the first control module 11. The first control module 11 is further configured to receive the data signal sent by the transmitter. The first control module 11 is communicatively connected to the receiver via the wireless module 17 to send the data signal to the receiver. The battery module 15 may also be connected to the wireless module 17 to supply power to the wireless module 17.

[0052] As Figure 2 shown, the first interface 13 is preferably a type-c interface.

[0053] In one embodiment, the first interface 13 is connected to an external power supply VDD through a charger. When the first interface 13 is connected to the charger, the pins A4, A9, B4, and B9 of the first interface 13 are connected to the power supply terminal of the charger to receive the external power supply VDD, and the pins A1, A12, B1, and B12 of the first interface 13 are connected to the ground terminal of the charger.

[0054] When the first interface 13 is connected to the transmitter, the pins A2, A11, B2, and B11 of the first interface 13 are connected to the corresponding signal terminals on the communication port of the transmitter. The pins A4, A9, B4, and B9 of the first interface 13 are connected to the power supply terminal on the communication port of the transmitter to receive the power supply voltage VDD' of the transmitter, and the pins A1, A12, B1, and B12 of the first interface 13 are connected to the ground terminal on the communication port of the transmitter.

[0055] In other embodiments, the first interface 13 may also be a Micro-USB interface, a Lightning interface, or other interfaces.

[0056] As Figure 3 shown, the switch module 14 includes a first transistor Q1 (PMOS transistor), a second transistor Q2 (NMOS transistor), a first resistor R22, a second resistor R16, and a third resistor R24.

[0057] The first end of the first transistor Q1, the first end of the first resistor R22, and the first end of the second resistor R16 are connected to the pins A4, A9, B4, and B9 of the first interface 13. The second end of the first transistor Q1 is connected to the battery module 15. The control end of the first transistor Q1 and the second end of the first resistor R22 are connected to the second end of the second transistor Q2. The first end of the second transistor Q2 is connected to the ground voltage. The first end of the third resistor R24 is connected to the first control module 11 to receive the switch signal CHARGE_CTRL. The second end of the third resistor R24 is connected to the second end of the second resistor R16 and the control end of the second transistor Q2.

[0058] As Figure 4As shown, the switching module 16 includes a third transistor Q3 (NMOS transistor), a fourth resistor R40, and a fifth resistor R41. The first end of the fourth resistor R40 is connected to the power supply voltage. The second end of the fourth resistor R40 and the second end of the third transistor Q3 are connected to the status pin of the first interface 13 to generate a status signal S_ID. The first end of the third transistor Q3 is connected to the ground voltage. The first end of the fifth resistor R41 is connected to the first control module 11 to receive a switching signal PB7. The second end of the fifth resistor R41 is connected to the control end of the third transistor Q3.

[0059] In one embodiment, the first end of the fourth resistor R40 can be connected to pins A4, A9, B4, and B9 of the first interface 13 to receive an external power supply VDD or the power supply voltage VDD' of the transmitter.

[0060] In one embodiment, in combination with Figure 2 As shown, the status pins of the first interface 13 can be SSRXN1 pin and SSRXN2 pin (pins A10 and B10). When the levels of these two pins are high, it generally indicates that the standard type-c protocol is adopted on this interface at this time and can be used for charging. When the levels of these two pins are low, it indicates that the non-standard USB protocol is adopted on this interface at this time. In this embodiment, when the transmitter recognizes that the levels of these two pins are low, it enters the interactive state with the connector 20 and communicates with the connector 20 through the UART signal of the TTL level.

[0061] In other embodiments, other pins can also be selected as the status pins of the first interface 13.

[0062] In one embodiment, as Figure 1 As shown, the battery module 15 includes a storage battery 151, a charging unit 152, a power conversion unit 153, and a switch K1. The charging unit 152 is connected to the storage battery 151 and the second end of the first transistor Q1 in the switch module 14. The charging module is used to charge the storage battery 151 based on an external power supply.

[0063] The first end of the switch K1 is connected to the storage battery 151. The second end of the switch K1 is connected to the power conversion unit 153 to control the on-off between the power conversion unit 153 and the battery module 15.

[0064] The power conversion unit 153 is connected to the first control module 11, the first communication module 12, and the wireless module 17. The power conversion unit 153 is used to convert the voltage VBAT of the storage battery 151 into the working voltages required by the first control module 11, the first communication module 12, and the wireless module 17.

[0065] As Figure 5As shown, the charging unit 152 includes a charging management chip U6 and its peripheral circuits. The pin 4 of the charging management chip U6 is connected to the second end of the first transistor Q1, and the pin 5 of the charging management chip U6 is connected to the storage battery 151. The charging management chip U6 is used to charge the storage battery 151 based on the external power supply VDD. The charging management chip U6 is preferably TC4056A. TC4056A is a 1A lithium battery charging management chip produced by FM Company, which has the functions of charging status monitoring and automatic disconnection when fully charged. The light-emitting diode D5 is a charging display light. The pin 1 of the light-emitting diode D5 is connected to the second end of the first transistor Q1 through a current-limiting resistor R28, the pin 2 of the light-emitting diode D5 is connected to the second end of the first transistor Q1 through a current-limiting resistor R29, and the pin 4 and pin 4 of the light-emitting diode D5 are respectively connected to the pin 6 and pin 7 of the charging management chip U6. During the charging process, the red light is always on and the green light is off. After being fully charged, the state flips, the red light is off, and the green light is always on.

[0066] In a specific embodiment, the power conversion unit 153 may include a first power unit 1531. As Figure 6 shown, the first power unit includes a power chip U4 and its peripheral circuits. The pin 1 of the power chip U4 is connected to the second end of the switch K1, and the pin 5 of the power chip U4 is connected to the first control module 11 to generate the 3.3V operating voltage required by the first control module 11. The power chip U4 is preferably the ME6211C33M5G-N chip of MICRONE Company. This chip is a linear voltage regulator with a maximum input voltage of 6V, an output voltage of 3.3V, a voltage difference of 260mV@(200mA), and a maximum output current of 500mA. The power supply ripple rejection ratio (PRSS) is 70dB@(1kHz).

[0067] In a specific embodiment, the power conversion unit 153 may include a second power unit 1532. As Figure 7 shown, the second power unit includes a power chip U5 and its peripheral circuits. The pin 1 of the power chip U5 is connected to the second end of the switch K1, and the pin 5 of the power chip U5 is connected to the wireless module 17 to generate the 3.3V operating voltage required by the wireless module 17. The first control module 11 can also be used to generate a wireless enable signal WIFI_EN. The pin 3 of the power chip U5 is connected to the first control module 11 to receive the wireless enable signal WIFI_EN and turn on or off based on the signal of the wireless enable signal WIFI_EN. The power chip U5 is preferably the ME6211C33M5G-N chip.

[0068] In a specific embodiment, the power conversion unit 153 may include a third power unit 1533. As Figure 8As shown, the third power supply unit includes a power supply chip U3 and its peripheral circuit, and an LDO chip U2 and its peripheral circuit. Pin 6 of the power supply chip U3 is connected to pin 5 of the power supply chip U4. Pin 5 of the power supply chip U3 is connected to pin 3 of the LDO chip U2 to generate a 5.5V voltage. Pin 2 of the LDO chip U2 is connected to the first communication module 12 to generate a 5V operating voltage required by the first communication module 12.

[0069] The first control module 11 can also be used to generate a first communication enable signal LP3102_EN. Pin 5 of the power supply chip U3 is connected to the first control module 11 to receive the first communication enable signal LP3102_EN and turn on or off based on the first communication enable signal LP3102_EN.

[0070] The power supply chip U3 is preferably the LP3102QVF chip of LOWPOWER Company. It is a DC-DC power supply chip with a 3.3V input, dual outputs of +5.5V and -5.5V, and a maximum output current of 120mA. When the first communication module 12 is not used for a long time, the first control module 11 can turn off this power supply chip through the first communication enable signal LP3102_EN to reduce power consumption. The power supply chip U3 raises the voltage from 3.3V to 5.5V. However, because it is a DC-DC chip, the ripple is relatively large, and an LDO chip U2 is connected at the back end. The LDO chip U2 is preferably the ME6203A50M3G chip, with a maximum input voltage of 40V, an output voltage of 5V, a voltage difference of 680mV@(50mA), and an output current of 180mA. This can ensure stable power supply for the first communication module 12.

[0071] In one embodiment, when the first control module 11 is not powered on and initialized, the switch signal CHARGE_CTRL remains in a high impedance state, and the switching signal PB7 is at a low level.

[0072] When the switch K1 is disconnected and the connector 20 is in the shutdown state, and the first interface 13 is inserted into the charger and connected to the 5V external power supply VDD, the control end of the second transistor Q2 is pulled high by the second resistor R16, the second transistor Q2 is turned on, the control end voltage of the first transistor Q1 is pulled low, the first transistor Q1 is turned on, and pin 4 of the charge management chip U6 is conducted with the external power supply VDD, and starts to charge the battery module 15.

[0073] At this time, the first end of the fifth resistor R41 is at a low level, the third transistor Q3 is turned off, all the status pins of the first interface 13 are at a high level, and the first interface 13 is in the standard type-c protocol.

[0074] Insert the first interface 13 into the transmitter and close the switch K1. After the first control module 11 is powered on and completes initialization, it generates a low-level switch signal CHARGE_CTRL and a high-level switching signal PB7. The control terminal voltage of the second transistor Q2 is pulled low, the second transistor Q2 is turned off, and then the first transistor Q1 is turned off, cutting off the power supply to the charging unit 152, and the battery module 15 stops charging. The control terminal voltage of the third transistor Q3 is pulled high, the third transistor Q3 is turned on, and the voltage on the status pin of the first interface 13 is pulled low. After the transmitter recognizes this low level, it starts to interact with the connector 20.

[0075] In the above process, the first interface 13 combines the functions of charging and communication. When the connector 20 is inserted into the transmitter, it can control the disconnection between the battery module 15 and the first interface 13, making the transmitter only act as a communication end without consuming the power of the transmitter. And during the interaction with the transmitter, a non-standard communication protocol can be adopted, supporting the transmitter to perform protocol mode recognition and supporting UART communication, making the signal transmission simpler and faster, avoiding long delays during communication, and improving the timeliness.

[0076] In other embodiments, the switch module 14 may not be provided, and the battery module 15 is directly connected to the first interface 13.

[0077] The charging unit 152 may also not be provided, and the second terminal of the first transistor Q1 in the switch module 14 is directly connected to the storage battery 151. When the first transistor Q1 is turned on, the storage battery 151 is directly charged by the external power supply VDD.

[0078] The power conversion unit 153 may also not be provided, and each module is directly powered by the storage battery 151.

[0079] The switch signal CHARGE_CTRL and the switching signal PB7 can also adopt other generation and control methods.

[0080] In one embodiment, the synchronization signal is a radio frequency signal. As Figure 9 shown, the first communication module 12 includes a radio frequency chip U9 and its peripheral circuits. Pins 2 to 6 and pins 11 to 13 of the radio frequency chip U9 are connected to the first control module 11, and the radio frequency chip U9 is communicatively connected to the synchronizer 10 to receive the synchronization signal. The radio frequency chip U9 is preferably the VG6244S580X0M1 module of Vollgo Company, which is a small-sized and high-transmission-rate 5.8GHz band two-way wireless transceiver module designed based on the A5133 wireless transceiver chip. The module integrates a PA+LAN amplifier inside, and the maximum power can reach 23dBm, greatly increasing the transmission distance of the module. Using SPI communication, the maximum rate is 4Mbps.

[0081] In other embodiments, the synchronization signal may also be a Bluetooth signal or other wireless signals, and the RF chip U9 can also be replaced with a Bluetooth chip or other wireless communication chips.

[0082] As Figure 10 shown, the wireless module 17 includes a WiFi module U7, its peripheral circuits, and an antenna matching circuit. The antenna matching circuit includes an antenna chip U8 and its peripheral circuits.

[0083] Pin 1 of the antenna chip U8 is connected to pin 31 of the WiFi module U7 through series resistors R37 and R38. Pins 4, 10, 46, 47, and 54 of the WiFi module U7 are connected to the first control module 11. The WiFi module U7 is communicatively connected to the receiver through the antenna matching circuit.

[0084] As Figure 11 shown, the first control module 11 includes an MCU chip U1 and its peripheral circuits. Pin 13 of the MCU chip U1 is connected to pins A11 and B11 of the first interface 13 through a resistor R4. Pin 14 of the MCU chip U1 is connected to pins A2 and B2 of the first interface 13 through a resistor R5. The MCU chip U1 communicates with the transmitter based on UART signals. Resistors R4 and R5 are used to adjust the signal line impedance to ensure signal integrity.

[0085] Pin 21 of the MCU chip U1 is connected to the first end of the third resistor R24 to generate a switch signal CHARGE_CTRL.

[0086] Pin 23 of the MCU chip U1 is connected to pin 3 of the power chip U5 to generate a wireless enable signal WIFI_EN.

[0087] Pin 24 of the MCU chip U1 is connected to pin 5 of the power chip U3 to generate a first communication enable signal LP3102_EN.

[0088] Pin 46 of the MCU chip U1 is connected to the first end of the fifth resistor R41 to generate a switching signal PB7.

[0089] Pins 43 to 45, 32, and 29 of the MCU chip U1 are respectively connected to pins 4, 10, 46, 47, and 54 of the WiFi module U7 to establish a communication connection with the receiver through the antenna matching circuit of the WiFi module U7.

[0090] Pins 25 to 28, 39 to 42 of the MCU chip U1 are connected to pins 2 to 6, 11 to 13 of the RF chip U9 to establish a communication connection with the synchronizer 10 through the RF chip U9.

[0091] As Figure 1 shown, the synchronizer 10 includes a connected second control module 21 and a second communication module 22. The second control module 21 is connected to the receiver to receive node signals, and the second control module 21 is configured to control the second communication module 22 to generate synchronization signals based on the node signals.

[0092] In one embodiment, the synchronizer 10 further includes a second interface 24, a conversion module 23, and a power supply module 25. The power supply module 25 is connected to the receiver through the second interface 24 to receive the power supply voltage VBUS_5V on the receiver, and the power supply module 25 is configured to convert the power supply voltage VBUS_5V into the operating voltages required by the second control module 21 and the second communication module 22.

[0093] The conversion module 23 is connected to the receiver through the second interface 24, and the conversion module 23 is connected to the second control module 21. The conversion module 23 is configured to perform signal conversion between the receiver and the second control module 21.

[0094] As Figure 12 shown, the second interface 24 is preferably a type-a interface. Pin 1 of the second interface 24 is connected to the receiver to receive the power supply voltage VBUS_5V, pin 4 of the second interface 24 is connected to the receiver to receive the ground voltage on the receiver, and pins 2 and 3 of the second interface 24 are connected to the USB data pins of the receiver.

[0095] In this embodiment, the second interface 24 adopts a standard USB protocol, and the node signal sent by the receiver through its USB data pins is a USB signal.

[0096] In one embodiment, the power supply module 25 includes a fourth power supply unit 251. The fourth power supply unit is connected to the second interface 24 and the second control module 21 to convert the power supply voltage VBUS_5V into the operating voltage required by the second control module 21.

[0097] As Figure 13 shown, the fourth power supply unit 251 includes a power supply chip U24 and its peripheral circuit. Pin 1 of the power supply chip U24 is connected to pin 1 of the second interface 24 to receive the power supply voltage VBUS_5V, and the power supply chip U24 generates the 3.3V operating voltage required by the second control module 21 through its own pin 5. The power supply chip U24 is preferably a ME6211C33M5G-N chip of MICRONE Corporation. This chip is a linear voltage regulator with a maximum input voltage of 6V, an output voltage of 3.3V, a voltage difference of 260mV@(200mA), a maximum output current of 500mA, and a power supply ripple rejection ratio (PRSS) of 70dB@(1kHz).

[0098] In one embodiment, the power supply module 25 includes a fifth power supply unit 252. The fifth power supply unit is connected to the second interface 24 and the second communication module 22 to convert the power supply voltage VBUS_5V into the operating voltage required by the second communication module 22.

[0099] As Figure 14 shown, the fifth power supply unit 252 includes an LDO chip U22 and its peripheral circuit. Pin 1 of the LDO chip U22 is connected to pin 1 of the second interface 24 to receive the power supply voltage VBUS_5V, and the LDO chip U22 generates the 4.5V operating voltage required by the second communication module 22 through its own pin 2. The LDO chip U22 is preferably NCP59800, which belongs to the 1A low-dropout linear regulator (LDO) series and has a high power supply rejection ratio (PSRR) and ultra-low output noise. This chip series uses an advanced BiCMOS process and has excellent electrical performance.

[0100] As Figure 15 shown, the conversion module 23 includes a conversion chip U21 and its peripheral circuit.

[0101] Pin 1 and pin 2 of the conversion chip U21 are connected to pin 2 and pin 3 of the second interface 24, and pin 4, pin 5, pin 8, and pin 9 of the conversion chip U21 are connected to the second control module 21. The conversion chip U21 is preferably CH340E, which is a USB to UART chip and is used for converting the USB signal received and transmitted by the receiver into the serial port signal received and transmitted by the second control module 21.

[0102] In one embodiment, the synchronizer 10 may further include a diode module D21. The diode module D21 is connected to 4 pins of the second interface 24. The diode module D21 is used to protect the subsequent circuit, and the model of the diode module D21 is preferably SR05-N.

[0103] As Figure 16 shown, the second control module 21 includes an MCU chip U25 and its peripheral circuit. Pins 11 to 14 of the MCU chip U25 are respectively connected to pins 4, 5, 8, and 9 of the conversion chip U21, and pins 25 to 28, 39 to 42 of the MCU chip U25 are connected to the second communication module 22.

[0104] As Figure 17 shown, the second communication module 22 includes a radio frequency chip U26 and its peripheral circuit. Pins 2 to 6, 11 to 13 of the radio frequency chip U26 are respectively connected to pins 25 to 28, 39 to 42 of the MCU chip U25.

[0105] In other embodiments, the synchronization signal may also be a Bluetooth signal or other wireless signals, and the RF chip U26 may also be replaced by a Bluetooth chip or other wireless communication chips.

[0106] In one embodiment, the first ends of the transistors in the present application all refer to the source electrodes, the second ends all refer to the drain electrodes, and the control ends all refer to the gate electrodes. In other embodiments, the transistors in the present application may also be replaced by devices with opposite polarities or other devices, and their connection manners and control manners are all adjusted adaptively.

[0107] In the actual application process, first, the receiver sends a node signal, and the marked node represented thereby is a time node, specifically: at the time point t to be synchronized by the receiver 0 sends out the node signal Then this node signal represents this time node t 0 . The marked node may be a string of regular clock nodes or scattered irregular nodes, and its specific form is not limited.

[0108] Next, the synchronizer 10 generates a synchronization signal in the form of radio frequency based on the node signal The connector 20 receives the synchronization signal and controls the transmitter to add a mark μ to its data signal K 0 . It can be seen that this mark μ 0 is correlated with the marked node t 0 . When the receiver reads this mark μ 0 , the data signal K can be synchronized with the marked node t 0 .

[0109] The synchronizer 10 and the connector 20 communicate with each other by using radio frequency, reducing the signal transmission delay and signal processing delay. Since the radio frequency signal has good stability and its transmission delay time period is relatively fixed, when adding a mark by the transmitter, a delay period can be actively advanced for marking, which is convenient for precise synchronization control.

[0110] Based on the transceiver synchronization system of the present invention, data synchronization of wireless transceiver can be realized in a simple and low-cost manner without using an external clock source and signal source, with a transmission up to 5 GHZ and a synchronization accuracy capable of reaching the ms level.

[0111] It is apparent to those skilled in the art that the present invention is not limited to the details of the above-described exemplary embodiments, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention. Therefore, in any aspect, the embodiments should be regarded as exemplary and non-limiting. The scope of the present invention is defined by the appended claims rather than the above description. Accordingly, all changes that fall within the meaning and scope of the equivalent elements of the claims are intended to be embraced within the present invention. Any reference signs in the claims should not be construed as limiting the claims concerned.

[0112] In addition, it should be understood that although this specification is described in terms of embodiments, not every embodiment contains only one independent technical solution. This narrative manner of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in the various embodiments can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A synchronous transceiver system, used for a transmitter and a receiver, characterized in that: The synchronous transmission and reception system comprises: A synchronizer connected to the receiver to receive a node signal for characterizing a marked node and to generate a synchronization signal based on the node signal; The connector is connected to the synchronizer for receiving a synchronization signal. When the connector is connected to the transmitter, the transmitter is controlled to add a mark to the data signal it transmits based on the synchronization signal.

2. The synchronous transmission and reception system according to claim 1, characterized in that: The connector includes a first control module and a first communication module connected to each other. The first control module is connected to the synchronizer through the first communication module to receive a synchronization signal. When the first control module is connected to the transmitter, the transmitter is controlled to add a mark in the data signal it sends based on the synchronization signal.

3. The synchronous transmission and reception system according to claim 2, characterized in that: The connector further comprises a first interface connected to the first control module and a battery module connected to the first control module, the first communication module and the first interface, wherein the battery module is used to supply power to the first control module and the first communication module; The first interface is used to connect to the transmitter to achieve communication connection between the first control module and the transmitter, or to connect to an external power source to achieve connection between the battery module and the external power source.

4. The synchronous transmission and reception system according to claim 3, characterized in that: The connector also includes a switch module connected to the battery module, the first interface and the first control module. The first control module is also used to generate a switch signal. The switch module controls the connection and disconnection between the battery module and the first interface based on the switch signal.

5. The synchronous transmission and reception system according to claim 4, characterized in that: The switch module includes a first transistor, a second transistor, a first resistor, a second resistor and a third resistor. The first end of the first transistor, the first end of the first resistor and the first end of the second resistor are connected to the first interface, the second end of the first transistor is connected to the battery module, the control end of the first transistor and the second end of the first resistor are connected to the second end of the second transistor, the first end of the second transistor is connected to the ground voltage, the first end of the third resistor is connected to the first control module to receive a switching signal, and the second end of the third resistor is connected to the second end of the second resistor and the control end of the second transistor.

6. The synchronous transmission and reception system according to claim 3, characterized in that: The connector further includes a switching module, the first control module is further used to generate a switching signal, the switching module is connected to the first control module to receive the switching signal, and the switching module is connected to the status pin of the first interface to generate a status signal based on the switching signal.

7. The synchronous transmission and reception system according to claim 2, characterized in that: The connector further includes a wireless module. The first control module is further used to receive a data signal sent by a transmitter. The first control module is connected to a receiver through the wireless module to send the data signal to the receiver.

8. The synchronous transmission and reception system according to claim 1, characterized in that: The synchronizer comprises a second control module and a second communication module connected to each other, wherein the second control module is connected to a receiver to receive a node signal, and the second control module is used to control the second communication module to generate a synchronization signal based on the node signal.

9. The synchronous transmission and reception system according to claim 8, characterized in that: The synchronizer further comprises a conversion module, which is connected to the receiver and the second control module and is used for signal conversion between the receiver and the second control module.

10. The synchronous transmission and reception system according to claim 1, characterized in that: The synchronization signal is a radio frequency signal or a Bluetooth signal.