A back contact battery and photovoltaic module

Abstract

This invention discloses a back-contact solar cell and a photovoltaic module, relating to the field of photovoltaic technology, for improving the bifaciality and operating performance of a back-contact solar cell. The back-contact solar cell includes a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a passivation layer. The first doped semiconductor layer is disposed on a first region. The first doped semiconductor layer is an emitter doped layer. The second doped semiconductor layer is disposed on a second region. The second doped semiconductor layer has the opposite conductivity type to the first doped semiconductor layer. The passivation layer is disposed on the first doped semiconductor layer, the second doped semiconductor layer, and a spacer region. The spacer region includes a first sub-region adjacent to the first doped semiconductor layer and a second sub-region adjacent to the second doped semiconductor layer. On the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of the portion corresponding to the first sub-region is less than the surface reflectivity of the portion corresponding to the second sub-region.

Description

Technical Field

[0001] This invention relates to the field of photovoltaic technology, and more particularly to a back-contact battery and a photovoltaic module. Background Technology

[0002] Back-contact solar cells are solar cells with no electrodes on the light-facing side, and both the positive and negative electrodes are located on the back-facing side of the cell. This reduces the shading of the cells by the electrodes, increases the short-circuit current, and improves the energy conversion efficiency of the cells.

[0003] However, in existing back-contact batteries, the morphology of the local surface in the corresponding interval area is roughly the same, which cannot meet the requirements of passivation and light trapping, resulting in poor performance of the back-contact battery. Summary of the Invention

[0004] The purpose of this invention is to provide a back-contact solar cell and a photovoltaic module, wherein the portion of the passivation layer on the side facing away from the semiconductor substrate corresponding to a first sub-region has a low surface reflectivity, allowing more light to be reflected into the adjacent emitter doped layer, thereby improving the bifaciality of the back-contact solar cell. Furthermore, the portion of the passivation layer on the side facing away from the semiconductor substrate corresponding to a second sub-region has a high surface reflectivity, resulting in a smaller specific surface area in the second sub-region, improving the passivation effect of the passivation layer on the second sub-region, and enhancing the operating performance of the back-contact solar cell.

[0005] To achieve the above objectives, in a first aspect, the present invention provides a back-contact battery comprising: a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a passivation layer. The semiconductor substrate has opposing first and second surfaces. The first surface has alternating first and second regions, and a spacer region located between the first and second regions. The first doped semiconductor layer is disposed on the first region. The first doped semiconductor layer is an emitter doped layer. The second doped semiconductor layer is disposed on the second region. The second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types. The passivation layer is disposed on the first doped semiconductor layer, the second doped semiconductor layer, and the spacer region. The spacer region includes a first sub-region adjacent to the first doped semiconductor layer and a second sub-region adjacent to the second doped semiconductor layer. On the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of the portion corresponding to the first sub-region is less than the surface reflectivity of the portion corresponding to the second sub-region.

[0006] When the above technical solution is adopted, the first and second doped semiconductor layers can effectively shunt and collect carriers when the back contact battery is in operation, which is beneficial for the formation of photocurrent. The spacer region between the first and second doped semiconductor layers electrically isolates them, reducing the carrier recombination rate between them. Furthermore, the passivation layer disposed on the first and second doped semiconductor layers and the spacer region can also reduce the carrier recombination rate on the back side of the back contact battery, improving the conversion efficiency of the back contact battery.

[0007] Furthermore, the portion of the passivation layer on the side facing away from the semiconductor substrate, corresponding to the first sub-region, has a lower surface reflectivity. This allows more light to be reflected into the first doped semiconductor layer adjacent to the first sub-region, improving the bifaciality of the back contact cell. Simultaneously, the first doped semiconductor layer is an emitter doped layer. Since the emitter doped layer provides for the injection and separation of electron-hole pairs, more incident light into the emitter doped layer facilitates the generation of more photogenerated carriers, thereby improving the conversion efficiency of the back contact cell. Moreover, because the passivation layer is formed on the first side through a deposition process, the undulation morphology of the portion of the passivation layer on the side facing away from the semiconductor substrate, corresponding to the spacer region, can to some extent reflect the undulation morphology of the spacer region surface of the semiconductor substrate. Therefore, when the portion of the passivation layer on the side facing away from the semiconductor substrate, corresponding to the second sub-region, has a higher surface reflectivity, the second sub-region has a smaller specific surface area compared to the first sub-region. This results in a lower surface roughness in the second sub-region, which improves the passivation effect of the passivation layer on the second sub-region and enhances the working performance of the back contact cell. Furthermore, since the first sub-region is adjacent to the first doped semiconductor layer and the second sub-region is adjacent to the second doped semiconductor layer, as the boundary region between the different structures, when the surface reflectivity of the first sub-region and the second sub-region is different, the brightness of the first sub-region is darker and the brightness of the second sub-region is higher. This is beneficial to improve the contrast of the captured image, thereby more accurately identifying the alignment marks set on the battery and improving the yield of battery production.

[0008] As one possible implementation, in at least one spacer region, the area of ​​the first sub-region is larger than the area of ​​the second sub-region. In this case, the area of ​​the local surface with lower surface reflectivity on the side of the passivation layer away from the semiconductor substrate is larger, which is beneficial to improving the light-trapping effect of the surface of the corresponding spacer region on the side of the passivation layer away from the semiconductor substrate, allowing more light to be reflected into the emitter doped layer, and further increasing the bifaciality of the back contact cell.

[0009] As one possible implementation, on the side of the passivation layer facing away from the semiconductor substrate, the surfaces corresponding to the first sub-region and the second sub-region have textured structures. Specifically, on the side of the passivation layer facing away from the semiconductor substrate, the one-dimensional dimension of the textured structure on the surface corresponding to the first sub-region is different from the one-dimensional dimension of the textured structure on the surface corresponding to the second sub-region; and / or, the distribution density of the textured structure on the surface corresponding to the first sub-region is different from the distribution density of the textured structure on the surface corresponding to the second sub-region; and / or, the uniformity of the one-dimensional dimension of the textured structure on the surface corresponding to the first sub-region is greater than the uniformity of the one-dimensional dimension of the textured structure on the surface corresponding to the second sub-region.

[0010] By adopting the above technical solution, the reflectivity of the surfaces of the first and second sub-regions corresponding to the texture structure on the side of the passivation layer away from the semiconductor substrate can be controlled by adjusting at least one of the following factors: one-dimensional size, distribution density, and one-dimensional size uniformity. This allows for regional differentiation of different parts of the local surfaces of the corresponding interval regions on the side of the passivation layer away from the semiconductor substrate. Consequently, the local surfaces of the corresponding interval regions on the side of the passivation layer away from the semiconductor substrate simultaneously meet the requirements of passivation and light trapping. This improves the working performance of the back contact battery and allows for the selection of appropriate ranges according to the requirements of different practical application scenarios, thereby enhancing the applicability of the back contact battery provided by this invention in different application scenarios.

[0011] As one possible implementation, the texture structure includes a pyramid-like structure. Furthermore, on the side of the passivation layer facing away from the semiconductor substrate, the distribution density of the pyramid-like structure on the surface corresponding to the first sub-region is greater than the distribution density of the pyramid-like structure on the surface corresponding to the second sub-region; and / or, the one-dimensional dimension of the pyramid-like structure on the surface corresponding to the first sub-region is smaller than the one-dimensional dimension of the pyramid-like structure on the surface corresponding to the second sub-region; and / or, the one-dimensional dimension uniformity of the pyramid-like structure on the surface corresponding to the first sub-region is greater than the one-dimensional dimension uniformity of the pyramid-like structure on the surface corresponding to the second sub-region.

[0012] When the above technical solution is adopted, when the surface of the first sub-region and the surface of the second sub-region on the side of the passivation layer away from the semiconductor substrate have a texture structure including a pyramid-like structure, and the distribution density of the pyramid-like structure on the surface of the first sub-region is greater than the distribution density of the pyramid-like structure on the surface of the second sub-region, the surface undulation of the first sub-region is more concentrated. This is beneficial to further increase the surface roughness of the part of the passivation layer on the side away from the semiconductor substrate corresponding to the first sub-region, reduce the surface reflectivity of the part of the passivation layer on the side away from the semiconductor substrate corresponding to the first sub-region, and facilitate more light to be reflected into the emitter doped layer, thereby generating more photogenerated carriers and further improving the conversion efficiency of the battery. Secondly, the application principle of the beneficial effect when the one-dimensional dimension of the pyramid-like structure on the surface of the corresponding first sub-region is smaller than the one-dimensional dimension of the pyramid-like structure on the surface of the corresponding second sub-region, and / or when the uniformity of the one-dimensional dimension of the pyramid-like structure on the surface of the corresponding first sub-region is greater than the uniformity of the one-dimensional dimension of the pyramid-like structure on the surface of the corresponding second sub-region, can refer to the application principle of the beneficial effect when the distribution density of the pyramid-like structure on the surface of the corresponding first sub-region is greater than the distribution density of the pyramid-like structure on the surface of the corresponding second sub-region, as described above, and will not be repeated here.

[0013] As one possible implementation, on the side of the passivation layer facing away from the semiconductor substrate, the surfaces corresponding to the first sub-region and the second sub-region have textured structures; and the textured structures of the surfaces corresponding to the first sub-region and the second sub-region are different. Optionally, the textured structure of the surface corresponding to the first sub-region includes a pyramid-like structure, and the textured structure of the surface corresponding to the second sub-region includes a pyramid-like structure.

[0014] When the above technical solution is adopted, on the side of the passivation layer away from the semiconductor substrate, compared with the tower-like structure on the surface of the corresponding second sub-region, the pyramid-like structure on the surface of the corresponding first sub-region has a sharper tower top, so the surface undulation of the corresponding first sub-region is greater. This is beneficial to increase the surface roughness of the part of the corresponding first sub-region, reduce the surface reflectivity of the part of the corresponding first sub-region on the side of the passivation layer away from the semiconductor substrate, and facilitate more light to be reflected into the emitter doped layer, thereby generating more photogenerated carriers and further improving the conversion efficiency of the battery.

[0015] As one possible implementation, on the side of the passivation layer facing away from the semiconductor substrate, the surface of the corresponding second sub-region also includes a pyramid-like structure in its textured structure. Furthermore, within the surface of the corresponding second sub-region, at least one pyramid-like structure has a discretely distributed pyramid-like structure.

[0016] With the above technical solution, it can be understood that the quasi-tower-like structure is a recessed structure that is recessed into the passivation layer along the thickness direction of the semiconductor substrate. The quasi-pyramid-like structure, on the other hand, is a protruding structure that bulges outward from the semiconductor substrate. Therefore, when at least one quasi-tower-like structure has discretely distributed quasi-pyramid-like structures on the surface of the corresponding second sub-region, the surface of the quasi-tower-like structure recessed into the passivation layer is superimposed with a quasi-pyramid-like structure bulging outward from the semiconductor substrate. This helps to transform the surface of the corresponding second sub-region, which originally had a large height difference, into a surface with a relatively small height difference. This reduces the undulation of the surface of the corresponding second sub-region on the side of the passivation layer away from the semiconductor substrate, further reducing the surface roughness and surface reflectivity of the portion of the corresponding second sub-region on the side of the passivation layer away from the semiconductor substrate, and further improving the passivation effect of the passivation layer in the second sub-region.

[0017] As one possible implementation, on the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the second sub-region is recessed into the semiconductor substrate relative to the surface of the corresponding first sub-region. In this case, it is beneficial to further reduce the leakage risk between the first and second doped semiconductor layers with opposite conductivity types. Secondly, the passivation layer is formed on the first doped semiconductor layer, the second doped semiconductor layer, and the spacer region through a deposition process. The undulation morphology of the portion of the passivation layer facing away from the semiconductor substrate corresponding to the spacer region is approximately the same as the undulation morphology of the spacer region itself. Therefore, when the surface of the second sub-region on the side of the passivation layer facing away from the semiconductor substrate is recessed into the semiconductor substrate relative to the surface of the corresponding first sub-region, the surface of the second sub-region included in the spacer region is also recessed into the semiconductor substrate relative to the surface of the first sub-region. This can increase the passivation contact area between the passivation layer and the spacer region, further improving the passivation effect of the passivation layer on the spacer region.

[0018] As one possible implementation, on the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the second sub-region includes a planar region and a textured region. In this case, compared to a conventional textured surface where each part is a textured region, when the surface of the passivation layer on the side facing away from the semiconductor substrate corresponding to the second sub-region also has a planar region, the textured structure is sparsely distributed on the surface of the corresponding second sub-region. This helps to reduce the surface roughness and surface reflectivity of the passivation layer on the side facing away from the semiconductor substrate corresponding to the second sub-region, further improving the passivation effect of the passivation layer on the spacer region.

[0019] As one possible implementation, the first surface has a boundary and also includes an isolation region. The isolation region is located between the boundary and the first region, and between the boundary and the second region. Specifically, on the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of the portion corresponding to the isolation region is greater than the surface reflectivity of the portion corresponding to the first sub-region; and / or, the surface reflectivity of the second surface is less than the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate.

[0020] When the above technical solution is adopted, if the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer away from the semiconductor substrate is greater than the surface reflectivity of the portion corresponding to the first sub-region, the surface reflectivity of the portion corresponding to the first sub-region will be smaller. This facilitates the reflection of more light into the emitter doped layer, thereby generating more photogenerated carriers and improving the conversion efficiency of the battery. When the surface reflectivity of the second side is less than the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer away from the semiconductor substrate, the second side (front side) of the back contact battery has a higher light trapping effect, which is beneficial to improving the light utilization rate of the battery.

[0021] As one possible implementation, on the side of the passivation layer facing away from the semiconductor substrate, the surfaces corresponding to the first sub-region, the second sub-region, and the isolation region have textured structures, including pyramid-like structures. Furthermore, the apex angle of the pyramid-like structure on the surface of the isolation region is larger than the apex angles of the pyramid-like structures on the surfaces of the first and second sub-regions.

[0022] Under the aforementioned technical solution, all other factors being equal, a larger apex angle of the pyramid-shaped structure results in a "short and stout" shape with a relatively gentle height variation. Conversely, a smaller apex angle results in a "tall and thin" shape with a greater height variation. Therefore, when the apex angle of the pyramid-like structure on the side of the passivation layer facing away from the semiconductor substrate is large, the surface of the corresponding isolation region becomes relatively flat. This, in turn, helps to make the surface of the isolation region on the first side relatively flat, improving the passivation effect of the passivation layer on the isolation region, reducing the number of surface defects in the isolation region, and improving the working performance of the back contact battery.

[0023] As one possible implementation, the surface of the passivation layer on the side facing away from the semiconductor substrate, corresponding to the isolation region, has a textured structure, including a pyramid-like structure, with the surface of the second side. The apex angle of the pyramid-like structure on the second side is smaller than the apex angle of the pyramid-like structure on the surface of the passivation layer on the side facing away from the semiconductor substrate.

[0024] As mentioned earlier, when employing the above technical solution, under the same conditions, the height change of the pyramid-shaped structure with a larger apex angle is more gradual. Therefore, when the apex angle of the pyramid-shaped structure on the surface of the isolation region on the side of the isolation passivation layer facing away from the semiconductor substrate is larger, it is beneficial to improve the passivation effect of the passivation layer on the isolation region, reduce the number of surface defects in the isolation region, and improve the working performance of the back contact battery. Conversely, the smaller apex angle of the pyramid-shaped structure on the second surface gives the second surface of the back contact battery a better light-trapping effect, improving the light utilization rate of the battery.

[0025] As one possible implementation, the back-contact battery includes multiple segmented battery cells spaced apart along an arrangement direction perpendicular to the first and second regions. A cutting channel region exists between adjacent segmented battery cells. Alignment marks are provided on the cutting channel region. In this case, it is convenient to accurately identify the positions of different battery structures based on the alignment marks on the cutting channel region, thereby improving the yield of battery production.

[0026] As one possible implementation, on the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the dicing region has a textured structure. Furthermore, within the surface of the dicing region, the texture density on the surface near the alignment mark is greater than the texture density on the surfaces of other regions. In this case, the surface roughness and reflectivity of the surface near the alignment mark are higher, resulting in lower brightness in that area. This improves the contrast of the captured image, thereby enabling more accurate identification of the alignment mark on the battery and improving battery production yield.

[0027] In a second aspect, the present invention provides a photovoltaic module comprising a back contact battery provided in the first aspect and various implementations thereof.

[0028] The beneficial effects of the second aspect and its various implementations in this invention can be found in the analysis of the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0029] Thirdly, the present invention provides another back-contact battery, comprising: a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a passivation layer. The semiconductor substrate has opposing first and second surfaces. The first surface has alternating first and second regions, and a spacer region located between the first and second regions. The first doped semiconductor layer is disposed on the first region. The first doped semiconductor layer is an emitter doped layer. The second doped semiconductor layer is disposed on the second region. The second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types. The passivation layer is disposed on the first doped semiconductor layer, the second doped semiconductor layer, and the spacer region. The spacer region includes a first sub-region adjacent to the first doped semiconductor layer and a second sub-region adjacent to the second doped semiconductor layer. The first surface has a boundary and also includes an isolation region. The isolation region is located between the boundary and the first region, and between the boundary and the second region. Wherein, on the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of the portion corresponding to the isolation region is greater than the surface reflectivity of the portion corresponding to the first sub-region; and / or, the surface reflectivity of the second surface is less than the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate.

[0030] When the above technical solution is adopted, if the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer away from the semiconductor substrate is greater than the surface reflectivity of the portion corresponding to the first sub-region, the surface reflectivity of the portion corresponding to the first sub-region will be smaller. This facilitates the reflection of more light into the emitter doped layer, thereby generating more photogenerated carriers and improving the conversion efficiency of the battery. When the surface reflectivity of the second side is less than the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer away from the semiconductor substrate, the second side (front side) of the back contact battery has a higher light trapping effect, which is beneficial to improving the light utilization rate of the battery. Attached Figure Description

[0031] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings:

[0032] Figure 1 A longitudinal cross-sectional view of a first structure of a back-contact battery provided in an embodiment of the present invention;

[0033] Figure 2 This is a surface SEM image of a portion of the corresponding spacer region within the passivation layer on the side away from the semiconductor substrate in a back-contact battery provided in an embodiment of the present invention.

[0034] Figure 3 This is a partial surface SEM image of the back contact battery provided in an embodiment of the present invention, near the corresponding spacing region within the passivation layer on the side away from the semiconductor substrate;

[0035] Figure 4 This is a schematic diagram illustrating the distribution of the first region, the second region, and the spacer region in a back contact battery provided in an embodiment of the present invention. Figure 1 ;

[0036] Figure 5 This is a schematic diagram illustrating the distribution of the first region, the second region, and the spacer region in a back contact battery provided in an embodiment of the present invention. Figure 2 ;

[0037] Figure 6 A longitudinal cross-sectional view of a second structure of a back-contact battery provided in an embodiment of the present invention;

[0038] Figure 7 A longitudinal cross-sectional view of a third structure of a back-contact battery provided in an embodiment of the present invention;

[0039] Figure 8 A longitudinal cross-sectional view of the fourth structure of the back contact battery provided in an embodiment of the present invention;

[0040] Figure 9 A longitudinal cross-sectional view of the fifth structure of the back contact battery provided in an embodiment of the present invention;

[0041] Figure 10 This is a surface side view SEM image of the portion of the second sub-region within the passivation layer on the side away from the semiconductor substrate in the back contact battery provided in an embodiment of the present invention;

[0042] Figure 11 A top-view SEM image of the portion of the back contact battery provided in this embodiment of the invention, corresponding to the second sub-region on the side of the passivation layer away from the semiconductor substrate. Figure 1 ;

[0043] Figure 12 This is a surface side view SEM image of the portion of the first sub-region within the passivation layer on the side away from the semiconductor substrate in the back contact battery provided in an embodiment of the present invention;

[0044] Figure 13 This is a top-view SEM image of the portion of the passivation layer corresponding to the first sub-region on the side away from the semiconductor substrate in the back contact battery provided in an embodiment of the present invention;

[0045] Figure 14 A top-view SEM image of the portion of the back contact battery provided in this embodiment of the invention, corresponding to the second sub-region on the side of the passivation layer away from the semiconductor substrate. Figure 2 ;

[0046] Figure 15 This is a longitudinal cross-sectional schematic diagram of the sixth structure of the back contact battery provided in an embodiment of the present invention;

[0047] Figure 16 A top-view SEM image of the portion of the isolation region within the passivation layer on the side facing away from the semiconductor substrate in the back contact battery provided in an embodiment of the present invention. Figure 1 ;

[0048] Figure 17 A top-view SEM image of the portion of the isolation region within the passivation layer on the side facing away from the semiconductor substrate in the back contact battery provided in an embodiment of the present invention. Figure 2 ;

[0049] Figure 18 This is a partial surface SEM image of the second side of the back contact battery provided in an embodiment of the present invention.

[0050] Reference numerals: 11 is a semiconductor substrate, 12 is a first region, 13 is a second region, 14 is a spacer region, 15 is a first doped semiconductor layer, 16 is a second doped semiconductor layer, 17 is a passivation layer, 18 is a first sub-region, 19 is a second sub-region, 20 is a planar region, 21 is a textured region, 22 is an isolation region, 23 is a first interface passivation layer, 24 is a second interface passivation layer, 25 is a surface passivation layer, 26 is an anti-reflection layer, and 27 is a transparent conductive layer. Detailed Implementation

[0051] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and not intended to limit the scope of the invention. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concept of the invention.

[0052] The accompanying drawings illustrate various structural schematic diagrams according to embodiments of the present invention. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0053] In the context of this invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. Furthermore, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element. To make the technical problems, technical solutions, and beneficial effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0054] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified. "Several" means one or more, unless otherwise explicitly specified.

[0055] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0056] A solar cell is a device that converts sunlight into electrical energy. Specifically, when a solar cell is in operation, sunlight shines on the semiconductor pn junction, forming new electron-hole pairs. Under the influence of the built-in electric field of the pn junction, photogenerated holes flow to the p-region, and photogenerated electrons flow to the n-region. When the circuit is connected, an electric current is generated. Solar cells where both the positive and negative electrodes are located on the back side of the cell are called back-contact cells. Compared to double-sided contact solar cells, the front side of a back-contact cell has no metal electrodes to block the light, resulting in higher light utilization on the light-facing side. Therefore, back-contact cells have higher short-circuit current and photoelectric conversion efficiency, making them one of the current technological directions for achieving high-efficiency crystalline silicon solar cells.

[0057] However, in existing back-contact batteries, the morphology of the corresponding local surfaces in the spacer region on the back side is roughly the same. For example, if the local surfaces in the corresponding spacer region on the back side of the battery are all relatively flat planes with roughly the same one-dimensional dimension of the pyramidal structure, the light-trapping effect of the spacer region is poor, which is not conducive to the excitation and injection of more photogenerated carriers into the emitter doped layer of the battery, resulting in a low bifaciality of the back-contact battery. As another example, if the local surfaces in the corresponding spacer region on the back side of the battery are relatively rough textured surfaces with roughly the same one-dimensional dimension at the bottom of the pyramidal structure, the specific surface area of ​​the spacer region is large, resulting in poor passivation layer formation quality and hindering the improvement of passivation effect. Therefore, it is evident that the local surfaces in the corresponding spacer region on the back side of existing back-contact batteries cannot simultaneously meet the requirements of passivation and light trapping, leading to poor performance of the back-contact battery.

[0058] To address the aforementioned technical problems, in a first aspect, embodiments of the present invention provide a back-contact battery. For example... Figure 1 As shown, the back contact battery includes: a semiconductor substrate 11, a first doped semiconductor layer 15, a second doped semiconductor layer 16, and a passivation layer 17. The semiconductor substrate 11 has a first surface and a second surface opposite to each other. The first surface has alternating first regions 12 and second regions 13, and a spacer region 14 located between the first regions 12 and the second regions 13. The first doped semiconductor layer 15 is disposed on the first region 12. The first doped semiconductor layer 15 is an emitter doped layer. The second doped semiconductor layer 16 is disposed on the second region 13. The second doped semiconductor layer 16 and the first doped semiconductor layer 15 have opposite conductivity types. The passivation layer 17 is disposed on the first doped semiconductor layer 15, the second doped semiconductor layer 16, and the spacer region 14. The spacer region 14 includes a first sub-region 18 adjacent to the first doped semiconductor layer 15 and a second sub-region 19 adjacent to the second doped semiconductor layer 16.

[0059] For example, such as Figures 1 to 3 As shown, on the side of the passivation layer 17 away from the semiconductor substrate 11, the surface reflectivity of the portion corresponding to the first sub-region 18 is less than the surface reflectivity of the portion corresponding to the second sub-region 19.

[0060] With the above technical solution, when the back contact battery is in operation, the first and second doped semiconductor layers can effectively shunt and collect carriers, which is beneficial for the formation of photocurrent. The spacer region between the first and second doped semiconductor layers electrically isolates them, reducing the carrier recombination rate between them. Furthermore, the passivation layer disposed on the first and second doped semiconductor layers and the spacer region can reduce the number of surface defects on the back side of the back contact battery, improving the conversion efficiency of the back contact battery. Additionally, as... Figures 1 to 3 As shown, the portion of the passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the first sub-region 18, has a lower surface reflectivity. This facilitates the reflection of more light into the first doped semiconductor layer 15 adjacent to the first sub-region 18, thereby improving the bifaciality of the back contact cell. Simultaneously, the first doped semiconductor layer 15 is an emitter doped layer. Since the emitter doped layer is used to provide electron-hole pair injection and separation, more light incident into the emitter doped layer facilitates the generation of more photogenerated carriers, thus improving the conversion efficiency of the back contact cell. Furthermore, since the passivation layer 17 is formed on the first side through a deposition process, the undulation morphology of the portion of the passivation layer 17 on the side facing away from the semiconductor substrate 11 corresponding to the spacer region 14 can, to some extent, reflect the undulation morphology of the spacer region 14 surface of the semiconductor substrate 11. Therefore, when the portion of the passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the second sub-region 19, has a larger surface reflectivity, the second sub-region 19 has a smaller specific surface area compared to the first sub-region 18. This results in a smaller surface roughness in the second sub-region 19, which is beneficial for improving the passivation effect of the passivation layer 17 on the second sub-region 19 and enhancing the working performance of the back contact battery. Furthermore, since the first sub-region 18 is adjacent to the first doped semiconductor layer 15, and the second sub-region 19 is adjacent to the second doped semiconductor layer 16, serving as a boundary region between different structures, the first sub-region 18 is dimmer and the second sub-region 19 is brighter when their surface reflectivities differ. This is beneficial for improving the contrast of the captured image, thereby enabling more accurate identification of alignment marks on the battery and improving the yield of battery production.

[0061] In practical applications, the embodiments of the present invention do not specifically limit the material and conductivity type of the semiconductor substrate. For example, the semiconductor substrate can be a silicon substrate. Alternatively, the semiconductor substrate can also be a germanium-silicon substrate, a germanium substrate, or a gallium arsenide substrate, or any other semiconductor material.

[0062] Secondly, the semiconductor substrate includes a first surface and a second surface opposite to each other. The first surface of the semiconductor substrate corresponds to the back side of the back contact battery, and the second surface of the semiconductor substrate corresponds to the front side of the back contact battery. The distribution of the first region, the second region, and the spacer region on the first surface can be determined based on the distribution of the first doped semiconductor layer and the second doped semiconductor layer formed on one side of the first surface. Specifically, since the first doped semiconductor layer of the back contact battery is disposed on the first region, the distribution range of the first region on the first surface can be determined based on the distribution requirements of the first doped semiconductor layer in the actual application scenario. Since the second doped semiconductor layer of the back contact battery is disposed on the second region of the first surface, the distribution range of the second region on the first surface can be determined based on the distribution requirements of the second doped semiconductor layer on the semiconductor substrate in the actual application scenario. As for the spacer region, after the ranges of the first and second regions are determined, the range of the spacer region on the first surface can also be determined.

[0063] It is understandable that in the first surface of the semiconductor substrate, the first region roughly corresponds to the emitter region, and the second region roughly corresponds to the back field region. Specifically, one of the first and second regions corresponds to the P-region, and the other to the N-region, while the spacer region is the gap between the P-region and the N-region.

[0064] The shapes of the first region, the second region, and the interval region can be determined based on the actual application scenario; no specific limitations are made here. For example: Figure 4 As shown, the first region 12 and the second region 13 can be distributed in alternating stripe patterns. In this case, along a direction parallel to the first surface, the intervening region 14 is the region located between the P-type and N-type stripe regions. For example: Figure 5 As shown, the first region 12 and the second region 13 can also be distributed alternately in an interdigitated pattern. In this case, along the direction parallel to the first surface, the interval region 14 can be the region between the P-type strip region and the N-type strip region, or the region between the P-type connecting region and the N-type strip region, or the region between the N-type connecting region and the P-type strip region. Among them, the P-type connecting region is connected to the P-type strip region, and the N-type connecting region is connected to the N-type strip region.

[0065] For the interval region, along the width direction of the interval region, such as Figure 1 As shown, the interval region 14 may consist only of the first sub-region 18 and the second sub-region 19, in which case the first sub-region 18 and the second sub-region 19 are adjacent. Alternatively, the interval region may also include a third sub-region located between the first and second sub-regions. The width range and surface reflectivity of this third sub-region can be set according to actual needs, and are not specifically limited here.

[0066] Regarding the specific surface morphology of the first surface of the semiconductor substrate, as mentioned earlier, the surface undulation morphology of the passivation layer on the side facing away from the semiconductor substrate can, to a certain extent, reflect the surface undulation morphology of the first surface of the semiconductor substrate. Therefore, the surface morphology of the first and second doped semiconductor layers on the side facing away from the semiconductor substrate, as well as the surface morphology of the intervening region in the first surface, can be referenced to the surface morphology of the passivation layer on the side facing away from the semiconductor substrate. In some examples, because the surface reflectivity of the portion corresponding to the first sub-region on the side of the passivation layer facing away from the semiconductor substrate is less than the surface reflectivity of the portion corresponding to the second sub-region, the surface reflectivity of the first sub-region on the first surface of the semiconductor substrate is less than the surface reflectivity of the second sub-region. As for the range of surface reflectivity of the first sub-region and the second sub-region, the difference in surface reflectivity between the first sub-region and the second sub-region, the proportion of the first sub-region and the second sub-region in the spacing region, and the specific surface morphology of the first sub-region and the second sub-region in the passivation layer on the side away from the semiconductor substrate, please refer to the information below, such as the range of surface reflectivity of the portion corresponding to the first sub-region and the portion corresponding to the second sub-region, the difference in surface reflectivity of the portion corresponding to the first sub-region and the portion corresponding to the second sub-region, the proportion of the surface of the first sub-region and the surface of the second sub-region in the entire spacing region corresponding to the passivation layer, and the specific surface morphology of the portion corresponding to the first sub-region and the portion corresponding to the second sub-region, etc., which will not be repeated here.

[0067] Regarding the first and second doped semiconductor layers, from a conductivity perspective, this embodiment of the invention does not specifically limit the conductivity types of the first and second doped semiconductor layers, as long as the first doped semiconductor layer is an emitter doped layer and the conductivity types of the first and second doped semiconductor layers are opposite. Specifically, when the conductivity type of the semiconductor substrate is P-type, the conductivity type of the first doped semiconductor layer is N-type, and the conductivity type of the second doped semiconductor layer is P-type. Alternatively, when the conductivity type of the semiconductor substrate is N-type, the conductivity type of the first doped semiconductor layer is P-type, and the conductivity type of the second doped semiconductor layer is N-type.

[0068] The materials of the first doped semiconductor layer and / or the second doped semiconductor layer can include any semiconductor material such as silicon, germanium-silicon, germanium, or gallium arsenide. In terms of the arrangement of matter, the crystal phase of the first doped semiconductor layer and / or the second doped semiconductor layer can be amorphous, microcrystalline, nanocrystalline, single-crystal, or polycrystalline. The materials of the first doped semiconductor layer and the second doped semiconductor layer can be the same or different.

[0069] For example, the materials of the first doped semiconductor layer and the second doped semiconductor layer can both be polycrystalline silicon or amorphous silicon.

[0070] For example, one of the first doped semiconductor layer and the second doped semiconductor layer is made of polycrystalline silicon, and the other is made of amorphous silicon.

[0071] Secondly, such as Figure 1 As shown, the first doped semiconductor layer 15 can be directly disposed on the first region 12. Alternatively, as... Figure 6 As shown, the back contact battery may further include a first interface passivation layer 23 located between the first doped semiconductor layer 15 and the semiconductor substrate 11. In this case, the passivated contact structure composed of the first interface passivation layer 23 and the first doped semiconductor layer 15 has excellent interface passivation effect and can achieve selective collection of charge carriers, reduce the carrier recombination rate of the first region 12 on the first surface of the semiconductor substrate 11, and further improve the photoelectric conversion efficiency of the back contact battery. The material and thickness of the first interface passivation layer 23 can be set according to the material of the first doped semiconductor layer 15 and actual needs, and are not specifically limited here. For example, when the material of the first doped semiconductor layer is doped polycrystalline silicon, the first interface passivation layer is a tunneling oxide layer. As another example, when the material of the first doped semiconductor layer includes at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, the first interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer, or a mixture of the above three layers.

[0072] As for the second doped semiconductor layer, such as Figure 1 As shown, the second doped semiconductor layer 16 can be directly disposed on the second region 13. Alternatively, as... Figure 6 As shown, the back contact battery may further include a second interface passivation layer 24, which is located between the semiconductor substrate 11 and the second doped semiconductor layer 16. In this case, the passivated contact structure composed of the second interface passivation layer 24 and the second doped semiconductor layer 16 can achieve selective collection of charge carriers and reduce the carrier recombination rate in the second region 13 of the first surface of the semiconductor substrate 11. The principle for setting the material and thickness of the second interface passivation layer 24 can refer to the principle for setting the material and thickness of the first interface passivation layer 23 described above, and will not be repeated here.

[0073] Regarding the passivation layer, its specific structure and materials can be determined based on the type of solar cell and the actual application scenario, and are not specifically limited here. For example, the passivation layer may include at least one of a surface passivation layer, an anti-reflection layer, and a transparent conductive layer.

[0074] like Figures 7 to 9As shown, when the passivation layer 17 includes at least one of a surface passivation layer 25, an antireflection layer 26, and a transparent conductive layer 27, the surface of the passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the portion of the first sub-region 18, is the outermost layer among the layers included in the passivation layer 17 (i.e., the one with the largest distance from the semiconductor substrate 11 along the thickness direction of the semiconductor substrate 11), and the surface of the passivation layer 17 on the side facing away from the semiconductor substrate 11 corresponding to the portion of the first sub-region 18. Similarly, the surface of the passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the portion of the second sub-region 19, is the outermost layer among the layers included in the passivation layer 17 (i.e., the one with the largest distance from the semiconductor substrate 11 along the thickness direction of the semiconductor substrate 11), and the surface of the passivation layer 17 on the side facing away from the semiconductor substrate 11 corresponding to the portion of the second sub-region 19.

[0075] For example: Figure 9 As shown, when the passivation layer 17 includes only the surface passivation layer 25 and the antireflection layer 26, and the antireflection layer 26 is disposed on the side of the surface passivation layer 25 facing away from the semiconductor substrate 11, the surface of the passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the first sub-region 18, is the surface of the antireflection layer 26 on the side facing away from the semiconductor substrate 11, corresponding to the first sub-region 18. Similarly, the surface of the passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the second sub-region 19, is the surface of the antireflection layer 26 on the side facing away from the semiconductor substrate 11, corresponding to the second sub-region 19.

[0076] Furthermore, the materials of the surface passivation layer, antireflection layer, and transparent conductive layer can be selected according to actual needs. For example, the material of the surface passivation layer may include any material with passivation properties such as silicon oxide, aluminum oxide, silicon nitride, or silicon oxynitride. The material of the antireflection layer may include silicon nitride or silicon oxynitride. The material of the transparent conductive layer may include at least one of fluorine-doped tin oxide, aluminum-doped zinc oxide, tin-doped indium oxide, tungsten-doped indium oxide, molybdenum-doped indium oxide, cerium-doped indium oxide, and indium hydroxide.

[0077] It should be noted that when the passivation layer includes a transparent conductive layer, the portion of the transparent conductive layer corresponding to the first region is electrically insulated from the portion of the transparent conductive layer corresponding to the second region to prevent short circuits.

[0078] It is understandable that, as mentioned above, the magnitude of the surface reflectivity of the portion corresponding to the first sub-region and the portion corresponding to the second sub-region on the side of the passivation layer away from the semiconductor substrate will affect the passivation effect of the passivation layer on the spacer region and the incident amount of light incident from the spacer region into the emitter doped layer (or the emitter doped layer and the semiconductor substrate) (which in turn affects the bifaciality of the battery and the number of photogenerated carriers that the emitter doped layer can excite and inject). Therefore, the magnitude and difference of the surface reflectivity of the portion corresponding to the first sub-region and the portion corresponding to the second sub-region on the side of the passivation layer away from the semiconductor substrate, the surface morphology of the portion corresponding to the first sub-region and the portion corresponding to the second sub-region, and the proportion range of the portion corresponding to the first sub-region and the portion corresponding to the second sub-region are determined according to the requirements of the passivation effect of the passivation layer on the spacer region, the bifaciality of the battery, and the number of carriers that the emitter doped layer can excite in the actual application scenario. No specific limits are made here.

[0079] For example, such as Figure 2 As shown, in at least one spacer region, the area of ​​the first sub-region 18 can be larger than the area of ​​the second sub-region 19. In this case, the area of ​​the local surface with lower surface reflectivity on the side of the passivation layer away from the semiconductor substrate is larger, which is beneficial to improving the light trapping effect of the surface of the corresponding spacer region on the side of the passivation layer away from the semiconductor substrate, so that more light can be reflected into the emitter doped layer, further increasing the bifaciality of the back contact cell.

[0080] Of course, in at least one interval region, the area of ​​the first sub-region can also be less than or equal to the area of ​​the second sub-region.

[0081] For example, on the side of the passivation layer facing away from the semiconductor substrate, the surfaces corresponding to the first sub-region and the second sub-region may have textured structures. Specifically, on the side of the passivation layer facing away from the semiconductor substrate, the one-dimensional dimension of the textured structure on the surface corresponding to the first sub-region is different from the one-dimensional dimension of the textured structure on the surface corresponding to the second sub-region; and / or, the distribution density of the textured structure on the surface corresponding to the first sub-region is different from the distribution density of the textured structure on the surface corresponding to the second sub-region; and / or, the uniformity of the one-dimensional dimension of the textured structure on the surface corresponding to the first sub-region is greater than the uniformity of the one-dimensional dimension of the textured structure on the surface corresponding to the second sub-region. In this case, by adjusting at least one of the following factors—one-dimensional size, distribution density, and one-dimensional size uniformity—of the texture structure on the side of the passivation layer facing away from the semiconductor substrate, corresponding to the first sub-region and the second sub-region, the surface reflectivity of the surface of the passivation layer facing away from the semiconductor substrate can be controlled. This allows for regional differentiation of different parts of the local surface of the corresponding interval region on the side of the passivation layer facing away from the semiconductor substrate. Consequently, the local surface of the corresponding interval region on the side of the passivation layer facing away from the semiconductor substrate simultaneously meets the requirements of passivation and light trapping. This improves the working performance of the back contact battery and allows for the selection of an appropriate range according to the requirements of different practical application scenarios, thereby enhancing the applicability of the back contact battery provided in this embodiment of the invention in different application scenarios.

[0082] Specifically, on the side of the passivation layer away from the semiconductor substrate, the specific types of texture structures on the surface corresponding to the first sub-region and the surface corresponding to the second sub-region can be set according to the reflectivity requirements of these two local surfaces in the actual application scenario and the actual needs, and are not specifically limited here.

[0083] For example, on the side of the passivation layer away from the semiconductor substrate, the texture structure of the surface corresponding to the first sub-region and / or the surface corresponding to the second sub-region can be a polished texture structure such as a tower-like structure, or a velvety texture structure such as a pyramid-like structure or a hole-like structure.

[0084] On the side of the passivation layer away from the semiconductor substrate, the texture structures of the surface corresponding to the first sub-region and the surface corresponding to the second sub-region can be the same or different.

[0085] As for the one-dimensional dimensions of the texture structures on the side of the passivation layer away from the semiconductor substrate, corresponding to the surface of the first sub-region and the surface of the second sub-region, as well as the distribution of the texture structures on the surface of the first sub-region and the surface of the second sub-region, these can be determined based on the types of texture structures on these two local surfaces and the reflectivity requirements of these two local surfaces, and are not specifically limited here.

[0086] For example, such as Figure 2 ,as well as Figures 10 to 13 As shown, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the texture structure of the surface corresponding to the first sub-region 18 and the surface corresponding to the second sub-region 19 may include a pyramid-like structure. Furthermore, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the distribution density of the pyramid-like structure on the surface corresponding to the first sub-region 18 is greater than the distribution density of the pyramid-like structure on the surface corresponding to the second sub-region 19; and / or, the one-dimensional dimension of the pyramid-like structure on the surface corresponding to the first sub-region 18 is smaller than the one-dimensional dimension of the pyramid-like structure on the surface corresponding to the second sub-region 19; and / or, the one-dimensional dimension uniformity of the pyramid-like structure on the surface corresponding to the first sub-region 18 is greater than the one-dimensional dimension uniformity of the pyramid-like structure on the surface corresponding to the second sub-region 19. In this case, when the surface texture of the first sub-region 18 and the surface texture of the second sub-region 19 on the side of the passivation layer 17 away from the semiconductor substrate 11 includes a pyramid-like structure, and the distribution density of the pyramid-like structure on the surface of the first sub-region 18 is greater than the distribution density of the pyramid-like structure on the surface of the second sub-region 19, the surface undulation of the first sub-region 18 is more concentrated. This is beneficial to further increase the surface roughness of the portion of the passivation layer 17 on the side away from the semiconductor substrate 11 corresponding to the first sub-region 18, reduce the surface reflectivity of the portion of the passivation layer 17 on the side away from the semiconductor substrate 11 corresponding to the first sub-region 18, and facilitate more light reflection into the emitter doped layer, thereby generating more photogenerated carriers and further improving the conversion efficiency of the battery. Secondly, the application principle of the beneficial effect when the one-dimensional dimension of the pyramid-like structure on the surface of the first sub-region 18 is smaller than the one-dimensional dimension of the pyramid-like structure on the surface of the second sub-region 19, and / or when the uniformity of the one-dimensional dimension of the pyramid-like structure on the surface of the first sub-region 18 is greater than the uniformity of the one-dimensional dimension of the pyramid-like structure on the surface of the second sub-region 19, can refer to the application principle of the beneficial effect when the distribution density of the pyramid-like structure on the surface of the first sub-region 18 is greater than the distribution density of the pyramid-like structure on the surface of the second sub-region 19, as described above, and will not be repeated here.

[0087] Specifically, a pyramid-like structure can be a pyramid-shaped structure with a regular polygonal base, or a pyramid-like structure with an irregular curved outline on its base. The side edges and apex corners of a pyramid-like structure can have sharp transitions or smooth transitions.

[0088] In addition, the one-dimensional dimension of a pyramid-like structure can refer to the length of the base side or the length of the base diagonal, the length of the side edge, or the height of the pyramid-like structure.

[0089] As for the side of the passivation layer away from the semiconductor substrate, the distribution density, one-dimensional size, and uniformity of the pyramid-shaped structure of the surface corresponding to the first sub-region and the surface corresponding to the second sub-region can be determined according to the reflectivity requirements of these two local surfaces, and no specific limitations are made here.

[0090] It should be noted that, on the side of the passivation layer facing away from the semiconductor substrate, if the texture structure of the surface corresponding to the first sub-region and the surface corresponding to the second sub-region includes a pyramid-like structure, different pyramid-like structures on the surface corresponding to the second sub-region can be adjacent, in which case each part of the surface corresponding to the second sub-region is textured. Or, as... Figure 11 As shown, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the surface corresponding to the second sub-region 19 may also include a planar region 20 and a textured region 21. In this case, compared to a conventional textured surface where each part is a textured region, when the surface of the passivation layer 17 facing away from the semiconductor substrate 11, corresponding to the second sub-region 19, also has a planar region 20, the textured structure is sparsely distributed on the surface of the corresponding second sub-region 19. This helps to reduce the surface roughness and surface reflectivity of the passivation layer 17 facing away from the semiconductor substrate 11, further improving the passivation effect of the passivation layer 17 on the spacer region 14. In this case, the distribution of the planar region 20 and the textured region 21 on the surface of the passivation layer 17 facing away from the semiconductor substrate 11, corresponding to the second sub-region 19, can be determined according to the actual manufacturing process. For example, the planar region 20 and the textured region 21 can be evenly distributed.

[0091] For example, on the side of the passivation layer facing away from the semiconductor substrate, the texture structure of the surfaces corresponding to the first sub-region and the second sub-region may include a pyramid-like structure. Furthermore, on the side of the passivation layer facing away from the semiconductor substrate, the distribution density of the pyramid-like structure on the surface of the first sub-region is less than the distribution density of the pyramid-like structure on the surface of the second sub-region; and / or, the recess depth of the pyramid-like structure on the surface of the first sub-region is less than the recess depth of the pyramid-like structure on the surface of the second sub-region; and / or, the one-dimensional dimension of the bottom surface of the pyramid-like structure on the surface of the first sub-region is greater than the one-dimensional dimension of the bottom surface of the pyramid-like structure on the surface of the second sub-region; and / or, the one-dimensional dimensional uniformity of the pyramid-like structure on the surface of the first sub-region is greater than the one-dimensional dimensional uniformity of the pyramid-like structure on the surface of the second sub-region. The application principle of the beneficial effect in this case can be referred to the application principle of the beneficial effect of the distribution density of the pyramid-like structure on the surface of the first sub-region being greater than the distribution density of the pyramid-like structure on the surface of the second sub-region described above, and will not be repeated here.

[0092] The base of a tower-like foundation can be a regular or irregular polygonal base (such as a quadrilateral, pentagonal, hexagonal, or octagonal base; the polygon can be a regular polygon with the same side length or a polygon with different side lengths). The angles of the polygonal base can be sharp angles or rounded corners. Alternatively, the base of a tower-like foundation can also be an irregular base with an arcuate profile. Furthermore, the one-dimensional dimension of the base of a tower-like foundation can be either the side length of the base or the length of its diagonal.

[0093] As for the side of the passivation layer away from the semiconductor substrate, the distribution density, one-dimensional size, and one-dimensional size uniformity of the tower-like structure on the surface corresponding to the first sub-region and the surface corresponding to the second sub-region can be determined according to the reflectivity requirements of these two local surfaces, and no specific limitation is made here.

[0094] For example, such as Figures 12 to 14As shown, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the surface of the first sub-region 18 has a textured structure including a pyramid-like structure, and the surface of the second sub-region 19 has a textured structure including a tower-like structure. In this case, compared with the tower-like structure on the surface of the second sub-region 19, the pyramid-like structure on the side of the passivation layer 17 facing away from the semiconductor substrate 11 has a sharper tower top, resulting in greater surface undulation in the first sub-region 18. This increases the surface roughness of the portion of the first sub-region 18, reduces the surface reflectivity of the portion of the passivation layer 17 facing away from the semiconductor substrate 11, and allows more light to be reflected into the emitter doped layer, thereby generating more photogenerated carriers and further improving the conversion efficiency of the battery. In this case, the morphology of the pyramid-like structure on the surface of the passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the first sub-region 18, and the basal-like structure on the surface of the passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the second sub-region 19, can be referred to the explanation above, and is not specifically limited here. Furthermore, in this case, the distribution density, one-dimensional size, and one-dimensional size uniformity of the pyramid-like structure on the surface of the passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the first sub-region 18, and the basal-like structure on the surface of the passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the second sub-region 19, can be determined according to the reflectivity requirements of these two local surfaces in the actual application scenario, and are not specifically limited here.

[0095] Furthermore, if the surface of the passivation layer on the side facing away from the semiconductor substrate has a texture structure including a pyramid-like structure, and the surface of the second sub-region has a texture structure including a pyramid-like structure, then the surface of the second sub-region may only have a pyramid-like structure; or, as... Figure 14As shown, the surface of the passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the second sub-region 19, may also include a pyramid-like structure; and within the surface of the corresponding second sub-region 19, at least one pyramid-like structure has a discretely distributed pyramid-like structure. In this case, it can be understood that the pyramid-like structure is a recessed structure that is recessed into the passivation layer 17 along the thickness direction of the semiconductor substrate 11. The pyramid-like structure is a protruding structure that bulges out along the direction away from the semiconductor substrate 11. Based on this, when at least one pyramidal structure has a discretely distributed pyramidal structure on the surface of the corresponding second sub-region 19, a pyramidal structure protruding in the direction away from the semiconductor substrate 11 is superimposed on the surface of the pyramidal structure recessed into the passivation layer 17. This helps to transform the surface of the corresponding second sub-region 19, which originally had a large height difference, into a surface with a relatively small height difference. This reduces the undulation of the surface of the second sub-region 19 on the side of the passivation layer 17 away from the semiconductor substrate 11, further reducing the surface roughness and surface reflectivity of the portion of the passivation layer 17 on the side away from the semiconductor substrate 11, and further improving the passivation effect of the passivation layer 17 in the second sub-region 19. In this case, the one-dimensional size of the pyramidal structure on the surface of the passivation layer 17 on the side away from the semiconductor substrate 11 corresponding to the second sub-region 19, and its distribution and proportion within the pyramidal texture structure, can be determined according to the reflectivity requirements of this local surface in the actual application scenario, and is not specifically limited here.

[0096] It should be noted that, along the direction from the first sub-region to the second sub-region, on the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of the corresponding spacer region can gradually increase. Correspondingly, on the side of the passivation layer facing away from the semiconductor substrate, the distribution density, one-dimensional size, and one-dimensional size uniformity of the texture structure in different regions of the corresponding spacer region also gradually change.

[0097] Furthermore, regarding the surface height, on the side of the passivation layer facing away from the semiconductor substrate, the surface of the corresponding second sub-region can be flush with the surface of the corresponding first sub-region. Alternatively, on the side of the passivation layer facing away from the semiconductor substrate, the surface of the corresponding second sub-region can also be recessed into the semiconductor substrate relative to the surface of the corresponding first sub-region. In this case, it is beneficial to further reduce the leakage risk between the first and second doped semiconductor layers with opposite conductivity types. Secondly, the passivation layer is formed on the first doped semiconductor layer, the second doped semiconductor layer, and the spacer region through a deposition process. The undulation morphology of the portion of the passivation layer facing away from the semiconductor substrate corresponding to the spacer region is approximately the same as the undulation morphology of the spacer region itself. Therefore, when the surface of the second sub-region facing away from the semiconductor substrate is recessed into the semiconductor substrate relative to the surface of the corresponding first sub-region on the side of the passivation layer facing away from the semiconductor substrate, the surface of the second sub-region included in the spacer region is also recessed into the semiconductor substrate relative to the surface of the first sub-region. This can increase the passivation contact area between the passivation layer and the spacer region, further improving the passivation effect of the passivation layer on the spacer region. In this case, the height difference between the surface of the second sub-region and the surface of the first sub-region on the side of the passivation layer away from the semiconductor substrate can be determined based on the type, distribution and one-dimensional size of the texture structure formed on these two local surfaces, without specific limitations here.

[0098] For example, such as Figures 15 to 17 As shown, the first surface has a boundary and also includes an isolation region 22. The isolation region 22 is located between the boundary and the first region 12, and between the boundary and the second region 13. Based on this, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the surface reflectivity of the portion corresponding to the isolation region 22 can be greater than the surface reflectivity of the portion corresponding to the first sub-region 18. In this case, when the surface reflectivity of the portion corresponding to the isolation region 22 on the side of the passivation layer 17 facing away from the semiconductor substrate 11 is greater than the surface reflectivity of the portion corresponding to the first sub-region 18, the surface reflectivity of the portion corresponding to the first sub-region 18 is smaller, which is beneficial for more light to be reflected into the emitter doped layer, thereby generating more photogenerated carriers and improving the conversion efficiency of the battery.

[0099] Of course, the surface reflectivity of the portion of the passivation layer on the side away from the semiconductor substrate, corresponding to the isolation region, can also be equal to the surface reflectivity of the portion corresponding to the first sub-region.

[0100] As for the range of surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer away from the semiconductor substrate, the difference between its surface reflectivity and that of the portion corresponding to the first sub-region, and the surface morphology of the portion corresponding to the isolation region, these can be determined based on the surface reflectivity requirements of the portion corresponding to the isolation region on the side of the passivation layer away from the semiconductor substrate in the actual application scenario, as well as the surface morphology of the portions corresponding to the first and second sub-regions. No specific limitations are made here.

[0101] For example, such as Figures 10 to 13 ,as well as Figure 16 and Figure 17 As shown, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the surfaces corresponding to the first sub-region 18, the second sub-region 19, and the isolation region 22 have textured structures, including pyramid-like structures. In this case, the apex angle of the pyramid-like structure on the surface of the isolation region 22 can be larger than the apex angles of the pyramid-like structures on the surfaces of the first sub-region 18 and the second sub-region 19. In this case, all other factors being equal, the larger the apex angle of the pyramid-like structure, the more "short and fat" the pyramid-like structure appears, with a relatively gentle change in height. Conversely, the smaller the apex angle of the pyramid-like structure, the more "tall and thin" it appears, with a large change in height. Based on this, when the apex angle of the pyramid-like structure on the surface of the isolation region 22 on the side of the passivation layer 17 facing away from the semiconductor substrate 11 is large, the surface of the portion corresponding to the isolation region 22 is relatively flat, which helps to make the surface of the isolation region 22 on the first side relatively flat as well, improving the passivation effect of the passivation layer 17 on the isolation region 22, reducing the number of surface defects in the isolation region 22, and improving the working performance of the back contact battery. For example, the apex angle of the pyramid-like structure on the surface of the isolation region on the side of the passivation layer away from the semiconductor substrate can be greater than or equal to 60° and less than or equal to 100°. For example, the apex angle of the pyramid-like structure on the surface of the first sub-region and / or the second sub-region on the side of the passivation layer away from the semiconductor substrate can be greater than or equal to 50° and less than or equal to 100°.

[0102] Alternatively, the one-dimensional dimension of the pyramid-like structure within the surface of the corresponding isolation region can be smaller than the one-dimensional dimension of the pyramid-like structure within the surfaces of the corresponding first sub-region and the corresponding second sub-region. Or, the distribution density of the pyramid-like structure within the surface of the corresponding isolation region can be smaller than the distribution density of the pyramid-like structure within the surfaces of the corresponding first sub-region and the corresponding second sub-region.

[0103] Furthermore, the surface reflectivity of the second surface of the semiconductor substrate can be less than the surface reflectivity of the portion of the passivation layer facing away from the semiconductor substrate corresponding to the isolation region. In this case, the second surface (front side) of the back contact battery has a higher light-trapping effect, which is beneficial to improving the light utilization efficiency of the battery. Alternatively, the surface reflectivity of the second surface of the semiconductor substrate can also be equal to the surface reflectivity of the portion of the passivation layer facing away from the semiconductor substrate corresponding to the isolation region. The magnitude of the surface reflectivity of the second surface and the surface morphology of the second surface can be determined according to the requirements of the light-trapping effect of the second surface in the actual application scenario, as well as the surface morphology of the corresponding isolation region and the spacer region on the side of the passivation layer facing away from the semiconductor substrate, and are not specifically limited here.

[0104] For example, such as Figures 16 to 18 As shown, the surface of the passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the isolation region 22, has a textured structure with the surface of the second side. This textured structure can include a pyramid-like structure. Furthermore, the apex angle of the pyramid-like structure on the second side is smaller than the apex angle of the pyramid-like structure on the surface of the passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the isolation region 22. In this case, as mentioned earlier, under the same conditions, a larger apex angle results in a more gradual height change for the pyramid-like structure. Therefore, when the apex angle of the pyramid-like structure on the surface of the isolation passivation layer 17 on the side facing away from the semiconductor substrate 11, corresponding to the isolation region 22, is larger, it is beneficial to improve the passivation effect of the passivation layer 17 on the isolation region 22, reduce the number of surface defects in the isolation region 22, and improve the working performance of the back contact battery. Conversely, a smaller apex angle of the pyramid-like structure on the second side results in a better light-trapping effect on the second side of the back contact battery, improving the light utilization rate of the battery. For example, the apex angle of the pyramid-like structure on the second side can be greater than or equal to 70° and less than or equal to 110°.

[0105] Alternatively, the one-dimensional dimension of the pyramid-like structure on the surface of the corresponding isolation region can be smaller than the one-dimensional dimension of the pyramid-like structure on the second surface. Or, the distribution density of the pyramid-like structure on the surface of the corresponding isolation region can be smaller than the distribution density of the pyramid-like structure on the second surface.

[0106] Alternatively, the texture structure of the second surface may include a pyramid-like structure, while the texture structure of the surface of the isolation region on the side of the passivation layer away from the semiconductor substrate may include a pyramid-like structure.

[0107] In some examples, the back-contact battery includes multiple segmented battery cells spaced apart along an arrangement direction perpendicular to the first and second regions. A dicing region exists between adjacent segmented battery cells. Alignment marks are provided on the dicing region. In this case, it is convenient to accurately identify the positions of different battery structures based on the alignment marks provided on the dicing region, thereby improving the yield of battery production. The embodiments of the present invention do not specifically limit the morphology of the alignment marks or their specific placement. The alignment marks can be located on the portion of the first doped semiconductor layer located in the dicing region, or on the portion of the second doped semiconductor layer located in the dicing region.

[0108] For example, on the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the dicing region has a textured structure, and within the surface of the corresponding dicing region, the distribution density of the textured structure on the surface of the region near the alignment mark is greater than the distribution density of the textured structure on the surface of the other regions. In this case, the surface roughness and surface reflectivity of the surface near the alignment mark are higher, resulting in lower brightness of the surface near the alignment mark. This is beneficial for improving the contrast of the captured image, thereby more accurately identifying the alignment mark set on the battery and improving the yield of battery production.

[0109] Specifically, within the surface of the dicing region on the side of the passivation layer facing away from the semiconductor substrate, the area near the alignment mark can be determined based on the size of the alignment mark and the contrast requirements of the captured image in the actual application scenario; no specific limitation is made here. It is understood that the higher the contrast requirement for the captured image, the greater the difference in texture density between the surface near the alignment mark and the surface of other areas. In addition to adjusting the texture density, this objective can also be achieved by adjusting the type, one-dimensional size, and one-dimensional size uniformity of the texture structure. Specific adjustment methods can be referred to the surface morphology of the first and second sub-regions on the side of the passivation layer facing away from the semiconductor substrate described above, and will not be repeated here.

[0110] Secondly, embodiments of the present invention provide a photovoltaic module, which includes a back contact battery provided in the first aspect and various implementations thereof.

[0111] The beneficial effects of the second aspect and its various implementations in the embodiments of the present invention can be referred to the analysis of the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0112] Thirdly, embodiments of the present invention provide another back-contact battery, comprising: a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a passivation layer. The semiconductor substrate has opposing first and second surfaces. The first surface has alternating first and second regions, and a spacer region located between the first and second regions. The first doped semiconductor layer is disposed on the first region. The first doped semiconductor layer is an emitter doped layer. The second doped semiconductor layer is disposed on the second region. The second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types. The passivation layer is disposed on the first doped semiconductor layer, the second doped semiconductor layer, and the spacer region. The spacer region includes a first sub-region adjacent to the first doped semiconductor layer and a second sub-region adjacent to the second doped semiconductor layer. The first surface has a boundary and also includes an isolation region. The isolation region is located between the boundary and the first region, and between the boundary and the second region. Specifically, on the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of the portion corresponding to the isolation region is greater than the surface reflectivity of the portion corresponding to the first sub-region; and / or, the surface reflectivity of the second surface is less than the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate.

[0113] It should be noted that the material and conductivity type of the semiconductor substrate, the material and conductivity type of the first doped semiconductor layer and the second doped semiconductor layer, and the structure, material, surface morphology and surface reflectivity of the passivation layer on the side away from the semiconductor substrate in the back contact battery provided in the third aspect of the present invention can refer to the information on the material and conductivity type of the semiconductor substrate, the material and conductivity type of the first doped semiconductor layer and the second doped semiconductor layer, and the structure, material, surface morphology and surface reflectivity of the passivation layer on the side away from the semiconductor substrate in the back contact battery provided in the first aspect described above, and will not be repeated here.

[0114] When the above technical solution is adopted, if the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer away from the semiconductor substrate is greater than the surface reflectivity of the portion corresponding to the first sub-region, the surface reflectivity of the portion corresponding to the first sub-region will be smaller. This facilitates the reflection of more light into the emitter doped layer, thereby generating more photogenerated carriers and improving the conversion efficiency of the battery. When the surface reflectivity of the second side is less than the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer away from the semiconductor substrate, the second side (front side) of the back contact battery has a higher light trapping effect, which is beneficial to improving the light utilization rate of the battery.

[0115] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0116] The embodiments of the present invention have been described above. However, these embodiments are merely for clarity and are not intended to limit the scope of the invention. The scope of the invention is defined by the appended claims and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of the invention, and all such substitutions and modifications should fall within the scope of the invention.

Claims

1. A back contact cell, characterized in that, Comprise: a semiconductor substrate having opposite first and second faces; the first face having first and second regions and interval regions between the first and second regions, which are alternately and spacedly distributed; a first doped semiconductor layer disposed on the first regions; the first doped semiconductor layer being an emitter doped layer; a second doped semiconductor layer disposed on the second regions; the second doped semiconductor layer and the first doped semiconductor layer being opposite in conductive type; a passivation layer disposed on the first doped semiconductor layer, the second doped semiconductor layer and the interval regions; wherein the interval regions comprise first sub-regions adjacent to the first doped semiconductor layer and second sub-regions adjacent to the second doped semiconductor layer; in a side of the passivation layer facing away from the semiconductor substrate, a surface reflectivity of a portion corresponding to the first sub-regions is less than a surface reflectivity of a portion corresponding to the second sub-regions; in the side of the passivation layer facing away from the semiconductor substrate, a surface corresponding to the first sub-regions and a surface corresponding to the second sub-regions have a texture structure, and the texture structure of the surface corresponding to the first sub-regions and the surface corresponding to the second sub-regions comprises a polishing-like texture structure or a suede-like texture structure.

2. The back contact cell of claim 1, wherein, In at least one of the interval regions, an area of the first sub-regions is greater than an area of the second sub-regions.

3. The back contact cell of claim 1, wherein, In the side of the passivation layer facing away from the semiconductor substrate, a one-dimensional size of the texture structure in the surface corresponding to the first sub-regions is different from a one-dimensional size of the texture structure in the surface corresponding to the second sub-regions; and / or, a distribution density of the texture structure in the surface corresponding to the first sub-regions is different from a distribution density of the texture structure in the surface corresponding to the second sub-regions; and / or, a one-dimensional size uniformity of the texture structure in the surface corresponding to the first sub-regions is greater than a one-dimensional size uniformity of the texture structure in the surface corresponding to the second sub-regions.

4. The back contact cell of claim 3, wherein, The surface corresponding to the first sub-regions and the surface corresponding to the second sub-regions having the texture structure comprises a pyramidal-like structure; In the side of the passivation layer facing away from the semiconductor substrate, a distribution density of the pyramidal-like structure in the surface corresponding to the first sub-regions is greater than a distribution density of the pyramidal-like structure in the surface corresponding to the second sub-regions; and / or, a one-dimensional size of the pyramidal-like structure in the surface corresponding to the first sub-regions is less than a one-dimensional size of the pyramidal-like structure in the surface corresponding to the second sub-regions; and / or, a one-dimensional size uniformity of the pyramidal-like structure in the surface corresponding to the first sub-regions is greater than a one-dimensional size uniformity of the pyramidal-like structure in the surface corresponding to the second sub-regions.

5. The back contact cell of claim 1, wherein, In the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the first sub-regions having the texture structure comprises a pyramidal-like structure, and the surface corresponding to the second sub-regions having the texture structure comprises a tower base-like structure and a pyramidal-like structure.

6. The back contact cell of claim 5, wherein, In the side of the passivation layer facing away from the semiconductor substrate, the surface of at least one of the pyramid-like structures within the surface corresponding to the second sub-region has the pyramid-like structures in a discrete distribution.

7. The back contact cell of claim 1, wherein, In the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the second sub-region is recessed into the semiconductor substrate relative to the surface corresponding to the first sub-region.

8. The back contact cell of claim 1, wherein, In the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the second sub-region comprises a planar region and a textured region.

9. The back contact cell according to any of claims 1 to 8, wherein, The first surface has a boundary, and the first surface further comprises an isolation region; the isolation region is located between the boundary and the first region, and between the boundary and the second region; In the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the isolation region has a surface reflectivity greater than the surface reflectivity of the portion corresponding to the first sub-region; and / or, the surface reflectivity of the second surface is less than the surface reflectivity of the portion corresponding to the isolation region.

10. The back contact cell of claim 9, wherein, In the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the isolation region has a textured structure, and the textured structure of the surface corresponding to the first sub-region, the surface corresponding to the second sub-region, and the surface corresponding to the isolation region comprises pyramid-like structures; The apex angle of the pyramid-like structures within the surface corresponding to the isolation region is greater than the apex angle of the pyramid-like structures within the surface corresponding to the first sub-region and the surface corresponding to the second sub-region.

11. The back contact cell of claim 9, wherein, In the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the isolation region has a textured structure, and the textured structure of the surface corresponding to the isolation region in the side of the passivation layer facing away from the semiconductor substrate comprises pyramid-like structures; The apex angle of the pyramid-like structures within the second surface is less than the apex angle of the pyramid-like structures within the surface corresponding to the isolation region in the side of the passivation layer facing away from the semiconductor substrate.

12. The back contact cell of any of claims 1-8, wherein, The back contact cell comprises a plurality of sub-cell units distributed in a direction perpendicular to the arrangement direction of the first region and the second region; between two adjacent sub-cell units, there is a scribe lane region; the scribe lane region is provided with an alignment mark.

13. The back contact cell of claim 12, wherein, In the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the scribe lane region has a textured structure, and within the surface corresponding to the scribe lane region, the distribution density of the textured structure on the surface of the region close to the alignment mark is greater than the distribution density of the textured structure on the surface of the remaining region.

14. A photovoltaic module, characterized by, The back contact cell comprises a plurality of sub-cell units distributed in a direction perpendicular to the arrangement direction of the first region and the second region; between two adjacent sub-cell units, there is a scribe lane region; the scribe lane region is provided with an alignment mark. In the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the scribe lane region has a textured structure, and within the surface corresponding to the scribe lane region, the distribution density of the textured structure on the surface of the region close to the alignment mark is greater than the distribution density of the textured structure on the surface of the remaining region. The back contact cell comprises a plurality of sub-cell units distributed in a direction perpendicular to the arrangement direction of the first region and the second region; between two adjacent sub-cell units, there is a scribe lane region; the scribe lane region is provided with an alignment mark.

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