Resistor unit, amplifier, data acquisition system and data processing method

Abstract

The embodiment of the invention provides a resistor unit, an amplifier, a data acquisition system and a data processing method, and belongs to the technical field of chips. The resistor unit comprises at least two P-type polycrystalline silicon resistors with the same resistance value and at least two N-type polycrystalline silicon resistors with the same resistance value, and the number of the P-type polycrystalline silicon resistors is equal to that of the N-type polycrystalline silicon resistors. The P-type polycrystalline silicon resistor and the N-type polycrystalline silicon resistor are connected in series to form a resistor unit which is symmetrical about an intermediate node, and the resistance value of the P-type polycrystalline silicon resistor and the resistance value of the N-type polycrystalline silicon resistor can be adjusted so as to eliminate nonlinear errors caused by the polycrystalline silicon resistors through the field effect complementary effect between the P-type polycrystalline silicon resistor and the N-type polycrystalline silicon resistor. According to the embodiment of the invention, by utilizing the physical property of the polycrystalline silicon resistor, the nonlinear error caused by the polycrystalline silicon resistor in the circuit is eliminated, the reliability is good, and the universality is wide.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and particularly to a resistance unit, an amplifier, a data acquisition system, and a data processing method. Background Art

[0002] In the fields of data acquisition, industrial control, measurement technology, etc., sensors are required to collect analog signals, and then an analog-to-digital converter (ADC) is used to quantize the collected signals to realize the digitization of information in the real world. Between the sensor and the ADC, an amplifier module is usually required to condition the voltage and current signals output by the sensor to an amplitude and common mode suitable for the ADC to receive, and provide the ability to drive the ADC to sample the signals.

[0003] To achieve better signal-to-noise ratio and anti-interference ability, the ADC is usually designed with a differential input structure, while the sensor usually outputs a voltage or current signal in a single-ended output form. Therefore, a fully differential operational amplifier is usually used between the sensor and the ADC to realize the function of converting single-ended input to differential output. Figure 1 A typical single-ended to differential amplification circuit is shown. Generally, R1 = R2 and R3 = R4 are set, and the differential output voltage V OUT = V OUTP - V OUTN =(R3 / R1)·V IN .

[0004] Currently, more and more ADC chips integrate analog front-end circuits inside the chip, that is, the amplifier circuit for conditioning analog signals and the ADC circuit for realizing analog-to-digital conversion are fabricated on the same chip, which can provide great convenience for the design of data acquisition systems. In common integrated circuit manufacturing processes such as CMOS and BCD, resistors are usually implemented using polysilicon (Poly-Silicon) resistor devices.

[0005] The polysilicon resistor in the integrated circuit is made of polysilicon deposited on the oxide layer of the wafer. When the chip is powered on and working, the substrate (P-sub / N-sub) of the wafer is usually connected to 0V or VCC voltage. Thus, a voltage difference will be formed between the polysilicon and the substrate, and this voltage will have a slight impact on the resistance value of the polysilicon resistor through the field effect. Usually, this impact can be ignored. However, in the application of high-precision data acquisition, when the input voltage swing of the amplifier is very large, for example, in industrial control applications, the swing of the analog single-ended input signal can reach more than ±10V. Figure 1The voltages across resistors R1 to R4 will also vary within a wide range. At this time, due to the relatively large change in the resistance value caused by the change in the voltage of the polysilicon resistor, and the different amplitudes of the voltage changes across resistor pairs R1, R2 and resistor pairs R3, R4, non-negligible non-linear distortion will be caused in the output signal, affecting the accuracy of the data acquisition system.

[0006] Regarding this problem, in the prior art, a digital calibration method is usually adopted to eliminate the distortion caused by resistor non-linearity. The digital calibration method calculates the ADC conversion result and a preset error compensation coefficient through the digital circuit on the chip to obtain the final output digital code, eliminating the distortion caused by resistor non-linearity in the conversion result. However, the digital calibration method has at least two disadvantages: one disadvantage is that the fixed-point calculation process of the digital circuit will sacrifice the accuracy of a certain range of floating-point numbers, resulting in a decrease in the accuracy of the ADC output; another disadvantage is that digital calibration requires an increase in the conversion time of data acquisition and the chip area overhead. For the other disadvantage here, the specific reason is that: the digital calibration operation requires complex mathematical calculations such as data squaring terms and multiple multiplications, consuming a long time and extending the total time of the data acquisition system in one analog-to-digital conversion cycle; digital calibration also requires adding more digital circuits and non-volatile memories in the chip to record the parameters required for error compensation processing, increasing the area and cost of the chip. Therefore, for a multi-channel data acquisition system, especially a multi-channel synchronous sampling system, the ADC conversion results of each channel need to be individually digitally calibrated, and the calibration time or chip area overhead will increase exponentially with the increase in the number of channels. Summary of the Invention

[0007] An object of the embodiments of the present invention is to provide a resistor unit, an amplifier, a data acquisition system, and a data processing method, which are used to at least partially solve the above technical problems.

[0008] To achieve the above object, an embodiment of the present invention provides a resistor unit, including at least two P-type polysilicon resistors with the same resistance value and at least two N-type polysilicon resistors with the same resistance value. The number of the P-type polysilicon resistors is equal to that of the N-type polysilicon resistors, and the P-type polysilicon resistors and the N-type polysilicon resistors are connected in series to form a resistor unit symmetrical about a middle node. Moreover, the resistance values of the P-type polysilicon resistors and the N-type polysilicon resistors can be adjusted to eliminate the non-linear error caused by the polysilicon resistor through the complementary effect of the field effect between the two.

[0009] Optionally, the resistance values of the P-type polysilicon resistors and the N-type polysilicon resistors can be adjusted as follows:

[0010]

[0011] Wherein, R0P represents the resistance value of the P-type polysilicon resistor, R 0N represents the resistance value of the N-type polysilicon resistor, c 1p is the first-order voltage coefficient of the P-type polysilicon resistor, c 1n is the first-order voltage coefficient of the N-type polysilicon resistor.

[0012] On the other hand, an embodiment of the present invention further provides an amplifier, and the amplifier uses any of the above resistance units as an input resistance and / or a feedback resistance.

[0013] On the other hand, an embodiment of the present invention further provides a data acquisition system, including two groups of sampling channels accessing the same input signal, and each group of sampling channels includes: the above amplifier for accessing and amplifying the input signal to obtain a corresponding amplified signal; and an analog-to-digital converter for accessing and performing analog-to-digital conversion on the amplified signal.

[0014] On the other hand, an embodiment of the present invention further provides a data acquisition system, including two groups of sampling channels accessing the same input signal, and each group of sampling channels includes: an amplifier for accessing and amplifying the input signal to obtain a corresponding amplified signal; and an analog-to-digital converter for accessing and performing analog-to-digital conversion on the amplified signal. Wherein, the amplifier uses the same type of polysilicon resistor as the input resistance and the feedback resistance, and the amplifiers in different sampling channels use different types of polysilicon resistors. Wherein, the types of the polysilicon resistors include P-type polysilicon resistors and N-type polysilicon resistors, and the resistance values of the P-type polysilicon resistors and the N-type polysilicon resistors can be adjusted to eliminate the non-linear error caused by the polysilicon resistors through the field effect complementary action between the two.

[0015] Optionally, the two sets of sampling channels are a first sampling channel and a second sampling channel. Among them, the amplifier of the first sampling channel includes: a first P-type polysilicon resistor RP1 serving as the input resistor of the positive input terminal, a second P-type polysilicon resistor RP2 serving as the input resistor of the negative input terminal, a third P-type polysilicon resistor RP3 serving as the feedback resistor of the positive input terminal, and a fourth P-type polysilicon resistor RP4 serving as the feedback resistor of the negative input terminal. Among them, the amplifier of the second sampling channel includes: a first N-type polysilicon resistor RN1 serving as the input resistor of the positive input terminal, a second N-type polysilicon resistor RN2 serving as the input resistor of the negative input terminal, a third N-type polysilicon resistor RN3 serving as the feedback resistor of the positive input terminal, and a fourth N-type polysilicon resistor RN4 serving as the feedback resistor of the negative input terminal. Among them, the resistance values of the first P-type polysilicon resistor RP1 and the second P-type polysilicon resistor RP2 are equal, the resistance values of the third P-type polysilicon resistor RP3 and the fourth P-type polysilicon resistor RP4 are equal, the resistance values of the first N-type polysilicon resistor RN1 and the second N-type polysilicon resistor RN2 are equal, the resistance values of the third N-type polysilicon resistor RN3 and the fourth N-type polysilicon resistor RN4 are equal, and the resistance ratio of the first P-type polysilicon resistor RP1 to the third P-type polysilicon resistor RP3 is equal to the resistance ratio of the first N-type polysilicon resistor RN1 to the third N-type polysilicon resistor RN3.

[0016] Optionally, the data acquisition system further includes: a digital signal processing module, configured to obtain a first digital signal and a second digital signal respectively output by the analog-to-digital converters of the first sampling channel and the second sampling channel, and perform signal processing based on a preset algorithm to output a final digital signal without the non-linear error.

[0017] Optionally, the preset algorithm is configured to: when the absolute value of the difference between the first digital signal and the second digital signal is less than a preset sampling error limit value, calculate the final digital signal based on the first digital signal, the second digital signal, and an operation factor associated with the voltage coefficient of the polysilicon resistor.

[0018] Optionally, the final digital signal is calculated using the following formula:

[0019]

[0020]

[0021] In the formula, D OUT represents the final digital signal, D OUT1 and D OUT2 respectively represent the first digital signal and the second digital signal, and a1 and a2 are D OUT1 and DOUT2 The corresponding operation factors, c 1p is the first-order voltage coefficient of the P-type polysilicon resistor, c 1n is the first-order voltage coefficient of the N-type polysilicon resistor.

[0022] On the other hand, an embodiment of the present invention further provides a data processing method, including: obtaining first digital signals and second digital signals respectively output by analog-to-digital converters of the first sampling channel and the second sampling channel; and when the difference between the first digital signal and the second digital signal is less than a preset sampling error limit, using the above formulas for D OUT and a1, a2 to calculate the final digital signal output by the data acquisition system.

[0023] Through the above technical solutions, the embodiment of the present invention utilizes the physical properties of the polysilicon resistor itself to eliminate the non-linear error caused by the polysilicon resistor, which can not only shorten the analog-to-digital conversion period of the data acquisition system, but also will not cause an increase in the resistor area, and has good reliability and wide versatility.

[0024] Other features and advantages of the embodiments of the present invention will be described in detail in the subsequent specific implementation part. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The drawings are used to provide a further understanding of the embodiments of the present invention, and constitute a part of the specification, and are used to explain the embodiments of the present invention together with the following specific implementation manners, but do not constitute a limitation to the embodiments of the present invention. In the drawings:

[0026] Figure 1 is a schematic structural diagram of a typical single-ended to differential amplifier circuit;

[0027] Figure 2 is a schematic diagram of the principle of the change of the carrier concentration of the P-type polysilicon resistor with the resistor voltage;

[0028] Figure 3 is a schematic diagram of the principle of the change of the carrier concentration of the N-type polysilicon resistor with the resistor voltage;

[0029] Figure 4 is a schematic structural diagram of the resistor unit of the embodiment of the present invention;

[0030] Figure 5 is a schematic structural diagram of the single-ended to differential amplifier of the embodiment of the present invention;

[0031] Figure 6 is a schematic structural diagram of a data acquisition system of the embodiment of the present invention;

[0032] Figure 7 is a schematic structural diagram of another data acquisition system of the embodiment of the present invention;

[0033] Figure 8 is the operation flowchart of the digital signal processing module in the example of the embodiment of the present invention;

[0034] Figure 9 is the schematic flowchart of the data processing method of the embodiment of the present invention;

[0035] Figure 10 is the schematic structural diagram of the data processing device of the embodiment of the present invention; and

[0036] Figure 11 is the schematic structural diagram of another data processing device of the embodiment of the present invention. Detailed implementation manners

[0037] The following will describe in detail the specific implementation manners of the embodiments of the present invention with reference to the accompanying drawings. It should be understood that the specific implementation manners described herein are only used to illustrate and explain the embodiments of the present invention, and are not used to limit the embodiments of the present invention.

[0038] Before specifically introducing the embodiments of the present invention, the principle of the resistance change of different types of polysilicon resistors under the action of an electric field will be introduced here, so that those skilled in the art can better understand the embodiments of the present invention. However, it should be noted that although the corresponding principle objectively exists, based on the technical problems found in the prior art, the inventors of the present application creatively thought of implementing the solutions of the embodiments of the present invention based on the corresponding principle to solve the technical problems of the prior art, and this belongs to creative labor.

[0039] Figure 2 shows the schematic diagram of the principle of the change of the carrier concentration of the P-type polysilicon resistor with the resistance voltage, which is for the "P-type polysilicon resistor - SiO 2 field oxide layer - P-type silicon substrate" structure. In P-type polysilicon, the carriers that play a conductive role are holes. When the voltage across the resistor increases, the energy band of the P-type polysilicon bends more significantly upward, and the Fermi level becomes closer to the valence band E V , so the hole concentration in the P-type polysilicon becomes larger. For P-type polysilicon, the relationship between the resistivity ρ and the hole concentration is:

[0040]

[0041] where μ pis the hole mobility, and p is the hole concentration. Therefore, the greater the voltage across the P-type polysilicon resistor, the greater the hole concentration, the smaller the resistance value, and it has a negative voltage coefficient. In the common analog integrated circuit manufacturing process, the field oxide layer thickness is relatively large (about 300 nm), and the change in the polysilicon resistor value caused by a voltage change of about 10 V across the resistor is very small relative to the total resistance value. The relationship between the size of the P-type polysilicon resistor and the voltage can be approximately expressed as:

[0042]

[0043] where R 0 is the resistance value when there is no voltage difference between the resistor and the substrate, R is the resistance value when there is a voltage difference between the resistor and the substrate, V 1 and V 2 are the voltages across the resistor, V SUB is the voltage of the silicon substrate, c 1p is the first-order voltage coefficient of the P-type polysilicon resistor. And according to the negative voltage coefficient of the P-type polysilicon resistor mentioned above, it can be known that c 1p < 0.

[0044] Figure 3 shows the schematic diagram of the change in the carrier concentration of the N-type polysilicon resistor with the resistor voltage, which is for the "N-type polysilicon resistor - SiO 2 field oxide layer - P-type silicon substrate" structure. In N-type polysilicon, the carriers that play a conductive role are electrons. When the voltage across the resistor increases, the energy band of the N-type polysilicon bends upward more significantly, and the Fermi level becomes farther from the conduction band. Therefore, the electron concentration in the N-type polysilicon decreases. For N-type polysilicon, the relationship between the resistivity ρ and the electron concentration is:

[0045]

[0046] where μ n is the electron mobility, and n is the electron concentration. Therefore, the greater the voltage across the N-type polysilicon resistor, the smaller the electron concentration, the greater the resistance value, and it has a positive voltage coefficient. In the common analog integrated circuit manufacturing process, the field oxide layer thickness is relatively large (about 300 nm), and the change in the polysilicon resistor value caused by a voltage change of about 10 V across the resistor is very small relative to the total resistance value. The relationship between the size of the N-type polysilicon resistor and the voltage can be approximately expressed as:

[0047]

[0048] where, R 0 is the resistance value when there is no voltage difference between the resistor and the substrate, R is the resistance value when there is a voltage difference between the resistor and the substrate, V 1 and V 2 are the voltages across the resistor, VSUB is the voltage of the silicon substrate, c 1n is the first-order voltage coefficient of the N-type polysilicon resistor, and according to the fact that the N-type polysilicon resistor mentioned above has a positive voltage coefficient, it can be known that c 1n > 0.

[0049] By comparison, it is easy to know that the P-type polysilicon resistor and the N-type polysilicon resistor have the characteristic of complementary voltage coefficients under the action of an electric field. Therefore, this characteristic can be used to design a high-linearity resistor unit with a zero voltage coefficient, that is, the resistance value of the resistor unit does not change with the voltage. Moreover, a high-linearity amplifier and a high-linearity data acquisition system can be further designed. It should be noted that, for the convenience of description, in the embodiments of the present invention, the characteristic that the P-type polysilicon resistor and the N-type polysilicon resistor have complementary voltage coefficients under the action of an electric field is defined as the field effect complementary action.

[0050] Embodiment 1

[0051] Embodiment 1 of the present invention provides a resistor unit designed by using the above-mentioned field effect complementary action, which includes at least two P-type polysilicon resistors with the same resistance value and at least two N-type polysilicon resistors with the same resistance value. The number of the P-type polysilicon resistors is equal to that of the N-type polysilicon resistors, and the P-type polysilicon resistors and the N-type polysilicon resistors are connected in series to form a resistor unit symmetrical about the middle node. Moreover, the resistance values of the P-type polysilicon resistors and the N-type polysilicon resistors can be adjusted to eliminate the non-linear error caused by the polysilicon resistor through the field effect complementary action between the two.

[0052] For example, as Figure 4 shown, when two P-type polysilicon resistors RP1, RP2 and two N-type polysilicon resistors RN1, RN2 are adopted, the resistor unit is connected in series in the order of P-N-N-P, where RP1 = RP2 and RN1 = RN2. It should be noted that, for the sake of concise description, in the embodiments of the present invention, the resistance labels involved in the drawings can be used to represent the corresponding resistance values, which is also a common usage in the art.

[0053] In addition to Figure 4 the shown P-N-N-P order, N-P-P-N can also be adopted. For a larger number of polysilicon resistors, such as six, the resistor unit can also adopt series orders such as P-N-P-P-N-P, N-P-N-N-P-N, etc. That is, the specific feature of the resistor unit in Embodiment 1 of the present invention is that its connection structure is symmetrical about its middle node, as Figure 4 is symmetrical about the middle node C in

[0054] Next, for the example of Figure 4 , it is further illustrated how to make the resistor unit have a zero voltage coefficient, that is, its total resistance does not change with the resistor voltage.

[0055] Assume that the voltages across the resistor unit are V A ( Figure 4 at point A in E ( Figure 4 and V 0P at point E in 0N . When the voltage across the resistor is 0V and the voltage of the silicon substrate below the resistor is 0V, let RP1 = RP2 = R A and RN1 = RN2 = R E . According to the above equations (2) and (4), the relationship between the total resistance of the resistor unit and the voltages V

[0056]

[0057] across the resistor can be calculated as follows: total where R A ~V E represent the voltages at the corresponding nodes respectively. Since c 1p and c 1n are much less than 1, the voltage changes of V B , V C , V D caused by the change of the resistance value with voltage are also much less than their voltage magnitudes. Therefore, the voltage deviations of V B , V C , V D caused by the non-linearity of the resistor can be ignored, and equation (5) can be further simplified as:

[0058]

[0059] According to formula (6), if R 0P c 1p +R 0N c 1n = 0, then the total resistance R total of the resistor unit is R 0P = 2(R 0N +R

[0060] Therefore, by adjusting the resistance values of the series-connected P-type polysilicon resistor and N-type polysilicon resistor in the resistor unit, the condition can be satisfied:

[0061]

[0062] In this way, a high-linearity resistor unit with zero voltage coefficient is obtained, which can eliminate the non-linear error caused by the polysilicon resistor.

[0063] In summary, in the embodiments of the present invention, by utilizing the different behaviors of P-type polysilicon resistors and N-type polysilicon resistors under the field effect of an applied voltage, the P-type polysilicon resistors and N-type polysilicon resistors are connected in series according to a certain proportional relationship to form a resistor unit whose resistance value does not change with the voltage across the resistor. This resistor unit eliminates the error caused by resistor non-linearity in the analog domain, and there is no need to calibrate the non-linear error component in the output result through digital circuit operations, which can shorten the analog-to-digital conversion cycle of the data acquisition system. Moreover, in many processes, the P-type polysilicon resistors and N-type polysilicon resistors are preset to have similar sheet resistance values. Therefore, using a resistor unit composed of a combination of P-type and N-type polysilicon instead of a single P-type polysilicon resistor or N-type polysilicon resistor will not cause an increase in the resistor area. Additionally, by utilizing the physical properties of the semiconductor itself, compensation for resistor non-linear errors can be achieved without adding additional memory or other types of analog circuits, with good reliability and wide generality.

[0064] Therefore, due to its unique advantages, the resistor unit of the embodiments of the present invention can be applied to electronic devices such as amplifiers with high requirements for data accuracy.

[0065] Embodiment 2

[0066] As described above, the resistor unit of Embodiment 1 of the present invention can be applied to an amplifier. In this regard, Embodiment 2 of the present invention proposes an amplifier that uses the high-linearity resistor unit of Embodiment 1 to replace the resistor in the amplifier to achieve the design of a high-linearity amplifier, that is, using the resistor unit described in Embodiment 1 as the input resistor and / or feedback resistor of the amplifier.

[0067] For example, for a single-ended to differential amplifier, a first resistor unit is connected to its positive input terminal and negative input terminal respectively, and a second resistor unit is connected to its positive feedback terminal and negative feedback terminal respectively, and the first resistor unit and the second resistor unit use P-type polysilicon resistors with different resistance values and N-type polysilicon resistors with different resistance values.

[0068] Further for example, as Figure 5 shown in the single-ended to differential amplifier, P-type polysilicon resistors RP1, N-type polysilicon resistors RN1, N-type polysilicon resistors RN1, and P-type polysilicon resistors RP1 are connected in sequence, and the composed resistor unit is used as the input resistor of the amplifier; P-type polysilicon resistors RP2, N-type polysilicon resistors RN2, N-type polysilicon resistors RN2, and P-type polysilicon resistors RP2 are connected in sequence, and the composed resistor unit is used as the feedback resistor of the amplifier. That is, Figure 5The single-ended to differential amplifier includes a first resistor unit and a second resistor unit. The first resistor unit includes a first P-type polysilicon resistor RP1, a first N-type polysilicon resistor RN1, a first N-type polysilicon resistor RN1, and a first P-type polysilicon resistor RP1 connected in series in sequence. The second resistor unit includes a second P-type polysilicon resistor RP2, a second N-type polysilicon resistor RN2, a second N-type polysilicon resistor RN2, and a second P-type polysilicon resistor RP2 connected in series in sequence.

[0069] And, R P1 、R P2 、R N1 、R N2 Satisfy the following conditions:

[0070]

[0071]

[0072] Among them, R P1 Represents the resistance value of the first P-type polysilicon resistor RP1, R N1 Represents the resistance value of the first N-type polysilicon resistor RN1, R P2 Represents the resistance value of the second P-type polysilicon resistor RP2, R N2 Represents the resistance value of the second N-type polysilicon resistor RN2, c 1p Is the first-order voltage coefficient of the P-type polysilicon resistor, c 1n Is the first-order voltage coefficient of the N-type polysilicon resistor.

[0073] When the amplifier circuit is working, although the resistance value of each resistor will deviate with the change of the input signal V IN , the total resistance value of the resistor unit composed of every 4 polysilicon resistors remains fixed. That is, the resistor unit has a zero voltage coefficient. Even if the amplitude of the V IN signal is very large, it will not affect the total resistance value of the resistor unit. Since the resistance values of the input resistor and the feedback resistor are not affected by voltage, the single-ended to differential amplifier can also maintain a very high linearity when processing wide-swing signals.

[0074] In this way, the embodiment of the present invention obtains an amplifier that can support wide-swing input based on a high-linearity resistor unit, which eliminates the error caused by resistor nonlinearity in the analog domain. When applied to a data acquisition system, it will not increase the analog-to-digital conversion cycle of the data acquisition system, nor will it increase the area of the circuit.

[0075] Embodiment Three

[0076] As described above, the amplifier according to the second embodiment of the present invention can be applied to a data acquisition system. In this regard, the third embodiment of the present invention provides a data acquisition system, which includes two sets of sampling channels (also referred to as ADC channels) for accessing the same input signal, and each set of sampling channels includes: an amplifier according to the second embodiment, configured to access and amplify the input signal to obtain a corresponding amplified signal; and an analog-to-digital converter, configured to access and perform analog-to-digital conversion on the amplified signal.

[0077] For example, Figure 6 shows a data acquisition system using Figure 5 the wide-swing high-linearity amplifier shown. The design idea of this data acquisition system is: in some applications with very high reliability requirements, such as power line protection and monitoring systems, in order to ensure the correctness of data acquisition, dual redundant sampling (analog dual redundancy) is set in the data acquisition system, that is, two independent ADC channels are used to perform analog-to-digital conversion on the same signal, which can avoid system misjudgment in the case of a failure of one ADC channel and greatly reduce the failure rate of the entire system. And Figure 6 the data acquisition system Figure 5 further uses the wide-swing high-linearity amplifier shown to eliminate the error caused by the nonlinearity of the resistor, thus having the dual advantages of redundant sampling and high sampling accuracy.

[0078] Furthermore, as Figure 6 shown, the data acquisition system may further include: a digital signal processing module, configured to obtain the digital signals respectively output by the analog-to-digital converters of the two sets of sampling channels, and perform signal processing based on a preset algorithm to output the required final digital signal. Among them, the preset algorithm can be configured according to data processing requirements, such as configuring a filtering algorithm.

[0079] Embodiment Four

[0080] In the above-mentioned Embodiment One, Embodiment Two, and Embodiment Three, the field effect complementary effect between P-type polysilicon resistors and N-type polysilicon resistors is utilized. And for the dual redundant sampling mentioned in Embodiment Three, Embodiment Four further designs another data acquisition system by using the field effect complementary effect.

[0081] The data acquisition system according to the fourth embodiment of the present invention includes two sets of sampling channels accessing the same input signal, and each set of sampling channels includes: an amplifier for accessing and amplifying the input signal to obtain a corresponding amplified signal; and an analog-to-digital converter for accessing and performing analog-to-digital conversion on the amplified signal. Wherein, the amplifier uses polysilicon resistors of the same type as the input resistor and the feedback resistor, and the amplifiers in different sampling channels use polysilicon resistors of different types. Wherein, the types of the polysilicon resistors include P-type polysilicon resistors and N-type polysilicon resistors, and the resistance values of the P-type polysilicon resistors and the N-type polysilicon resistors can be adjusted to eliminate the non-linear error caused by the polysilicon resistors through the complementary effect of the field effect between the two.

[0082] For example, Figure 7 is the corresponding one of the fourth embodiment of the present invention Figure 6 Another structural schematic diagram of the data acquisition system. As Figure 7 shown, the fully differential operational amplifier AMP1, the analog-to-digital converter ADC1, and the resistors RP1 to RP4 form the first sampling channel. RP1 to RP4 are P-type polysilicon resistors, and satisfy the relationship RP1 = RP2, RP3 = RP4; the fully differential operational amplifier AMP2, the analog-to-digital converter ADC2, and the resistors RN1 to RN4 form the second sampling channel. RN1 to RN4 are N-type polysilicon resistors, and satisfy the relationship RN1 = RN2, RN3 = RN4. The resistors in the first sampling channel and the second sampling channel satisfy the relationship RP1 / RP3 = RN1 / RN3 to ensure that the two sampling channels have the same gain.

[0083] In addition, V IN is the analog input signal of the data acquisition system; D OUT1 is the digital output result after the first sampling channel processes the analog input signal V IN , denoted as the first digital signal; D OUT2 is the digital output result after the second sampling channel processes the analog input signal V IN , denoted as the second digital signal; D OUT1 and D OUT2 are input to the digital signal processing module, and after logical judgment and linear operation, the output signal D OUT , D OUT is the final output of the data acquisition system, and thus is also called the final digital signal.

[0084] In a preferred embodiment, for the above digital signal processing module, as a part of the data acquisition system, it is configured to obtain the first digital signal D OUT1 and the second digital signal D OUT2 , and perform signal processing based on a preset algorithm to output the final digital signal D without the non-linear errorOUT 。

[0085] In this regard, in a more preferred embodiment, the preset algorithm is configured to: when the absolute value of the difference between the first digital signal D OUT1 and the second digital signal D OUT2 is less than the preset sampling error limit, based on the first digital signal D OUT1 , the second digital signal D OUT2 and the operation factor associated with the voltage coefficient of the polysilicon resistor, calculate the final digital signal D OUT 。

[0086] The implementation of this preset algorithm will be introduced below through specific examples. Specifically, Figure 8 is the operation flowchart of the digital signal processing module in the example of the embodiment of the present invention. As Figure 8 shown, the specific operation process may include the following steps:

[0087] Step S1, judge D OUT1 and D OUT2 . If |D OUT1 - D OUT2 | < E1, go to step S2; otherwise, output a fault alarm signal.

[0088] Among them, E1 is the preset sampling error limit, which represents the maximum value that the analog-to-digital conversion results may differ due to noise and system errors when both sampling channels are working properly. The first sampling channel and the second sampling channel process the same analog input signal and have the same gain. If the absolute value of (D OUT1 - D OUT2 ) is greater than the preset sampling error limit E1, it means that at least one sampling channel has a fault.

[0089] Step S2, perform a linear operation on D OUT1 and D OUT2 to output D OUT 。

[0090] For example, calculate the output result D OUT of the data acquisition system according to the following formula:

[0091]

[0092] In the formula, a1 and a2 are operation factors associated with the voltage coefficient of the polysilicon resistor, and preferably satisfy the conditions of the following formula (11) to ensure the fixed-point operation accuracy of the entire data acquisition system by appropriately selecting the values of a1 and a2.

[0093]

[0094] where c 1p is the first-order voltage coefficient of the P-type polysilicon resistor, and c 1n is the first-order voltage coefficient of the N-type polysilicon resistor.

[0095] Here, through Equations (10) and (11), the obtained D OUT does not contain the error (or distortion) caused by the resistor non-linearity, and this conclusion will be specifically explained below in combination with other drawings.

[0096] For Figure 1 the shown single-ended to differential amplifier circuit (abbreviation: operational amplifier), when the resistance value of the resistor changes with the voltages at both ends of the resistor and the substrate and satisfies the relationship shown in Equation (2) or Equation (4), the input-output relationship of the circuit can be calculated according to the functions of "virtual short" and "virtual open" of the operational amplifier as follows:

[0097]

[0098] In the formula, V OCM is the output common-mode voltage of the operational amplifier, and c is the first-order voltage coefficient of the resistor. Since c·V OCM <<1, the approximation in Equation (12) holds. According to Equation (12), it can be known that after the input signal V IN passes through the single-ended to differential amplifier, the output signal differs from the ideal value by an error voltage proportional to the square term of the input voltage. Therefore, D Figure 6 in OUT1 and D OUT2 can be denoted as the following formula:

[0099]

[0100] where D ideal is the ideal value of the analog-to-digital conversion result of the input signal V IN , and it is known that RP1 / RP3 = RN1 / RN3. Substituting Equation (11), Equation (13), and Equation (14) into Equation (10), the following formula is obtained:

[0101]

[0102] Therefore, according to the result of D OUT = D ideal shown in Equation (15), it can be known that through the setting of the resistance value of the resistor and the setting of the operation factor related to the voltage coefficient of the polysilicon resistor, the non-linear error has been eliminated through the operation. Therefore, the output result D OUT of the data acquisition system no longer contains the error caused by the resistor non-linearity, and high-reliability and high-linearity data acquisition are achieved.

[0103] From the above formula (10) and formula (11), it can be seen that the operations of the digital signal processing module in this embodiment are only addition and constant multiplication operations, and there is no complex operation such as square calculation, so compared with the traditional digital calibration algorithm, the circuit overhead is smaller, and the error caused by fixed-point calculation is also smaller. Moreover, for the system with double redundant sampling, in order to improve the reliability of data, the process of digital signal processing is indispensable, so the influence of the overhead increased by the digital processing process in this embodiment can be further ignored.

[0104] In this way, this embodiment provides a high-reliability and high-linearity data acquisition system, which uses different types of polysilicon resistors in the amplifier circuits of two independent channels, so that nonlinear errors of proportional magnitude appear in the output results of the two channels, and the errors are then eliminated through linear digital operations, thereby achieving high-reliability and high-linearity data acquisition of analog quantities.

[0105] The data acquisition system of this embodiment is further compared with the data acquisition system of the third embodiment. Figure 6 and Figure 7 , it can be seen Figure 7 The embodiment does not need to connect the P-type polysilicon resistor and the N-type polysilicon resistor in series in a specific order and size ratio, which simplifies the chip layout design. In some integrated circuit manufacturing processes, only one type of polysilicon resistor is provided, so it is impossible to Figure 6 The design of the embodiment in Figure 7 In the embodiment, the first sampling channel and the second sampling channel can use two different manufacturing processes, and each process only needs to have at least one type of polysilicon resistor. In addition, the advantage of using different designs for the two sampling channels is that it can avoid the same type of failure in the two channels caused by systematic errors in the process, which affects the system's judgment of the correctness of the data, and can further improve the robustness of the data acquisition system. Therefore, Figure 7 The embodiments in the present invention have better process applicability and reliability.

[0106] Embodiment 5

[0107] against Figure 7 The fifth embodiment of the present invention further proposes a data processing method, such as Figure 9 As shown, it mainly includes the following steps:

[0108] Step S901 : acquiring a first digital signal and a second digital signal respectively output by analog-to-digital converters of the first sampling channel and the second sampling channel.

[0109] Step S902: performing signal processing on the first digital signal and the second digital signal based on a preset algorithm to output a final digital signal without the nonlinear error.

[0110] Specifically, when the difference between the first digital signal and the second digital signal is less than a preset sampling error limit, the final digital signal output by the data acquisition system is calculated.

[0111] For example, step S902 calculates the final digital signal using the above-mentioned equations (10) and (11). For the specific calculation process and other implementation details, reference can be made to the fourth embodiment above, and details will not be elaborated here.

[0112] It should be noted that this data processing method, if executed by Figure 7 the digital signal processing module in, is not limited thereto, and can also be executed by a dedicated processor according to requirements.

[0113] Embodiment Six

[0114] Based on the data processing method of Embodiment Five, Embodiment Six of the present invention provides a data processing device, as Figure 10 shown, including: a signal acquisition module for acquiring a first digital signal and a second digital signal respectively output by analog-to-digital converters of the first sampling channel and the second sampling channel; and a signal processing module for performing signal processing on the first digital signal and the second digital signal based on a preset algorithm to output a final digital signal without the non-linear error.

[0115] For implementation details and effects of this data processing device, reference can be made to Embodiment Five of the above data processing method, and details will not be elaborated here.

[0116] Embodiment Seven

[0117] Embodiment Seven of the present invention provides another data processing device, as Figure 11 shown, including: a memory storing a program or program unit that can run on a processor; and the processor configured to implement the data processing method of Embodiment Five when executing the program.

[0118] For implementation details and effects of this data processing device, reference can be made to Embodiment Five of the above data processing method, and details will not be elaborated here.

[0119] Embodiments of the present invention also provide a chip, including any one or more of the following: the resistor unit of Embodiment One above; the amplifier of Embodiment Two above; the data acquisition system of Embodiments Three and Four above; and the data processing devices of Embodiments Six and Seven above.

[0120] An embodiment of the present invention may further provide a machine-readable storage medium, on which instructions are stored for causing a machine to execute any of the above data processing methods. Wherein, the machine is, for example, a processor.

[0121] An embodiment of the present invention may further provide a processor, which is used to run a program. When the program runs, it executes the data processing method.

[0122] An embodiment of the present invention may further provide a device, which includes a processor, a memory, and a program stored on the memory and executable on the processor. When the processor executes the program, it implements the above data processing method. The device herein may be a server, a PC, a PAD, a mobile phone, etc.

[0123] An embodiment of the present invention may further provide a computer program product, which, when executed on a data processing device, is adapted to execute a program initialized with the steps of the above data processing method.

[0124] It can be understood that the above processor includes a kernel, and the kernel retrieves the corresponding program unit from the memory. One or more kernels can be set, and data processing is achieved by adjusting the kernel parameters.

[0125] The memory may include non-permanent memory in a computer-readable medium, in the form of random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash memory (flash RAM). The memory includes at least one storage chip.

[0126] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0127] The present application is described with reference to the flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of flows and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate for implementing in the process Figure 1 one process or multiple processes and / or blocksFigure 1 means for the functions specified in one or more boxes.

[0128] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to operate in a particular manner, such that the instructions stored in the computer-readable memory produce a manufacture including an instruction means that implements the functions specified in one Figure 1 one or more processes and / or boxes Figure 1 means for the functions specified in one or more boxes.

[0129] These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus, such that a series of operational steps are performed on the computer or other programmable apparatus to produce a computer-implemented process, whereby the instructions executed on the computer or other programmable apparatus provide steps for implementing the functions specified in one Figure 1 one or more processes and / or boxes Figure 1 means for the functions specified in one or more boxes.

[0130] In a typical configuration, a computing device includes one or more processors (CPUs), an input / output interface, a network interface, and memory.

[0131] The memory may include non-permanent memory in the form of computer-readable media, random access memory (RAM) and / or non-volatile memory such as read-only memory (ROM) or flash memory (flash RAM). The memory is an example of computer-readable media.

[0132] Computer-readable media includes both permanent and non-permanent, removable and non-removable media implemented by any method or technology for storing information. The information may be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital versatile discs (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices, or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory computer-readable media such as modulated data signals and carrier waves.

[0133] It should also be noted that the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, commodity or device comprising a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, commodity or device. Without further limitation, an element defined by the phrase "comprising an..." does not exclude the presence of additional identical elements in the process, method, commodity or device comprising the element.

[0134] The above are only embodiments of the present application and are not used to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and scope of the present application shall be included within the scope of the claims of the present application.

Claims

1. A resistor unit, characterized in that: The invention comprises at least two P-type polysilicon resistors having the same resistance value and at least two N-type polysilicon resistors having the same resistance value, wherein the number of the P-type polysilicon resistors and the N-type polysilicon resistors are equal, and the P-type polysilicon resistors and the N-type polysilicon resistors are connected in series to form a resistance unit which is symmetrical about an intermediate node, and the resistance values ​​of the P-type polysilicon resistors and the N-type polysilicon resistors can be adjusted to eliminate the nonlinear error caused by the polysilicon resistors through the complementary field effect between the two.

2. The resistor unit according to claim 1, characterized in that: The resistance values ​​of the P-type polysilicon resistor and the N-type polysilicon resistor can be adjusted as follows: Among them, R 0P Represents the resistance value of the P-type polysilicon resistor, R 0N represents the resistance value of the N-type polysilicon resistor, c 1p is the first-order voltage coefficient of the P-type polysilicon resistor, c 1n is the first-order voltage coefficient of the N-type polysilicon resistor.

3. An amplifier, characterized in that: The amplifier uses the resistor unit described in claim 1 or 2 as an input resistor and / or a feedback resistor.

4. A data acquisition system, characterized in that: The method comprises two groups of sampling channels connected to the same input signal, and each group of sampling channels comprises: The amplifier of claim 3, used to receive and amplify the input signal to obtain a corresponding amplified signal; and The analog-to-digital converter is used to access and perform analog-to-digital conversion on the amplified signal.

5. A data acquisition system, characterized in that: The method comprises two groups of sampling channels connected to the same input signal, and each group of sampling channels comprises: an amplifier, used to receive and amplify the input signal to obtain a corresponding amplified signal; and An analog-to-digital converter, used for accessing and performing analog-to-digital conversion on the amplified signal; Wherein, the amplifier uses the same type of polysilicon resistors as input resistors and feedback resistors, and the amplifiers in different sampling channels use different types of polysilicon resistors; Among them, the types of the polysilicon resistors include P-type polysilicon resistors and N-type polysilicon resistors, and the resistance values ​​of the P-type polysilicon resistors and the N-type polysilicon resistors can be adjusted to eliminate the nonlinear error caused by the polysilicon resistors through the complementary field effect between the two.

6. The data acquisition system according to claim 5, characterized in that: The two groups of sampling channels are a first sampling channel and a second sampling channel; The amplifier of the first sampling channel includes: a first P-type polysilicon resistor (RP1) as an input resistor of a positive input terminal, a second P-type polysilicon resistor (RP2) as an input resistor of a negative input terminal, a third P-type polysilicon resistor (RP3) as a feedback resistor of a positive input terminal, and a fourth P-type polysilicon resistor (RP4) as a feedback resistor of a negative input terminal; The amplifier of the second sampling channel includes: a first N-type polysilicon resistor (RN1) as an input resistor of a positive input terminal, a second N-type polysilicon resistor (RN2) as an input resistor of a negative input terminal, a third N-type polysilicon resistor (RN3) as a feedback resistor of the positive input terminal, and a fourth N-type polysilicon resistor (RN4) as a feedback resistor of the negative input terminal; Among them, the resistance values ​​of the first P-type polysilicon resistor (RP1) and the second P-type polysilicon resistor (RP2) are equal, the resistance values ​​of the third P-type polysilicon resistor (RP3) and the fourth P-type polysilicon resistor (RP4) are equal, the resistance values ​​of the first N-type polysilicon resistor (RN1) and the second N-type polysilicon resistor (RN2) are equal, the resistance values ​​of the third N-type polysilicon resistor (RN3) and the fourth N-type polysilicon resistor (RN4) are equal, and the resistance ratio of the first P-type polysilicon resistor (RP1) to the third P-type polysilicon resistor (RP3) is equal to the resistance ratio of the first N-type polysilicon resistor (RN1) to the third N-type polysilicon resistor (RN3).

7. The data acquisition system according to claim 6, characterized in that: The data acquisition system also includes: The digital signal processing module is used to obtain the first digital signal and the second digital signal respectively output by the analog-to-digital converters of the first sampling channel and the second sampling channel, and perform signal processing based on a preset algorithm to output a final digital signal without the nonlinear error.

8. The data acquisition system according to claim 7, characterized in that: The preset algorithm is configured as follows: When the absolute value of the difference between the first digital signal and the second digital signal is less than a preset sampling error limit, the final digital signal is calculated based on the first digital signal, the second digital signal and an operational factor associated with a voltage coefficient of a polysilicon resistor.

9. The data acquisition system according to claim 8, characterized in that: The final digital signal is calculated using the following formula: Where D OUT Represents the final digital signal, D OUT1 and D OUT2 denote the first digital signal and the second digital signal respectively, a1 and a2 are D OUT1 and D OUT2 The corresponding operation factors, c 1p is the first-order voltage coefficient of the P-type polysilicon resistor, c 1n It is the first-order voltage coefficient of N-type polysilicon resistor.

10. A data processing method, characterized in that: In view of the data acquisition system according to claim 6, the data processing method comprises: Acquire a first digital signal and a second digital signal outputted by analog-to-digital converters of the first sampling channel and the second sampling channel, respectively; and When the difference between the first digital signal and the second digital signal is less than a preset sampling error limit, the final digital signal output by the data acquisition system is calculated based on the following formula: Where D OUT Represents the final digital signal, D OUT1 and D OUT2 denote the first digital signal and the second digital signal respectively, a1 and a2 are D OUT1 and D OUT2 The corresponding operation factors, c 1p is the first-order voltage coefficient of the P-type polysilicon resistor, c 1n It is the first-order voltage coefficient of N-type polysilicon resistor.

Images