Formation method of super junction device

Abstract

The invention provides a method for forming a super junction device. The method comprises the following steps: forming an Mth N-type epitaxial layer on the surface of a wafer; forming a plurality of parallel and spaced Mth-layer deep grooves in the Mth-layer N-type epitaxial layer along the first direction by using a double mask plate with the same size and shape as the wafer, wherein the Mth-layer deep grooves penetrate through the whole Mth-layer N-type epitaxial layer; forming an Mth layer P-type column in each of the plurality of Mth layer deep trenches; forming an (M + 1) th N-type epitaxial layer on the surfaces of the Mth N-type epitaxial layer and the Mth P-type column; using a double mask plate to form a plurality of parallel and spaced (M + 1) th layer deep grooves in the (M + 1) th layer N-type epitaxial layer along the second direction, exposing a part of the surface of the Mth layer P-type column in the (M + 1) th layer deep grooves, the first direction being perpendicular to the second direction, and the (M + 1) th layer deep grooves penetrating through the whole (M + 1) th layer N-type epitaxial layer; and forming an (M + 1) th layer of P-type column in the (M + 1) th layer of deep trench.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and more particularly to a method for forming a super junction device. Background Art

[0002] The super junction structure is a structure composed of alternately arranged N-type columns and P-type columns. In order to improve the breakdown voltage of the super junction device, a structure composed of multiple layers of N-type columns and P-type columns can be formed and stacked, connecting the N-type columns in the upper layer to the N-type columns in the lower layer, and connecting the P-type columns in the upper layer to the P-type columns in the lower layer, so as to realize a device with higher breakdown voltage.

[0003] The method for forming a super junction device in the prior art is as follows: First, a first N-type epitaxial layer is formed on the surface of a wafer, a photoresist layer is formed on the surface of the first N-type epitaxial layer, the photoresist layer is exposed using a multiple mask, and the exposed photoresist layer is used to etch the first N-type epitaxial layer. The multiple mask refers to a mask having N identical mask patterns, and the N mask patterns form a shape identical to the size and dimensions of the wafer, and each mask pattern can independently form a power device. A plurality of first deep trenches are formed at intervals in the first N-type epitaxial layer, and the plurality of first deep trenches are in the form of an array of multiple columns and multiple rows. Then, a first P-type column is formed in the first deep trench. Then, a second N-type epitaxial layer is formed on the surface of the first P-type column and the surface of the first N-type epitaxial layer, a photoresist layer is formed on the surface of the second N-type epitaxial layer, the photoresist layer is exposed using a multiple mask, and the exposed photoresist layer is used to etch the second N-type epitaxial layer. A plurality of second deep trenches are formed at intervals in the second N-type epitaxial layer, the second deep trenches are aligned with the first deep trenches, and a part of the surface of the first P-type column is exposed in the second deep trenches. The plurality of second deep trenches are in the form of an array of multiple columns and multiple rows. Then, a second P-type column is formed in the second deep trench, and the second P-type column is connected to the first P-type column. Multiple layers of N-type epitaxial layers, and P-type columns located in each N-type epitaxial layer, are formed according to this method. Thus, multiple groups of P-type columns connected from bottom to top are formed. Then, N power devices are formed in the uppermost N-type epitaxial layer, and each power device corresponds to a group of P-type columns.

[0004] However, in the method for forming a super junction device in the prior art, if the second deep trenches in the upper layer are not aligned with the first deep trenches, the connection effect between the P-type columns in the upper layer and the P-type columns in the lower layer may be poor. If the cross-sectional area of the P-type column in a certain layer is small, it may cause the P-type column in the upper layer to completely deviate from the alignment with the P-type column in the lower layer. Moreover, in the prior art, a multiple mask is used, that is, preparation needs to be made according to the specific area of the super junction from the beginning, and the super junction devices with different area requirements cannot be prepared in advance nor share the multi-layer P-type columns stacked below, wasting the process and materials. Summary of the Invention

[0005] The object of the present invention is to provide a method for forming a superjunction device, which can improve the connection effect between the P-type columns in the upper N-type epitaxial layer and the P-type columns in the lower N-type epitaxial layer, and can reduce the waste of processes and materials.

[0006] To achieve the above object, the present invention provides a method for forming a superjunction device, including:

[0007] S1: Provide a wafer, and form an Mth layer of N-type epitaxial layer on the surface of the wafer, where M is 1;

[0008] S2: Use a single mask plate having the same size and shape as the wafer to form a plurality of parallel and spaced-apart Mth layer of deep trenches arranged along a first direction in the Mth layer of N-type epitaxial layer, and the Mth layer of deep trenches penetrate through the Mth layer of N-type epitaxial layer along an extending direction in a plane formed by the first direction and a second direction;

[0009] S3: Form Mth layer of P-type columns in a plurality of the Mth layer of deep trenches;

[0010] S4: Form an (M + 1)th layer of N-type epitaxial layer on the surfaces of the Mth layer of N-type epitaxial layer and the Mth layer of P-type columns;

[0011] S5: Use the single mask plate to form a plurality of parallel and spaced-apart (M + 1)th layer of deep trenches arranged along the second direction in the (M + 1)th layer of N-type epitaxial layer, a part of the surface of the Mth layer of P-type columns is exposed in the (M + 1)th layer of deep trenches, the first direction and the second direction are perpendicular to each other, and the (M + 1)th layer of deep trenches penetrate through the (M + 1)th layer of N-type epitaxial layer along an extending direction in a plane formed by the first direction and the second direction;

[0012] S6: Form an (M + 1)th layer of P-type columns in the (M + 1)th layer of deep trenches, and the (M + 1)th layer of P-type columns are all connected to the Mth layer of P-type columns;

[0013] S7: Increase the value of M by 2, and loop steps S1 to S6 to form a plurality of stacked epitaxial layers sequentially arranged from bottom to top, where M is a positive integer.

[0014] Optionally, in the method for forming the superjunction device, provide a wafer, and epitaxially form an Mth layer of N-type epitaxial layer on the surface of the wafer.

[0015] Optionally, in the method for forming the superjunction device, the method for using a single mask plate having the same size and shape as the wafer to form a plurality of parallel and spaced-apart Mth layer of deep trenches arranged along the first direction in the Mth layer of N-type epitaxial layer includes:

[0016] A photoresist layer is formed on the surface of the N-type epitaxial layer of the Mth layer;

[0017] Use a single mask plate with the same size and shape as the wafer to expose the photoresist layer to form a patterned photoresist layer;

[0018] Use the patterned photoresist layer to etch the N-type epitaxial layer of the Mth layer to form a plurality of deep trenches of the Mth layer.

[0019] Optionally, in the method for forming the superjunction device, the method for forming the P-type columns of the Mth layer in several of the deep trenches of the Mth layer includes:

[0020] Epitaxially grow P-type columns of the Mth layer in the deep trenches of the Mth layer.

[0021] Optionally, in the method for forming the superjunction device, the method for forming the P-type columns of the Mth layer in several of the deep trenches of the Mth layer includes:

[0022] Inject P-type material into the deep trenches of the Mth layer to form P-type columns of the Mth layer.

[0023] Optionally, in the method for forming the superjunction device, the method for forming several parallel and spaced-apart deep trenches of the (M + 1)th layer arranged along the second direction in the N-type epitaxial layer of the (M + 1)th layer using a single mask plate with the same size and shape as the wafer includes:

[0024] A photoresist layer is formed on the surface of the N-type epitaxial layer of the (M + 1)th layer;

[0025] Use a single mask plate with the same size and shape as the wafer to expose the photoresist layer to form a patterned photoresist layer;

[0026] Use the patterned photoresist layer to etch the N-type epitaxial layer of the (M + 1)th layer to form a plurality of deep trenches of the (M + 1)th layer.

[0027] Optionally, in the method for forming the superjunction device, the depth of etching the N-type epitaxial layer of the (M + 1)th layer is greater than or equal to the depth of the N-type epitaxial layer of the (M + 1)th layer.

[0028] Optionally, in the method for forming the superjunction device, the method for forming the P-type columns of the (M + 1)th layer in several of the deep trenches of the Mth layer includes:

[0029] Epitaxially grow P-type columns of the (M + 1)th layer in the deep trenches of the (M + 1)th layer.

[0030] Optionally, in the method for forming the superjunction device, the method for forming the P-type columns of the (M + 1)th layer in several of the deep trenches of the (M + 1)th layer includes:

[0031] P-type materials are uniformly introduced into the M+1th layer of deep trenches to form P-type columns in the M+1th layer.

[0032] Optionally, in the method for forming the superjunction device, after step S6, the method further includes:

[0033] A plurality of MOS transistor power devices are formed in the outermost epitaxial layer, and each of the power devices includes a set of multilayer P-type columns stacked from bottom to top.

[0034] In the method for forming the superjunction device provided by the present invention, the P-type columns in the upper N-type epitaxial layer and the P-type columns in the lower N-type epitaxial layer formed by the present invention are perpendicular to each other, so the overlapping area of the P-type columns in the upper N-type epitaxial layer and the P-type columns in the lower N-type epitaxial layer is increased, and the connection effect of the P-type columns in the upper N-type epitaxial layer and the P-type columns in the lower N-type epitaxial layer is improved. Moreover, the present invention uses a single mask plate, which can be prepared before manufacturing the superjunction device, and is applicable to both the multilayer epitaxial layer and the same superjunction device, thereby reducing the waste of processes and materials. Description of the Drawings

[0035] Figure 1 is a flowchart of the method for forming the superjunction device according to an embodiment of the present invention;

[0036] Figure 2 is a cross-sectional schematic view of the superjunction device after forming the first deep trench according to an embodiment of the present invention;

[0037] Figure 3 is a cross-sectional schematic view of the superjunction device after forming the first P-type column according to an embodiment of the present invention;

[0038] Figure 4 is a cross-sectional schematic view of the superjunction device after forming the second deep trench according to an embodiment of the present invention;

[0039] Figure 5 is a top view of the superjunction device after forming the second deep trench according to an embodiment of the present invention;

[0040] Figure 6 is a cross-sectional schematic view of the superjunction device after forming the second P-type column according to an embodiment of the present invention;

[0041] Figure 7 is a top view of the superjunction device after forming the second P-type column according to an embodiment of the present invention;

[0042] Figure 8 is a perspective view of the superjunction device after forming the second P-type column according to an embodiment of the present invention;

[0043] In the figure: 110 - the first N-type epitaxial layer, 120 - the first deep trench, 130 - the first P-type column, 140 - the second N-type epitaxial layer, 150 - the second deep trench, 160 - the second P-type column. Detailed implementation manners

[0044] The following will describe the detailed implementation manners of the present invention in more detail with reference to the schematic diagrams. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the drawings are all in a very simplified form and use non-precise scales, only for conveniently and clearly assisting in explaining the purpose of the embodiments of the present invention.

[0045] In the following text, terms such as "the (M + 1)th" and "the (M + 1 + 1)th" are used to distinguish between similar elements, and are not necessarily used to describe a specific order or time sequence. It should be understood that, under appropriate circumstances, these terms used in this way can be replaced. Similarly, if the method described in this document includes a series of steps, and the order of these steps presented in this document is not necessarily the only order in which these steps can be executed, and some of the described steps can be omitted and / or some other steps not described in this document can be added to this method.

[0046] Moreover, it should be understood that when a layer (or film), region, pattern or structure is referred to as being "on" a substrate, layer (or film), region and / or pattern, it can be directly on another layer or substrate, and / or there can also be an intervening layer. Additionally, it should be understood that when a layer is referred to as being "under" another layer, it can be directly under another layer, and / or there can also be one or more intervening layers. Additionally, the references to "on" and "under" each layer can be based on the drawings.

[0047] Please refer to Figure 1 , the present invention provides a method for forming a superjunction device, including:

[0048] S1: Provide a wafer, and form the Mth layer of N-type epitaxial layer on the surface of the wafer, where M takes the value of 1;

[0049] S2: Use a single mask template having the same size and shape as the wafer to form a plurality of parallel and spaced-apart Mth layer of deep trenches arranged along a first direction in the Mth layer of N-type epitaxial layer, and the Mth layer of deep trenches penetrate the Mth layer of N-type epitaxial layer along the extending direction in the plane composed of the first direction and the second direction;

[0050] S3: Form the Mth layer of P-type columns in each of the plurality of Mth layer of deep trenches;

[0051] S4: Form the (M + 1)th layer of N-type epitaxial layer on the surfaces of the Mth layer of N-type epitaxial layer and the Mth layer of P-type columns;

[0052] S5: Use a single mask to form a plurality of parallel and spaced-apart M+1th layer deep trenches arranged along a second direction in the M+1th layer N-type epitaxial layer. Part of the surface of the Mth layer P-type column is exposed in the M+1th layer deep trenches. The first direction and the second direction are perpendicular to each other. The M+1th layer deep trenches penetrate through the M+1th layer N-type epitaxial layer along the extension direction in the plane formed by the first direction and the second direction;

[0053] S6: Form an M+1th layer P-type column in the M+1th layer deep trenches, and the M+1th layer P-type column is connected to the Mth layer P-type column;

[0054] S7: Increase the value of M by 2, and loop through steps S1 to S6 to form multiple stacked epitaxial layers arranged from bottom to top. The value of M is a positive integer.

[0055] For a specific example, please refer to Figure 2 , first provide a wafer. An N-type epitaxial layer 110 of the first layer is epitaxially formed on the surface of the wafer. Therefore, the N-type epitaxial layer 110 of the first layer follows the shape of the wafer and is circular. A photoresist layer is formed on the surface of the N-type epitaxial layer 110 of the first layer. Use a single mask with the same size and shape as the wafer to expose the photoresist layer to form a patterned photoresist layer. Use the patterned photoresist layer to etch the N-type epitaxial layer 110 of the first layer to form a plurality of first deep trenches 120 in the N-type epitaxial layer 110 of the first layer. The extending direction of the plurality of first deep trenches 120 is along a first direction. Adjacent first deep trenches 120 are parallel to each other and spaced apart in a second direction. The first direction and the second direction are perpendicular to each other. Each first deep trench 120 penetrates through the N-type epitaxial layer 110 of the first layer along the extension direction in the plane formed by the first direction and the second direction, that is, each first deep trench 120 is continuous in the first direction.

[0056] Next, please refer to Figure 2 and Figure 3 , fill the first deep trenches 120 with P-type material or epitaxially form first P-type columns 130. The extending direction of the first P-type columns 130 is along the first direction, and the surface of the first P-type columns 130 is flush with the surface of the N-type epitaxial layer 110 of the first layer.

[0057] Next, please refer to Figure 4 and Figure 5, a second N-type epitaxial layer 140 is formed by surface epitaxy on the surfaces of the first-layer N-type epitaxial layer 110 and the first P-type pillar 130. A photoresist layer is formed on the surface of the second N-type epitaxial layer 140. A one-time mask plate having the same size and shape as the wafer is used to expose the photoresist layer to form a patterned photoresist layer. The second N-type epitaxial layer 140 is etched using the patterned photoresist layer, and the etching depth is greater than or equal to the depth of the second N-type epitaxial layer 140 to form a plurality of second deep trenches 150 in the second N-type epitaxial layer 140. Part of the surfaces of the first-layer N-type epitaxial layer 110 and the first P-type pillar 130 are exposed within the second deep trenches 150. The extending directions of the plurality of second deep trenches 150 are along the second direction, and adjacent second deep trenches 150 are parallel to each other and are spaced apart in the first direction. Each second deep trench 150 penetrates the second N-type epitaxial layer 140 along the extending direction in the plane formed by the first direction and the second direction, that is, each second deep trench 150 is not disconnected in the second direction. Therefore, the extending direction of the second deep trench 150 is perpendicular to the extending direction of the first deep trench 120.

[0058] Next, please refer to Figures 6 to 8 , Figure 8 is a perspective view of the superjunction device after forming the second P-type pillar in the embodiment of the present invention, so the schematic diagrams of the first-layer N-type epitaxial layer 110 and the second N-type epitaxial layer 140 are not filled. A second P-type pillar 160 is formed in each second deep trench 150, and the extending direction of the second P-type pillar 160 is along the second direction. The second P-type pillar 160 is perpendicular to the first P-type pillar 130.

[0059] According to this method, M + 1 layers of stacked N-type epitaxial layers are sequentially formed, and a plurality of spaced P-type pillars are formed in each N-type epitaxial layer. The P-type pillars in adjacent epitaxial layers are connected, and the P-type pillars in adjacent epitaxial layers are perpendicular to each other. It can be formed according to Figure 8 the module stacking to form a third N-type epitaxial layer and a third P-type pillar, and a fourth N-type epitaxial layer and a fourth P-type pillar. The schematic diagram of Figure 8 can be used as a module or a layer of N-type epitaxial layer and a layer of P-type pillar as a module to be continuously stacked upward until all the modules are stacked and finally a topmost epitaxial layer is formed. The P-type pillars in each N-type epitaxial layer are formed using a one-time mask plate, so the one-time mask plate can be prepared in advance before manufacturing the power device. And the one-time mask plate can be used in multiple power devices, so mass production can be achieved.

[0060] Next, several MOS transistor power devices are formed in the outermost epitaxial layer of layer M+1, i.e., the topmost epitaxial layer. The multiple epitaxial layers and P-type columns below are used as an integral module. The boundary of the power device is determined by the P-type columns in the outermost epitaxial layer. The size of the power device can be large or small, without considering any epitaxial layer or P-type column structure below the outermost epitaxial layer. Each power device contains N P-type columns stacked in parallel and connected to each other. By using the method that the P-type columns in adjacent epitaxial layers are perpendicular to each other, the connection effect between the P-type columns in the upper N-type epitaxial layer and the P-type columns in the lower N-type epitaxial layer is improved, and no alignment process is required, as long as the upper and lower layers are perpendicular to each other. Moreover, except for the outermost epitaxial layer, the sizes of the deep trenches in all the epitaxial layers below can be unrestricted, and the widths can be the same or different. Even if the width is small, a good connection effect can still be achieved. Therefore, trenches with smaller stacked sizes and higher densities can be obtained to produce products with lower resistance. In addition, the embodiment of the present invention reduces the waste of processes and materials and shortens the product preparation time. As long as multiple P-type columns stacked from bottom to top with the corresponding breakdown voltage thickness are prepared first, an epitaxy with a predetermined breakdown voltage can be obtained through epitaxial stacking of P-columns with customized thicknesses. When processing the product, only the MOS transistors on the outermost layer need to be fabricated, greatly shortening the product processing cycle.

[0061] In summary, in the method for forming a superjunction device provided by the embodiment of the present invention, the P-type columns in the upper N-type epitaxial layer and the P-type columns in the lower N-type epitaxial layer formed by the present invention are perpendicular to each other. Therefore, the overlapping area between the P-type columns in the upper N-type epitaxial layer and the P-type columns in the lower N-type epitaxial layer is increased, and the connection effect between the P-type columns in the upper N-type epitaxial layer and the P-type columns in the lower N-type epitaxial layer is improved. Moreover, the present invention uses a single mask, which can be prepared before manufacturing the superjunction device, and is applicable to both multiple epitaxial layers and the same superjunction device, thus reducing the waste of processes and materials.

[0062] The above is only a preferred embodiment of the present invention and does not impose any limitation on the present invention. Any person skilled in the art, without departing from the technical solution of the present invention, makes any form of equivalent substitution or modification and other changes to the technical solution and technical content disclosed by the present invention, which are still within the content of the technical solution of the present invention and still fall within the protection scope of the present invention.

Claims

1. A method for forming a super junction device, characterized in that: include: S1: providing a wafer, and forming an Mth N-type epitaxial layer on a surface of the wafer, where the value of M is 1; S2: using a mask having the same size and shape as the wafer to form a plurality of parallel and spaced M-th deep trenches arranged along a first direction in the M-th N-type epitaxial layer, wherein the M-th deep trenches penetrate the M-th N-type epitaxial layer along an extension direction on a plane formed by the first direction and the second direction; S3: forming an M-th layer of P-type pillars in a plurality of the M-th layer of deep trenches; S4: forming an M+1th N-type epitaxial layer on the surface of the Mth N-type epitaxial layer and the Mth P-type pillar; S5: using the one-fold mask to form a plurality of parallel and spaced M+1-th deep trenches arranged along the second direction in the M+1-th N-type epitaxial layer, wherein a portion of the surface of the M+1-th P-type column is exposed in the M+1-th deep trenches, the first direction and the second direction are perpendicular to each other, and the M+1-th deep trenches penetrate the M+1-th N-type epitaxial layer along the extension direction on the plane formed by the first direction and the second direction; S6: forming an M+1th layer of P-type pillars in the M+1th layer of deep trenches, wherein the M+1th layer of P-type pillars are connected to the Mth layer of P-type pillars; S7: the value of M is increased by 2, and steps S1 to S6 are repeated to form a plurality of epitaxial layers stacked in sequence from bottom to top, and the value of M is a positive integer.

2. The method for forming a super junction device according to claim 1, wherein: A wafer is provided, and an Mth N-type epitaxial layer is epitaxially formed on a surface of the wafer.

3. The method for forming a super junction device according to claim 1, wherein: The method of forming a plurality of parallel and spaced-apart M-th deep trenches arranged along a first direction in the M-th N-type epitaxial layer using a mask having the same size and shape as the wafer comprises: forming a photoresist layer on a surface of the Mth N-type epitaxial layer; Exposing the photoresist layer using a mask having the same size and shape as the wafer to form a patterned photoresist layer; The Mth N-type epitaxial layer is etched using the patterned photoresist layer to form a plurality of Mth deep trenches.

4. The method for forming a super junction device according to claim 1, wherein: The method of forming an M-th layer of P-type pillars in a plurality of the M-th layer of deep trenches comprises: An M-th layer of P-type columns are epitaxially formed in the M-th layer of deep trenches.

5. The method for forming a super junction device according to claim 1, wherein: The method of forming an M-th layer of P-type pillars in a plurality of the M-th layer of deep trenches comprises: P-type material is poured into the M-th layer of deep trenches to form an M-th layer of P-type pillars.

6. The method for forming a super junction device according to claim 1, wherein: The method of forming a plurality of parallel and spaced-apart deep trenches of the M+1th layer in the M+1th N-type epitaxial layer along a second direction using a mask having the same size and shape as the wafer comprises: forming a photoresist layer on a surface of the M+1th N-type epitaxial layer; Exposing the photoresist layer using a mask having the same size and shape as the wafer to form a patterned photoresist layer; The patterned photoresist layer is used to etch the M+1th N-type epitaxial layer to form a plurality of Mth deep trenches.

7. The method for forming a super junction device according to claim 6, wherein: The depth of etching the M+1th N-type epitaxial layer is greater than or equal to the depth of etching the M+1th N-type epitaxial layer.

8. The method for forming a super junction device according to claim 1, wherein: The method of forming the M+1th layer of P-type pillars in a plurality of the M+1th layer of deep trenches comprises: The M+1th layer of P-type columns are epitaxially formed in the M+1th layer of deep trenches.

9. The method for forming a super junction device according to claim 1, wherein: The method of forming the M+1th layer of P-type pillars in a plurality of the M+1th layer of deep trenches comprises: P-type material is poured into the M+1-th layer of deep trenches to form an M+1-th layer of P-type pillars.

10. The method for forming a super junction device according to claim 1, wherein: After step S7, the method further includes: A plurality of MOS tube power devices are formed in the outermost epitaxial layer, and each of the power devices comprises a group of multi-layer P-type columns stacked from bottom to top.

Images