High-frequency differential single-pole multi-throw switch module
By designing a device for differential signal switching, using microelectromechanical system (MEMS) switches and matching signal paths, the problems of complex differential signal switching and deterioration of signal performance at high frequency/data rates are solved, and stable and efficient signal switching and electrical characteristic matching are achieved.
Patent Information
- Application Number
- CN202380058595.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-01-26
- Filing Date
- 2023-08-08
- Publication Date
- 2025-05-30
AI Technical Summary
At high frequency/data rates, the switching of differential signals is complex, and the difference in path length and impedance of signal lines in the prior art leads to deterioration of signal performance.
An apparatus is designed including an input port, a first output port, a second output port, a first microelectromechanical system (MEMS) switch, and a second MEMS switch. Through these switches, the differential input port is divided into two single-ended paths, which are spatially matched in length and orientation, and are distributed through at least two electrical conductor layers to ensure that the electrical characteristics from the input port to either output port are substantially the same.
The stable switching of differential signals at high frequency/data rates is achieved, and the signal performance deterioration due to path length and impedance differences is avoided, ensuring low reflection and insertion loss of the signal path.
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Figure CN120077522A_ABST
Abstract
Description
[0001] Related Applications
[0002] This application claims the benefit of U.S. Provisional Application No. 63 / 371,064, filed Aug. 10, 2022, and U.S. Provisional Application No. 63 / 481,703, filed Jan. 26, 2023. The entire teachings of the above applications are incorporated herein by reference. Background of the Invention
[0003] A signal source may need to switch between two destinations. Complexities can arise if the signal source generates differential signals, particularly for high-frequency / data-rate differential signals. If, for example, the switch and signal path layout architecture is not the same for each side of the differential signal, high-frequency signal performance may degrade due to issues such as path length and impedance differences.
[0004] For example, increasing network speeds are driving faster serial bus communications between memories and chip sets. Precision high-speed testing of chip sets on design-in-boards forces test engineers to use higher-precision components on the loopback path and use switches to route signals back to the DUT. These loopback paths can include protocols such as PCIe 4.0 / 5.0, SerDes, Ethernet, USB3.x / 4, and HDMI.
[0005] One of the limiting factors with increasing data rates (such as for the PCIe5.0 specification) is switch performance at higher frequencies. EM relay switches have a lifespan of up to 10 million cycles and switch speeds in the millisecond range.
[0006] U.S. Patent Application Publication No. 2014 / 0253260 (Horimoto) describes a prior art for switching differential signals. Referring to FIG. 13 of Horimoto, signal lines 150a and 150b form a signal line pair for transmitting a differential signal to a switch (see paragraph
[0014] of Horimoto). As shown, signal line 150a is oriented differently compared to signal line 150b. More specifically, Horimoto's line 150b is shown as bending back on itself, which may result in self-coupling along its length that does not occur in signal line 150a. This self-coupling in signal line 150b may result in impedance / reflection characteristics that do not match those of signal line 150a, and the impact will increase as the signal frequency / data rate increases. Summary of the Invention
[0007] Embodiments described herein relate to an apparatus for switching differential signals. The apparatus may include an input port, a first output port, a second output port, a first microelectromechanical system (MEMS) switch, and a second MEMS switch. The first MEMS switch and the second MEMS switch may selectively couple the input port to the first output port or the second output port. A differential input port may be divided into two single-ended paths. One single-ended path may be switched by the first MEMS switch, and the other single-ended path may be switched by the second MEMS switch. The single-ended paths may be spatially matched with respect to length and orientation and are at least partially distributed through at least two conductor layers, where adjacent conductor layers are separated by an electrically insulating layer. Electrical characteristics (such as impedance matching, reflection coefficient, etc.) of the two single-ended paths from the input port to either output port are substantially the same.
[0008] In one aspect, the invention may be an apparatus for switching differential signals, the apparatus including: an input port including a first conductor and a second conductor; a first output port including a third conductor and a fourth conductor; and a second output port including a fifth conductor and a sixth conductor. The apparatus may also include a first microelectromechanical system (MEMS) switch having an input, a first output, and a second output, and the input of the first MEMS switch is electrically coupled to the first conductor through a first signal path. The first output of the first MEMS switch may be electrically coupled to the third conductor through a second signal path, and the second output of the first MEMS switch may be electrically coupled to the fifth conductor through a third signal path. The apparatus may also include a second MEMS switch having an input, a first output, and a second output. The input of the second MEMS switch may be electrically coupled to the second conductor through a fourth signal path, the first output of the second MEMS switch may be electrically coupled to the fourth conductor through a fifth signal path, and the second output of the second MEMS switch may be electrically coupled to the sixth conductor through a sixth signal path. The first signal path and the second signal path may be spatially matched with respect to length and orientation. The third signal path, the fourth signal path, the fifth signal path, and the sixth signal path may be spatially matched with respect to length and orientation.
[0009] The third, fourth, fifth, and sixth signal paths may be distributed through at least two conductor layers. Each pair of adjacent conductor layers may be separated by an electrically insulating layer. The first and second signal paths may be disposed between adjacent conductive material layers that are fixed at a common voltage potential. At least a portion of each of the first and second signal paths may be configured as a coplanar waveguide. The apparatus may further include two or more conductive vias disposed on either side of each of the first and second signal paths. Each of the two or more conductive vias may be electrically coupled to an adjacent conductive material layer. Other embodiments may incorporate stripline waveguide configurations or microstrip waveguide configurations to implement portions of the first and second signal paths described above.
[0010] The first MEMS switch and the second MEMS switch may each have a stem corresponding to a first contact and at least two throws associated with at least a second contact and a third contact. The second and third contacts may be symmetrically distributed about the first contact.
[0011] In another aspect, the present invention may be an apparatus for switching differential signals within an operating frequency range, the apparatus including a first signal path from a first signal component of a differential input port to a first MEMS switch input of a first microelectromechanical system (MEMS) switch and from a first MEMS switch output of the first MEMS switch to the first signal component of a differential output port. The apparatus may further include a second signal path from a second signal component of the differential input port to a second MEMS switch input of a second MEMS switch and from a second MEMS switch output of the second MEMS switch to the second signal component of the differential output port. Each of the first and second signal paths may be distributed through at least two conductor layers, with adjacent conductor layers separated by an electrically insulating layer. The electrical length of the first signal path may be substantially the same as the electrical length of the second signal path, and the spatial orientation of the first signal path may match the spatial orientation of the second signal path such that the impedance of the first signal path at a frequency within the operating frequency range is substantially the same as the impedance of the second signal path at the frequency within the operating frequency range.
[0012] The first signal path and the second signal path can be disposed between conductive material layers that are fixed at a common voltage potential. At least a portion of each of the first signal path and the second signal path can be configured as a coplanar waveguide. The device can further include two or more conductive vias disposed on either side of each of the first signal path and the second signal path, wherein each of the two or more conductive vias is electrically coupled to the conductive material layer. The spatial orientation of the first signal path can be symmetric with respect to the spatial orientation of the second signal path. The first MEMS switch and the second MEMS switch can each have a stem corresponding to the first contact and at least two throws associated with at least a second contact and a third contact. The second contact and the third contact can be symmetrically distributed with respect to the first contact.
[0013] In another aspect, the present invention can be a device for switching differential signals, the device including a first microelectromechanical system (MEMS) switch mounted on a multi-layer component and a second MEMS switch mounted on the multi-layer component. The first MEMS switch can have a first MEMS switch input that is selectively electrically coupled to one of a first MEMS switch first output and a first MEMS switch second output. The second MEMS switch can have a second MEMS switch input that is selectively electrically coupled to one of a second MEMS switch first output and a second MEMS switch second output. The multi-layer component can have a top surface, a bottom surface, a first edge, a second edge, a third edge, and a fourth edge. The first edge and the second edge can be opposite each other, and the third edge and the fourth edge can be opposite each other. The multi-layer component can include at least two conductive material layers. Each pair of adjacent conductive material layers can be separated by an electrically insulating layer. The multi-layer component can further include an input port provided at the first edge, a first output port provided on the second edge, and a second output port provided on the second edge. The input port can have a first input conductor and a second input conductor, the first output port can have a first output conductor and a second output conductor, and the second output port can have a third output conductor and a fourth output conductor. The first input conductor can be electrically coupled to the first MEMS switch input through a first input signal path on one of the at least two conductive material layers. The first MEMS switch first output can be electrically coupled to the first output conductor through a first output signal path passing through two or more of the at least two conductive material layers. The first MEMS switch second output can be electrically coupled to the third output conductor through a second output signal path passing through two or more of the at least two conductive material layers. The second input conductor can be electrically coupled to the second MEMS switch input through a second input signal path on one of the at least two conductive material layers. The second MEMS switch first output can be electrically coupled to the second output conductor through a third output signal path passing through two or more of the at least two conductive material layers. The second MEMS switch second output can be electrically coupled to the fourth output conductor through a fourth output signal path passing through two or more of the at least two conductive material layers. The first input signal path and the second input signal path can be configured such that the impedance characteristics of the first input signal path and the impedance characteristics of the second input signal path are substantially the same.
[0014] Each of the first signal path and the second signal path may be disposed between two conductive material layers fixed at a common voltage potential. One of the two layers may be located immediately above the signal path, and the other of the two layers may be located immediately below the signal path. At least a portion of each of the first path and the second path may be configured as a coplanar waveguide. The apparatus may further include two or more conductive vias disposed on either side of each of the first signal path and the second signal path. Each of the two or more conductive vias is electrically connected to the conductive material layer. The spatial orientation of the first signal path may be symmetric with the spatial orientation of the second signal path.
[0015] The first MEMS switch and the second MEMS switch may each have a stem corresponding to a first contact and at least two throws associated with at least a second contact and a third contact. The second contact and the third contact may be symmetrically distributed with respect to the first contact.
[0016] The first output signal path and the third output signal path may be configured such that the impedance characteristics of the first output signal path and the impedance characteristics of the third output signal path are substantially the same. The second output signal path and the fourth output signal path may be configured such that the impedance characteristics of the second output signal path and the impedance characteristics of the fourth output signal path are substantially the same. Generally, some or all of the output signal paths may be configured to have the same or substantially the same impedance characteristics. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] This patent or application file contains at least one color drawing. Copies of this patent or patent application publication with color drawing(s) will be provided by the Patent Office upon request and payment of the necessary fees.
[0018] The foregoing will be apparent from the following more particular description of example embodiments, as illustrated in the accompanying drawings in which like reference characters refer to the same parts throughout. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating embodiments.
[0019] Figure 1A An example of a differential switch device in accordance with an example embodiment of the present invention is shown.
[0020] Figure 1B Illustrated Figure 1A is a more detailed view of the switch device presented in
[0021] Figure 2A and Figure 2B illustrates a three-dimensional (3D) view of an example embodiment of the switch device. Figure 2C Schematically illustrated Figure 2A and Figure 2B is the physical signal path layout of the switch configuration of
[0022] Figure 3A Shows a top view of an example symmetric single-pole four-throw (SP4T) MEMS switch according to the described embodiments.
[0023] Figure 3B Shows Figure 3A an isometric view of the SP4T MEMS switch depicted in
[0024] Figure 4A An isometric view of an example embodiment of the switching device described herein is illustrated.
[0025] Figure 4B Shows a side view of the switching device described herein.
[0026] Figure 5 Illustrates a bottom view of an example switching device.
[0027] Figures 6A to 6F Illustrates the respective circuit layers of the switching device.
[0028] Figure 7 A 3D view of the packaged signal path as described herein is provided.
[0029] Figure 8A and Figure 8B and Figure 9A and Figure 9B, Figure 10A and Figure 10B and Figure 10C Illustrates various experimental results of the example embodiments described herein.
[0030] Figure 11 Shows an embodiment configured for use in applications having data rates up to the maximum value specified for PCIe 5.0.
[0031] Figure 12 Shows a device including respective switching devices in a single package.
[0032] Figures 13A to 13F Shows Figure 12 various configurations of the switches in the device depicted in Detailed Description
[0033] The following describes example embodiments.
[0034] Figure 1AIllustrates an example of a differential switching device 100 according to an embodiment of the present invention. The differential switching device 100 receives a differential signal at a differential input port 102 and operates to switch the differential signal from the differential input port 102 to a first differential output port 104 or a second differential output port 106. The switching is performed by a pair of single-pole double-throw (SPDT) switches 108 and 110, each receiving the same activation signal. The differential signal at the input port 102 consists of two complementary single-ended signals. The first of the two complementary signals 102a is routed through the first SPDT switch 108 to the first output port 104 or the second output port 106, and the second of the two complementary signals 102b is routed through the second SPDT switch 110 to the first output port 104 or the second output port 106. The activation signals to the first switch 108 and the second switch 110 are coordinated such that both complementary signals 102a, 102b are routed to the first output port 104 or the second output port 106.
[0035] Figure 1B Illustrates Figure 1A A more detailed view of the switching device 100 presented in. The differential input port 102 includes a first conductor 120 and a second conductor 122. The first conductor 120 couples the input port 102 to the input 124 of the first switch 108, and the second conductor 122 couples the input port 102 to the input 126 of the second switch 110. The first output port 104 of the switching device 100 includes a third conductor 128 and a fourth conductor 130. The third conductor 128 couples the first output port 104 to the first output 132 of the first switch 108, and the fourth conductor 130 couples the first output port 104 to the first output 140 of the second switch 110. The second output port 106 of the switching device 100 includes a fifth conductor 136 and a sixth conductor 138. The fifth conductor 136 couples the second output port 106 to the second output 134 of the first switch 108, and the sixth conductor 138 couples the second output port 106 to the second output 142 of the second switch 110.
[0036] Figure 1A and Figure 1B The depiction of the switching device 100 shown in is merely schematic and is not intended to provide a physical and spatial representation. As described herein, example embodiments implement a layout such that (i) the distance and path direction of the differential path from the input port 102 through the first switch 108 and the second switch 110 to the first output port 104 are substantially the same as (ii) the differential path from the input port 102 through the first switch 108 and the second switch 110 to the second output port 106.
[0037] Figure 2A and Figure 2BIllustrates a three-dimensional (3D) view of an exemplary embodiment of the switching device 200. Figure 2A and Figure 2B The embodiment shown in Figure 2C presents a layout of physical signal paths (i.e., transmission paths) of the switching configuration schematically shown in Figure 2C . Referring to Figure 1A and Figure 1B , the input port 202 is configured to receive differential signals as described with respect to Figure 1A and Figure 1B . Each complementary side of the differential signal is routed to a switch, but in this exemplary embodiment, each switch is a single-pole four-throw (SP4T) switch, where three throws are used and one throw is not used. Two throws transmit the differential signal to the first output 204 and the second output 206 as described with respect to Figure 1A and Figure 1B . The third throw is used for the auxiliary outputs 207, 209, and as previously mentioned, the fourth throw is not used. Note that the auxiliary outputs are independently driven by HVout1 and HVout8 from the driver integrated circuit (IC) 230, while HVout2 drives the input complementary differential signal to the first output port 204, and HVout3 drives the input complementary differential signal to the second output port 206.
[0038] Figure 2A Shows the circuit path when the switches 208, 210 direct the differential signal from the input port 202 to the second output port 206. Figure 2B Shows the circuit path when the switches 208, 210 direct the differential signal from the input port 202 to the first output port 204. In Figure 2A and Figure 2B , the top portion of the figure shows a top view of the switching device 200, and the bottom portion depicts a 3D view of the switching device 200, which shows the various layers of the device, described in more detail herein.
[0039] Figure 2A and Figure 2B The top (i.e., top view) of Figure 2A shows switch pads 208a, 210a for facilitating external electrical connections of the MEMS switches 208, 210. Figure 2B Shows signal paths 212, 214 from each of the switches 208, 210, which leave the switch pads from the upper right quadrant of the switch pads 208a, 210a, corresponding to one of the four throws of the SP4T MEMS switch.
[0040] Figure 2A and Figure 2B The tops of Figure 2B show that the signal paths 220, 222 from the input port 202 to the switch pads 208a, 210a are substantially the same length and symmetric in shape.
[0041] Figure 2A The bottoms of Figure 2A show that the paths 212, 214 from the respective switch pads 208a, 210a down through the layer 232 of the switch device 200 to the second output port 206 are substantially the same. Each individual layer of the layer 232 is illustrated in Figures 6A to 6F as follows.
[0042] Figure 2B The bottoms of Figure 2B show that the paths 216, 218 from the respective switch pads 208a, 210a down through the layer 232 of the switch device 200 to the first output port 204 are substantially the same. Additionally, comparing the bottoms of Figure 2A and Figure 2B shows that the paths from the switch pads 208a, 210a to the second output port 206 are substantially the same as the paths from the switch pads 208a, 210a to the first output port 204. The only difference is the direction in which the signal paths leave the switch pads. As described herein, the signal paths 212, 214 leave the switch pads from the upper right quadrant, while the signal paths 216, 218 leave the switch pads from the lower right quadrant. However, because the MEMS switches 208, 210 are symmetric, the direction in which the signal leaves the MEMS switches has little or no effect on the electrical characteristics of the signal paths. The symmetric MEMS switches 208, 210 are configured with switch bars at the center of the switch device, where each throw occurs symmetrically outward from the center bar about the perimeter of the switch.
[0043] An example symmetric single-pole four-throw (SP4T) MEMS switch is shown in a top view in Figure 3A and in an isometric view in Figure 3B The bar of the switch is located at the center, and the four throws are symmetrically distributed around the bar (the top of the bar, the bottom of the bar, the left side of the bar, and the right side of the bar). The bar via 302 is located in the package glass lid directly above the bar port of the SP4T switch. The throw vias 304a, 304b, 304c, 304d are located at each respective throw port.
[0044] As shown in Figure 2A and Figure 2BAs shown, the most aggressive signal bending occurs when the signal jumps to a different height / layer. This bending is acceptable because when the signal exits the vertical vias, the signal transition is the same regardless of the direction in which the signal routes from the via to the horizontal plane. In an example embodiment, the bending implemented on the same layer occurs only on the path from the differential input port to the two MEMS switches. The use of inter-layer routing across the multi-layer architecture facilitates a very dense routing layout with excellent flexibility.
[0045] Figure 2A and Figure 2B The example embodiment shown in and thus implements a symmetric path from input port 202, through the matching MEMS switches 208, 210, through layer 232 of the switching device 200, to output ports 204, 206. The path lengths are substantially the same, and the path shapes and spatial (i.e., physical) orientations through the device are substantially the same, thereby creating substantially matching radio frequency (RF) paths from input port 202 to output ports 204, 206. As used herein, the spatial orientation of a signal path "matching" means that the signal paths have substantially the same length and are similarly distributed through the device in three dimensions. The electrical characteristics of these matching RF paths are substantially the same.
[0046] Figure 4A An isometric view illustrating another example embodiment of the switching device 200 described herein. The MEMS switches 208, 210 are shown mounted on the top surface of the switching device 200. The input port 202, the first output port 204, and the second output port 206 are shown having electrostatic discharge (ESD) protection devices 402 associated with each port. A driver integrated circuit (IC) 230 provides actuation signals to the MEMS switches 208, 210. Figure 4A Also shown is a resistor-capacitor (R-C) network 234 that can be used for signal conditioning on the switching device 200. Figure 4B A side view of the switching device 200 is shown. The layout of an example embodiment of the switching device 200 shows the input port 202 at the left edge of the switching device 200 and the output ports 204, 206 at the right edge of the switching device 200, which provides convenient spatial signal flow across the device 200.
[0047] Figure 5 A bottom view of an example switching device 200 is illustrated, which identifies device pin assignment information. Figures 6A to 6F The various circuit layers 232 of the switching device 200 are shown. These layers are separated from each other by dielectric material layers. Figure 6A The top layer of the switching device 200 (i.e., the layer on which the MEMS switches 208, 201, the driver IC 230, and other components are mounted) is depicted. Figure 6Bis the next lower layer starting from the topmost layer, and so on until the bottom layer, as Figure 6F shown.
[0048] Layer 232 is arranged such that signal traces that propagate high-frequency signals are surrounded by conductive reference planes above and below. For example, Figure 6B shows signal paths 220, 222 from the input port to MEMS switches 208, 210. Figure 6A the upper layer shown in Figure 6C and the lower layer shown in provide solid reference planes that encapsulate signal paths 220, 222. In addition, a fence of conductive vias is implemented along both sides of signal paths 220, 222. The vias extend from the conductive plane above signal paths 220, 222 to the conductive plane below the signal paths. Figure 7 A 3D view of the encapsulated signal path 702 is provided, where a conductive reference plane 704 is above the path 702 and a conductive reference plane 706 is below the path 702. Conductive vias 708 are shown providing a conductive barrier fence on either side of the signal path 702. This via fence, together with the conductive reference planes above and below the signal path, facilitates a controlled impedance along the path - a 50-ohm impedance in the example embodiments described herein, but other impedances can be implemented. Using the techniques described herein, a controlled (e.g., 50-ohm) impedance can be maintained from the input port to the MEMS switches and from the MEMS switches to the output port, resulting in low reflection and insertion loss on the signal path.
[0049] Figure 8A , Figure 8B , Figure 9A , Figure 9B, Figure 10A , Figure 10B and Figure 10C illustrate the experimental results of the example embodiments described herein. Figure 8A shows the insertion loss with respect to the first port (measurement 802 and finite element method (FEM) 804) and with respect to the second port (measurement 806 and FEM 808). Figure 8B shows the return loss with respect to the first port (measurement 810 and finite element method (FEM) 812), and the return loss with respect to the second port (measurement 814 and FEM 816). These results show that the measured values track well with the simulated values.
[0050] Figure 9A and Figure 9B illustrate the differential S-parameters, 3D FEM simulations, and measured values for the same channel. Figure 9AInsertion loss (S12) is shown for measured values 902 and FEM simulated values 904. Figure 9B shows return loss (S11) for measured values 906 and FEM simulated values 908. These results again show that the measured values track well with the simulated values.
[0051] Figure 10A , Figure 10B and Figure 10C The example shows that at 20Gbps ( Figure 10A )、32Gbps( Figure 10B ) and 40bps( Figure 10C ) under non-return-to-zero (NRZ) test signals. These figures show that even at 40 bps, the example implementation produces an open symmetrical eye pattern.
[0052] Figure 11 Another example embodiment shown in is designed for applications with data rates up to PCIe5.0. In this embodiment, two examples 200a, 200b of the switch device 200 (in Figure 2A and Figure 2B is shown in 3D view and in Figure 2C 1102) is used to implement external loopback testing. For high-speed paths (e.g., 32 Gbps), the differential output signals (TX-P, TX-N) from the DUT 1102 are routed through AC coupling capacitors 1104 (e.g., 200 nF) and then returned to the differential input signals (RX-P, RX-N) of the DUT 1102. Other differential paths to / from the DUT 1102 can be used for DC measurements or low-speed signals.
[0053] Figure 12 Device 1200 is shown, which combines devices 200a and 200b in a single package. Device 1200 is shown as having Figure 11 The coupling capacitor 1104 is connected as described in . Each switch control is labeled HVA, HBV, HVC or HVD.
[0054] Figures 13A to 13F Various open / closed configurations of switches in device 1200 are shown. Figure 13A , Figure 13B and Figure 13C The loopback signal path through coupling capacitor 1104 is depicted. Figure 13D , Figure 13E and Figure 13F The loopback path is depicted without the connecting capacitor.
[0055] Figure 13A The configuration required to loop signals HS1_A and HS1_B to signals HS2_A and HS2_B, respectively, is shown.
[0056] Figure 13B Shows the configuration required to cycle signals MS1_A and MS1_B to signals MS2_A and MS2_B respectively.
[0057] Figure 13C Shows the configuration required to cycle signals LS1_A and LS1_B to signals LS2_A and LS2_B respectively.
[0058] Figure 13D Shows the configuration required to cycle signals HS1_A and HS2_A to signals MS1_A and MS2_A respectively and to cycle signals HS1_B and HS2_B to signals MS1_B and MS2_B respectively.
[0059] Figure 13E Shows the configuration required to cycle signals HS1_A and HS2_A to signals LS1_A and LS2_A respectively and to cycle signals HS1_B and HS2_B to signals LS1_B and LS2_B respectively.
[0060] Figure 13F Shows the configuration required to cycle signals MS1_A and MS2_A to signals LS1_A and LS2_A respectively and to cycle signals MS1_B and MS2_B to signals LS1_B and LS2_B respectively.
[0061] Table 1 shows Figures 13A to 13F the specific switch control states of the example embodiment configurations described in
[0062] The switch control value "high" means the switch is closed, while the control value "low" means the switch is open.
[0063] Input Output HVA HVB HVC HVD Path Name Figure HS1 HS2 High Low High Low HS Loopback Figure 13A HS1 MS1 Low Low High High DUT to ATE Figure 13D HS1 LS1 Low High High Low DUT to TBD Figure 13E MS2 HS2 Low Low High High ATE to DUT Figure 13D MS2 LS2 Low High Low High ATE to TBD Figure 13F MS1 MS2 High Low Low High MS Loopback Figure 13B LS2 HS2 Low High High Low TBD to DUT Figure 13E LS1 MS1 Low High Low High TBD to ATE Figure 13F LS1 LS2 High High Low Low LS Loopback Figure 13C
[0064] (TBD = To Be Determined)
[0065] Table 1
[0066] Although example embodiments have been specifically shown and described, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the scope of the embodiments encompassed by the appended claims.
Claims
1. A device for switching differential signals, the device comprising: an input port, the input port including a first conductor and a second conductor; a first output port, the first output port including a third conductor and a fourth conductor; a second output port, the second output port including a fifth conductor and a sixth conductor; a first microelectromechanical system (MEMS) switch, the first MEMS switch having an input, a first output, and a second output, the input of the first MEMS switch being electrically connected to the first conductor through a first signal path, the first output of the first MEMS switch being electrically connected to the third conductor through a second signal path, and the second output of the second MEMS switch being electrically connected to the fifth conductor through a third signal path; a second MEMS switch, the second MEMS switch having an input, a first output, and a second output, the input of the second MEMS switch being electrically connected to the second conductor through a fourth signal path, the first output of the second MEMS switch being electrically connected to the fourth conductor through a fifth signal path, and the second output of the second MEMS switch being electrically connected to the sixth conductor through a sixth signal path; the first signal path and the second signal path being spatially matched with respect to length and orientation; the third signal path, the fourth signal path, the fifth signal path, and the sixth signal path being spatially matched with respect to length and orientation.
2. The device according to claim 1, wherein, the third signal path, the fourth signal path, the fifth signal path, and the sixth signal path are distributed through at least two electrically conductive layers, and each pair of adjacent electrically conductive layers is separated by an electrically insulating layer.
3. The device according to claim 1, wherein, the first signal path and the second signal path are disposed between adjacent conductive material layers fixed at a common voltage potential.
4. The device according to claim 3, wherein, at least a portion of each of the first signal path and the second signal path is arranged as a coplanar waveguide.
5. The device according to claim 3, the device further comprising two or more conductive vias disposed on either side of each of the first signal path and the second signal path, wherein, each of the two or more conductive vias is electrically connected to the adjacent conductive material layer.
6. The device according to claim 1, wherein, each of the first MEMS switch and the second MEMS switch has a rod corresponding to a first contact and at least two throws associated with at least a second contact and a third contact, wherein the second contact and the third contact are symmetrically distributed with respect to the first contact.
7. A device for switching differential signals within a working frequency range, the device comprising: a first signal path, the first signal path extending from a first signal component of a differential input port to a first MEMS switch input of a first microelectromechanical system (MEMS) switch, and from the first MEMS switch output of the first MEMS switch to a first signal component of a differential output port; A second signal path that extends from a second signal component of a differential input port to a second MEMS switch input of a second MEMS switch and from a second MEMS switch output of the second MEMS switch to a second signal component of a differential output port; Each of the first signal path and the second signal path is distributed through at least two conductor layers, with adjacent conductor layers separated by an electrically insulating layer; The electrical length of the first signal path is substantially the same as the electrical length of the second signal path; And The spatial orientation of the first signal path matches the spatial orientation of the second signal path such that the impedance of the first signal path at frequencies within the operating frequency range is substantially the same as the impedance of the second signal path at those frequencies within the operating frequency range.
8. The apparatus according to claim 7, wherein, The first signal path and the second signal path are disposed between conductive material layers fixed at a common voltage potential.
9. The apparatus according to claim 8, wherein, At least a portion of each of the first signal path and the second signal path is configured as a coplanar waveguide or a stripline waveguide.
10. The apparatus according to claim 8, the apparatus further comprising two or more conductive vias disposed on either side of each of the first signal path and the second signal path, wherein, Each of the two or more conductive vias is electrically connected to the conductive material layer.
11. The apparatus according to claim 7, wherein, The spatial orientation of the first signal path is symmetric with the spatial orientation of the second signal path.
12. The apparatus according to claim 7, wherein, Each of the first MEMS switch and the second MEMS switch has a stem corresponding to a first contact and at least two throws associated with at least a second contact and a third contact, wherein the second contact and the third contact are symmetrically distributed with respect to the first contact.
13. An apparatus for switching differential signals, the apparatus comprising: A first microelectromechanical system (MEMS) switch mounted on a multi-layer component, the first MEMS switch having a first MEMS switch input that is selectively electrically connected to one of a first MEMS switch first output and a first MEMS switch second output; A second MEMS switch mounted on the multi-layer component, the second MEMS switch having a second MEMS switch input that is selectively electrically connected to one of a second MEMS switch first output and a second MEMS switch second output; The multi-layer component has a top surface, a bottom surface, a first edge, a second edge, a third edge, and a fourth edge, the first edge and the second edge are opposite each other, and the third edge and the fourth edge are opposite each other, the multi-layer component includes: - At least two conductive material layers, with each pair of adjacent conductive material layers separated by an electrically insulating layer; - An input port disposed at the first edge, the input port including a first input conductor and a second input conductor; - A first output port disposed on the second edge, the first output port including a first output conductor and a second output conductor; - A second output port disposed on the second edge, the second output port including a third output conductor and a fourth output conductor; The first input conductor is electrically connected to the first MEMS switch input through a first input signal path on one of the at least two conductive material layers; The first output of the first MEMS switch is electrically connected to the first output conductor through a first output signal path passing through two or more of the at least two conductive material layers; The second output of the first MEMS switch is electrically connected to the third output conductor through a second output signal path passing through two or more of the at least two conductive material layers; The second input conductor is electrically connected to the second MEMS switch input through a second input signal path on the one of the at least two conductive material layers; The first output of the second MEMS switch is electrically connected to the second output conductor through a third output signal path passing through two or more of the at least two conductive material layers; and The second output of the second MEMS switch is electrically connected to the fourth output conductor through a fourth output signal path passing through two or more of the at least two conductive material layers; The first input signal path and the second input signal path are configured such that the impedance characteristics of the first input signal path and the impedance characteristics of the second input signal path are substantially the same.
14. The apparatus according to claim 13, wherein, Each of the first signal path and the second signal path is disposed between two conductive material layers fixed at a common voltage potential, one of the two conductive material layers is immediately above the signal path, and the other of the two conductive material layers is immediately below the signal path.
15. The apparatus according to claim 14, wherein, At least a portion of each of the first path and the second path is arranged as a coplanar waveguide or a stripline waveguide.
16. The apparatus according to claim 14, the apparatus further includes two or more conductive vias disposed on either side of each of the first signal path and the second signal path, wherein, Each of the two or more conductive vias is electrically connected to the conductive material layer.
17. The apparatus according to claim 13, wherein, The spatial orientation of the first input signal path is symmetric with the spatial orientation of the second input signal path.
18. The apparatus according to claim 13, wherein, Each of the first MEMS switch and the second MEMS switch has a rod corresponding to a first contact and at least two throws associated with at least a second contact and a third contact, wherein the second contact and the third contact are symmetrically distributed with respect to the first contact.
19. The device according to claim 13, wherein, the first output signal path and the third output signal path are configured such that the impedance characteristics of the first output signal path and the impedance characteristics of the third output signal path are substantially the same.
20. The device according to claim 13, wherein, the second output signal path and the fourth output signal path are configured such that the impedance characteristics of the second output signal path and the impedance characteristics of the fourth output signal path are substantially the same.
Citation Information
Patent Citations
High-frequency switch
US20140253260A1
Cited By
Waveguide switch driving circuit
CN122245991A