Delay function storage optimization method based on double-loop array, controller and computer program product

Abstract

The invention discloses a double-loop array storage optimization method, a controller and a computer program product, and relates to the technical field of delay task processing. The time-delay function storage optimization method based on the double-cycle array comprises the following steps: acquiring original data and setting a time-delay parameter, and constructing an original cycle array according to the original data; and performing initial delay on the original cyclic array according to the set delay parameter to construct a high-speed cyclic array with the length being a first parameter value. Data values are obtained from the high-speed cycle array according to a discrete algorithm to construct a low-speed cycle array with the length being a second parameter value, and the product of the first parameter value and the second parameter value is smaller than or equal to the length of the original cycle array; and restoring the original data according to the low-speed cycle array. By adopting the technology provided by the invention, the occupancy rate of the system space can be reduced while the data reading rate can be effectively ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of delayed task processing, and particularly to a method for optimizing the storage of a double circular array, a controller, and a computer program product. Background Art

[0002] A delay function is a commonly used function in fields such as signal processing, control systems, and computer science, and is used to simulate or implement the delay effect of signals, data, or operations. To save time resources, traditional delay functions generally use circular arrays, and its principle is that when the delay length value is large, using a circular buffer can improve the execution speed. However, this method will cause a significant increase in the number of copy operations when the delay length is large, thereby increasing the consumption cost of time resources. For example, when a given array with a length of 400 is used, when using a linear array buffer, each time the delay state is updated, it is necessary to copy array elements one by one, and its operation is complex and inefficient.

[0003] Based on this, a circular buffer (Circular Buffer) is currently introduced to implement the delay function in the form of a circular array, so that no matter how the delay length changes, the complexity of its operation does not change significantly with the increase of the delay length, thereby optimizing the system time resources, but it still needs to occupy a large amount of RAM space to store array data. For a system with relatively tight space resources, this kind of occupation will affect the system performance and limit the application of the system. Summary of the Invention

[0004] The present invention provides a method for optimizing the storage of a double circular array, a controller, and a computer program product to solve the problem that the delay function in the prior art occupies a large amount of system resource space when processing tasks.

[0005] To solve the above technical problems, in a first aspect, the technical solution adopted by the present invention is to provide a method for optimizing the storage of a delay function based on a double circular array, and the method for optimizing the storage of a delay function based on a double circular array includes: Obtain original data and set delay parameters, and construct an original circular array according to the original data; perform initial delay on the original circular array according to the set delay parameters to construct a high-speed circular array with a length of a first parameter value.

[0006] Obtain data values in the high-speed circular array according to a discrete algorithm to construct a low-speed circular array with a length of a second parameter value, where the product of the first parameter value and the second parameter value is less than or equal to the length of the original circular array; restore the original data according to the low-speed circular array.

[0007] The beneficial effects brought by the technical solution provided by the present invention compared with the prior art are: By using a double circular array structure (i.e., a high-speed circular array and a low-speed circular array), the requirement for the storage space of the original data can be significantly reduced. Among them, the combination of the high-speed circular array and the low-speed circular array can achieve the compact storage of data and optimize the utilization rate of storage resources. Compared with the current circular buffer that realizes the delay function through the circular array, the above method can reduce the spatial length of the system while ensuring the data reading speed, thereby greatly reducing the occupation of the system space. In addition, the first parameter value and the second parameter value can also be adaptively adjusted according to the characteristics of the actually deployed system to improve the versatility of the above storage method to meet different data processing scenarios.

[0008] In some embodiments, obtaining data values from the high-speed circular array according to the discrete algorithm to construct a low-speed circular array with a length of the second parameter value includes: calculating the discrete time t according to the set delay parameter T, denoted as:

[0009] where T represents the set delay parameter and m represents the length of the high-speed circular array; discretizing the high-speed circular array according to the discrete time.

[0010] In some embodiments, obtaining data values from the high-speed circular array according to the discrete algorithm to construct a low-speed circular array with a length of the second parameter value further includes: the square root value of the first parameter value, the second parameter value and the length of the original array are equal.

[0011] Adopting the above technical solution, when the first parameter value and the second parameter value are equal to the square root value of the length of the original array, it is possible to minimize the total length of the circular array while ensuring that all the original data is covered, thereby reducing the requirement for the system storage space and balancing the processing speeds of the high-speed circular array and the low-speed circular array, and reducing the delay state during the data processing.

[0012] In some embodiments, the delay function storage optimization method based on the double circular array further includes: Constructing a secondary low-speed circular array based on the low-speed circular array, where the secondary low-speed circular array is used to store the data of the previous moment in the low-speed circular array; integrating the data values of the corresponding low-speed circular array and the data values of the secondary low-speed circular array according to a preset weight coefficient to restore the original data. Adopting the above technical solution, by adding a secondary low-speed circular array, the accuracy of restoring the data can be improved.

[0013] In some embodiments, the step of integrating the low-speed circular array value and the secondary low-speed circular array value according to a preset weight coefficient to restore the original data further includes: calculating the average value of the data value corresponding to the K-th moment of the low-speed circular array and the data value corresponding to the (K-1)-th moment of the secondary low-speed circular array; and denoting the average value as the original data restored corresponding to the K-th moment.

[0014] In some embodiments, the data storage methods for constructing the high-speed circular array with a first parameter value and the low-speed circular array with a second parameter value are FIFO.

[0015] With the above technical solution, FIFO is a first-in-first-out data storage method. By constructing the high-speed circular array and the low-speed circular array in this way, it can ensure that data is processed and stored in the order in which it arrives, so as to maintain the consistency and predictability of data processing.

[0016] In a second aspect, the present application further provides a controller, which includes an MCU unit, and the MCU unit is used to execute the above-mentioned delay function storage optimization method based on a double circular array.

[0017] With the above technical solution, when the above-mentioned delay function storage optimization method based on a double circular array is used in circuit design to delay the step signal of a delay circuit, it can be directly deployed in the MCU unit without modifying the original hardware circuit.

[0018] In some embodiments, the controller includes: a first register unit and a second register unit. The first register unit is used to perform an initial delay on the original circular array according to a set delay parameter to construct a high-speed circular array with a first parameter value; and the second register unit is used to obtain data values from the high-speed circular array according to a discrete algorithm to construct a low-speed circular array with a second parameter value.

[0019] In a third aspect, the present application further provides a computer program product, which includes computer programs / instructions, and when the computer programs / instructions are executed by a processor, the above-mentioned delay function storage optimization method based on a double circular array is implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings, where: Figure 1It is a flowchart illustration of an embodiment of a method for optimizing the storage of delay functions based on a double - loop array provided by the present invention Figure 1 ; Figure 2 It is a structural block diagram of an embodiment of a method for optimizing the storage of delay functions based on a double - loop array provided by the present invention Figure 1 ; Figure 3 It is a schematic diagram of a data - processing structure of an embodiment of a method for optimizing the storage of delay functions based on a double - loop array provided by the present invention Figure 1 ; Figure 4 It is a schematic diagram of a data - processing structure of an embodiment of a method for optimizing the storage of delay functions based on a double - loop array provided by the present invention Figure 2 ; Figure 5 It is a waveform comparison of a simulation experiment of an embodiment of a method for optimizing the storage of delay functions based on a double - loop array provided by the present invention Figure 1 ; Figure 6 It is a waveform comparison of a simulation experiment of an embodiment of a method for optimizing the storage of delay functions based on a double - loop array provided by the present invention Figure 2 ; Figure 7 It is a structural block diagram of an embodiment of a method for optimizing the storage of delay functions based on a double - loop array provided by the present invention Figure 2 ; Figure 8 It is a flowchart illustration of an embodiment of a method for optimizing the storage of delay functions based on a double - loop array provided by the present invention Figure 2 ; Figure 9 It is a waveform comparison of a simulation experiment of an embodiment of a method for optimizing the storage of delay functions based on a double - loop array provided by the present invention Figure 3 ; Figure 10 It is a schematic diagram of a data - processing structure of an embodiment of a method for optimizing the storage of delay functions based on a double - loop array provided by the present invention Figure 3 . Detailed implementation manners

[0021] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention

[0022] See Figures 1 to 4 as shown Figure 1Shows the flowchart of an embodiment of an optimized method for storing delay functions based on a double - loop array provided by the present application Figure 1 ; Figure 2 Shows the structural block diagram of an embodiment of an optimized method for storing delay functions based on a double - loop array provided by the present application; Figure 3 Shows the schematic diagram of the data - processing structure of an embodiment of an optimized method for storing delay functions based on a double - loop array provided by the present application Figure 1 ; Figure 4 Shows the schematic diagram of the data - processing structure of an embodiment of an optimized method for storing delay functions based on a double - loop array provided by the present application Figure 2 。

[0023] In some embodiments, the optimized method for storing delay functions based on a double - loop array includes: Step S100, obtaining the original data and the set delay parameter, and constructing an original loop array according to the original data.

[0024] The delay function needs to delay the input signal according to the set delay parameter. Exemplarily, as shown in Figure 2 , CarrWaveRatio represents the input signal, and its data type is uint16. Taking the circuit system as an example, the acquisition method of the original data can be other electronic devices such as sensors, switches, buttons, or a digital signal processor (DSP), etc. The original signal is adjusted through a multiplier, an adder, etc., and superimposed with the set delay parameter to realize the adjustment of the signal, thereby constructing the original loop array.

[0025] In some application scenarios, the original data can also be generated by a computer or a micro - processor, and processed through a software control program to achieve Figure 5 or Figure 6 the waveform example diagram of the simulation experiment shown.

[0026] Step S200, performing an initial delay on the original loop array according to the set delay parameter to construct a high - speed loop array with a length of the first parameter value.

[0027] Combined with Figure 2In the subsystem shown, storing the adjusted original data includes: delaying the original circular array formed by the original data through a delay unit for storage in the inner-loop circular array (i.e., the high-speed circular array). Specifically, in the form of FIFO (First In, First Out), the data or tasks that enter the high-speed circular array earliest can have a higher priority. For example, when the original data is a step signal u[n] that needs to be delayed by m time lengths, delay the length m of the high-speed circular array and store it cyclically in the high-speed circular array with a length of m (the first parameter value), so as to realize the delay of the original step signal and maintain the consistency and predictability of data processing.

[0028] Step S300, obtaining data values from the high-speed circular array according to the discrete algorithm to construct a low-speed circular array with a length of the second parameter value.

[0029] In the high-speed circular array with a fixed length of m (the first parameter value), obtain data values at any fixed position point and store them in the low-speed circular array with a length of n, forming a relative structure diagram as shown in Figure 3 and Figure 4 shown. Exemplarily, the low-speed circular array also adopts the FIFO storage method, so that the tasks or signals stored first can have a higher priority. Through discrete time beats, continuously store them in the low-speed circular array with a length of n (the second parameter value).

[0030] Exemplarily, discretize the high-speed circular array according to discrete time, and the discrete time of the low-speed circular array is expressed as: . Where T represents the set delay parameter, and m represents the length of the high-speed circular array; for example, when the length of the original circular array is 400, the high-speed circular array is stored at a discrete time of 50 us, and the length of the high-speed circular array is 20, the discrete time of the low-speed circular array is . That is, in the high-speed circular array with a discrete time beat of 50 us, grab the data values in the high-speed circular array at a time beat of 1 ms and store them in the low-speed circular array, that is, grab one data value every m units in the high-speed circular array to form the low-speed circular array.

[0031] Where the product of the first parameter value and the second parameter value is less than or equal to the length of the original circular array. For example, when the length of the original circular array is 400, by constructing the high-speed circular array and the low-speed circular array, the length can be reduced to the sum of the length of the high-speed circular array (20) and the low-speed circular array (20), that is, 40.

[0032] Step S400, restoring the original data according to the low-speed circular array and the high-speed circular array.

[0033] To restore the complete data from the optimized stored data, for example, at a time tick of 1 ms, restore the low-speed circular array to the position of the original circular array with a length of 400. It can be combined with the difference algorithm or the reconstruction algorithm to reconstruct the original data through the low-speed circular array and the high-speed circular array.

[0034] In the embodiments of the present application, through the above double circular array structure, the storage requirements can be effectively reduced, and the efficiency of the system in data processing can be ensured. Among them, the high-speed circular array is used to ensure the rapid acquisition and processing of data, while the low-speed circular array is used to optimize the storage usage and reduce the occupancy of RAM. Compared with the current array circular method, it can provide a more balanced data processing method.

[0035] In some embodiments, in step S300, to obtain data values from the high-speed circular array according to the discrete algorithm to construct a low-speed circular array with a length of the second parameter value, it further includes: the first parameter value, the second parameter value, and the square root value of the length of the original array are equal.

[0036] In the embodiments of the present application, the length m of the high-speed circular array and the length n of the low-speed circular array are both less than the total length of the original circular array to achieve the optimization of the data storage space. That is, the length m of the high-speed circular array and the length n of the low-speed circular array represent the total number of stored data values, and this value being less than or equal to the total length can achieve covering all data values with less storage space.

[0037] Exemplarily, when the length m of the high-speed circular array is equal to the length n of the low-speed circular array, the minimum storage space can be obtained, thereby ensuring covering all data values while minimizing the occupancy of the storage space. When the first parameter value and the second parameter value are equal to the square root value of the original array length, it is possible to minimize the total length of the circular array while ensuring covering all original data, thereby reducing the demand for the system storage space, balancing the processing speeds of the high-speed circular array and the low-speed circular array, and reducing the delay state during the data processing.

[0038] For example, when the length of the original circular array is 400, the length of the high-speed circular array can be taken as 20, and the length of the low-speed circular array can be taken as 20.

[0039] See Figures 5 to 6 as shown Figure 5 shows the waveform comparison of a simulation experiment of an embodiment of a delay function storage optimization method based on a double circular array provided by the present application Figure 1 ; Figure 6 shows the waveform comparison of a simulation experiment of an embodiment of a delay function storage optimization method based on a double circular array provided by the present application Figure 2 .

[0040] In some application scenarios, when the length of the low-speed circular array (i.e., the outer-loop circular array) is 20, the discrete time is multiplied by 20 for the high-speed circular array (i.e., the time base of the inner-loop circular array). That is, in the time period from 3.01 s to 3.02 s, compared with the array of the original circular data, the data of the low-speed circular array reaches a maximum of 0.91. Then, compared with the original data, the error rate of the restored data of the low-speed circular array is -9%.

[0041] As shown in combination with Figure 6 When the length of the low-speed circular array (i.e., the outer-loop circular array) is 19, compared with the array of the original circular data, the data of the low-speed circular array reaches a maximum of 1.085. Compared with the original data, the error rate of the restored data of the low-speed circular array is 8.5%.

[0042] Therefore, there are errors when restoring the original array with the high-speed circular array and the low-speed circular array. As shown in combination with Figures 7 to 8 shown Figure 7 shows the structural block diagram of an embodiment of a method for optimizing the storage of delay functions based on a double circular array provided by the present application Figure 2 ; Figure 8 shows the flow schematic diagram of an embodiment of a method for optimizing the storage of delay functions based on a double circular array provided by the present application Figure 2 .

[0043] In some embodiments, the method for optimizing the storage of delay functions based on a double circular array further includes: Step S310: Construct a secondary low-speed circular array based on the low-speed circular array.

[0044] The ratio between the data restored according to the low-speed circular array and the original data may be greater than 1 (positive difference) or less than 1 (negative difference). In other words, there is still a large error between the data restored according to the low-speed circular array and the original data. By performing step S310 to construct a secondary low-speed circular array, which is used to store the data of the previous moment in the low-speed circular array, so that when the original data needs to be restored, the secondary low-speed circular array can average the data values of the current moment and the previous moment, thereby reducing the error between the restored data and the original data.

[0045] As shown in combination with Figure 7 shown, the averaging of the leading and lagging of the low-speed circular array is achieved through the secondary low-speed circular array. Exemplarily, BUFF[n] is the low-speed circular array, and a secondary low-speed circular BUFF2[1] is added, where BUFF2[1] is the value of the previous moment of BUFF[n]. If the current operation is at the k-th moment of the BUFF[n] array, BUFF2[1] is the value of the (k - 1)-th moment of the BUFF[n] array.

[0046] Step S410: Integrate the data values of the corresponding low-speed circular array and the data values of the secondary low-speed circular array according to the preset weight coefficient to restore the original data.

[0047] The preset weight coefficient is used to adjust the value bias between the output at time K and the output at time K - 1. For example, Figure 7 as shown, the preset weight coefficient is 0.5, that is, the average value of time K and time K - 1 is used as the output of the low-speed circular array.

[0048] In the embodiments of the present application, combined with Figure 9 as shown, Figure 9 the waveform comparison of the simulation experiment of an embodiment of a delay function storage optimization method based on a double circular array provided by the present application is shown. Figure 3 . By increasing the length of one array as described above, that is, increasing the current storage length (the sum of the length m of the high-speed circular array and the length n of the low-speed circular array) by 1, the error value of the system can be significantly reduced. For example, Figures 5 to 6 as shown, the system error is generally about 8.5%. By adding a secondary low-speed circular array, it can be reduced to Figure 9 as shown, 4.5%.

[0049] In some implementation schemes, Figure 10 the schematic diagram of the data processing structure of an embodiment of a delay function storage optimization method based on a double circular array provided by the present application is shown. Figure 3 .

[0050] In some application scenarios, when it is necessary to restore the value before Buff

[400] @50us, for example, when it is necessary to restore the data value at time K = 201, it is necessary to lag the data value at time K = 201 of the current 400 lengths so that the old data value can be accessed and used before the data is updated. The restoration method can be: Directly obtain the data value at time K = 201 in the low-speed circular array Buff_LF

[20] @1ms. Since the update frequency of the low-speed circular array is 1ms, then calculate 201 / 20 to get 10. In other words, Buff_LF

[11] @1ms contains the required data value. Find the corresponding high-speed value at time K = 201 in the high-speed circular array Buff_HF

[20] @50us. Since the update frequency of the high-speed circular array is 50us, then calculate 201%20 to get 1. In other words, Buff_HF[1]@50us contains the required data value. Combine the data of Buff_LF

[11] @1ms and Buff_HF[1]@50us to obtain the desired restored value.

[0051] Among them, directly using Buff_LF

[11] @1ms or Buff_LF

[10] @1ms for restoration, this single-loop array method is prone to the single-bias problem, that is, the restored value is prone to being too large or too small.

[0052] Restoring based on the average of Buff_LF

[11] @1ms and Buff_HF[1]@50us is prone to being greatly affected by the data in the high-speed loop array, resulting in low data restoration stability. Therefore, by introducing the secondary loop array as described above and using the average of Buff_LF

[11] @1ms and Buff_HF[1]@50us to restore the midpoint value first (taking the preset weight coefficient as 0.5), the averaging process can greatly reduce the deviation and ensure the accuracy of the restored data.

[0053] Among them, the value of the preset weight coefficient in this application is not limited. For example, when the influence of the high-speed loop array is large, the value of the preset weight coefficient can also be reduced to make it more biased towards the low-speed loop array, thereby further improving the accuracy of the restored data.

[0054] Specifically, integrating the low-speed loop array value and the secondary low-speed loop array value according to the preset weight coefficient to restore the original data further includes: calculating the average value of the data value corresponding to the K moment of the low-speed loop array and the data value corresponding to the K-1 moment of the secondary low-speed loop array; recording the average value as the original data restored corresponding to the K moment.

[0055] In some embodiments, this application also provides a control system, including an MCU unit, and the MCU unit is used to execute the above-mentioned delay function storage optimization method based on a double loop array.

[0056] In the embodiments of this application, when the above-mentioned delay function storage optimization method based on a double loop array is used in circuit design to delay the step signal of the delay circuit, it can be directly deployed in the MCU unit without modifying the original hardware circuit.

[0057] In some embodiments, the controller includes: a first register unit and a second register unit. The first register unit is used to perform initial delay on the original loop array according to the set delay parameter to construct a high-speed loop array with a length of the first parameter value; the second register unit is used to obtain data values from the high-speed loop array according to the discrete algorithm to construct a low-speed loop array with a length of the second parameter value.

[0058] In some embodiments, this application also provides a computer program product, and the computer program product includes computer programs / instructions. When the computer programs / instructions are executed by a processor, the above-mentioned delay function storage optimization method based on a double loop array is implemented.

[0059] Those skilled in the art should understand that the embodiments of the present invention can be provided as a method, a system or a computer program product. Those skilled in the art can clearly understand that each implementation can be realized by means of software plus a necessary general hardware platform, and of course, it can also be realized by hardware. Based on such an understanding, the above technical solution, in essence, or the part that contributes to the prior art can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods of each embodiment or some parts of the embodiments.

[0060] The above description is only for the implementation modes of the present invention, and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present invention, or directly or indirectly applied in other related technical fields, shall be covered by the protection scope of the present invention.

Claims

1. A delay function storage optimization method based on a double loop array, characterized in that: include: Get the original data and set the delay parameters, and build the original loop array according to the original data; Performing an initial delay on the original loop array according to the set delay parameter to construct a high-speed loop array with a length of the first parameter value; Acquire data values ​​in the high-speed loop array according to a discrete algorithm to construct a low-speed loop array with a length of a second parameter value, wherein the product of the first parameter value and the second parameter value is less than or equal to the length of the original loop array; The original data is restored according to the low-speed cycle array.

2. The delay function storage optimization method based on double loop array according to claim 1 is characterized in that: The step of acquiring data values ​​in the high-speed loop array according to a discrete algorithm to construct a low-speed loop array having a length of a second parameter value includes: The discrete time t is calculated according to the set delay parameter T, which is recorded as: Where T represents the set delay parameter, and m represents the length of the high-speed loop array; The high-speed loop array is discretized according to the discrete time.

3. The delay function storage optimization method based on double loop array according to claim 1 is characterized in that: The method of obtaining data values ​​in the high-speed loop array according to a discrete algorithm to construct a low-speed loop array with a length of a second parameter value also includes: the square root value of the first parameter value, the second parameter value and the length of the original array is equal.

4. The delay function storage optimization method based on a double loop array according to any one of claims 1 to 3, characterized in that: The delay function storage optimization method based on the double loop array also includes: Constructing a secondary low-speed circulation array based on the low-speed circulation array, wherein the secondary low-speed circulation array is used to store the data of the previous moment in the low-speed circulation array; The data value of the corresponding low-speed cycle array and the data value of the secondary low-speed cycle array are integrated according to a preset weight coefficient to restore the original data.

5. The delay function storage optimization method based on double loop array according to claim 4 is characterized in that: The step of integrating the low-speed cycle array value and the secondary low-speed cycle array value according to a preset weight coefficient to restore the original data further includes: Calculate the average value of the data value corresponding to the time of the low-speed cycle array K and the data value corresponding to the time of the secondary low-speed cycle array K-1; The average value is recorded as the original data restored corresponding to the K moment.

6. The delay function storage optimization method based on double loop array according to claim 1 is characterized in that: The data storage method of the high-speed loop array having a construction length of the first parameter value and the low-speed loop array having a construction length of the second parameter value is FIFO.

7. A controller, characterized in that: Also includes: An MCU unit, wherein the MCU unit is used to execute the delay function storage optimization method based on a double loop array as described in any one of claims 1 to 6.

8. The controller according to claim 7, characterized in that: The controller comprises: A first register unit, the first register unit being used to perform an initial delay on the original loop array according to a set delay parameter to construct a high-speed loop array having a length equal to a first parameter value; The second register unit is used to obtain data values ​​in the high-speed loop array according to a discrete algorithm to construct a low-speed loop array with a length equal to a second parameter value.

9. A computer program product, comprising a computer program / instruction, wherein the computer program / instruction, when executed by a processor, implements the delay function storage optimization method based on a double loop array as described in any one of claims 1 to 6.

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