Display device and driving method thereof

Abstract

The invention provides a display device and a driving method thereof, the display device comprises a display panel, the display panel comprises a gate driver, scanning lines, data lines and a plurality of sub-pixels, and the gate driver is configured to output scanning signals to the scanning lines; the source driver is configured to output a data signal to the data line; the demultiplexer is configured to distribute the data signals output by the source driver to the corresponding data lines; a buffer memory configured to store the data signal transmitted by the data line; the data comparator is configured to output an instruction signal after reading that the data signal stored in the buffer memory has repeated adjacent rows; and the time schedule controller is configured to reduce the switching frequency of the multiplexers corresponding to the repeated adjacent rows after receiving the instruction signal, and reduce the output potential of the source drivers corresponding to the repeated adjacent rows. The multiplexer keeps a low potential state from the second row in the repeated rows, so that the switching frequency is obviously reduced, and the power consumption of the display panel is reduced.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and particularly to a display device and a driving method thereof. Background Art

[0002] The power consumption of a low-temperature polysilicon thin-film transistor liquid crystal display device (LTPS TFT-LCD) is determined by various factors, including the power consumption of the multiplexer in the display device, the power consumption of the gate driving circuit, the power consumption of the display area, the logic consumption of the driving chip, the analog power consumption of the driving chip, and the power consumption of the backlight source, etc. When the display device is in a state of higher brightness or higher refresh rate, the power consumption may be higher. Therefore, how to reduce the power consumption of the display device has always been an issue that needs to be continuously improved. Summary of the Invention

[0003] Embodiments of the present application provide a display device and a driving method thereof to solve the problem of high power consumption of the display device.

[0004] To solve the above problems, the technical solutions provided by the present application are as follows:

[0005] In a first aspect, the present application provides a display device, including:

[0006] A display panel, including a gate driver, scan lines, data lines, and a plurality of sub-pixels. Each of the sub-pixels is electrically connected to one of the scan lines and one of the data lines. The gate driver is electrically connected to the scan lines, and the gate driver is configured to output a scan signal to the scan lines;

[0007] A source driver, electrically connected to the data lines, and the source driver is configured to output a data signal to the data lines;

[0008] A multiplexer, electrically connected to the source driver and electrically connected to at least one column of the sub-pixels through the data lines, and the multiplexer is configured to distribute the data signal output by the source driver to the corresponding data lines;

[0009] A buffer memory, configured to store the data signal transmitted by the data lines;

[0010] A data comparator, electrically connected to the buffer memory, and the data comparator is configured to output an instruction signal after reading that there are repeated adjacent rows in the data signal stored in the buffer memory; and

[0011] A timing controller, electrically connected to the data comparator, is configured to reduce the switching frequency of the multiplexer corresponding to the repeated adjacent rows and reduce the output potential of the source driver corresponding to the repeated adjacent rows after receiving the instruction signal.

[0012] In one embodiment, among the multiple sub-pixels, for multiple sub-pixels in the same row, sub-pixels of the same color are connected to the same output signal line of the multiplexer, and each sub-pixel is controlled by a thin-film transistor;

[0013] The thin-film transistor is configured to conduct when receiving the scan signal;

[0014] The source driver is configured to output a data signal to the data line when the thin-film transistor conducts;

[0015] The multiplexer is configured to select the data signal required for the current row when the thin-film transistor conducts.

[0016] In one embodiment, the data comparator is further configured to output the instruction signal to the timing controller after detecting the start row and the end row of the repeated adjacent rows;

[0017] The timing controller is further configured to:

[0018] Control the gate driver, the source driver, and the multiplexer corresponding to the start row of the repeated adjacent rows to work according to a preset driving timing;

[0019] Control the switching frequency of the multiplexer corresponding to the second row to the end row of the repeated adjacent rows to be reduced, and the output potential of the corresponding source driver to be reduced; and

[0020] Control the source driver and the multiplexer corresponding to the pixel rows after the end row to work according to the preset driving timing.

[0021] In one embodiment, the sub-pixel includes:

[0022] The sub-pixel includes:

[0023] A pixel electrode, configured to be charged when receiving the data signal transmitted by the data line and realize the color display of the display panel by storing charges;

[0024] A parasitic capacitance, configured to maintain the storage voltage of the pixel electrode by storing charges.

[0025] In one embodiment, the timing controller is further configured to control the multiplexer corresponding to the starting row in the repeated adjacent rows to turn on after receiving the instruction signal, so that the source driver charges the pixel electrode;

[0026] The timing controller is further configured to control the multiplexers starting from the second row to turn off after receiving the instruction signal, so that the parasitic capacitance from the starting row in the repeated adjacent rows charges the pixel electrode and the parasitic capacitance of the next row.

[0027] In a second aspect, the present application provides a driving method for a display device, including:

[0028] The data comparator determines whether there are repeated adjacent rows in the display screen of the display panel according to the data signal of the display panel, and sends an instruction signal to the timing controller when there are repeated adjacent rows;

[0029] The timing controller controls the switching frequency of the multiplexer corresponding to the repeated adjacent rows to decrease according to the instruction signal, and controls the output potential of the source driver corresponding to the repeated adjacent rows to decrease.

[0030] In one embodiment, the step in which the data comparator determines whether there are repeated adjacent rows in the display screen of the display panel according to the data signal of the display panel includes:

[0031] Read the data signal row by row from the buffer memory;

[0032] Perform an operation on each row of data to generate a check value;

[0033] Starting from the starting row, compare the check value of the current row with the check value of the next row;

[0034] If it is found that the check values are equal, there are repeated adjacent rows, and continue to compare the check values of the subsequent rows until different check values appear;

[0035] Record the row number of the first identical check value as the starting row of the repeated adjacent rows, record the row number of the last identical check value as the ending row of the repeated adjacent rows, and generate an instruction signal.

[0036] In one embodiment, before the step in which the timing controller controls the switching frequency of the multiplexer corresponding to the repeated adjacent rows to decrease according to the instruction signal and controls the output potential of the source driver corresponding to the repeated adjacent rows to decrease, the driving method further includes:

[0037] At the starting row in the repeated adjacent rows, the timing controller sends a first control signal to instruct the gate driver and the source driver to work according to a preset driving timing;

[0038] The gate driver activates the scan lines of the current row according to the first control signal so that charges can be transferred from the data lines to the pixel electrodes;

[0039] The source driver provides a voltage signal to the data lines according to the first control signal;

[0040] The multiplexer switches the potential state according to the first control signal to distribute the voltage signal provided by the source driver to the corresponding data lines.

[0041] In one embodiment, the step in which the timing controller controls the switching frequency of the multiplexer corresponding to the repeated adjacent rows to decrease according to the instruction signal and controls the output potential of the source driver corresponding to the repeated adjacent rows to decrease includes:

[0042] The timing controller sends a second control signal to the gate driver, the source driver, and the multiplexer according to the instruction signal;

[0043] The gate driver maintains the scan lines in a closed state from the second row to the last row of the repeated adjacent rows according to the second control signal;

[0044] The source driver maintains the output at a first preset low potential or a high impedance state from the second row to the last row of the repeated adjacent rows according to the second control signal;

[0045] The multiplexer maintains the output at a second preset low potential from the second row to the last row of the repeated adjacent rows according to the second control signal.

[0046] In one embodiment, before the data comparator determines whether there are repeated adjacent rows in the display picture of the display panel according to the data signal of the display panel, the driving method further includes:

[0047] The buffer memory obtains the pixel data to be transmitted to the display panel from the input end of the display device and sends the pixel data to the data comparator;

[0048] Wherein, the pixel data includes the data signal to be transmitted by the data lines.

[0049] The display device of the present application includes a display panel, which includes a gate driver, scan lines, data lines, and a plurality of sub-pixels. Each of the sub-pixels is electrically connected to one of the scan lines and one of the data lines. The gate driver is electrically connected to the scan lines, and the gate driver is configured to output scan signals to the scan lines; a source driver, which is electrically connected to the data lines, and the source driver is configured to output data signals to the data lines; a multiplexer, which is electrically connected to the source driver and is electrically connected to at least one column of the sub-pixels through the data lines, and the multiplexer is configured to distribute the data signals output by the source driver to the corresponding data lines; a buffer memory, which is configured to store the data signals transmitted by the data lines; a data comparator, which is electrically connected to the buffer memory, and the data comparator is configured to output an instruction signal after reading that there are repeated adjacent rows in the data signals stored in the buffer memory; and a timing controller, which is electrically connected to the data comparator, and the timing controller is configured to reduce the switching frequency of the multiplexer corresponding to the repeated adjacent rows and reduce the output potential of the source driver corresponding to the repeated adjacent rows after receiving the instruction signal. Through the above solution, compared with the original periodic switching between high and low potentials of the multiplexer, the multiplexer of the present application maintains a low potential state starting from the second row in the repeated rows, significantly reducing the switching frequency, reducing the power consumption of the multiplexer on the display panel, and thus also reducing the power consumption output by the source driver, which is beneficial to improving the battery life and service life of the display device. Description of the Drawings

[0050] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those skilled in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0051] Attached Figure 1 is a schematic structural diagram of the display device in the embodiment of the present application;

[0052] Attached Figure 2 is a schematic diagram of the gate drive scan of the display device in the embodiment of the present application;

[0053] Attached Figure 3 is a schematic diagram of the driving principle of the multiplexer and the source driver in the embodiment of the present application;

[0054] Attached Figure 4 is a schematic diagram of some modules of the display device in the embodiment of the present application;

[0055] Attached Figure 5 is a schematic diagram of the repeated rows in the display device in the embodiment of the present application;

[0056] Attached Figure 6 is a schematic diagram of the driving timing of the starting row of adjacent repeated rows in the embodiment of the present application;

[0057] Attached Figure 7 is a schematic diagram of the driving timing of multiple rows in adjacent repeated rows in the embodiment of the present application.

[0058] 1. Display device; 100. Display panel; 110. Gate driver; 120. Sub-pixel; 121. Pixel capacitor; 122. Parasitic capacitor; 200. Source driver; 300. Multiplexer; 400. Buffer memory; 500. Data comparator; 600. Timing controller. Detailed implementation manners

[0059] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts shall fall within the protection scope of the present application.

[0060] Referring to Figure 1 as shown, according to the first aspect of the present application, the present application provides a display device 1, which at least includes a display panel 100, a source driver 200, and a multiplexer 300. Specifically, referring to Figure 2 as shown, the display panel 100 includes a gate driver 110, a plurality of scan lines, a plurality of data lines, and a plurality of sub-pixels 120. Among them, each sub-pixel 120 is electrically connected to a scan line and a data line, the gate driver 110 is electrically connected to the scan line, and the gate driver 110 is configured to output a scan signal to the scan line; the source driver 200, which is electrically connected to the data line, and the source driver 200 is configured to output a data signal to the data line; the multiplexer 300, which is electrically connected to the source driver 200 and electrically connected to at least one column of sub-pixels 120 through the data line, and the multiplexer 300 is configured to distribute the data signal output by the source driver 200 to the corresponding data line.

[0061] More specifically, referring to Figure 2 as shown, each sub-pixel 120 includes a pixel electrode and a parasitic capacitor 122. Among them, the pixel electrode is configured to charge when receiving the data signal transmitted by the data line and realize the color display of the display panel 100 by storing charges, and the parasitic capacitor 122 is configured to maintain the storage voltage of the pixel electrode by storing charges.

[0062] It should be noted that, in a general driving process of the display panel 100, each row of scan lines is activated in sequence to turn on the TFT in the sub-pixel 120, and then the data line transmits a corresponding signal to the sub-pixel 120 to charge the pixel electrode. When the TFT is turned off, the parasitic capacitor 122 will store the charge until the next time the sub-pixel 120 rewrites the signal to keep the voltage of the pixel electrode unchanged.

[0063] Reference Figure 3 As shown, among the multiple sub-pixels 120, among the multiple sub-pixels 120 in the same row, the sub-pixels 120 of the same color are connected to the same output signal line of the multiplexer 300, and each sub-pixel is controlled by a thin film transistor; the thin film transistor is configured to be turned on when receiving a scan signal; the source driver is configured to output a data signal to the data line when the thin film transistor is turned on; the multiplexer is configured to select the data signal required for the current row when the thin film transistor is turned on. It should be noted that the transistors used in the embodiments of the present application can be thin film transistors or field effect transistors or other devices with the same characteristics. The material of the active layer of the transistor used in the present application can be not only amorphous silicon material, but also oxide material, and the present application is not limited here.

[0064] In addition, transistors can be divided into N-type and P-type according to their characteristics. Since the transistors used in the embodiments of the present application are based on N-type transistors, the working level signal in the embodiments of the present application and the accompanying drawings refers to a high-level signal, and the non-working level signal is a low-level signal. It is conceivable that the use of P-type transistors is something that a person skilled in the art can easily think of without creative work, and therefore it is also within the scope of protection of the embodiments of the present application.

[0065] When the scan line of each row is turned on, the demultiplexer 300 under each corresponding row can provide the voltage output by the output channel of a source driver 200 to the corresponding data line in a time-sharing manner in one scan line. In some embodiments, the demultiplexer 300 can provide the voltage output by the output channel of a source driver 200 to two, three or six corresponding data lines in a time-sharing manner. It should be noted that when the output voltage signal of an output channel of the source driver is distributed to two data lines, within one scan cycle, the demultiplexer will alternately provide the voltage signal to the two data lines. Similarly, in other embodiments, the demultiplexer will sequentially provide the voltage signal to three or six data lines. Under these architectures, the number of source drivers can be reduced and the resolution of the display panel can be provided. However, in the related art, the output voltage of the demultiplexer will also always be in an AC changing state.

[0066] Specifically, in this driving mode, the multiplexer 300 needs to be turned on in time when each row of the gate driver 110 is scanned. At this time, the output timing of the gate driver 110 is a periodic high-level and low-level conversion timing. The corresponding multiplexer 300 will also be periodically switched with the output timing of the gate driver 110, which increases the power consumption of the display panel 100. While the multiplexer 300 is periodically switched, the source driver 200 will also continue to output a driving voltage to the data line, thereby charging the pixel electrode, which also increases the power consumption of the display panel 100.

[0067] Reference Figure 4 As shown, in order to reduce the power consumption of the demultiplexer 300, in some embodiments of the present application, the display device 1 of the present application further includes at least a buffer memory 400, a data comparator 500 and a timing controller 600. The buffer memory 400 is configured to store the data signal transmitted by the data line; the data comparator 500 is electrically connected to the buffer memory 400, and the data comparator 500 is configured to output a command signal after reading that the data signal stored in the buffer memory 400 has repeated adjacent rows; the timing controller is electrically connected to the data comparator 500, and the timing controller is configured to reduce the switching frequency of the demultiplexer 300 corresponding to the repeated adjacent rows after receiving the command signal, and reduce the output potential of the source driver 200 corresponding to the repeated adjacent rows. It should be noted that in some embodiments, the switching frequency of the demultiplexer 300 can also be reduced to 0, that is, during this period of time, the output of the demultiplexer 300 will continue to remain in a low potential state.

[0068] More specifically, see Figure 5 As shown, when the data received by the sub-pixels 120 of the Nth row to the N+Xth row is repeated data, the display device 1 detects the starting row and the ending row of the repeated row through the data comparison module, and then sends a dynamically adjusted command signal to the timing controller. After receiving the command signal, the timing controller controls the gate driver, source driver and multiplexer corresponding to the starting row of the repeated adjacent row to work according to the preset driving timing; controls the switching frequency of the multiplexer corresponding to the second row to the ending row of the repeated adjacent row to be reduced, and the output potential of the corresponding source driver to be reduced; and controls the source driver and multiplexer corresponding to the pixel row after the ending row to work according to the preset driving timing. It can be understood that the preset driving timing is the driving timing of the display panel when it receives the display screen data of non-repeated adjacent rows.

[0069] It should be noted that the repeated adjacent rows in the embodiments of the present application are described as a single group. The repeated adjacent rows may appear multiple times in a frame and are distributed in different positions. The starting row and the ending row only refer to the first row of pixels and the last row of pixels in the repeated adjacent rows of a single group.

[0070] In some embodiments, the algorithm for the data comparison module to determine the start row and end row of the duplicate rows may adopt the verification algorithms commonly used by driving chips in related technologies. Specifically, perform cyclic redundancy check (CRC) or checksum operations on each row of data in the buffer memory, and then compare the checksum values of each row. The start row and end row with consecutive equal values can be located.

[0071] Referring to Figure 6 and Figure 7 shown, the output waveforms of the demultiplexer 300 and the source driver 200 corresponding to the adjusted duplicate rows are presented, where Figure 6 is the output waveform of the demultiplexer 300 and the source driver 200 corresponding to the first row in the repeated X rows, Figure 7 is the output waveform of the demultiplexer 300 and the source driver 200 corresponding to all duplicate rows except the first row in the repeated X rows.

[0072] Among them, referring to Figure 6 shown, after receiving the instruction signal, the timing controller will control the gate driver 110 corresponding to the first row in the repeated X rows to be normally turned on, which also makes the corresponding demultiplexer 300 normally turned on, and the corresponding source driver 200 can also charge the pixel electrode with the corresponding charge.

[0073] Referring to Figure 7 shown, in the repeated X rows, starting from the second row adjacent to the first row, after receiving the instruction signal, the timing controller will control the clock signal CK to maintain the normal scanning timing. However, during the scanning of the duplicate rows, the output of the demultiplexer 300 corresponding to the second row and subsequent rows in the duplicate rows will be maintained at a preset low potential. In some embodiments, this preset low potential can also be the gate-off voltage VGL, that is, the corresponding demultiplexers of these rows are turned off. At this time, the source driver 200 will be pulled down to the preset low potential (this preset low potential can also be grounded) or pulled to a high-impedance state by the voltage level of the previous row, that is, the outputs of the corresponding source drivers 200 are also turned off. And in the repeated X rows, since the potential on the data line of the first row continues to be maintained, the parasitic capacitance 122 in this row will charge the pixel electrodes of the second row, so that the pixel electrodes repeated below the first row will be charged with the same charge to keep the display state of the repeated X rows normal.

[0074] Compared with the periodic potential switching of the multiplexer 300 in the related art, in the display device 1 of the present application, the switching frequency of the multiplexer 300 is significantly reduced. At this time, the power loss of the multiplexer 300 on the display panel 100 is reduced. At the same time, there is also a certain benefit in the output power consumption of the multiplexer 300 of the driving chip, and the output power consumption of the source driver 200 is also correspondingly reduced.

[0075] It should be noted that, as shown in Figure 4 the display device 1 of the present application should also include a backlight control, a voltage generator, a linear regulator, a power management chip, etc., and may also include a touch system chip corresponding to the touch function. The display device 1 of the present application may also be any product or component with a display function such as a mobile phone, a tablet computer, etc., which will not be elaborated here.

[0076] According to the second aspect of the present application, based on the foregoing display device 1, the present application provides a control method for the display device 1, including:

[0077] S1: The buffer memory obtains the pixel data to be transmitted to the display panel from the input end of the display device, and sends the pixel data to the data comparator;

[0078] Among them, the pixel data includes the data signal to be transmitted by the data line.

[0079] S2: The data comparator 500 determines whether there are repeated adjacent rows in the display screen of the display panel 100 according to the data signal of the display panel 100, and sends an instruction signal to the timing controller when there are repeated adjacent rows.

[0080] Specifically, when it is determined that there are repeated adjacent rows in the display screen of the display panel 100, the data comparator 500 will also detect the starting row and the ending row of the repeated adjacent rows, and then send a dynamically adjusted instruction signal to the timing controller.

[0081] More specifically, in some embodiments, the starting row and the ending row of the repeated adjacent rows can be detected through the following steps:

[0082] Read the data signal row by row from the buffer memory;

[0083] Perform an operation on each row of data to generate a check value. As shown in Figure 5 the check value can be a binary number or other values;

[0084] Starting from the starting row, compare the check value of the current row with the check value of the next row;

[0085] If it is found that the check values are equal, there are repeated adjacent rows, and continue to compare the check values of the subsequent rows until different check values appear;

[0086] Record the line number of the first identical check value as the starting line of the repeated adjacent lines, and record the line number of the last identical check value as the ending line of the repeated adjacent lines. Then, the data comparator can generate an instruction signal based on the position information of the starting line and the ending line.

[0087] It should be noted that after the timing controller receives the instruction signal, at the starting line of the repeated adjacent lines, the timing controller sends a first control signal to instruct the gate driver and the source driver to work according to a preset driving timing. At this time, the gate driver activates the scanning lines of the current line according to the first control signal so that charges can be transferred from the data lines to the pixel electrodes, the source driver provides a voltage signal to the data lines according to the first control signal, and the multiplexer switches the potential state according to the first control signal to distribute the voltage signal provided by the source driver to the corresponding data lines.

[0088] S3: The timing controller controls the switching frequency of the multiplexer 300 corresponding to the repeated adjacent lines to decrease according to the instruction signal, and controls the output potential of the source driver 200 corresponding to the repeated adjacent lines to decrease.

[0089] Specifically, in this step, the timing controller sends a second control signal to the gate driver, the source driver, and the multiplexer according to the instruction signal;

[0090] The gate driver maintains the scanning lines in the off state from the second line to the ending line of the repeated adjacent lines according to the second control signal;

[0091] The source driver maintains the output at a first preset low potential or a high-impedance state from the second line to the ending line of the repeated adjacent lines according to the second control signal. It should be noted that the first preset low potential can also be the grounded GND state, and the high-impedance state can also be the floating state.

[0092] The multiplexer maintains the output at a second preset low potential from the second line to the ending line of the repeated adjacent lines according to the second control signal. In some embodiments, the second preset low potential can also be the gate-off voltage VGL of the display device.

[0093] It should be noted that in the repeated adjacent lines, the multiplexer 300 corresponding to the starting line is turned on following the turn-on of the gate driver 110, and the source driver charges the pixel electrodes of the corresponding display panel 100 according to the turn-on of the multiplexer 300.

[0094] Therefore, in the foregoing steps, the timing controller controls the gate driver 110 corresponding to the starting row in the repeated adjacent rows to be normally turned on, and the source driver 200 corresponding to the starting row in the repeated adjacent rows charges the pixel electrodes of the starting row. In the other rows except the starting row in the repeated adjacent rows, the timing controller maintains the normal clock scanning timing, controls the output of the demultiplexer 300 corresponding to all rows starting from the second row in the repeated adjacent rows to be maintained at the first preset low potential or high impedance state, and controls the source driver 200 corresponding to all rows starting from the second row in the repeated adjacent rows to output the second preset low potential. Compared with the periodic potential switching of the demultiplexer in the related art, in the display device of the present application, the switching frequency of the demultiplexer is significantly reduced, and the power consumption of the output of the source driver will also be correspondingly reduced. At this time, the power consumption lost on the panel demultiplexer will be reduced, and at the same time, the output power consumption of the source driver for the demultiplexer will also be reduced to a certain extent.

[0095] In summary, although the present application has been disclosed above with preferred embodiments, the above preferred embodiments are not intended to limit the present application. Those of ordinary skill in the art can make various modifications and refinements without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application is subject to the scope defined by the claims.

Claims

1. A display device, characterized in that: include: A display panel, comprising a gate driver, scan lines, data lines and a plurality of sub-pixels, each of the sub-pixels being electrically connected to one of the scan lines and one of the data lines, the gate driver being electrically connected to the scan lines, and the gate driver being configured to output scan signals to the scan lines; a source driver electrically connected to the data line, the source driver being configured to output a data signal to the data line; a multiplexer electrically connected to the source driver and electrically connected to at least one column of the sub-pixels through the data lines, the multiplexer being configured to distribute the data signal output by the source driver to the corresponding data lines; a buffer memory configured to store data signals transmitted by the data line; A data comparator is electrically connected to the buffer memory, and the data comparator is configured to output a command signal after reading that the data signal stored in the buffer memory has repeated adjacent rows; as well as A timing controller is electrically connected to the data comparator, and is configured to reduce the switching frequency of the multiplexer corresponding to the repeated adjacent rows and reduce the output potential of the source driver corresponding to the repeated adjacent rows after receiving the instruction signal.

2. The display device according to claim 1, characterized in that Among the plurality of sub-pixels, among the plurality of sub-pixels in the same row, sub-pixels of the same color are connected to the same output signal line of the demultiplexer, and each of the sub-pixels is controlled by a thin film transistor; The thin film transistor is configured to be turned on when receiving the scanning signal; The source driver is configured to output a data signal to the data line when the thin film transistor is turned on; The demultiplexer is configured to select a data signal required for a current row when the thin film transistor is turned on.

3. The display device according to claim 1, characterized in that The data comparator is further configured to output the instruction signal to the timing controller after detecting the start row and the end row of the repeated adjacent rows; The timing controller is further configured as: Controlling the gate driver, the source driver and the demultiplexer corresponding to the starting row of the repeated adjacent rows to operate according to a preset driving timing sequence; Controlling the switching frequency of the demultiplexer corresponding to the second row of the repeated adjacent rows to the termination row to be reduced, and the output potential of the corresponding source driver to be reduced; as well as The source driver and the demultiplexer corresponding to the pixel row after the termination row are controlled to operate according to the preset driving timing.

4. The display device according to claim 1, characterized in that The sub-pixel comprises: The pixel electrode is configured to be charged when receiving the data signal transmitted by the data line and realize the color display of the display panel by storing the charge; The parasitic capacitor is configured to maintain a storage voltage of the pixel electrode by storing charges.

5. The display device according to claim 4, characterized in that: The timing controller is further configured to control the demultiplexer corresponding to the starting row in the repeated adjacent rows to turn on after receiving the instruction signal so that the source driver charges the pixel electrode; The timing controller is also configured to control the multiplexer starting from the second row to be closed after receiving the instruction signal, so that the parasitic capacitance starting from the starting row in the repeated adjacent rows charges the pixel electrode and the parasitic capacitance of the next row.

6. A method for driving a display device, characterized in that: include: The data comparator determines whether there are repeated adjacent rows in the display screen of the display panel according to the data signal of the display panel, and sends a command signal to the timing controller when there are repeated adjacent rows; The timing controller controls the switching frequency of the multiplexer corresponding to the repeated adjacent rows to decrease according to the instruction signal, and controls the output potential of the source driver corresponding to the repeated adjacent rows to decrease.

7. The driving method according to claim 6, characterized in that: The step of the data comparator determining whether there are repeated adjacent rows in the display picture of the display panel according to the data signal of the display panel comprises: Reading data signals line by line from the buffer memory; Perform operations on each row of data to generate a check value; Starting from the start row, compare the checksum of the current row with the checksum of the next row; If the check values ​​are found to be equal, there are duplicate adjacent rows, and the check values ​​of subsequent rows are compared until different check values ​​appear; The row number of the first identical check value is recorded as the starting row of repeating adjacent rows, and the row number of the last identical check value is recorded as the ending row of repeating adjacent rows, and an instruction signal is generated.

8. The driving method according to claim 7, characterized in that: Before the step of controlling the switching frequency of the demultiplexer corresponding to the repeated adjacent rows to be reduced according to the instruction signal, and controlling the output potential of the source driver corresponding to the repeated adjacent rows to be reduced, the driving method further comprises: In the starting row of the repeated adjacent rows, the timing controller sends a first control signal to instruct the gate driver and the source driver to operate according to a preset driving timing; The gate driver activates the scan line of the current row according to the first control signal so that the charge can be transferred from the data line to the pixel electrode; The source driver provides a voltage signal to the data line according to the first control signal; The multiplexer switches the potential state according to the first control signal to distribute the voltage signal provided by the source driver to the corresponding data line.

9. The driving method according to claim 8, characterized in that: The steps of controlling the switching frequency of the demultiplexer corresponding to the repeated adjacent rows to be reduced according to the instruction signal and controlling the output potential of the source driver corresponding to the repeated adjacent rows to be reduced include: The timing controller sends a second control signal to the gate driver, the source driver and the demultiplexer according to the instruction signal; The gate driver maintains the scan line in a closed state from the second row to the termination row of the repeated adjacent rows according to the second control signal; The source driver maintains the output in a first preset low potential or high impedance state from the second row to the termination row of the repeated adjacent rows according to the second control signal; The demultiplexer maintains the output at a second preset low potential from the second row to the termination row of the repeated adjacent rows according to the second control signal.

10. The driving method according to claim 6, characterized in that: Before the step of determining by the data comparator whether there are repeated adjacent rows in the display picture of the display panel according to the data signal of the display panel, the driving method further comprises: The buffer memory obtains pixel data to be transmitted to the display panel from the input terminal of the display device, and sends the pixel data to the data comparator; The pixel data includes a data signal to be transmitted by the data line.

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