Method and apparatus for balancing the neutral point potential of a three-level converter with unbalanced load

By separating the positive and negative sequences of the sampling signal from the three-level converter, adding a zero-sequence component, and combining it with a potential regulator, the problem of neutral point potential offset under unbalanced load was solved, achieving rapid recovery of the neutral point potential and improved system stability.

CN120090489BActive Publication Date: 2025-12-02XI AN JIAOTONG UNIV
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Patent Information

Application Number
CN202510515768.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-04-23
Publication Date
2025-12-02
Estimated Expiration
2045-04-23

AI Technical Summary

Technical Problem

Three-level converters are prone to midpoint potential shift under unbalanced load conditions, leading to system instability, increased losses, and reduced efficiency. Existing control methods suffer from power loss and poor control performance.

Method used

By separating the positive and negative sequences of the sampled signal, calculating and adding the zero-sequence component, and combining it with the midpoint potential control of the potential regulator, three-phase voltage balance is achieved, and supplementary control is performed using external circuitry.

Benefits of technology

It effectively and quickly restores the midpoint potential, improves dynamic performance, reduces steady-state voltage fluctuations and distortion, reduces power loss, and improves system stability and efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention discloses a method and apparatus for balancing the midpoint potential of a three-level converter suitable for unbalanced loads, belonging to the field of three-level converter control technology. The method includes the following steps: Step 1: Separating the positive and negative sequences of the sampled signal to achieve a three-phase balanced voltage output; Step 2: Calculating the ideal zero-sequence component to be added to the modulation wave; Step 3: Analyzing the adjustment capability of adding the ideal zero-sequence component. If the adjustment capability is satisfied, proceed to Step 4; otherwise, jump to Step 7; Step 4: Correcting the modulation wave symbol in the ideal zero-sequence component; Step 5: Designing a potential regulator for the zero-sequence voltage based on the corrected modulation wave symbol; Step 6: Limiting the sum of the zero-sequence component generated by the potential regulator and the ideal zero-sequence component; Step 7: Using an external balancing circuit to perform midpoint balancing; The three-level converter stops operating, and the process ends. This invention achieves midpoint potential balance in a three-level converter by adding a zero-sequence component to the modulation.
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Description

Technical Field

[0001] This invention belongs to the field of three-level converter control technology, specifically relating to a method and device for balancing the midpoint potential of a three-level converter suitable for unbalanced loads. Background Technology

[0002] Three-level converters are widely used due to their relatively simple structure and high-voltage, high-power application characteristics. Three-level converters need to operate stably under various conditions, such as load imbalance and grid voltage imbalance, to achieve a given power output. Therefore, control methods for three-level converters, such as balancing the DC-side neutral point potential and smooth switching between grid-connected and off-grid operation, have always been key technologies in three-level topology research. Technical defects in three-level converter control can lead to neutral point offset, generating low-order harmonics in the output voltage. External imbalances can also inject negative-sequence current into the neutral point, exacerbating the neutral point potential offset. Currently, commonly used methods for controlling neutral point voltage balance include external circuits and improved modulation. Modulation methods include setting a time factor to change the action time of positive and negative small vectors and adding a zero-sequence component to the modulation wave.

[0003] External balancing methods have several different circuit topologies. For example, using a multi-tap transformer and two three-phase rectifier circuits to obtain two independent DC voltage sources for power supply; adding different converters to the neutral point of the bus capacitor to inject or extract current to the neutral point, and using a front-end boost circuit to control the neutral point voltage balance; or using a back-to-back structure to control the neutral point voltage balance, all of which can effectively maintain neutral point potential balance. However, external circuits all require the operation of switching devices, resulting in power losses.

[0004] In modulation methods, setting the time factor essentially relies on the opposing effects of positive and negative small vectors on the midpoint potential in SVPWM. The balance of the midpoint potential is maintained by changing the duration of these vectors' action. The main research focuses on improving the control method itself and refining the setting of the time factor. However, this method can only be applied to vector modulation. Adding a zero-sequence component achieves charge conservation per unit time by introducing a zero-sequence component into the modulation wave, thereby maintaining the balance of the midpoint potential.

[0005] Three-phase output voltage imbalance can lead to system instability, motor overheating and vibration, increased system losses, and reduced overall system efficiency. Under unbalanced operating conditions, both the power grid and the load are negatively affected. Since large-capacity three-phase inverters typically handle mixed loads, suppressing unbalanced conditions is crucial. Under unbalanced conditions, positive and negative sequence separation control is necessary to achieve output targets, such as balanced three-phase voltage or current. Under unbalanced loads, balanced three-phase voltage is required. However, the negative sequence current in the three-phase current will affect the neutral point potential balance, leading to a significant neutral point potential shift. This affects system stability, causes uneven voltage distribution on the DC-side capacitors, and can result in device failures. Summary of the Invention

[0006] To address the shortcomings of existing technologies, this invention proposes a method and apparatus for balancing the neutral point potential of a three-level converter suitable for unbalanced loads. By separating the positive and negative sequences of the sampled signal and controlling them separately, the balanced output of the three-phase voltage is achieved. The influence of unbalanced current, especially negative sequence current, is eliminated by adding a zero-sequence component to the modulation.

[0007] To achieve the above objectives, the present invention adopts the following technical solution:

[0008] In a first aspect, the present invention provides a method for balancing the neutral point potential of a three-level converter suitable for unbalanced loads, comprising the following steps:

[0009] Step 1: Separate the positive and negative sequences of the sampled voltage and current signals to obtain the positive and negative sequence components of the voltage and current signals. Control the positive and negative sequence components of the voltage and current signals respectively to output a three-phase balanced voltage.

[0010] Step 2: Calculate the ideal zero-sequence component that needs to be added to the modulation wave to achieve midpoint potential equilibrium under ideal conditions;

[0011] Step 3: Analyze the adjustment capability of adding the ideal zero-sequence component. If the adjustment capability is satisfied, proceed to step 4; otherwise, proceed to step 7.

[0012] Step 4: Correct the modulation wave symbol in the ideal zero-sequence component;

[0013] Step 5: Based on the corrected modulation wave symbol, design a potential regulator for the zero-sequence voltage;

[0014] Step 6: Limit the final added zero-sequence voltage component. The final added zero-sequence voltage component is the sum of the zero-sequence component generated by the potential regulator and the ideal zero-sequence component. The limited final added zero-sequence voltage component is superimposed on the modulation wave to obtain the improved modulation wave. The improved modulation wave is used to output the switching control signal of the three-level converter so that the DC side midpoint potential remains balanced.

[0015] Step 7: Use an external balancing circuit to perform midpoint balancing. If the three-level converter does not stop running, jump to step 1; if the three-level converter stops running, end the process.

[0016] Furthermore, in step 2, the formula for calculating the ideal zero-sequence component to be added to the modulated wave is:

[0017]

[0018] Among them, i np0 =[-sign(v a )·i a -sign(v b )·i b -sign(v c )·i c ];

[0019] i npav =(1-v a ·sign(v a ))·i a +(1-v b ·sign(v b ))·i b +(1-v c ·sign(v c ))·i c ;

[0020] Where C represents the capacitance values ​​of the upper DC capacitor C1 and the lower DC capacitor C2 of the three-level converter, and U... dc1 U is the voltage of the upper DC capacitor. dc2 Let i be the voltage of the lower DC capacitor. npav For the average midpoint current, T s f represents the unit switching cycle. s Indicates the switching frequency, i np0 and i npav v is an intermediate variable. a v b v c i represents the three-phase modulation amplitude of the converter. a i b i c This represents the three-phase output current of the converter, and sign is the sign verification function.

[0021] Furthermore, step 3 includes the following steps:

[0022] Step 3.1: Calculate the interval of the ideal zero-sequence component V0 in the unstandardized environment. The calculation formula is as follows:

[0023]

[0024] Where δ represents the midpoint voltage imbalance, and the maximum, median, and minimum values ​​of the three-phase modulation amplitude in the uncontrolled three-phase system are denoted as Vmax, Vmin, ... max V mid V min ;

[0025] Step 3.2: Simplify to obtain the ideal zero-sequence component V in the uncontrolled per-unit state. o The maximum value V omax and minimum value V omin for:

[0026]

[0027] Step 3.3, use s to represent V mid +V o The sign is used to characterize the change in the sign of the modulated wave;

[0028] Based on the value of s and -V mid Range, analyze the required addition of zero-sequence component V under various conditions o The maximum and minimum values ​​are the upper and lower bounds of the controllable zero-sequence voltage range.

[0029] Step 3.3, according to Estimate the ideal zero-sequence component V0 in uncontrolled per-unit conditions, where V dc The bus voltage on the DC side; if V0 is within the controllable voltage range, proceed to step 4; otherwise, proceed to step 7.

[0030] Furthermore, step 4 includes the following steps: determining sign(v) mid ) = sign(v mid Does +v0) hold true? If not, change sign(v) mid ) = sign(v mid +v0) in the intermediate variable i npav with i np0 The sign in the expression is updated, and the ideal zero-order component is updated; if true, the ideal zero-order component is not updated; where sign(v mid ) represents the median value of the three-phase modulation amplitude.

[0031] Furthermore, in step 5, the zero-sequence component v'0 generated by the potentiometer is:

[0032]

[0033] Where C represents the capacitance values ​​of the upper DC capacitor C1 and the lower DC capacitor C2 of the three-level converter, and U...dc1 U is the voltage of the upper DC capacitor. dc2 f is the DC capacitor voltage. s Indicates the switching frequency, i m The value is taken as the amplitude of the three-phase positive sequence current. This represents the phase difference between the modulated wave and the output current.

[0034] Furthermore, in step 5, the transfer function of the potentiometer is:

[0035]

[0036] In the formula: W NPVR Let s be the regulator transfer function, s be the Laplace operator, and K be the regulator transfer function. CP K is the proportional gain of the PI controller; CI τ is the integral coefficient; c is the time constant.

[0037] Furthermore, in step 6, the final added zero-sequence voltage component is limited using the following formula:

[0038]

[0039] Where v0 is the ideal zero-sequence component, v'0 is the output of the potentiometer, and v max v is the maximum value among the three-phase modulation wave amplitude values. min It is the minimum value among the three-phase modulation wave amplitude values.

[0040] Secondly, the present invention provides a neutral point potential balancing device for a three-level converter suitable for unbalanced loads, comprising:

[0041] At least one processor; and,

[0042] A memory communicatively connected to the at least one processor; wherein,

[0043] The memory stores instructions executable by the at least one processor, which, when executed, enable the at least one processor to perform a three-level converter midpoint potential balancing method for unbalanced loads as described in any one of the first aspects of the invention.

[0044] Thirdly, the present invention provides a computer-readable storage medium storing a computer program, characterized in that, when the computer program is executed by a processor, it implements the method for balancing the midpoint potential of a three-level converter suitable for unbalanced loads as described in any one of the first aspects of the present invention.

[0045] Fourthly, the present invention provides a computer program product, comprising a computer program, characterized in that, when the computer program is executed by a processor, it implements the steps of the method for balancing the midpoint potential of a three-level converter suitable for unbalanced loads as described in any one of the first aspects of the present invention.

[0046] Compared with the prior art, the present invention has at least the following beneficial technical effects:

[0047] This invention provides a midpoint potential control method combining an ideal zero-sequence component and a potential regulator. By superimposing the ideal zero-sequence component and the zero-sequence component generated by the potential regulator onto the modulated wave, it achieves midpoint potential balance in a three-level converter. Ideal feedforward effectively and quickly restores the potential, improving the dynamic performance of the midpoint balance. Feedback from the zero-sequence component generated by the potential regulator reduces voltage fluctuations and distortion rate in steady state. Furthermore, by analyzing the extreme values ​​of the zero-sequence component, it can be determined whether an external balancing circuit is needed. External circuits require switching devices to operate, resulting in significant power loss. Within a controllable range, external circuits are not required, providing a safety net in case of loss of control. Attached Figure Description

[0048] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0049] Figure 1 A flowchart of the method for balancing the neutral point potential of a three-level converter suitable for unbalanced loads provided by the present invention;

[0050] Figure 2 This is a structural topology diagram of a T-type three-level grid-connected converter according to an embodiment of the present invention;

[0051] Figure 3 This is the basic dq-axis decoupling control block diagram of the present invention;

[0052] Figure 4 This is a mathematical model diagram of the potential feedback regulator according to an embodiment of the present invention;

[0053] Figure 5 This is a block diagram of potential balance control in an embodiment of the present invention;

[0054] Figure 6a In this embodiment of the invention, the negative sequence current generated by the converter under unbalanced operating conditions leads to an aggravated potential shift.

[0055] Figure 6b The waveform diagram of potential regulation after adding zero-sequence component to the converter in the embodiment of the invention;

[0056] Figure 7 This is a potential balance process diagram of the converter in an embodiment of the present invention;

[0057] Figure 8a In this embodiment of the invention, the negative sequence current generated by the converter under unbalanced operating conditions leads to an aggravated potential shift.

[0058] Figure 8b The waveform diagram of potential adjustment after adding zero-sequence component to the converter in an embodiment of the present invention;

[0059] Figure 9 The diagram shows the potential balance dynamics and steady-state semi-physical experimental results of the converter in an embodiment of the present invention.

[0060] Figure 10a In this embodiment of the invention, the negative sequence current generated by the converter under unbalanced operating conditions leads to an aggravated potential shift.

[0061] Figure 10b The waveform diagram of potential adjustment after adding zero-sequence component to the converter in an embodiment of the present invention;

[0062] Figure 11 The diagram shows the dynamic and steady-state experimental results of the potential balance of the converter in an embodiment of the present invention. Detailed Implementation

[0063] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0064] To enable those skilled in the art to better understand the technical solutions of this invention, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this invention.

[0065] It should be noted that when an element is referred to as being "set on" another element, it can be directly on the other element or may be interposed with another element. When an element is considered to be "connected" to another element, it can be directly connected to the other element or may be interposed with another element. The terms "upper," "lower," "front," "rear," "left," "right," "top," "bottom," "inner," and "outer," etc., used herein to indicate orientation or positional relationships are based on the orientation or positional relationships shown in the accompanying drawings and are only for the convenience of describing the invention and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention.

[0066] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0067] Example 1

[0068] Reference Figure 1 A method for balancing the neutral point potential of a three-level converter suitable for unbalanced loads is characterized by maintaining the balance between the three-phase output voltage and the DC side neutral point potential under various real-world operating conditions. The method includes the following steps:

[0069] Step 1: Separate the positive and negative sequences of the sampled voltage and current signals, and achieve a balanced three-phase output voltage by controlling the positive and negative sequences respectively.

[0070] Design an all-pass filter The amplitude-frequency response is 1, and the phase-frequency response has a 90° delay at 50Hz. This is used to construct a phase-shifting circuit to generate a 90° phase delay at the fundamental frequency of 50Hz. The transformation matrix is ​​obtained; this transformation matrix is ​​used to separate the positive and negative order of the sampled voltage and current signals. The process of separating the positive and negative order of voltage is as follows.

[0071] The measured three-phase voltage signals are transformed from the abc coordinate system to the αβ coordinate system to obtain the components of the three-phase voltages on the α and β axes. Based on the instantaneous symmetrical component method and the transformation matrix, the three-phase positive-sequence voltage and the three-phase negative-sequence voltage can be obtained from the three-phase voltages on the α and β axes. Formulas (1) and (2) are the formulas for transforming the three-phase voltage signals:

[0072]

[0073] Among them, u ap u bp u cp This is the three-phase positive sequence voltage; u an u bn u cn This is the three-phase negative sequence voltage; u α u β These are the components of the three-phase voltage on the α and β axes.

[0074] After separating the positive and negative sequences of the voltage and current signals, the positive and negative sequence components are controlled separately. The control flow is as follows: A d-q conversion is performed to decouple the d- and q-axis components of the voltage and current. Then, the voltage and current signals on the d- and q-axis are controlled independently to achieve the voltage or current control objective. The decoupling control process is as follows: Figure 3 As shown.

[0075] Figure 3 This is a control block diagram based on circuit modeling and dq-axis decoupling control. The d-axis component represents the reference current value before filtering. The q-axis component represents the reference current value before filtering. The d-axis component represents the actual current value before filtering. The q-axis component represents the actual current value before filtering. The d-axis component represents the current reference value after filtering. The q-axis component represents the current reference value after filtering. The d-axis component represents the actual value of the filtered current. The d-axis component represents the actual value of the filtered current. This represents the d-axis component of the output voltage setpoint after the converter has been filtered. This represents the q-axis component of the output voltage setpoint after the converter has been filtered. The d-axis component represents the actual value of the output voltage after the converter is filtered. ω represents the q-axis component of the actual output voltage after the converter is filtered. b L represents the fundamental angular frequency of the power grid. m R m C f Filter inductor, inductor parallel resistor, capacitor.

[0076] When the control objective is three-phase voltage balance, the negative sequence component of the three-phase voltage is controlled to be 0, while the positive sequence component outputs the required rated voltage. This controls the converter to output a balanced three-phase voltage, with the positive and negative sequences of the three-phase currents participating in the control as an inner current loop.

[0077] Step 2: Calculate the zero-sequence component that needs to be added to the modulation wave to achieve midpoint potential balance under ideal conditions.

[0078] After control was implemented, the parameters were calibrated per unit, and the ideal zero-sequence component added at this time was set to v0.

[0079] Based on the analysis of different switching states, the midpoint injection current i per unit time np (t) can be represented as the synthesis of the current controlled by the switching state:

[0080] i np (t)=(1-|Sa |)i a +(1-|S b |)i b +(1-|S c |)i c (3)

[0081] Among them, i a i b i c This represents the three-phase output current of the converter. S a S b S c This indicates the switching state of each of the three phases a, b, and c. When S a =-1, 0, 1 are used to represent the three working states of a single bridge arm: 1 indicates that the bridge arm is connected to a high level, 0 indicates that the bridge arm is connected to the midpoint, and -1 indicates that the bridge arm is connected to a low level.

[0082] The average charge ΔQ1 flowing into the midpoint within a unit switching cycle can be expressed as:

[0083]

[0084] Among them, v a v b v c This represents the three-phase modulation amplitude of the converter. npav For the average midpoint current, T s Indicates the unit switching cycle. `sign` is the sign verification function, and `v`... a When it is positive, sign(v) a ) is 1; v a When it is 0, sign(v) a ) is 0; v a When it is negative, sign(v) a The value is -1.

[0085] In the modulated wave v x After superimposing the ideal zero-sequence component v0, the modulated wave with the ideal zero-sequence component added is obtained as follows: x = a, b, c represents one of the three phases a, b, c. First, assume that adding a zero-sequence component does not change the sign of the modulated wave. The average charge ΔQ2 flowing into the midpoint per unit switching cycle is:

[0086]

[0087] in, The modulation waves after adding ideal zero-sequence components to the three phases a, b, and c, respectively.

[0088] As can be seen, after superimposing the zero-sequence component v0, the change in the charge flowing into the neutral point ΔQ is:

[0089] ΔQ=[-sign(v a )·i a -sign(v b )·i b -sign(v c )·i c ]·v0·T s =i np0 ·v0·T s (6)

[0090] Among them, i np0 =[-sign(v a )·i a -sign(v b )·i b -sign(v c )·i c ], i np0 As an intermediate variable;

[0091] In actual operating conditions, many of the aforementioned influences will also exist. The resulting potential shift, taken as the initial midpoint charge Q0, is expressed as:

[0092] Q0=C(U dc1 -U dc2 (7)

[0093] Among them, the upper DC capacitor C1 and the lower DC capacitor C2 have the same capacitance value of C, U dc1 U is the voltage of the upper DC capacitor. dc2 This is the DC capacitor voltage.

[0094] According to the law of conservation of charge, the magnitude of the superimposed ideal zero-sequence component v0 is:

[0095]

[0096] Among them, f s Indicates the switching frequency, i npav =(1-v a ·sign(v a ))·i a +(1-v b ·sign(v b ))·i b +(1-v c ·sign(v c ))·i c i npav It is an intermediate variable.

[0097] Step 3: Analyze the adjustment capability of the superimposed ideal zero-sequence component v0.

[0098] Define the voltage difference ΔU between the upper and lower DC capacitors and the total DC voltage U. dc The ratio is the midpoint voltage unbalance δ:

[0099]

[0100] The interval of the ideal zero-sequence component V0 in non-perimeter control is:

[0101]

[0102] Among them, the maximum, median, and minimum values ​​of the three-phase modulation amplitude in non-perimeter control are denoted as V. max V mid V min .

[0103] Simplification yields the ideal zero-sequence component V in the uncontrolled per-unit state. o The maximum value V omax and minimum value V omin for:

[0104]

[0105] Let s represent V mid +V o The sign of s is used to characterize the change in the sign of the modulated wave. Table 1 summarizes the values ​​of s under different conditions.

[0106] Table 1 shows the values ​​of s.

[0107]

[0108] Ideal zero-sequence component V in non-perimeter control o The range of values ​​is limited, depending on the value of s and -V. mid Range, analyze the required addition of zero-sequence component V under various conditions o extreme point V o-1 V o-2 and V o-3 See Table 2.

[0109] Table 2V o Extreme point values

[0110]

[0111] The maximum and minimum values ​​represent the upper and lower bounds of the controllable zero-sequence voltage range. (This is from an ideal calculation.) Among them, V dc This is the DC bus voltage; it is estimated from this. If V0 is within the controllable voltage range, continue to step 4; otherwise, jump to step 7.

[0112] Step 4: Verify and update the modulation wave symbol in the ideal zero-sequence component.

[0113] Suppose the three-phase modulated wave v after per unit is... x The maximum, median, and minimum values ​​of the amplitude are denoted as v. max v mid v min In the three-phase modulation amplitude values, only the intermediate value may change sign after adding the zero-sequence component. Verify the intermediate value sign(v) of the three-phase modulation amplitude values. mid The sign of sign(v) can be used to determine the sign(v) mid ) = sign(v mid If +v0) holds true, then the estimated value of the zero-sequence injection voltage is correct; otherwise, correct sign(v) by checking if it holds true. mid ) = -sign(v mid +v0), changes its value in in p av and in p0 The symbols in the middle are updated, and the zero-order components are updated.

[0114] Step 5: Design a zero-sequence voltage potential regulator. The zero-sequence component v'0 generated by the potential regulator is used as feedback for the DC-side capacitor voltage difference. This is then combined with the ideal zero-sequence component and superimposed on the modulation wave to obtain the improved modulation wave v'. x ;

[0115] If a zero-sequence component v'0 is added, the average charge ΔQ2 flowing into the midpoint per unit switching cycle is:

[0116]

[0117] Among them, v y (y = a, b, c) represents the phase voltage with the opposite sign to the other two phase voltages, i y For v y The corresponding phase current. The modulation waves are obtained by adding the zero-sequence component v'0 generated by the regulator to the three phases a, b, and c, respectively.

[0118] One inverter cycle The average value is:

[0119]

[0120] Among them, i m The value is taken as the amplitude of the three-phase positive sequence current. This represents the phase difference between the modulated wave and the output current.

[0121] Therefore, by replacing the instantaneous current with the average current, we obtain...

[0122]

[0123] Taking the initial charge into account, the zero-sequence component v'0 generated by the regulator is obtained as follows:

[0124]

[0125] The transfer function of the NPVR (Neutral Point Voltage Regulator) regulator is designed as follows:

[0126]

[0127] In the formula: W NPVR Let s be the regulator transfer function, s be the Laplace operator, and K be the regulator transfer function. CP K is the proportional gain of the PI controller; CI τ is the integral coefficient; c The time constant is used. Therefore, the overall control structure is as follows: Figure 4 As shown. Figure 4 In the middle, ΔU * The given value is the voltage difference between the upper and lower capacitors, ΔU is the voltage difference between the upper and lower capacitors, and i * The current input to the DC-side neutral point is given by the given value, where i is the current input to the DC-side neutral point. K is determined according to the control framework. CP and K CI .

[0128] The open-loop transfer function of the midpoint potential is:

[0129]

[0130] The closed-loop transfer function of the midpoint potential is:

[0131]

[0132] Step 6: Limit the final added zero-sequence voltage component.

[0133] like Figure 5 As shown, v0 is the ideal zero-sequence component, and v'0 is the output of the potentiometer. The two are combined and added to the modulation wave v. x Generate the improved modulation wave v' x The final added zero-sequence voltage component is the sum of the zero-sequence component generated by the potentiometer and the ideal zero-sequence component.

[0134] Set constraints to ensure the improved modulation wave v x It has remained within the carrier range.

[0135]

[0136] Among them, v max v is the maximum value among the three-phase modulation wave amplitude values. min It is the minimum value among the three-phase modulation wave amplitude values.

[0137] Using an improved modulation wave v x As the final modulated wave output, the switching control signal of the three-level converter ensures that the DC side midpoint potential remains balanced.

[0138] Step 7: Use an external balancing circuit to balance the neutral point. Adjust the duty cycle according to the voltage difference between the upper and lower capacitors on the DC side to regulate the current injected into the neutral point, ensuring that the charge at the neutral point is conserved per unit time and that the neutral point potential remains balanced. If the three-level converter does not stop running, proceed to step 1. If the three-level converter stops running, the process ends.

[0139] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0140] To overcome the shortcomings of existing technologies, this invention proposes a midpoint potential balance method based on the combination of an ideal zero-sequence component and a potential regulator. By adding a zero-sequence component to the three-phase modulation wave to change the duration of different switching states, the current injected into the midpoint is adjusted, thereby maintaining midpoint potential balance. This method can also be used to analyze the control range and control capability of the control method for the potential.

[0141] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0142] Figure 2 This is a test system for a T-type three-level grid-connected converter. The DC side input bus voltage is used, and C1 and C2 are the bus capacitors. U dc Through a three-phase three-level switching device S a1 S a2 S a3 S a4 S b1 S b2 S b3 S b4 S c1 S c2 S c3 S c4 Running, it outputs a three-level square wave, which passes through L m1 R mC f L m2 The three-phase LCL filter circuit filters out noise and outputs a three-phase sinusoidal signal, which is then connected to the power grid via a three-phase grid-connected switch. x (x = a, b, c) represents the output voltage before three-phase filtering, u fx (x = a, b, c) is the capacitor voltage, u gx (x = a, b, c) represents the converter output voltage, i mx (x = a, b, c) represents the converter output current, Z gx (x = a, b, c) represents the load carried by the three phases; Figure 3 Based on circuit modeling and control block diagram of dq axis decoupling control.

[0143] Figure 4 Here is a mathematical model diagram of a potential feedback regulator, where i * Let v0' be the average current drawn from the midpoint caused by the zero-sequence component v0' within one carrier cycle, i be the original average current drawn from the midpoint within one carrier cycle, and i0 be the average current drawn from the midpoint after adding the zero-sequence component v0' within one carrier cycle. The ideal zero-sequence component v0 and the output result v'0 of the potentiometer are calculated and then combined and added to the modulation wave v. x Generate the improved modulation wave v' x .

[0144] Figure 5 The block diagram for adding midpoint potential control to the overall zero-sequence component, i x In the given information, x = a, b, c.

[0145] The DC input is 800V. It operates under three-phase unbalanced conditions of 10 ohms, 15 ohms and 20 ohms through positive and negative sequence separation and outputs three-phase balanced voltage. The small and medium vectors in the positive and negative sequence currents inject current into the neutral point, thereby generating potential shift. Figure 6a and Figure 6b This is a comparison of the simulation results of converter potential balancing. Before balancing, the large amount of zero-sequence current injected under unbalanced operating conditions caused the potential shift to intensify, as shown in the figure. Figure 6a As shown. After adding the zero-sequence component, the potential is adjusted as follows: Figure 6b As shown. Figure 7 This is a simulation diagram of the potential equilibrium process. The method described above can quickly and effectively suppress midpoint potential imbalance. Figure 6a and Figure 7 The comparison shows that the method has excellent dynamic performance. Figure 6b It can be seen that the voltage distortion rate is low and the voltage fluctuation range is small in steady state, as shown in Figure 6 and... Figure 7 In the diagram, the red line represents the voltage of the lower capacitor, and the black line represents the voltage of the upper capacitor.

[0146] Figure 8a , Figure 8b and Figure 9 These are comparisons of potential balance effects and dynamic steady-state effects in semi-physical experiments. Figure 8a and 8b In the diagram, the green line represents the voltage of the upper capacitor, and the orange line represents the voltage of the lower capacitor. Figure 9 In the diagram, the red line represents the voltage of the upper capacitor, and the purple line represents the voltage of the lower capacitor; the conclusion is the same as the simulation. The experiment was conducted with a 300V DC input. Figure 10a , Figure 10b and Figure 11 These are comparisons of potential balance effects and dynamic steady-state effects in physical experiments. Figure 10a and Figure 10b The dark blue line represents the upper capacitance, and the light blue line represents the lower capacitance, consistent with the conclusions drawn from the hardware-in-the-loop experiment and simulation. This demonstrates that the method can achieve the desired midpoint potential control effect.

[0147] Example 2

[0148] This embodiment provides a neutral point potential balancing device for a three-level converter suitable for unbalanced loads, including a processor and a memory, the processor and the memory being connected via a bus; the memory is used to store a computer program, the computer program including program instructions, and the processor is used to execute the program instructions stored in the computer storage medium to implement the neutral point potential balancing method for a three-level converter suitable for unbalanced loads of the present invention. The specific content of this method has been described in detail in Embodiment 1, and will not be repeated in this embodiment.

[0149] This specification uses specific examples to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. Furthermore, those skilled in the art will recognize that, based on the ideas of the present invention, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for balancing the neutral point potential of a three-level converter suitable for unbalanced loads, characterized in that, Includes the following steps: Step 1: Separate the positive and negative sequences of the sampled voltage and current signals to obtain the positive and negative sequence components of the voltage and current signals. Control the positive and negative sequence components of the voltage and current signals respectively to output a three-phase balanced voltage. Step 2: Calculate the ideal zero-sequence component that needs to be added to the modulation wave to achieve midpoint potential equilibrium under ideal conditions; Step 3: Analyze the adjustment capability of adding the ideal zero-sequence component. If the adjustment capability is satisfactory, proceed to step 4. If the conditions are not met, proceed to step 7; Step 4: Correct the modulation wave symbol in the ideal zero-sequence component; Step 5: Based on the corrected modulation wave symbol, design a potential regulator for the zero-sequence voltage; Step 6: Limit the final added zero-sequence voltage component. The final added zero-sequence voltage component is the sum of the zero-sequence component generated by the potential regulator and the ideal zero-sequence component. The limited final added zero-sequence voltage component is superimposed on the modulation wave to obtain the improved modulation wave. The improved modulation wave is used to output the switching control signal of the three-level converter so that the DC side midpoint potential remains balanced. Step 7: Use an external balancing circuit to perform midpoint balancing. If the three-level converter does not stop running, jump to step 1; if the three-level converter stops running, the process ends. Step 3 includes the following steps: Step 3.1: Calculate the ideal zero-sequence component in a non-per-unit controlled environment. The formula for calculating the interval is: Where δ represents the midpoint voltage imbalance, and the maximum, median, and minimum values ​​of the three-phase modulation amplitude in the uncontrolled three-phase system are denoted as follows: , , ; Step 3.2: Simplify to obtain the ideal zero-sequence component in the uncontrolled per-unit state. maximum value and minimum value for: Step 3.3, use s to represent The sign is used to characterize the change in the sign of the modulated wave; Based on the value of s and Range, analyze the required addition of zero-sequence components under different conditions. The maximum and minimum values ​​are the upper and lower bounds of the controllable zero-sequence voltage range. Step 3.3, according to Estimation of the ideal zero-sequence component in non-perimeter control ,in, v 0 for Ideal zero-order component, This is the DC-side bus voltage; if Within the controllable voltage range, proceed to step 4; if the condition is not met, proceed to step 7.

2. The method for balancing the neutral point potential of a three-level converter suitable for unbalanced loads according to claim 1, characterized in that, In step 2, the formula for calculating the ideal zero-sequence component to be added to the modulated wave is: in, ; ; Where C is the upper DC capacitor of the three-level converter. and lower DC capacitor The capacitance value, The voltage of the upper DC capacitor. The voltage across the lower DC capacitor. The average midpoint current, Indicates the unit switching cycle. Indicates the switching frequency. and As an intermediate variable, , , This represents the three-phase modulation amplitude of the converter. , , This represents the three-phase output current of the converter, and sign is the sign verification function.

3. The method for balancing the neutral point potential of a three-level converter suitable for unbalanced loads according to claim 1, characterized in that, Step 4 includes the following steps: judgment Is it true? If not, change it. In intermediate variables and The sign in the equation is determined, and the ideal zero-order component is updated; if the condition is true, the ideal zero-order component is not updated; where, This is the median value of the three-phase modulation wave amplitude.

4. The method for balancing the neutral point potential of a three-level converter suitable for unbalanced loads according to claim 1, characterized in that, In step 5, the zero-sequence component generated by the potentiometer for: ; Where C is the upper DC capacitor of the three-level converter. and lower DC capacitor The capacitance value, The voltage of the upper DC capacitor. The voltage across the lower DC capacitor. Indicates the switching frequency. The value is taken as the amplitude of the three-phase positive sequence current. This represents the phase difference between the modulated wave and the output current.

5. A method for balancing the neutral point potential of a three-level converter suitable for unbalanced loads according to claim 1, characterized in that, In step 5, the transfer function of the potentiometer is: In the formula: Let s be the regulator transfer function, and s be the Laplace operator. The proportional coefficient of the PI controller; The integral coefficient; is the time constant.

6. A method for balancing the neutral point potential of a three-level converter suitable for unbalanced loads according to claim 1, characterized in that, In step 6, the final added zero-sequence voltage component is limited using the following formula: in, For ideal zero-order components, The output of the potentiometer. It is the maximum value among the three-phase modulation wave amplitude values. It is the minimum value among the three-phase modulation wave amplitude values.

7. A neutral point potential balancing device for a three-level converter suitable for unbalanced loads, characterized in that, include: At least one processor; as well as, A memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the three-level converter midpoint potential balancing method for unbalanced loads as described in any one of claims 1 to 6.

8. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the method for balancing the midpoint potential of a three-level converter suitable for unbalanced loads as described in any one of claims 1 to 6.

9. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the method for balancing the midpoint potential of a three-level converter suitable for unbalanced loads as described in any one of claims 1 to 6.

Citation Information

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