Through-hole generation method, device, electronic device and storage medium

Abstract

The present application provides a through-hole generation method, device, electronic device and storage medium, which relates to the field of semiconductor manufacturing technology. The method includes: selecting a target thickness ratio that characterizes the thickness ratio relationship between the through-hole depth and the etch stop layer from a preset thickness ratio range, and determining the thickness of the etch stop layer based on the through-hole depth and the target thickness ratio; determining the thickness of other thin film layers except the etch stop layer in the multi-layer thin film stack structure to be generated based on the layer thickness weight corresponding to each thin film layer; generating a multi-layer thin film stack structure according to the thickness of each thin film layer; and etching the multi-layer thin film stack structure according to the high etching selectivity ratio between the dielectric layer and the auxiliary etch stop layer under a high-voltage deep hole isolation process to generate a through-hole in the multi-layer thin film stack structure. By adopting the above-mentioned through-hole generation method, device, electronic device and storage medium, the problem of low conductivity and reliability of the device under the high-voltage deep hole isolation process is solved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a through-hole generation method, device, electronic device and storage medium. Background Art

[0002] The through-hole etching process forms a vertical interconnect access (VIA) between two metal layers in a dielectric layer. Vias are crucial components in printed circuit boards (PCBs) for establishing electrical connections between different layers. As pathways connecting multiple metal layers and between the active area of a device and the external circuitry, they play a crucial role in device structure. Currently, conventional via depths are around 1μm, at which point the titanium nitride (TIN) thickness loss is minimal, around 100 angstroms, and the bottom of the via is very smooth and free of streaks.

[0003] However, in high-voltage deep-hole isolation processes, via depths as deep as 7.8μm are encountered. Due to the high RF power and high bias voltage etching process parameters, the underlying titanium nitride is subjected to significant physical bombardment, resulting in a TIN loss greater than 500 angstroms, causing severe streaking at the bottom of the via. When metal is used to fill the via, these streaks can prevent the via from being fully filled, creating localized voids or fractures, impacting device conductivity and reliability. Summary of the Invention

[0004] In view of this, the purpose of the present application is to provide a through-hole generation method, device, electronic device and storage medium to solve the problem of low conductivity and reliability of devices under high-voltage deep hole isolation process.

[0005] In a first aspect, an embodiment of the present application provides a through-hole generation method, comprising:

[0006] Selecting a target thickness ratio representing a proportional relationship between the through-hole depth and the thickness of the etch stop layer from a preset thickness ratio range, and determining the thickness of the etch stop layer based on the through-hole depth and the target thickness ratio;

[0007] Determining the thickness of other thin film layers except the etching stop layer in the multi-layer thin film stack structure to be generated based on the layer thickness weight corresponding to each thin film layer;

[0008] Generating a multi-layer thin film stack structure according to the thickness of each thin film layer, wherein the multi-layer thin film stack structure includes an etch stop layer, an etch barrier layer, and a dielectric layer deposited in sequence;

[0009] Under the high-voltage deep hole isolation process, the multi-layer thin film stack structure is etched according to the high etching selectivity ratio between the dielectric layer and the etching barrier layer to generate a through hole of the multi-layer thin film stack structure.

[0010] Optionally, determining the thickness of the etch stop layer based on the through hole depth and the target thickness ratio includes: determining the ratio of the through hole depth to the target thickness ratio as the thickness of the etch stop layer.

[0011] Optionally, the preset thickness ratio range is 60 to 70.

[0012] Optionally, based on the layer thickness weight corresponding to each thin film layer, the thickness of other thin film layers except the etching stop layer in the multi-layer thin film stack structure to be generated is determined, including: for each thin film layer, based on the ratio of the layer thickness weight of the thin film layer to the total weight, determining the layer thickness ratio corresponding to the thin film layer; based on the total thickness of the structure and the layer thickness ratio, determining the thickness of the thin film layer.

[0013] Optionally, the multi-layer thin film stack structure further includes an etch stop layer, and the thickness weight of the etch stop layer is smaller than the thickness weight of the etch barrier layer.

[0014] Optionally, the method further includes: selecting a high etching selectivity from a preset selectivity range, where the lower limit of the preset selectivity range is 10.

[0015] Optionally, the multilayer thin film stack structure is etched according to a high etching selectivity ratio between the dielectric layer and the etch stop layer, including: combining physical bombardment with chemical reaction in a first ratio to etch the portion above the etch stop layer; combining physical bombardment with chemical reaction in a second ratio to etch the etch stop layer and the portion below the etch stop layer, the energy proportion of the physical bombardment in the first ratio being lower than the energy proportion of the physical bombardment in the second ratio.

[0016] In a second aspect, an embodiment of the present application further provides a through-hole generating device, the device comprising:

[0017] A first thickness determination module is configured to select a target thickness ratio representing a proportional relationship between the through-hole depth and the thickness of the etch stop layer from a preset thickness ratio range, and determine the thickness of the etch stop layer based on the through-hole depth and the target thickness ratio;

[0018] A second thickness determination module is used to determine the thickness of other thin film layers except the etching stop layer in the multi-layer thin film stack structure to be generated based on the layer thickness weight corresponding to each thin film layer;

[0019] A structure generation module, configured to generate a multi-layer thin film stack structure according to the thickness of each thin film layer, wherein the multi-layer thin film stack structure includes an etch stop layer, an etch barrier layer, and a dielectric layer deposited in sequence;

[0020] The through-hole etching module is used to etch the multi-layer thin film stack structure according to the high etching selectivity between the dielectric layer and the etching barrier layer under the high-voltage deep hole isolation process to generate a through hole in the multi-layer thin film stack structure.

[0021] In a third aspect, an embodiment of the present application further provides an electronic device comprising: a processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor. When the electronic device is running, the processor and the memory communicate through the bus, and when the machine-readable instructions are executed by the processor, the steps of the through-hole generation method as described above are performed.

[0022] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the steps of the through-hole generation method as described above are executed.

[0023] The embodiments of the present application bring the following beneficial effects:

[0024] The embodiments of the present application provide a through-hole generation method, device, electronic device and storage medium, which can generate a thicker etch barrier layer and etch a multi-layer thin film stack structure under a high etch selectivity ratio, so that the etching process stays on the etch barrier layer as much as possible, does not contact or has little contact with the etch stop layer, reduces the bombardment of the etch stop layer, and thus reduces the number of stripes at the bottom of the through-hole, thereby improving the conductivity and reliability of the device under the high-voltage deep hole isolation process. Compared with the through-hole generation method in the prior art, it solves the problem of low conductivity and reliability of the device under the high-voltage deep hole isolation process.

[0025] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0027] Figure 1 A schematic diagram of a conventional through hole in the prior art is shown;

[0028] Figure 2 A schematic diagram of a conventional through-hole bottom in the prior art is shown;

[0029] Figure 3 A schematic diagram of a through hole in a high-voltage deep hole isolation process in the prior art is shown;

[0030] Figure 4 A schematic diagram of the bottom of a through hole in a high-voltage deep hole isolation process in the prior art is shown;

[0031] Figure 5 A flow chart of a through-hole generation method provided in an embodiment of the present application is shown;

[0032] Figure 6 A schematic diagram of a multi-layer stacking structure provided by an embodiment of the present application is shown;

[0033] Figure 7 A schematic diagram of the entire through hole provided in an embodiment of the present application is shown;

[0034] Figure 8 A schematic diagram of the bottom of the through hole provided in an embodiment of the present application is shown;

[0035] Figure 9 A schematic structural diagram of a through-hole generating device provided in an embodiment of the present application is shown;

[0036] Figure 10 A schematic structural diagram of an electronic device provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0037] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application for which protection is claimed, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, each other embodiment obtained by those skilled in the art without making creative work falls within the scope of protection of the present application.

[0038] It is worth noting that before the present application was filed, the through-hole etching process was able to form a vertical interconnect access (VIA) between two metal layers on a dielectric layer. Vias are important components in printed circuit boards (PCBs) for establishing electrical connections between different layers. Vias serve as channels for interconnecting multiple metal layers and connecting the active area of a device with the external circuit, and play an important role in the device structure. Figure 1 A schematic diagram of a conventional through hole in the prior art is shown. Figure 1 As shown, the through hole 110 is a conventional through hole, and the depth of the through hole 110 is about 1 μm. At this time, the thickness loss of titanium nitride (TIN) is relatively small, about 100 angstroms. Figure 2 A schematic diagram of a conventional through hole bottom in the prior art is shown. Figure 2As shown, the topography of the through-hole bottom 111 of the conventional through-hole is very smooth and has no stripes.

[0039] Figure 3 Schematic diagram of a through hole under a high-voltage deep hole isolation process in the prior art is shown. Figure 3 As shown, in the high-voltage deep hole isolation process, the depth of through hole 210 is relatively deep, reaching as high as 7.8 μm. At this time, due to the use of etching process parameters of high RF power and high bias voltage (or power), the physical bombardment of the bottom titanium nitride is relatively strong, resulting in a TIN thickness loss of more than 500 angstroms. High RF power may refer to a power greater than 1800 W, and high bias power may refer to a power greater than 2500 W.

[0040] Figure 4 Schematic diagram of the bottom of the through hole under the high-voltage deep hole isolation process in the prior art is shown. Figure 4 As shown, under the high-voltage deep hole isolation process, severe streaks will be generated at the bottom of the through hole 211, which will have an adverse effect when the through hole is filled with metal. When filling the through hole with metal, the streaks will cause the through hole to be incompletely filled, resulting in local voids or fractures, affecting the conductivity and reliability of the device.

[0041] Based on this, an embodiment of the present application provides a through-hole generation method to improve the conductivity and reliability of the device under the high-voltage deep hole isolation process.

[0042] See also Figure 5 , Figure 5 This is a flow chart of a through-hole generation method provided in an embodiment of the present application. Figure 5 As shown, the through-hole generation method provided in the embodiment of the present application includes:

[0043] Step S301, selecting a target thickness ratio representing a proportional relationship between the through hole depth and the thickness of the etch stop layer from a preset thickness ratio range, and determining the thickness of the etch stop layer based on the through hole depth and the target thickness ratio;

[0044] Step S302 , determining the thicknesses of other thin film layers except the etch stop layer in the multi-layer thin film stack structure to be generated based on the thickness weight corresponding to each thin film layer;

[0045] Step S303, generating a multi-layer thin film stack structure according to the thickness of each thin film layer;

[0046] Step S304 , etching the multi-layer thin film stack structure in a high-voltage deep hole isolation process according to a high etching selectivity ratio between the dielectric layer and the etch stop layer to form a through hole in the multi-layer thin film stack structure.

[0047] The through-hole generation method provided in the embodiment of the present application can generate a thicker etch barrier layer and etch a multi-layer thin film stack structure under a high etch selectivity ratio, so that the etching process stays on the etch barrier layer as much as possible, does not contact or has little contact with the etch stop layer, reduces the bombardment of the etch stop layer, and thus reduces the number of stripes at the bottom of the through-hole, thereby improving the conductivity and reliability of the device under the high-voltage deep hole isolation process, and solving the problem of low conductivity and reliability of the device under the high-voltage deep hole isolation process.

[0048] To facilitate understanding of this embodiment, each of the above exemplary steps provided in the embodiment of the present application is described below.

[0049] In step S301 , a target thickness ratio representing the proportional relationship between the through hole depth and the thickness of the etch stop layer is selected from a preset thickness ratio range, and the thickness of the etch stop layer is determined based on the through hole depth and the target thickness ratio.

[0050] In this step, the multi-layer thin film stack structure to be generated includes an adhesive layer, an etch stop layer, an etch barrier layer, an auxiliary etch stop layer, a dielectric layer and an anti-reflective coating layer deposited in sequence.

[0051] The through-hole depth may refer to the length of the through-hole. As an example, the through-hole depth may be 7.8 μm. The through-hole depth is a preset depth and needs to be obtained by etching using a high-pressure deep hole isolation process.

[0052] In an embodiment of the present application, before determining the thickness of each layer of the thin film, it is necessary to determine the basic parameters of the multilayer thin film stack structure to be generated, and the basic parameters include but are not limited to: the size of the multilayer thin film stack structure and the layer thickness weight of each layer of the thin film in the multilayer thin film stack structure, wherein the size of the multilayer thin film stack structure includes the total structural thickness of the multilayer thin film stack structure, and the total structural thickness includes the thickness of the etch stop layer, the thickness of the etch barrier layer, the thickness of the auxiliary etch stop layer, the thickness of the dielectric layer and the thickness of the anti-reflective coating. The total structural thickness of the multilayer thin film stack structure is recorded as: H.

[0053] After determining the basic parameters of the multilayer thin film stack to be generated, the via depth can be determined based on the total thickness of the structure and the device function. The etch stop layer thickness is then determined based on the via depth and the target thickness ratio. For example, the ratio of the via depth to the target thickness ratio is used as the etch stop layer thickness. Therefore, before determining the etch stop layer thickness, it is also necessary to determine the target thickness ratio, which represents the ratio of the via depth to the etch stop layer thickness. The via depth is denoted as L.

[0054] When determining the target thickness ratio, a preset thickness ratio range may be determined first, and the preset thickness ratio range determined is [60, 70]. Then, a target thickness ratio is selected from the preset thickness ratio range. For example, if the selected target thickness ratio is 65, the calculated result of L / 65 is determined as the etch stop layer thickness.

[0055] It can be seen that the thickness of the etch stop layer in this application is positively correlated with the depth of the through hole to be etched. The deeper the through hole to be etched, the thicker the etch stop layer; the shallower the through hole to be etched, the thinner the etch stop layer. In this way, by increasing the thickness of the SION layer, the through hole etching process can stay more on the SION layer, without contacting or less contacting the TIN layer, thereby achieving the purpose of reducing the bombardment of the TIN layer and reducing the bottom stripes.

[0056] In step S302 , based on the thickness weight corresponding to each thin film layer, the thicknesses of other thin film layers except the etch stop layer in the multi-layer thin film stack structure to be generated are determined.

[0057] In this step, in addition to determining the thickness of the etch stop layer, the thicknesses of other thin film layers in the multi-layer thin film stack structure also need to be determined, so as to generate the multi-layer thin film stack structure according to the thickness of each thin film layer.

[0058] In the embodiments of the present application, when determining the thickness of thin film layers other than the etch stop layer in a multi-layer thin film stack structure to be generated, the thickness ratio of each thin film layer is determined based on the ratio of the thickness weight of the thin film layer to the total weight. The thickness of the thin film layer is then determined based on the total thickness of the structure and the thickness ratio. The total weight refers to the sum of the weights of the etch stop layer, etch stop layer, auxiliary etch stop layer, dielectric layer, and anti-reflective coating.

[0059] For example, if the thickness weight of the etch stop layer is 2 and the total weight is 200, the ratio of the thickness weight of the etch stop layer to the total weight, 1%, is determined as the layer thickness ratio of the etch stop layer. Then, the product of the total thickness of the structure and the layer thickness ratio of the etch stop layer is determined as the etch stop layer thickness.

[0060] It should be noted that in this application, the thickness weight of the etch stop layer is set to be smaller than the thickness weight of the etch barrier layer. In conventional technology, the thickness weight of the etch stop layer is 3. In this application, the thickness weight of the etch stop layer is set to 1. The purpose is to balance the increase in the thickness of the etch barrier layer corresponding to the etch stop layer, so as to maintain consistency with the sum of the first thickness and the second thickness in a conventional through-hole etching process.

[0061] In addition, the thickness weight of the etch stop layer used in conventional technology is 0.5, while this application increases the thickness weight to 2. Under the same conditions, the thickness of the conventional etch stop layer is less than that of the etch stop layer used in this application. Compared to conventional technology, the thickness of the SION layer is also increased, allowing the through-hole etching process to stay more on the SION layer, without or with less contact with the TIN layer, thereby reducing the bombardment of the TIN layer and thus reducing the generation of bottom stripes.

[0062] In step S303 , a multi-layer thin film stacking structure is generated according to the thickness of each thin film layer.

[0063] In this step, an adhesion layer, an etch stop layer, an etch barrier layer, an auxiliary etch stop layer, a dielectric layer and an anti-reflection coating are sequentially deposited from bottom to top using a CVD chemical deposition method to form a multi-layer thin film stack structure.

[0064] Refer to the following Figure 6 Let's introduce the multilayer thin film stack structure.

[0065] Figure 6 A schematic diagram of a multi-layer stacking structure provided by an embodiment of the present application is shown in FIG. Figure 6 As shown, the multi-layer thin film stack structure to be generated includes an adhesion layer 510, an etch stop layer 520, an etch barrier layer 530, an auxiliary etch stop layer 540, a dielectric layer 550, an anti-reflective coating 560 and a photoresist layer 570 deposited sequentially. Among them, the bonding layer 510 can be an AL (aluminum) layer, which is used to form circuit patterns through etching; the etch stop layer 520 can be a TIN layer, that is, a titanium nitride layer; the etch barrier layer 530 can be a SION layer, that is, a silicon oxynitride layer, and the etch barrier layer 530 has both the insulating properties of SiO2 and the barrier properties of Si3N4; the auxiliary etch stop layer 540 can be an SRO layer, that is, a silicon-rich oxide layer; the dielectric layer 550 can be an OX (Oxide) layer, that is, an oxide layer; the anti-reflective coating 560 can be a DARC (Dielectric Anti-Reflective Coating) layer, also known as a dielectric anti-reflective coating, which is used to reduce light reflection during the photolithography process and improve pattern resolution; the photoresist layer 570, that is, the PR layer, is used to form a mask pattern through the photolithography process, protect areas that do not need to be etched, and is removed after etching.

[0066] In step S304 , the multi-layer thin film stack structure is etched in a high-voltage deep hole isolation process according to a high etching selectivity ratio between the dielectric layer and the etch stop layer to generate a through hole in the multi-layer thin film stack structure.

[0067] In this step, the high-voltage deep hole isolation process may refer to the use of high RF power and high bias power for through-hole drilling, wherein the high RF power is greater than 1800W and the high bias power is greater than 2500W.

[0068] In this embodiment, a multilayer thin film stack structure can be etched through holes starting from the top photoresist layer and working its way down to the bottom adhesive layer at a high RF power of 2000W and a high bias power of 2600W. When etching the dielectric layer and etch stop layer, both layers must be etched with high selectivity.

[0069] Among them, high etching selectivity refers to the ratio of the etching rate of the dielectric layer to the etching rate of the etching stop layer. The high etching selectivity can be selected from a preset selectivity range, and the lower limit of the preset selectivity range is set to 10. In this way, the etching selectivity between the dielectric layer and the etching stop layer is relatively high, which not only allows the etching process to stop on the SION layer without contacting or less contacting the TIN layer, thereby reducing the bombardment of the TIN layer, but also protects the integrity of the etching stop layer while ensuring the etching rate.

[0070] In one example, when etching a multi-layer thin film stack structure, a through-hole etching method combining physical bombardment and chemical reaction can be used. In this case, when etching the portion above the etch stop layer, a first ratio of physical bombardment and chemical reaction is used for etching; when etching the etch stop layer and the portion below the etch stop layer, a second ratio of physical bombardment and chemical reaction is used for etching. That is, when etching the photoresist layer, anti-reflective coating, dielectric layer, and auxiliary etch stop layer in sequence, physical bombardment and chemical reaction are combined in the first ratio for etching; when etching the etch stop layer, etch stop layer, and adhesive layer in sequence, physical bombardment and chemical reaction are combined in the second ratio for etching. The proportion of the energy of the physical bombardment in the first ratio is lower than the proportion of the energy in the second ratio, so that the closer to the etch stop layer, the more physical bombardment is used for etching, thereby reducing the etching speed and improving the etching accuracy.

[0071] Refer to the following Figure 7 and Figure 8 To introduce the effect of the through hole etched using the method of the present application.

[0072] Figure 7 Schematic diagram of the entire through hole provided in the embodiment of the present application is shown as follows: Figure 7 As shown, the height of the through hole 610 after etching in this application is 7.8 μm. Figure 7 The stripes at the bottom of the through hole generated by the etching method of this application are Figure 5 The stripes at the bottom of the through-holes generated by traditional etching methods are significantly reduced.

[0073] Below through Figure 8 To further compare the changes in the stripes at the bottom of the through-hole. Figure 8 Schematic diagram of the bottom of the through hole provided in the embodiment of the present application is shown as follows: Figure 8 As shown, the stripes at the bottom 611 of the through hole generated by the etching method of the present application are Figure 6 The striations at the bottom of the through-holes produced by traditional etching methods are significantly reduced.

[0074] Based on the same inventive concept, a through-hole generation device corresponding to the through-hole generation method is also provided in the embodiment of the present application. Since the principle of solving the problem by the device in the embodiment of the present application is similar to the above-mentioned through-hole generation method in the embodiment of the present application, the implementation of the device can refer to the implementation of the method, and the repeated parts will not be repeated.

[0075] See also Figure 9 , Figure 9 This is a schematic diagram of the structure of a through-hole generating device provided in an embodiment of the present application. Figure 9 As shown in , the through hole generating device 700 includes:

[0076] A first thickness determination module 701 is configured to select a target thickness ratio representing a proportional relationship between the through-hole depth and the thickness of the etch stop layer from a preset thickness ratio range, and determine the thickness of the etch stop layer based on the through-hole depth and the target thickness ratio;

[0077] A second thickness determination module 702 is configured to determine the thicknesses of other thin film layers except the etching stop layer in the multi-layer thin film stack structure to be generated based on the thickness weight corresponding to each thin film layer;

[0078] a structure generation module 703 for generating a multi-layer thin film stack structure according to the thickness of each thin film layer, wherein the multi-layer thin film stack structure includes an etch stop layer, an etch barrier layer, and a dielectric layer deposited sequentially;

[0079] The through hole etching module 704 is used to etch the multi-layer thin film stack structure according to the high etching selectivity between the dielectric layer and the etch barrier layer under the high voltage deep hole isolation process to generate a through hole in the multi-layer thin film stack structure.

[0080] See also Figure 10 , Figure 10 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. Figure 10 As shown in FIG, the electronic device 800 includes a processor 810, a memory 820 and a bus 830.

[0081] The memory 820 stores machine-readable instructions executable by the processor 810. When the electronic device 800 is running, the processor 810 communicates with the memory 820 via the bus 830. When the machine-readable instructions are executed by the processor 810, the above-mentioned Figure 5 The specific implementation of the steps of the through-hole generating method in the illustrated method embodiment can be found in the method embodiment, and will not be described in detail here.

[0082] The embodiment of the present application also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the computer program can execute the above-mentioned Figure 5 The specific implementation of the steps of the through-hole generating method in the illustrated method embodiment can be found in the method embodiment, and will not be described in detail here.

[0083] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0084] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. There may be other division methods in actual implementation. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed may be through some communication interface, indirect coupling or communication connection of devices or units, which may be electrical, mechanical or other forms.

[0085] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0086] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0087] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a non-volatile computer-readable storage medium that is executable by a processor. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program code, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0088] Finally, it should be noted that the above-described embodiments are only specific implementation methods of the present application, which are used to illustrate the technical solutions of the present application, rather than to limit them. The scope of protection of the present application is not limited thereto. Although the present application has been described in detail with reference to the above-mentioned embodiments, those skilled in the art should understand that any person skilled in the art can modify or easily conceive of changes to the technical solutions described in the above-mentioned embodiments within the technical scope disclosed in the present application, or perform equivalent replacements for some of the technical features thereof. These modifications, changes, or replacements do not deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A through-hole generation method, characterized in that: include: Selecting a target thickness ratio representing a proportional relationship between the through-hole depth and the thickness of the etch stop layer from a preset thickness ratio range, and determining the thickness of the etch stop layer based on the through-hole depth and the target thickness ratio; Determining the thickness of other thin film layers except the etching stop layer in the multi-layer thin film stack structure to be generated based on the layer thickness weight corresponding to each thin film layer; Generating a multi-layer thin film stack structure according to the thickness of each thin film layer, wherein the multi-layer thin film stack structure includes an etch stop layer, an etch barrier layer, and a dielectric layer deposited in sequence, wherein the etch barrier layer is a silicon oxynitride layer formed by a chemical deposition method, and the etch barrier layer has both the insulating properties of silicon dioxide and the barrier properties of silicon nitride; In a high-voltage deep hole isolation process, etching the multi-layer thin film stack structure according to a high etching selectivity ratio between the dielectric layer and the etch stop layer to form a through hole in the multi-layer thin film stack structure; The determining the thickness of the etch stop layer based on the through hole depth and the target thickness ratio includes: The ratio of the through hole depth to the target thickness ratio is determined as the etch stop layer thickness.

2. The method according to claim 1, characterized in that The preset thickness ratio range is 60 to 70.

3. The method according to claim 1, characterized in that The step of determining the thicknesses of other thin film layers except the etching stop layer in the multi-layer thin film stack structure to be generated based on the thickness weight corresponding to each thin film layer includes: For each thin film layer, the layer thickness ratio corresponding to the thin film layer is determined based on the ratio of the layer thickness weight of the thin film layer to the total weight; The thickness of the film layer is determined based on the total thickness of the structure and the layer thickness ratio.

4. The method according to claim 3, characterized in that The multi-layer thin film stack structure further includes an etch stop layer, and a thickness weight of the etch stop layer is smaller than a thickness weight of the etch barrier layer.

5. The method according to claim 1, wherein The method further comprises: A high etching selectivity is selected from a preset selectivity range, wherein the lower limit of the preset selectivity range is 10.

6. The method according to claim 5, characterized in that The etching of the multi-layer thin film stack structure according to the high etching selectivity ratio between the dielectric layer and the etching stop layer comprises: combining physical bombardment with chemical reaction in a first ratio to etch a portion above the etch stop layer; The physical bombardment is combined with the chemical reaction in a second ratio to etch the etch stop layer and the portion below the etch stop layer, wherein the energy proportion of the physical bombardment in the first ratio is lower than the energy proportion of the physical bombardment in the second ratio.

7. A through-hole generating device, characterized in that: include: a first thickness determination module, configured to select a target thickness ratio representing a proportional relationship between the through-hole depth and the thickness of the etch stop layer from a preset thickness ratio range, and determine the thickness of the etch stop layer based on the through-hole depth and the target thickness ratio; A second thickness determination module is used to determine the thickness of other thin film layers except the etching stop layer in the multi-layer thin film stack structure to be generated based on the layer thickness weight corresponding to each thin film layer; a structure generation module, configured to generate a multi-layer thin film stack structure according to the thickness of each thin film layer, wherein the multi-layer thin film stack structure includes an etch stop layer, an etch barrier layer, and a dielectric layer deposited in sequence, wherein the etch barrier layer is a silicon oxynitride layer formed by a chemical deposition method, and the etch barrier layer has both the insulating properties of silicon dioxide and the barrier properties of silicon nitride; a through-hole etching module, configured to etch the multi-layer thin film stack structure in accordance with a high etching selectivity ratio between the dielectric layer and the etch stop layer under a high-voltage deep hole isolation process, so as to form a through-hole in the multi-layer thin film stack structure; The first thickness determination module is specifically configured to: The ratio of the through hole depth to the target thickness ratio is determined as the etch stop layer thickness.

8. An electronic device, characterized in that: include: A processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor. When the electronic device is running, the processor and the memory communicate via the bus, and the processor executes the machine-readable instructions to perform the steps of the through-hole generation method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the through-hole generating method according to any one of claims 1 to 6 are executed.

Images