Light emitting diode with improved photoelectric property and preparation method thereof
By designing a gradient current barrier layer and transparent conductive layer structure in the light emitting diode, the contradiction between anti-static release performance and luminous effect is solved, and the luminous brightness and anti-static release performance are improved.
Patent Information
- Application Number
- CN202510241055.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-03
- Publication Date
- 2025-06-03
AI Technical Summary
While existing light emitting diodes improve antistatic release performance, their luminous effects are often affected, resulting in a degradation of photoelectric performance.
A transparent conductive layer and a current barrier layer are arranged on the surface of the epitaxial layer. The width of the current barrier layer is designed as a gradient, including a first and a second strip with different widths. The finger bar is located in the projection of the current barrier layer and is connected to the transparent conductive layer through a passivation layer.
The luminous brightness and anti-static release performance of the light emitting diode are improved, taking into account the improvement of photoelectric performance, and avoiding the negative impact of single width adjustment on photoelectric performance.
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Figure CN120091674A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of optoelectronic manufacturing, and particularly to a light-emitting diode for improving optoelectronic performance and a preparation method thereof. Background Art
[0002] As a highly influential new product in the optoelectronic industry, a light-emitting diode (English: Light Emitting Diode, abbreviated as: LED) has the characteristics of small volume, long service life, rich and colorful colors, low energy consumption, etc., and is widely used in the fields of lighting, display screens, signal lights, backlights, toys, etc.
[0003] In the related art, a light-emitting diode includes: an epitaxial layer, a transparent conductive layer, a current blocking layer, a pad, and a finger bar. Both the current blocking layer and the transparent conductive layer are located on the surface of the epitaxial layer, and the transparent conductive layer covers the current blocking layer. The pad is electrically connected to the epitaxial layer through a through hole in the transparent conductive layer. The finger bar is located on the surface of the transparent conductive layer, and the finger bar is opposite to the current blocking layer. One end of the finger bar is connected to the pad. The pad is used to connect to an external power supply and transmit current to each area of the epitaxial layer through the finger bar.
[0004] Providing a current blocking layer directly below the finger bar can reduce the problem of current crowding near the finger bar and enhance the electrostatic discharge (ESD) resistance performance of the light-emitting diode. The wider the width of the current blocking layer, the better the ESD resistance performance of the light-emitting diode. However, the wider the width of the current blocking layer, the smaller the contact area between the transparent conductive layer and the epitaxial layer, which affects the light-emitting effect of the epitaxial layer and makes the optoelectronic performance of the light-emitting diode worse. Summary of the Invention
[0005] Embodiments of the present disclosure provide a light-emitting diode for improving optoelectronic performance and a preparation method thereof, which can not only improve the electrostatic discharge resistance performance of the light-emitting diode but also improve the light-emitting effect of the light-emitting diode. The technical solution is as follows:
[0006] On the one hand, embodiments of the present disclosure provide a light-emitting diode, which includes: an epitaxial layer, a transparent conductive layer, a current blocking layer, and finger bars. The transparent conductive layer and the current blocking layer are both located on the surface of the epitaxial layer. The transparent conductive layer also covers the current blocking layer. The finger bars are located on the surface of the transparent conductive layer away from the epitaxial layer. The orthographic projection of the finger bars on the surface of the epitaxial layer is located within the orthographic projection of the current blocking layer on the surface of the epitaxial layer. The shape of the orthographic projection of the current blocking layer on the surface of the epitaxial layer is strip-shaped. The orthographic projection of the current blocking layer on the surface of the epitaxial layer includes at least one first strip segment and at least one second strip segment connected to each other. The width of the first strip segment is greater than the width of the second strip segment.
[0007] Optionally, the ratio of the width of the second strip segment to the width of the first strip segment is 0.5 to 0.9.
[0008] Optionally, the width of the first strip segment is 8 μm to 30 μm.
[0009] Optionally, both the first strip segment and the second strip segment are rectangular. One side of the first strip segment is connected to one side of the second strip segment and is located in the middle of one side of the second strip segment. There is a first rounded corner between the two sides where the first strip segment and the second strip segment are perpendicularly connected. There is a second rounded corner at the corner of the first strip segment.
[0010] Optionally, the radii of both the first rounded corner and the second rounded corner are 2 μm to 8 μm.
[0011] Optionally, the light-emitting diode further includes a passivation layer. The passivation layer is located on the surface of the epitaxial layer and covers the transparent conductive layer. The passivation layer has a first through hole exposing the transparent conductive layer. The orthographic projection of the first through hole on the surface of the epitaxial layer is located within the orthographic projection of the current blocking layer on the surface of the epitaxial layer, and the orthographic projection of the first through hole on the surface of the epitaxial layer at least partially overlaps with the orthographic projection of the finger bars on the surface of the epitaxial layer.
[0012] Optionally, the orthographic projection of the first through hole on the surface of the epitaxial layer is located within the first strip segment and outside the second strip segment; or, the orthographic projection of the first through hole on the surface of the epitaxial layer at least partially overlaps with the second strip segment and is outside the first strip segment; or, a part of the orthographic projection of the first through hole on the surface of the epitaxial layer is located within the first strip segment, and another part of the orthographic projection of the first through hole on the surface of the epitaxial layer is located within the second strip segment.
[0013] Optionally, the passivation layer has a plurality of the first through holes, which are arranged at intervals along the extending direction of the finger strip; the positive projection of the current blocking layer on the surface of the epitaxial layer includes a plurality of the first strip segments and a plurality of the second strip segments that are alternately connected, and the first through holes correspond to the first strip segments one by one; the positive projection of the first through hole on the surface of the epitaxial layer is located within the corresponding first strip segment and between two adjacent second strip segments; or, the positive projection of the first through hole on the surface of the epitaxial layer at least partially overlaps with the corresponding second strip segment and is located between two adjacent first strip segments; or, a part of the positive projection of the first through hole on the surface of the epitaxial layer is located within the corresponding first strip segment, and another part of the positive projection of the first through hole on the surface of the epitaxial layer is located within the second strip segment.
[0014] Optionally, the light-emitting diode further includes a pad. The passivation layer has a second through hole exposing the epitaxial layer. The pad is located within the second through hole and is electrically connected to the epitaxial layer, and one end of the finger strip is connected to the pad.
[0015] On the other hand, an embodiment of the present disclosure further provides a method for manufacturing a light-emitting diode. The manufacturing method includes: forming an epitaxial layer; forming a transparent conductive layer and a current blocking layer on the surface of the epitaxial layer, the transparent conductive layer also covering the current blocking layer, the positive projection of the current blocking layer on the surface of the epitaxial layer is strip-shaped, the positive projection of the current blocking layer on the surface of the epitaxial layer includes at least one first strip segment and at least one second strip segment that are connected, and the width of the first strip segment is greater than the width of the second strip segment; forming a finger strip on the surface of the transparent conductive layer away from the epitaxial layer, and the positive projection of the finger strip on the surface of the epitaxial layer is located within the positive projection of the current blocking layer on the surface of the epitaxial layer.
[0016] The beneficial effects brought by the technical solution provided by the embodiment of the present disclosure at least include:
[0017] The light-emitting diode provided by the embodiment of the present disclosure is provided with a transparent conductive layer and a current blocking layer on the surface of the epitaxial layer, and the transparent conductive layer also covers the current blocking layer. A finger strip is further provided on the surface of the transparent conductive layer, and the positive projection of the finger strip on the surface of the epitaxial layer is located within the positive projection of the current blocking layer on the surface of the epitaxial layer, that is, the finger strip is opposite to the current blocking layer. Among them, the positive projection of the current blocking layer on the surface of the epitaxial layer is also strip-shaped, and the positive projection of the current blocking layer includes a connected first strip segment and a second strip segment, and the width of the first strip segment is greater than the width of the second strip segment, that is, the width of a part of the current blocking layer is reduced.
[0018] In the region where the width of the current blocking layer narrows, that is, the region where the second strip segment is located, after the current is injected into the finger strip, since the blocking area of the current blocking layer against the finger strip decreases, the contact area between the transparent conductive layer and the epitaxial layer increases, thereby improving the light-emitting brightness of the light-emitting diode and reducing the voltage of the light-emitting diode. In the region where the width of the current blocking layer is larger, that is, the region where the first strip segment is located, after the current is injected into the finger strip, since the blocking area of the current blocking layer against the finger strip is larger, the current can be effectively dispersed, the current density near the finger strip is reduced, and the electrostatic discharge resistance performance of the light-emitting diode is ensured. Therefore, compared with the case where the entire current blocking layer becomes narrower or wider, the width-gradual current blocking layer provided by the embodiments of the present disclosure can have better electrostatic discharge resistance performance, and can also take into account the light-emitting brightness of the light-emitting diode and improve the optoelectronic performance of the light-emitting diode. Description of the Drawings
[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.
[0020] Figure 1 is a top view of a light-emitting diode provided by an embodiment of the present disclosure;
[0021] Figure 2 is Figure 1 a provided AA cross-sectional view;
[0022] Figure 3 is Figure 1 a provided partial enlarged view at X;
[0023] Figure 4 is a top view of another light-emitting diode provided by an embodiment of the present disclosure;
[0024] Figure 5 is a top view of another light-emitting diode provided by an embodiment of the present disclosure;
[0025] Figure 6 is a flowchart of a method for manufacturing a light-emitting diode provided by an embodiment of the present disclosure.
[0026] The descriptions of the marks in the drawings are as follows:
[0027] 10. Substrate;
[0028] 20. Epitaxial layer; 21. First semiconductor layer; 22. Multi-quantum well layer; 23. Second semiconductor layer;
[0029] 30. Transparent conductive layer;
[0030] 40. Current blocking layer; 41. First strip segment; 42. Second strip segment;
[0031] 401. First rounded corner; 402. Second rounded corner;
[0032] 50. Passivation layer; 51. First through hole;
[0033] 61. Finger strip; 62. Pad. Detailed implementation manners
[0034] To make the objectives, technical solutions and advantages of the present disclosure clearer, the following will further describe the embodiments of the present disclosure in detail with reference to the accompanying drawings.
[0035] Unless otherwise defined, the technical terms or scientific terms used herein shall have the ordinary meanings understood by those of ordinary skill in the art to which the present disclosure pertains. The terms "first", "second", "third" and similar terms used in the specification and claims of the present patent application do not denote any order, quantity or importance, but are only used to distinguish different components. Similarly, terms such as "a" or "one" do not denote a quantity limitation, but mean that there is at least one. The terms "comprising" or "including" and similar terms mean that the elements or items appearing before "comprising" or "including" cover the elements or items listed after "comprising" or "including" and their equivalents, and do not exclude other elements or items. The terms "connected" or "coupled" and similar terms are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The terms "upper", "lower", "left", "right", "top", "bottom", etc. are only used to indicate relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationships may also change accordingly.
[0036] Figure 1 is a top view of a light-emitting diode provided by an embodiment of the present disclosure. Figure 2 is Figure 1 a provided AA cross-sectional view. As Figure 1 、 2 shown, the light-emitting diode includes: an epitaxial layer 20, a transparent conductive layer 30, a current blocking layer 40, and a finger strip 61. The transparent conductive layer 30 and the current blocking layer 40 are both located on the surface of the epitaxial layer 20. The transparent conductive layer 30 also covers the current blocking layer 40. The finger strip 61 is located on the surface of the transparent conductive layer 30 away from the epitaxial layer 20. The orthographic projection of the finger strip 61 on the surface of the epitaxial layer 20 is located within the orthographic projection of the current blocking layer 40 on the surface of the epitaxial layer 20.
[0037] As Figure 1As shown, the shape of the positive projection of the current blocking layer 40 on the surface of the epitaxial layer 20 is strip-shaped. The positive projection of the current blocking layer 40 on the surface of the epitaxial layer 20 includes at least one first strip segment 41 and at least one second strip segment 42 that are connected. The width of the first strip segment 41 is greater than the width of the second strip segment 42.
[0038] In the light-emitting diode provided by the embodiment of the present disclosure, a transparent conductive layer 30 and a current blocking layer 40 are provided on the surface of the epitaxial layer 20, and the transparent conductive layer 30 also covers the current blocking layer 40. A finger bar 61 is further provided on the surface of the transparent conductive layer 30. The positive projection of the finger bar 61 on the surface of the epitaxial layer 20 is located within the positive projection of the current blocking layer 40 on the surface of the epitaxial layer 20, that is, the finger bar 61 is opposite to the current blocking layer 40. Among them, the positive projection of the current blocking layer 40 on the surface of the epitaxial layer 20 is also strip-shaped, and the positive projection of the current blocking layer 40 includes a connected first strip segment 41 and a second strip segment 42. The width of the first strip segment 41 is greater than the width of the second strip segment 42, that is, the width of a part of the current blocking layer 40 is reduced.
[0039] In the region where the width of the current blocking layer 40 is narrowed, that is, the region where the second strip segment 42 is located, after the current is injected into the finger bar 61, since the blocking area of the current blocking layer 40 against the finger bar 61 is reduced, the contact area between the transparent conductive layer 30 and the epitaxial layer 20 is increased, thereby improving the light-emitting brightness of the light-emitting diode and reducing the voltage of the light-emitting diode. In the region where the width of the current blocking layer 40 is larger, that is, the region where the first strip segment 41 is located, after the current is injected into the finger bar 61, since the blocking area of the current blocking layer 40 against the finger bar 61 is larger, the current can be effectively dispersed, the current density near the finger bar 61 is reduced, and the electrostatic discharge resistance performance of the light-emitting diode is ensured. Therefore, compared with the case where the entire width of the current blocking layer 40 becomes narrower or wider, the current blocking layer 40 with a gradually changing width provided by the embodiment of the present disclosure can have better electrostatic discharge resistance performance, and can also take into account the light-emitting brightness of the light-emitting diode and improve the optoelectronic performance of the light-emitting diode.
[0040] Optionally, the ratio of the width of the second strip segment 42 to the width of the first strip segment 41 is 0.5 to 0.9. By controlling the width ratio of the second strip segment 42 to the first strip segment 41 within the above range, it is possible to avoid the width of the second strip segment 42 being too narrow, resulting in too small a blocking area of the current blocking layer 40 against the current and being unable to effectively reduce the current density near the finger bar 61. It is also possible to avoid the width of the second strip segment 42 being too wide, resulting in too much shielding of the transparent conductive layer 30 by the current blocking layer 40 and being unable to effectively increase the contact area between the transparent conductive layer 30 and the epitaxial layer 20, affecting the light-emitting brightness of the light-emitting diode.
[0041] Exemplarily, the ratio of the width of the second strip segment 42 to the width of the first strip segment 41 is 0.6.
[0042] Optionally, the width of the first strip segment 41 is 8 μm to 30 μm.
[0043] For the current blocking layer 40 with a width set within the above range, the wider the width of the current blocking layer 40, the stronger the electrostatic discharge resistance performance of the light-emitting diode, and the narrower the width of the current blocking layer 40, the more effectively the light-emitting brightness of the light-emitting diode can be improved. Therefore, controlling the width of the current blocking layer 40 within the above range can not only improve the electrostatic discharge resistance performance by expanding the width of the current blocking layer 40, but also enhance the light-emitting brightness of the light-emitting diode by narrowing the width of the current blocking layer 40.
[0044] As an example, when the width L1 of the first strip segment 41 can be 20 μm and the ratio of the width L2 of the second strip segment 42 to the width of the first strip segment L1 is 0.6, the width L2 of the second strip segment 42 can be 12 μm.
[0045] Figure 3 Yes Figure 1 A partial enlarged view of X is provided. As Figure 3 shown, both the first strip segment 41 and the second strip segment 42 are rectangular. One side of the first strip segment 41 is connected to one side of the second strip segment 42, and one side of the first strip segment 41 is located in the middle of one side of the second strip segment 42. There is a first rounded corner 401 between the two sides where the first strip segment 41 and the second strip segment 42 are perpendicularly connected, and there is a second rounded corner 402 at the corner of the first strip segment 41.
[0046] By designing the two perpendicular sides of the first strip segment 41 and the second strip segment 42 as the first rounded corner 401, the connected area of the first strip segment 41 and the second strip segment 42 is smoother. In this way, the transparent conductive layer 30 deposited on the current blocking layer 40 will not be torn and cracked in the sharp corner area of the first strip segment 41 and the second strip segment 42, improving the preparation yield of the transparent conductive layer 30.
[0047] Since the width of the first strip segment 41 is relatively large, the sharp corner size in the corner area of the rectangular first strip segment 41 will also be larger. Therefore, designing the corner of the first strip segment 41 as the second rounded corner 402 can make the corner of the first strip segment 41 smoother, preventing the transparent conductive layer 30 deposited on the first strip segment 41 from being torn and cracked in the sharp corner area of the first strip segment 41, and improving the preparation yield of the transparent conductive layer 30.
[0048] Exemplarily, as Figure 3As shown, the center of the second rounded corner 402 is at 1 / 10 to 1 / 5 perpendicular to the line segment MM, and a circle with a radius of 2 μm to 8 μm is drawn tangent to M. The center of the first rounded corner 401 is at 1.05 to 1.1 perpendicular to the extension line of the line segment NN outward, and a circle with a radius of 2 μm to 8 μm is drawn tangent to N. Subsequently, the two circles are interrupted at M, N, and the tangent point of the two circles and then merged.
[0049] Optionally, the radii of both the first rounded corner and the second rounded corner are 2 μm to 8 μm. Exemplarily, the radii of both the first rounded corner and the second rounded corner can be 5 μm.
[0050] In the connected area of the above-mentioned first strip segment 41 and the second strip segment 42, in addition to setting rounded corners, the adjacent two rounded corners are also tangent to each other, making the line segments in the connected area of the first strip segment 41 and the second strip segment 42 smoother, and effectively preventing the transparent conductive layer 30 formed by deposition on the current blocking layer 40 from being torn.
[0051] Optionally, as Figure 2 shown, the light-emitting diode further includes a passivation layer 50. The passivation layer 50 is located on the surface of the epitaxial layer 20 and covers the transparent conductive layer 30. The passivation layer 50 has a first through hole 51 exposing the transparent conductive layer 30. The orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 is located within the orthographic projection of the current blocking layer 40 on the surface of the epitaxial layer 20, and the orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 at least partially overlaps with the orthographic projection of the finger bar 61 on the surface of the epitaxial layer 20.
[0052] Optionally, the passivation layer 50 can be at least one of a silicon oxide layer, an aluminum oxide layer, and a silicon nitride layer.
[0053] Exemplarily, the passivation layer 50 can be a silicon oxide layer, and the thickness of the passivation layer 50 can be 800 Å to 3000 Å. For example, the thickness of the passivation layer 50 is 1000 Å.
[0054] Covering a passivation layer 50 on the epitaxial layer 20 and the transparent conductive layer 30 is used to protect the epitaxial layer 20 and the transparent conductive layer 30, and can avoid the epitaxial layer 20 being connected to other film layers, thereby affecting the light-emitting effect of the epitaxial layer 20.
[0055] In the embodiment of the present disclosure, a first through hole 51 is further provided on the passivation layer 50. The finger bar 61 is provided on the surface of the passivation layer 50 and is connected to the transparent conductive layer 30 through the first through hole 51. In this way, it is avoided that the finger bar 61 is directly connected to the transparent conductive layer 30, but through the first through hole 51, a local area of the finger bar 61 is directly connected to the transparent conductive layer 30, reducing the direct contact area between the finger bar 61 and the transparent conductive layer 30, effectively reducing the current density near the finger bar 61, and preventing the problem of current congestion.
[0056] Optionally, as Figure 1 shown, the passivation layer 50 has a plurality of first through-holes 51, and the first through-holes 51 are arranged at intervals along the extending direction of the finger bars 61.
[0057] By providing a plurality of first through-holes 51 and arranging the first through-holes 51 at intervals along the extending direction of the finger bars 61, a plurality of local regions of the finger bars 61 can be directly connected to the transparent conductive layer 30, so that current can be more evenly injected into various regions of the transparent conductive layer 30.
[0058] Optionally, as Figure 1 shown, the light-emitting diode further includes a pad 62. The passivation layer 50 has a second through-hole exposing the epitaxial layer 20. The pad 62 is located in the second through-hole, and the pad 62 is electrically connected to the epitaxial layer 20. One end of the finger bar 61 is connected to the pad 62.
[0059] In the embodiment of the present disclosure, the pad 62 is used to connect to an external power source so that the external power source can inject current into the pad 62. One end of the finger bar 61 is connected to the pad 62, and the finger bar 61 is connected to the transparent conductive layer 30 through the first through-hole 51. Therefore, current can be evenly transmitted to various regions of the epitaxial layer 20 through the finger bar 61.
[0060] Optionally, the pad 62 may include a first Al layer, a first Ti layer, a second Al layer, a second Ti layer, and an Au layer stacked in sequence.
[0061] In one implementation manner of the present disclosure, as Figure 3 shown, the orthographic projection of the first through-hole 51 on the surface of the epitaxial layer 20 is located within the first strip segment 41 and outside the second strip segment 42.
[0062] In the above implementation manner, since the width of the first strip segment 41 is relatively large, the orthographic projection of the first through-hole 51 also falls within the first strip segment 41, so that the finger bar 61 connected to the transparent conductive layer 30 through the first through-hole 51 also falls within the first strip segment 41, avoiding the problem that some regions of the finger bar 61 are not opposite to the current blocking layer 40 below and directly transmitting to the underlying epitaxial layer 20 through the transparent conductive layer 30, resulting in current crowding near the finger bar 61.
[0063] Optionally, as Figure 1 shown, the orthographic projection of the current blocking layer 40 on the surface of the epitaxial layer 20 includes a plurality of first strip segments 41 and a plurality of second strip segments 42 that are alternately connected, and the first through-holes 51 correspond to the first strip segments 41 one by one.
[0064] As Figure 1As shown, the orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 is located within the corresponding first strip segment 41, and the orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 is located between two adjacent second strip segments 42.
[0065] In the above implementation, multiple first strip segments 41 and multiple second strip segments 42 are alternately connected, and the first through hole 51 opposite to the first strip segment 41 is located directly below the first strip segment 41. This can ensure that all the first through holes 51 fall within the first strip segments 41, avoiding the problem of current crowding in all areas of the entire finger bar 61.
[0066] In the second implementation of the present disclosure, Figure 4 is a top view of another light-emitting diode provided by an embodiment of the present disclosure. As Figure 4 shown, the orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 at least partially overlaps with the second strip segment 42, and the orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 is located outside the first strip segment 41.
[0067] Exemplarily, the orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 may be within the second strip segment 42. At this time, the width of the first through hole 51 is less than or equal to the width of the second strip segment 42.
[0068] Exemplarily, as Figure 4 shown, the orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 may also have a partial area within the second strip segment 42 and another partial area outside the second strip segment 42. At this time, the width of the first through hole 51 is greater than the width of the second strip segment 42.
[0069] In the above implementation, when the width of the first through hole 51 is less than or equal to the width of the second strip segment 42, the orthographic projection of the first through hole 51 will also fall within the second strip segment 42, so that the finger bar 61 connected to the transparent conductive layer 30 through the first through hole 51 also falls within the second strip segment 42, avoiding the problem that part of the finger bar 61 is not opposite to the current blocking layer 40 below and directly transmitting to the underlying epitaxial layer 20 through the transparent conductive layer 30, resulting in current crowding near the finger bar 61.
[0070] When the width of the first through hole 51 is greater than the width of the second strip segment 42, a part of the orthographic projection of the first through hole 51 falls within the second strip segment 42, while another part of the orthographic projection of the first through hole 51 is not within the second strip segment 42. In this way, the part of the orthographic projection of the first through hole 51 that falls within the second strip segment 42 can enable at least some of the finger bars 61 to possibly not face the current blocking layer 40 below, thereby improving the current injection efficiency in this area; and also enables some of the finger bars 61 to possibly face the current blocking layer 40 below to block the direct injection of current, and can also avoid the problem of current crowding in the area near the finger bars 61 to a certain extent.
[0071] Optionally, as Figure 4 shown, the orthographic projection of the current blocking layer 40 on the surface of the epitaxial layer 20 includes a plurality of first strip segments 41 and a plurality of second strip segments 42 that are alternately connected, and the first through holes 51 correspond to the first strip segments 41 one by one.
[0072] As Figure 4 shown, the orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 at least partially overlaps with the corresponding second strip segment 42, and the orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 is located between two adjacent first strip segments 41.
[0073] In the above implementation, the plurality of first strip segments 41 and the plurality of second strip segments 42 are alternately connected, and the first through hole 51 opposite to the first strip segment 41 is located directly below the second strip segment 42. This can ensure that a part of the area of all the first through holes 51 falls within the second strip segment 42, and another part of the area of the first through hole 51 falls outside the second strip segment 42. While avoiding current crowding of the finger bars 61, it can also improve the current injection efficiency.
[0074] In the third implementation of the present disclosure, Figure 5 is a top view of another light-emitting diode provided by an embodiment of the present disclosure. As Figure 5 shown, a part of the orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 is located within the first strip segment 41, and another part of the orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 is located within the second strip segment 42.
[0075] In the above implementation, a part of the orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 falls within the first strip segment 41, and another part of the orthographic projection of the first through hole 51 on the surface of the epitaxial layer 20 falls within the second strip segment 42. This enables a part of the area of the first through hole 51 to fall within the current blocking layer 40, and another part of the area of the first through hole 51 to fall outside the current blocking layer 40.
[0076] The first vias 51 falling within the current blocking layer 40 cause some of the finger bars 61 to be directly opposite the current blocking layer 40, so that the local area of the finger bars 61 can avoid current crowding. The first vias 51 falling outside the current blocking layer 40 cause some of the finger bars 61 to possibly not be directly opposite the current blocking layer 40, so that the local area of the finger bars 61 can directly inject current into the underlying epitaxial layer 20 through the transparent conductive layer 30, thereby improving the current injection efficiency in this area.
[0077] Optionally, as Figure 5 shown, the positive projection of the current blocking layer 40 on the surface of the epitaxial layer 20 includes a plurality of first strip segments 41 and a plurality of second strip segments 42 that are alternately connected, and the first vias 51 correspond to the first strip segments 41 one by one.
[0078] As Figure 5 shown, a part of the positive projection of the first vias 51 on the surface of the epitaxial layer 20 is located within the corresponding first strip segment 41, and another part of the positive projection of the first vias 51 on the surface of the epitaxial layer 20 is located within the second strip segment 42.
[0079] In the above implementation, the plurality of first strip segments 41 and the plurality of second strip segments 42 are alternately connected, and the first vias 51 opposite to the first strip segments 41 are located directly below the second strip segments 42. This can ensure that a part of the area of all the first vias 51 falls within the current blocking layer 40, and another part of the area of the first vias 51 falls outside the current blocking layer 40. While avoiding current crowding in the finger bars 61, it can also improve the current injection efficiency.
[0080] Optionally, as Figure 2 shown, the light-emitting diode includes a substrate 10, and the epitaxial layer 20 is located on the surface of the substrate 10.
[0081] Exemplarily, the substrate can be a sapphire substrate. The sapphire substrate has a relatively high light transmittance, that is, the substrate is a transparent substrate. And the sapphire material is relatively hard and has relatively stable chemical properties, making the light-emitting diode have good light-emitting effects and stability.
[0082] Optionally, as Figure 2 shown, the epitaxial layer 20 includes a first semiconductor layer 21, a multi-quantum well layer 22, and a second semiconductor layer 23 that are sequentially stacked on the substrate 10.
[0083] One of the first semiconductor layer 21 and the second semiconductor layer 23 is a p-type layer, and the other of the first semiconductor layer 21 and the second semiconductor layer 23 is an n-type layer.
[0084] Exemplarily, the first semiconductor layer 21 is an n-type layer, and the second semiconductor layer 23 is a p-type layer.
[0085] Optionally, the first semiconductor layer 21 is an n-type GaN layer doped with silicon. The thickness of the n-type GaN layer can be 0.5 μm to 3 μm.
[0086] Optionally, the multiple quantum well layer 22 includes alternately grown InGaN quantum well layers and GaN quantum barrier layers. Among them, the multiple quantum well layer 22 may include 3 to 8 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.
[0087] As an example, in the embodiments of the present disclosure, the multiple quantum well layer 22 includes 5 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.
[0088] Optionally, the thickness of the multiple quantum well layer 22 can be 150 nm to 200 nm.
[0089] Optionally, the second semiconductor layer 23 is a p-type GaN layer doped with magnesium. The thickness of the p-type GaN layer can be 0.5 μm to 3 μm.
[0090] Optionally, the light-emitting diode further includes an AlN buffer layer and a u-type GaN layer. The AlN buffer layer and the u-type GaN layer are sequentially stacked on the substrate, and the epitaxial layer 20 is located on the u-type GaN layer.
[0091] Optionally, the transparent conductive layer 30 can be an indium tin oxide (ITO for short) layer. The indium tin oxide layer has good transmittance and low resistivity. Using the indium tin oxide layer as the transparent conductive layer 30 can enable more light to transmit through the transparent conductive layer 30, thus ensuring the light output effect; at the same time, due to the low resistivity, it is also convenient for carrier conduction and improves the injection efficiency.
[0092] Exemplarily, the transparent conductive layer 30 can be an indium zinc oxide (IZO for short) layer. The indium zinc oxide layer has good transmittance and low resistivity. Using the indium zinc oxide layer as the transparent conductive layer 30 can enable more light to transmit through the transparent conductive layer 30, thus ensuring the light output effect; at the same time, due to the low resistivity, it is also convenient for carrier conduction and improves the injection efficiency.
[0093] As an example, the thickness of the transparent conductive layer 30 can be 200 Å to 5000 Å. For example, the thickness of the transparent conductive layer 30 is 2000 Å.
[0094] Figure 6 is a flowchart of a method for manufacturing a light-emitting diode provided by the embodiments of the present disclosure. As Figure 6 shown, the manufacturing method includes:
[0095] S11: Form an epitaxial layer.
[0096] Among them, the epitaxial layer includes a first semiconductor layer, a multi-quantum well layer, and a second semiconductor layer that are stacked in sequence.
[0097] S12: Form a transparent conductive layer and a current blocking layer on the surface of the epitaxial layer.
[0098] Among them, the transparent conductive layer also covers the current blocking layer. The shape of the positive projection of the current blocking layer on the surface of the epitaxial layer is strip-shaped. The positive projection of the current blocking layer on the surface of the epitaxial layer includes at least one first strip segment and at least one second strip segment that are connected. The width of the first strip segment is greater than the width of the second strip segment.
[0099] S13: Form finger bars on the surface of the transparent conductive layer away from the epitaxial layer.
[0100] Among them, the positive projection of the finger bar on the surface of the epitaxial layer is located within the positive projection of the current blocking layer on the surface of the epitaxial layer.
[0101] The light-emitting diode prepared by this preparation method is provided with a transparent conductive layer and a current blocking layer on the surface of the epitaxial layer. The transparent conductive layer also covers the current blocking layer. Finger bars are also provided on the surface of the transparent conductive layer. The positive projection of the finger bar on the surface of the epitaxial layer is located within the positive projection of the current blocking layer on the surface of the epitaxial layer, that is, the finger bar is opposite to the current blocking layer. Among them, the positive projection of the current blocking layer on the surface of the epitaxial layer is also strip-shaped, and the positive projection of the current blocking layer includes a connected first strip segment and a second strip segment. The width of the first strip segment is greater than the width of the second strip segment, that is, there is a region where the width of the current blocking layer is reduced.
[0102] In the region where the width of the current blocking layer is narrowed, that is, the region where the second strip segment is located, after the current is injected into the finger bar, since the blocking area of the current blocking layer against the finger bar is reduced, the contact area between the transparent conductive layer and the epitaxial layer is increased, thereby improving the light-emitting brightness of the light-emitting diode and reducing the voltage of the light-emitting diode. In the region where the width of the current blocking layer is larger, that is, the region where the first strip segment is located, after the current is injected into the finger bar, since the blocking area of the current blocking layer against the finger bar is larger, the current can be effectively dispersed, the current density near the finger bar is reduced, and the electrostatic discharge resistance performance of the light-emitting diode is ensured. Therefore, compared with the case where the entire width of the current blocking layer becomes narrower or wider, the width-gradual current blocking layer provided by the embodiments of the present disclosure can have better electrostatic discharge resistance performance, and can also take into account the light-emitting brightness of the light-emitting diode and improve the optoelectronic performance of the light-emitting diode.
[0103] The epitaxial layer formed in step S11 is located on the substrate.
[0104] Among them, the substrate is a sapphire substrate, a silicon substrate, or a silicon carbide substrate. The substrate can be a flat substrate or a patterned substrate.
[0105] As an example, in the embodiments of the present disclosure, the substrate is a sapphire substrate. The sapphire substrate is a commonly used substrate with mature technology and low cost. Specifically, it can be a patterned sapphire substrate or a sapphire wafer substrate.
[0106] Among them, the sapphire substrate can be pre-treated by placing the sapphire substrate in a MOCVD (Metal-organic Chemical Vapor Deposition) reaction chamber and baking the sapphire substrate for 12 to 18 minutes. As an example, in the embodiments of the present disclosure, the sapphire substrate is baked for 15 minutes.
[0107] Specifically, the baking temperature can be 1000°C to 1200°C, and the pressure in the MOCVD reaction chamber during baking can be 100 mbar to 200 mbar.
[0108] Before step S11, it can include: sequentially forming an AlN buffer layer and a u-shaped GaN layer on the sapphire substrate by MOCVD technology.
[0109] Growing the epitaxial layer on the substrate in step S11 can include: sequentially forming a first semiconductor layer, a multi-quantum well layer, and a second semiconductor layer on the sapphire substrate by MOCVD technology.
[0110] Exemplarily, the epitaxial layer includes an n-type GaN layer, a multi-quantum well layer, and an n-type GaN layer stacked in sequence.
[0111] Optionally, the thickness of the n-type GaN layer can be 0.5 μm to 3 μm.
[0112] The growth temperature of the n-type GaN layer can be 1000°C to 1100°C, and the growth pressure of the n-type GaN layer can be 100 torr to 300 torr.
[0113] Optionally, the multi-quantum well layer includes alternately grown InGaN quantum well layers and GaN quantum barrier layers. Among them, the multi-quantum well layer can include 3 to 8 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.
[0114] When growing the multi-quantum well layer, the pressure in the MOCVD reaction chamber is controlled at 200 torr. When growing the InGaN quantum well layer, the reaction chamber temperature is 760°C to 780°C. When growing the GaN quantum barrier layer, the reaction chamber temperature is 860°C to 890°C.
[0115] As an example, in the embodiments of the present disclosure, the multi-quantum well layer includes 5 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.
[0116] Optionally, the thickness of the multi-quantum well layer can be from 150 nm to 200 nm.
[0117] Optionally, the thickness of the p-type GaN layer can be from 0.5 μm to 3 μm.
[0118] When growing the p-type GaN layer, the growth pressure of the p-type GaN layer can be from 200 Torr to 600 Torr, and the growth temperature of the p-type GaN layer can be from 800 °C to 1000 °C.
[0119] Step S12 may include: forming a transparent conductive layer and a current blocking layer on the surface of the second semiconductor layer.
[0120] Wherein, the transparent conductive layer also covers the current blocking layer, and the transparent conductive layer also has a through hole exposing the second semiconductor layer.
[0121] Exemplarily, the transparent conductive layer is an indium tin oxide layer or an indium zinc oxide layer.
[0122] Exemplarily, the thickness of the transparent conductive layer can be from 200 Å to 5000 Å. For example, the thickness of the transparent conductive layer is 2000 Å.
[0123] Before step S13, it may further include: forming a passivation layer on the surface of the second semiconductor layer away from the first semiconductor layer and in the groove.
[0124] Wherein, the passivation layer is located on the surface of the epitaxial layer and covers the transparent conductive layer. The passivation layer has a first through hole exposing the transparent conductive layer. The positive projection of the first through hole on the surface of the epitaxial layer is located within the positive projection of the current blocking layer on the surface of the epitaxial layer, and the positive projection of the first through hole on the surface of the epitaxial layer at least partially overlaps with the positive projection of the finger bar on the surface of the epitaxial layer.
[0125] Exemplarily, the positive projection of the first through hole on the surface of the epitaxial layer is located within the first strip segment, and the positive projection of the first through hole on the surface of the epitaxial layer is located outside the second strip segment.
[0126] Exemplarily, the positive projection of the first through hole on the surface of the epitaxial layer at least partially overlaps with the second strip segment, and the positive projection of the first through hole on the surface of the epitaxial layer is located outside the first strip segment.
[0127] Exemplarily, a part of the positive projection of the first through hole on the surface of the epitaxial layer is located within the first strip segment, and another part of the positive projection of the first through hole on the surface of the epitaxial layer is located within the second strip segment.
[0128] Specifically, it may include: forming a passivation layer on the surface of the p-type GaN layer, the surface of the transparent conductive layer and in the groove.
[0129] Exemplarily, the passivation layer may be a silicon oxide layer, and the thickness of the passivation layer may be from 800 angstroms to 3000 angstroms.
[0130] Step S13 may include: forming pads and finger bars on the surface of the passivation layer, one end of the finger bar being connected to the pad, the pad being electrically connected to the epitaxial layer through a via hole, and the finger bar being connected to the transparent conductive layer through a first via hole.
[0131] Among them, the pad located in the groove is an n-type pad, and the pad located on the second semiconductor layer is a p-type pad.
[0132] Exemplarily, the pad may be a first Al layer, a first Ti layer, a second Al layer, a second Ti layer, and an Au layer stacked in sequence.
[0133] Finally, the sapphire substrate can be invisibly cut and cleaved, and the invisible cutting and cleaving can better reduce the loss of brightness. Then, the light-emitting diode is obtained by testing.
[0134] The above are only optional embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.
Claims
1. A light emitting diode, characterized in that: The light-emitting diode comprises: an epitaxial layer (20), a transparent conductive layer (30), a current blocking layer (40) and finger strips (61); the transparent conductive layer (30) and the current blocking layer (40) are both located on the surface of the epitaxial layer (20); the transparent conductive layer (30) also covers the current blocking layer (40); the finger strips (61) are located on the surface of the transparent conductive layer (30) away from the epitaxial layer (20); and the orthographic projection of the finger strips (61) on the surface of the epitaxial layer (20) is located within the orthographic projection of the current blocking layer (40) on the surface of the epitaxial layer (20); The orthographic projection of the current blocking layer (40) on the surface of the epitaxial layer (20) is in the shape of a strip, and the orthographic projection of the current blocking layer (40) on the surface of the epitaxial layer (20) comprises at least one first strip segment (41) and at least one second strip segment (42) connected to each other, and the width (L1) of the first strip segment (41) is greater than the width (L2) of the second strip segment (42).
2. The light emitting diode according to claim 1, characterized in that: The ratio of the width (L2) of the second strip segment (42) to the width (L1) of the first strip segment (41) is 0.5 to 0.
9.
3. The light emitting diode according to claim 2, characterized in that: The width of the first strip-shaped segment (41) is 8 μm to 30 μm.
4. The light emitting diode according to any one of claims 1 to 3, characterized in that: The first strip segment (41) and the second strip segment (42) are both rectangular; one side of the first strip segment (41) is connected to one side of the second strip segment (42) and is located in the middle of one side of the second strip segment (42); a first rounded corner (401) is provided between two sides of the first strip segment (41) and the second strip segment (42) vertically connected; and a corner of the first strip segment (41) has a second rounded corner (402).
5. The light emitting diode according to claim 4, characterized in that: The radii of the first rounded corner (401) and the second rounded corner (402) are both 2 μm to 8 μm.
6. The light emitting diode according to any one of claims 1 to 3, characterized in that: The light emitting diode further comprises a passivation layer (50), the passivation layer (50) being located on the surface of the epitaxial layer (20) and covering the transparent conductive layer (30), the passivation layer (50) having a first through hole (51) exposing the transparent conductive layer (30); The orthographic projection of the first through hole (51) on the surface of the epitaxial layer (20) is located within the orthographic projection of the current blocking layer (40) on the surface of the epitaxial layer (20), and the orthographic projection of the first through hole (51) on the surface of the epitaxial layer (20) at least partially overlaps with the orthographic projection of the finger bar (61) on the surface of the epitaxial layer (20).
7. The light emitting diode according to claim 6, characterized in that: The orthographic projection of the first through hole (51) on the surface of the epitaxial layer (20) is located inside the first strip segment (41) and outside the second strip segment (42); or, The orthographic projection of the first through hole (51) on the surface of the epitaxial layer (20) at least partially overlaps with the second strip segment (42) and is located outside the first strip segment (41); or, A portion of the orthographic projection of the first through hole (51) on the surface of the epitaxial layer (20) is located in the first strip segment (41), and another portion of the orthographic projection of the first through hole (51) on the surface of the epitaxial layer (20) is located in the second strip segment (42).
8. The light emitting diode according to claim 7, characterized in that: The passivation layer (50) has a plurality of first through holes (51), and the first through holes (51) are arranged at intervals along the extension direction of the finger strips (61); The orthographic projection of the current blocking layer (40) on the surface of the epitaxial layer (20) comprises a plurality of the first strip segments (41) and a plurality of the second strip segments (42) that are alternately connected, and the first through holes (51) correspond one to one to the first strip segments (41); The orthographic projection of the first through hole (51) on the surface of the epitaxial layer (20) is located within the corresponding first strip segment (41) and between two adjacent second strip segments (42); or, The orthographic projection of the first through hole (51) on the surface of the epitaxial layer (20) at least partially overlaps with the corresponding second strip segment (42) and is located between two adjacent first strip segments (41); or, A portion of the orthographic projection of the first through hole (51) on the surface of the epitaxial layer (20) is located in the corresponding first strip segment (41), and another portion of the orthographic projection of the first through hole (51) on the surface of the epitaxial layer (20) is located in the second strip segment (42).
9. The light emitting diode according to claim 6, characterized in that: The light-emitting diode further comprises a solder pad (62), the passivation layer (50) has a second through hole exposing the epitaxial layer (20), the solder pad (62) is located in the second through hole and is electrically connected to the epitaxial layer (20), and one end of the finger strip (61) is connected to the solder pad (62).
10. A method for preparing a light emitting diode, characterized in that: The preparation method comprises: forming an epitaxial layer; A transparent conductive layer and a current blocking layer are formed on the surface of the epitaxial layer, wherein the transparent conductive layer also covers the current blocking layer, wherein the orthographic projection of the current blocking layer on the surface of the epitaxial layer is in a strip shape, and the orthographic projection of the current blocking layer on the surface of the epitaxial layer includes at least one first strip segment and at least one second strip segment connected to each other, wherein the width of the first strip segment is greater than the width of the second strip segment; Finger stripes are formed on a surface of the transparent conductive layer away from the epitaxial layer, and an orthographic projection of the finger stripes on the surface of the epitaxial layer is located within an orthographic projection of the current blocking layer on the surface of the epitaxial layer.