Perovskite phototransistor array for image sensor and preparation method

Abstract

The invention relates to a perovskite phototransistor array for an image sensor and a preparation method. The preparation method comprises the following steps: sequentially growing a first doping type epitaxial layer and a second doping type epitaxial layer on the surface of a first doping type substrate; forming a second doping type region and a plurality of first doping type regions in the surface layer of the second doping type epitaxial layer; etching to form a plurality of micro-channels distributed at intervals; guiding a perovskite solution into the micro-channels by adopting a micro-fluidic process, and evaporating and crystallizing in each crystallization channel to form patterned perovskite nanocrystals; spin-coating photoresist on the surface of the sample, and performing exposure etching to form a plurality of electrode windows in one-to-one correspondence with the plurality of first doping type regions to obtain a transparent insulating layer; and growing a drain electrode on the other surface of the first doping type substrate. According to the method, high-precision positioning growth of the perovskite material can be realized on the basis that the performance of the perovskite material is not reduced, and the photoelectric performance of a photoelectric device is effectively improved.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and particularly relates to a perovskite optoelectronic transistor array for an image sensor and a preparation method thereof. Background Art

[0002] Halide perovskite materials are a very important new type of semiconductor materials discovered in the past decade. This material itself has excellent electrical characteristics such as high carrier mobility and long lifetime, and also has the low-cost advantage of being solution-preparable at room temperature. These advantages make perovskite materials one of the most promising optoelectronic materials at present. Halide perovskite materials have a wide range of application prospects, including electronic devices in the traditional microelectronics field, new flexible material devices, photovoltaic industries and water splitting industries in the energy field, photodetectors, light-emitting diodes, lasers, display screens in the optoelectronic field, and high-energy light detection fields such as medical, military, security detection, and cosmic ray detection.

[0003] The commercialization of semiconductor materials is based on the preparation of their miniaturized array devices, and the preparation process highly depends on patterning technology - realizing different functions and device miniaturization of devices by constructing and adjusting microstructures. The miniaturization of devices not only reduces costs and improves the yield, but more importantly, it improves the operating speed, reduces power consumption and heat generation. Especially in the optoelectronic field, patterning technology can improve the charge extraction and transport capabilities of optoelectronic devices, enhance the photon capture ability, and improve the device stability, etc.

[0004] The patterning of perovskite materials is particularly important for improving the optical and electrical properties of devices. When patterned perovskite is applied to optoelectronic devices such as lasers, solar cells, and photodetectors, the sensitivity, response time, power consumption, resolution, etc. of the devices can be greatly improved. However, since perovskite materials belong to ionic crystals and the adhesion of perovskite quantum dots is poor, the traditional method of using photolithography technology to achieve patterning cannot achieve high-resolution and high-precision perovskite patterns, and cannot effectively improve the performance of optoelectronic devices. Summary of the Invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a perovskite optoelectronic transistor array for an image sensor and a preparation method thereof. The technical problems to be solved by the present invention are realized through the following technical solutions:

[0006] An embodiment of the present invention provides a preparation method for a perovskite optoelectronic transistor array for an image sensor, including the steps of:

[0007] Growing a first-doped epitaxial layer and a second-doped epitaxial layer on the surface of a first-doped type substrate in sequence;

[0008] Form a second-doped type region and a plurality of first-doped type regions spaced apart from each other in the surface layer of the second-doped type epitaxial layer;

[0009] Etch trenches extending from the surfaces of the first-doped type regions and the second-doped type regions into the interior of the first-doped type epitaxial layer to form a plurality of microchannels spaced apart from each other, wherein each microchannel extends from the end of the second-doped type region until it communicates with a plurality of first-doped type regions in each row or column and forms a crystallization channel in each first-doped type region;

[0010] Use a microfluidic process to divert a perovskite solution into the microchannels and evaporate and crystallize in each crystallization channel to form patterned perovskite nanocrystals;

[0011] Spin-coat a photoresist on the surface of the sample and perform exposure and etching to form a plurality of electrode windows corresponding one-to-one to the plurality of first-doped type regions, obtaining a transparent insulating layer, wherein each electrode window exposes a partial surface of the first-doped type region and a partial surface of the second-doped type region;

[0012] Deposit a transparent electrode on the surface of the transparent insulating layer and the plurality of electrode windows;

[0013] Grow a drain electrode on the other surface of the first-doped type substrate.

[0014] In one embodiment of the present invention, the microchannel includes a plurality of crystallization channels, a plurality of buffer channels and a diversion channel, wherein,

[0015] The plurality of buffer channels and the plurality of crystallization channels are alternately connected in sequence, the area of the buffer channel is larger than the area of the crystallization channel, and the width of the buffer channel gradually becomes narrower along the liquid flow direction;

[0016] The diversion channel extends from the end of the second-doped type region and communicates with the buffer channel close to the diversion channel.

[0017] In one embodiment of the present invention, along the liquid flow direction, the buffer channel transitions to the crystallization channel in an arc shape.

[0018] In one embodiment of the present invention, the shape of the buffer channel includes a heart shape.

[0019] In one embodiment of the present invention, the area ratio of the buffer channel to the crystallization channel is 20:1 to 200:1.

[0020] In one embodiment of the present invention, using a microfluidic process to divert a perovskite solution into the microchannels and evaporate and crystallize in each crystallization channel to form patterned perovskite nanocrystals, includes:

[0021] Utilize capillary action to introduce the perovskite solution through a microfluidic pump from the diversion channel until the buffer channel and the crystallization channel are filled; wait for the perovskite solution to evaporate and crystallize in the crystallization channel to form patterned perovskite nanocrystals.

[0022] In one embodiment of the present invention, the thickness of the perovskite nanocrystals is equal to the depth of the microchannel.

[0023] Another embodiment of the present invention provides a perovskite phototransistor array for an image sensor, prepared by the preparation method described in the above embodiment, including: a first-doped type substrate, a first-doped type epitaxial layer, a second-doped type epitaxial layer, a plurality of first-doped type regions, second-doped type regions, a plurality of microchannels, perovskite nanocrystals, a transparent insulating layer, a transparent electrode, and a drain electrode, wherein,

[0024] The drain electrode, the first-doped type substrate, the first-doped type epitaxial layer, and the second-doped type epitaxial layer are stacked in sequence;

[0025] The second-doped type regions are formed in the surface layer of the second-doped type epitaxial layer, and the plurality of first-doped type regions are distributed in an array in the second-doped type regions;

[0026] The plurality of microchannels are spaced apart and all extend from the surfaces of the first-doped type regions and the second-doped type regions to the inside of the first-doped type epitaxial layer, and extend from the ends of the second-doped type regions until they communicate with the plurality of first-doped type regions in each row or each column to form crystallization channels in each first-doped type region;

[0027] The perovskite nanocrystals are filled in the crystallization channels;

[0028] The transparent insulating layer covers the first-doped type regions, the second-doped type regions, the plurality of microchannels, and the perovskite nanocrystals, and forms a plurality of electrode windows corresponding to the plurality of first-doped type regions on partial surfaces of the first-doped type regions and partial surfaces of the second-doped type regions;

[0029] The transparent electrode covers the transparent insulating layer and the plurality of electrode windows.

[0030] In one embodiment of the present invention, the first-doped type is N-type and the second-doped type is P-type;

[0031] Alternatively, the first-doped type is P-type and the second-doped type is N-type.

[0032] In one embodiment of the present invention, the thickness of the first doping type epitaxial layer is 10 - 50 μm;

[0033] The thickness of the second doping type epitaxial layer is 1 - 5 μm;

[0034] The thickness of the first doping type region is 1 / 4 - 1 / 2 of the thickness of the second doping type epitaxial layer; the thickness of the second doping type region is 1 / 4 - 1 / 2 of the thickness of the second doping type epitaxial layer;

[0035] The thickness of the perovskite nanocrystals is 2 - 7 μm;

[0036] The material of the transparent insulating layer includes any one of PMMA photoresist, AZ series photoresist, SU - 8 photoresist, and COP photoresist;

[0037] The material of the transparent electrode includes ITO, and the thickness is 30 - 80 nm.

[0038] Compared with the prior art, the beneficial effects of the present invention:

[0039] The preparation method of the present invention first forms a number of microchannels by etching. Each microchannel forms a crystallization channel in the first doping type region. Then, the perovskite solution is guided into the microchannels by a microfluidic process and evaporated and crystallized in the crystallization channels to form patterned perovskite nanocrystals. This process can accurately position the perovskite pattern and achieve precise control of the position and size of the perovskite pattern. Therefore, this preparation method can achieve high - precision positioning growth of the perovskite material without reducing the performance of the perovskite material, realize high - resolution perovskite patterns, effectively improve the optoelectronic performance of optoelectronic devices, and has the advantages of high precision, low cost, and mass production. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 It is a schematic flow chart of a preparation method of a perovskite optoelectronic transistor array for an image sensor provided by an embodiment of the present invention;

[0041] Figures 2a - 2j It is a schematic cross - sectional process diagram of a preparation method of a perovskite optoelectronic transistor array for an image sensor provided by an embodiment of the present invention;

[0042] Figures 3a - 3f It is a schematic cross - sectional process diagram of another preparation method of a perovskite optoelectronic transistor array for an image sensor provided by an embodiment of the present invention;

[0043] Figure 4 It is a schematic diagram of a microfluidic process for introducing a perovskite solution into a microchannel provided by an embodiment of the present invention;

[0044] Figure 5 Schematic structural diagram of a perovskite optoelectronic transistor array for an image sensor provided by an embodiment of the present invention. Detailed implementation manners

[0045] The present invention will be further described in detail below in conjunction with specific embodiments, but the implementation manners of the present invention are not limited thereto.

[0046] Embodiment 1

[0047] Please refer to Figure 1 、 Figures 2a - 2j and Figures 3a - 3f , Figure 1 Schematic flow diagram of a preparation method of a perovskite optoelectronic transistor array for an image sensor provided by an embodiment of the present invention, Figures 2a - 2j Schematic cross-sectional process diagram of a preparation method of a perovskite optoelectronic transistor array for an image sensor provided by an embodiment of the present invention, Figures 3a - 3f Schematic cross-sectional process diagram of another preparation method of a perovskite optoelectronic transistor array for an image sensor provided by an embodiment of the present invention.

[0048] The preparation method of the perovskite optoelectronic transistor array for an image sensor provided in this embodiment includes the steps:

[0049] S1. A first-doped epitaxial layer 12 and a second-doped epitaxial layer 13 are sequentially grown on the surface of a first-doped type substrate 11.

[0050] Please refer to Figure 2a and Figure 3a . Using the chemical vapor deposition method Chemical Vapor Deposition, CVD, a first-doped epitaxial layer 12 and a second-doped epitaxial layer 13 are sequentially grown on the surface of the first-doped type substrate 11. Among them, the first doping type is N-type, the second doping type is P-type, or the first doping type is P-type, and the second doping type is N-type; the materials of the first-doped type substrate 11, the first-doped epitaxial layer 12, and the second-doped epitaxial layer 13 all include silicon.

[0051] Taking the first-doped type substrate 11 as N-type single crystal silicon, the first-doped epitaxial layer 12 as N-type silicon, and the second-doped epitaxial layer 13 as P-type silicon as an example, step S1 specifically includes:

[0052] Select a standard 4-12 inch N-type single crystal silicon as the substrate, and clean the substrate with acetone, isopropyl alcohol, and deionized water in sequence. After drying with nitrogen, place the substrate in a CVD reaction furnace for epitaxial growth. Among them, hydrogen is used as the gas transport carrier, SiH 4 、SiH 2 Cl 2, SiHCl 3 , SiCl 4 Any one of them is used as the Si source. N-type doping uses phosphine PH 3 , and P-type doping uses diborane B 2 H 6 or boron trichloride BCl 3 . The doping gas source is added to the carrier gas hydrogen in proportion; the flow rate of the carrier gas hydrogen is 20 - 80 L / min, the flow rate of the Si source is 5 - 50 ml / min, and the dosage of the doping gas source PH 3 or BCl 3 is 1 - 10 ml / min, the flow rate of the doping gas source B 2 H 6 is 0.5 - 5 ml / min, and the growth temperature is maintained at 1000 - 1280 °C. The thickness of the first doped type epitaxial layer 12 obtained by epitaxial growth is 10 - 50 μm, and the thickness of the second doped type epitaxial layer 13 is 1 - 5 μm.

[0053] S2. Form a second doped type region 15 and several first doped type regions 14 spaced apart in the second doped type region 15 on the surface layer of the second doped type epitaxial layer 13.

[0054] Please refer to Figure 2b and Figure 3b . By using high-temperature diffusion or ion implantation, several first doped type regions 14 and second doped type regions 15 are formed in the surface layer of the second doped type epitaxial layer 13, and the depth of high-temperature diffusion or ion implantation is less than the thickness of the second doped type epitaxial layer 13. At the same time, multiple alignment marks are formed on the surface of the second doped type epitaxial layer 13 through a mask. Among them, the first doped type region 14 is an N-type region, and the second doped type region 15 is a P-type region; or the first doped type region 14 is a P-type region, and the second doped type region 15 is an N-type region; and the doping concentration of the second doped type region 15 is greater than the doping concentration of the second doped type epitaxial layer 13, and the doping concentration of the first doped type region 14 is greater than the doping concentration of the first doped type epitaxial layer 12.

[0055] Taking the case of using the ion implantation method, the second doped type epitaxial layer 13 being P-type silicon, the second doped type region 15 being a heavily doped P++ region, and the first doped type region 14 being a heavily doped N++ region as an example, step S2 specifically includes:

[0056] Using the ion implantation method, shielded by a metal mask, performing shallow ion implantation in P-type silicon, the ion implantation depth is 1 / 4 - 1 / 2 of the thickness of the second doped type epitaxial layer 13, the implantation energy is 2 - 300 keV, and the implantation amount is maintained at 10 14 ~10 16dose / cm -2 Adopt high-temperature implantation, with the implantation temperature controlled at 200 - 500 °C. After implantation, anneal at 900 - 1300 °C for 30 min to achieve lattice recovery and a high electrical activation rate, and finally form a P++ region and several N++ regions spaced apart in the P++ region. Meanwhile, form multiple alignment marks on the surface of the P-type silicon through a mask plate, such as Figure 3b shown.

[0057] S3. Etch the trenches extending from the surfaces of the first doping type region 14 and the second doping type region 15 into the interior of the first doping type epitaxial layer 12 to form several microchannels 16 spaced apart. Among them, each microchannel 16 extends from the end of the second doping type region 15 until it communicates with several first doping type regions 14 in each row or column and forms a crystallization channel 161 in each first doping type region 14.

[0058] Specifically, please refer to Figure 2c 、 Figure 2d 、 Figure 2e and Figure 3c . Spin-coat a layer of photoresist PMMA on the device surface, and use the alignment marks to perform photolithographic development on the PMMA to form a microchannel pattern. Then, perform selective deep etching on several first doping type regions 14 and second doping type regions 15, etch through the first doping type region 14 (or the second doping type region 15), the second doping type epitaxial layer 13 until the interior of the first doping type epitaxial layer 12, form several microchannels 16, and remove the photoresist PMMA on the device surface.

[0059] Exemplarily, the deep etching method is as follows: Adopt periodic etching, with each period being 12 seconds. In the first 5 seconds, use C 4 F 8 with a flow rate of 100 sccm and SF 6 with a flow rate of 10 sccm to passivate and stabilize the pattern formed by the photoresist PMMA. Then, in the next 7 seconds, use C 4 F 8 with a flow rate of 5 sccm and SF 6 with a flow rate of 100 sccm to perform channel etching, and form an etching channel with a depth of 1 μm on the material surface every 10 - 20 cycles.

[0060] Furthermore, according to the depth of the second doping type epitaxial layer 23 being 1 - 5 μm, the depth of the microchannel 26 needs to be 1 - 2 μm deeper than the depth of the second doping type epitaxial layer 23, that is, the depth of the microchannel is 2 - 7 μm. The maximum width of the microchannel 16 can be less than 10 μm, preferably less than 1 μm.

[0061] In this embodiment, using the alignment marks to form the microchannel pattern can accurately position the microchannel pattern and reduce the overlay error at the same time.

[0062] In a specific embodiment, each microchannel 16 includes a plurality of crystallization channels 161, a plurality of buffer channels 162, and a diversion channel 163. Among them, a plurality of buffer channels 162 and a plurality of crystallization channels 161 are alternately connected in sequence. The area of the buffer channel 162 is larger than that of the crystallization channel 161, and the width of the buffer channel 162 gradually narrows along the liquid flow direction; the diversion channel 163 extends from the end of the second doping type region 15 and is connected to the buffer channel 162 close to the diversion channel 163.

[0063] Specifically, along the liquid flow direction, a plurality of buffer channels 162 and a plurality of crystallization channels 161 are connected after the diversion channel 163. A plurality of buffer channels 162 and a plurality of crystallization channels 161 are alternately connected in the order of buffer channel 162 first and then crystallization channel 161, thereby forming a microchannel 16; that is, each microchannel 16 is formed by connecting the diversion channel 163 - buffer channel 162 - crystallization channel 161 -... - buffer channel 162 - crystallization channel 161 in sequence.

[0064] Specifically, the diversion channel 163 is formed in the second doping type region 15 and is located at the end of the device, and its width can remain unchanged. Each crystallization channel 161 is formed in each first doping type region 14, and its width can remain unchanged or change along the liquid flow direction (for example, gradually narrow). Along the liquid flow direction, the buffer channel 162 is located in front of each crystallization channel 161. It can be partially formed in the second doping type region 15 and partially formed in the first doping type region 14, or can be formed in the second doping type region 15; and the width of the buffer channel 162 gradually becomes smaller, and it can transition to the crystallization channel 161 in a straight line form or in an arc form.

[0065] In a specific embodiment, along the liquid flow direction, the buffer channel 162 transitions to the crystallization channel 161 in an arc shape.

[0066] Specifically, if there is a turning point in the buffer channel 162, the perovskite solution will accumulate at the turning point and cannot flow. Therefore, in this embodiment, the buffer channel 162 is set in an arc transition form, which can greatly reduce the adhesion of the perovskite solution in the buffer channel.

[0067] Preferably, the shape of the buffer channel 162 includes a heart shape. The heart-shaped buffer channel 162 can provide a larger area on the basis of avoiding the adhesion of the perovskite solution. Specifically, the area ratio of the heart-shaped buffer channel 162 to the crystallization channel 161 is 20:1 to 200:1. The specific area ratio is selected according to the concentration of the perovskite solution. The smaller the concentration, the slower the perovskite solution is converted into crystals, and the larger the area ratio; taking the perovskite solution as CsBr and PbBr2 Taking the saturated solution dissolved in dimethyl sulfoxide (DMSO) as an example, the area ratio of the heart-shaped buffer channel 162 to the crystallization channel 161 is 60:1.

[0068] It should be noted that in this embodiment, the perovskite solution is taken as an example to illustrate the microchannel 16, and this microchannel pattern can also be applied to other ionic solutions that can evaporate and crystallize.

[0069] S4. Use the microfluidic process to divert the perovskite solution into the microchannel 16, and evaporate and crystallize in each crystallization channel 161 to form patterned perovskite nanocrystals 17.

[0070] Please refer to Figure 2f 、 Figure 3d and Figure 4 , Figure 4 which is a schematic diagram of a microfluidic process provided by an embodiment of the present invention for introducing a perovskite solution into a microchannel.

[0071] Specifically, using the capillary action, the perovskite solution is introduced from the diversion channel 163 through a microfluidic pump until the buffer channel 162 and the crystallization channel 161 are filled; when the perovskite solution evaporates and crystallizes in the crystallization channel 161, patterned perovskite nanocrystals 17 are formed as the switch of the control transistor. Among them, the microfluidic pump is formed by a filter paper attached to the glass surface; when introducing the perovskite solution, the filter paper is located on the lower surface of the glass surface, one end is immersed in the perovskite solution, and the other end is in contact with the transistor. When the filter paper is completely wet, the perovskite solution is introduced into the microchannel 16.

[0072] The process of the perovskite solution filling in the microchannel 16 and crystallizing in the crystallization channel 161 is as follows:

[0073] The microfluidic pump uses capillary action to divert the perovskite solution into the diversion channel 163. The diversion channel 163 uses capillary action to push the perovskite solution introduced by the microfluidic pump into the buffer channel 162. Since the width of the buffer channel 162 gradually narrows along the liquid flow direction, according to the liquid wettability and surface tension, the buffer channel 162 will push the perovskite solution to move towards its narrow end, thereby diverting the perovskite solution into the crystallization channel 161. The crystallization channel 161 uses capillary action to push the introduced perovskite solution back into the buffer channel 162 again. Thus, driven by capillary force using the microfluidic pump, new solution is continuously introduced from the solvent source until the microchannel 16 is filled, and then the microfluidic pump is removed to stop injecting liquid for perovskite solution evaporation.

[0074] Furthermore, during the evaporation stage of the perovskite solution, the perovskite solution in the crystallization channel 161 evaporates and crystallizes. Since the area of the buffer channel 162 is larger than that of the crystallization channel 161, the solution capacity stored therein is more than that in the crystallization channel 161. Therefore, the buffer channel 162 can push the stored solution into the crystallization channel 161 to compensate for the evaporated solution. The solution evaporates and crystallizes simultaneously, and finally, under the action of the adsorption force, the solution is pushed to the narrowest part of the channel, i.e., the crystallization channel 161, for crystallization until the crystallization channel 161 is filled, obtaining the patterned perovskite nanocrystals 17.

[0075] Specifically, the thickness of the perovskite nanocrystals 17 is equal to that of the microchannel 16, which is 2 - 7 μm.

[0076] Exemplarily, the perovskite solution is formed by dissolving CsBr and PbBr 2 in the dimethyl sulfoxide DMSO solvent.

[0077] It should be noted that according to the microchannel pattern of this embodiment, the perovskite crystallization finally forms in the crystallization channel, and no crystallization will form in other areas. If crystallization forms in other areas due to process errors, it will not affect the normal operation of the device.

[0078] This embodiment uses the microfluidic process to prepare perovskite nanocrystals. Compared with using auxiliary means such as templates and blade coaters, the capillary-driven microfluidic technology does not require special equipment. Only filter paper is needed to guide the liquid flow. The process is mild, the scheme is simple, and the cost is low. Moreover, during the microfluidic transport of ions, no solution overflows, and zero pollution and zero waste can be achieved.

[0079] In the process of perovskite patterning in this embodiment, the perovskite material is dissolved in the solution, and the flow of the perovskite solution is controlled by the microfluidic technology. After the perovskite solution evaporates and crystallizes, the purpose of its patterning is achieved, avoiding the problem that perovskite, as an ionic crystal, is unstable when encountering organic solutions.

[0080] S5. Spin-coat a photoresist on the sample surface and perform exposure and etching to form a plurality of electrode windows corresponding one-to-one to the plurality of first doping type regions 14, obtaining the transparent insulating layer 18. Among them, each electrode window exposes a part of the surface of the first doping type region 14 and a part of the surface of the second doping type region 15.

[0081] Specifically, the photoresist is selected as a transparent photoresist, which can be any one of PMMA photoresist, AZ series photoresist, SU-8 photoresist, and COP photoresist.

[0082] Taking the PMMA photoresist as an example for the transparent insulating layer 18, step S5 includes:

[0083] Please refer to Figure 2g 、Figure 2h and Figure 3e First, spin-coat PMMA photoresist on the surface of the sample, and then expose and etch the photoresist in the source electrode region to form a plurality of electrode windows corresponding one-to-one to a plurality of first doping type regions 14. The plurality of electrode windows serve as the source electrode region, exposing a partial surface of the first doping type region 14 and a partial surface of the second doping type region 15.

[0084] S6. Deposit a transparent electrode 19 on the surface of the transparent insulating layer 18 and the plurality of electrode windows.

[0085] Specifically, please refer to Figure 2i and Figure 3f Deposit a transparent ITO material on the surface of the sample to form a transparent electrode 19. The portion of the transparent electrode 19 located in the electrode window is in contact with a partial surface of the first doping type region 14 and a partial surface of the second doping type region 15, and this portion is used as the source electrode. The remaining portion located on the transparent insulating layer 18 can be retained or removed. When the transparent electrode 19 located on the transparent insulating layer 18 is retained or removed, since both the transparent insulating layer 18 and the transparent electrode 19 are transparent materials, light can pass through the two transparent materials or one transparent material to generate photo-generated carriers in the perovskite nanocrystals.

[0086] Specifically, the thickness of the transparent electrode 19 is 30 - 80 nm.

[0087] In this embodiment, a transparent insulating layer 18 and a transparent electrode 19 are covered on the perovskite nanocrystals 17. Since both are transparent materials, light can pass through the two transparent materials to generate photo-generated carriers in the perovskite nanocrystals, and then serve as the switch of the control transistor.

[0088] The solution of using a transparent ITO material as the source electrode in this embodiment provides greater flexibility in device design, especially for those optoelectronic device fields that require transparent electrodes. Compared with traditional metal electrodes, ITO allows more light to penetrate to the active layer, improving the transparency and conductivity of the device, and is expected to improve the performance of the device under lighting conditions. In addition, the use of ITO can be achieved by physical vapor deposition (PVD) techniques such as sputtering. These techniques are usually compatible with semiconductor materials and can achieve a more uniform coverage.

[0089] S7. Grow a drain electrode 20 on the other surface of the first doping type substrate 11.

[0090] Specifically, please refer to Figure 2j Grow a metal as the drain electrode 20 on the back of the first doping type substrate 11. The thickness of the drain electrode 20 can be 50 - 100 nm.

[0091] The preparation method of this embodiment first forms a plurality of microchannels by etching. Each microchannel forms a crystallization channel in the first doping type region. Then, the perovskite solution is guided into the microchannels by a microfluidic process and evaporated and crystallized in the crystallization channels to form a patterned perovskite nanocrystal. This process can accurately position the perovskite pattern and achieve precise control of the position and size of the perovskite pattern. Therefore, this preparation method can achieve high-precision positioning growth of the perovskite material without degrading the performance of the perovskite material, realize a high-resolution perovskite pattern, effectively improve the optoelectronic performance of optoelectronic devices, and has the advantages of high precision, low cost, and mass production.

[0092] Example Two

[0093] On the basis of Example One, this embodiment provides a perovskite phototransistor array for an image sensor, which is prepared by the preparation method of Example One.

[0094] Please refer to Figure 5 , Figure 5 , which is a schematic structural diagram of a perovskite phototransistor array for an image sensor provided by an embodiment of the present invention. This perovskite phototransistor array can be used in a CCD image sensor or a CMOS image sensor, and includes: a first doping type substrate 11, a first doping type epitaxial layer 12, a second doping type epitaxial layer 13, a plurality of first doping type regions 14, a second doping type region 15, a plurality of microchannels 16, perovskite nanocrystals 17, a transparent insulating layer 18, a transparent electrode 19, and a drain electrode 20.

[0095] Among them, the leakage electrode 20, the first-doped type substrate 11, the first-doped type epitaxial layer 12, and the second-doped type epitaxial layer 13 are stacked in sequence. The second-doped type region 15 is formed in the surface layer of the second-doped type epitaxial layer 13, and a plurality of first-doped type regions 14 are distributed in an array in the second-doped type region 15; specifically, a plurality of first-doped type regions 14 are uniformly distributed periodically in the second-doped type region 15 to form a perovskite transistor array. A plurality of microchannels 16 are distributed at intervals and all extend from the surfaces of the first-doped type region 14 and the second-doped type region 15 to the inside of the first-doped type epitaxial layer 12, and extend from the end of the second-doped type region 15 until connecting a plurality of first-doped type regions 14 in each row or each column to form a crystallization channel 161 in each first-doped type region 14. Perovskite nanocrystals 17 are filled in the crystallization channel 161. The transparent insulating layer 18 covers the first-doped type region 14, the second-doped type region 15, the plurality of microchannels 16, and the perovskite nanocrystals 17, and forms a plurality of electrode windows corresponding one by one to the plurality of first-doped type regions 14 on a partial surface of the first-doped type region 14 and a partial surface of the second-doped type region 15. The transparent electrode 19 covers the transparent insulating layer 18 and the plurality of electrode windows; it can be understood that the part of the transparent electrode 19 covering each electrode window serves as the source electrode, and the source electrode can be located on one side of the perovskite nanocrystals 17, such as Figure 3f shown, or can be located on opposite sides of the perovskite nanocrystals 17, such as Figure 5 shown.

[0096] In a specific embodiment, the first-doped type is N-type and the second-doped type is P-type; alternatively, the first-doped type is P-type and the second-doped type is N-type. The materials of the first-doped type substrate 11, the first-doped type epitaxial layer 12, and the second-doped type epitaxial layer 13 all include silicon. The doping concentration of the second-doped type region 15 is greater than the doping concentration of the second-doped type epitaxial layer 13, and the doping concentration of the first-doped type region 14 is greater than the doping concentration of the first-doped type epitaxial layer 12.

[0097] Exemplarily, when the first-doped type is N-type and the second-doped type is P-type, the first-doped type substrate 11 uses N+ single crystal silicon, the first-doped type epitaxial layer 12 uses N-type silicon, the second-doped type epitaxial layer 13 uses P-type silicon, the second-doped type epitaxial layer 13 forms a P-type blocking layer, the second-doped type region 15 forms a P++ region, and the first-doped type region 14 forms an N++ region.

[0098] When the first doping type is P-type and the second doping type is N-type, the substrate 11 of the first doping type is made of P-type single-crystalline silicon, the epitaxial layer 12 of the first doping type is made of P-type silicon, the epitaxial layer 13 of the second doping type is made of N-type silicon, the region 15 of the second doping type forms an N++ region, and the region 14 of the first doping type forms a P++ region.

[0099] In a specific embodiment, the thickness of the epitaxial layer 12 of the first doping type is 10 - 50 μm; the thickness of the epitaxial layer 13 of the second doping type is 1 - 5 μm; the thickness of the perovskite nanocrystals 17 is 2 - 7 μm. The thickness of the region 15 of the second doping type is 1 / 4 - 1 / 2 of the thickness of the epitaxial layer 13 of the second doping type; the thickness of the region 14 of the first doping type is 1 / 4 - 1 / 2 of the thickness of the epitaxial layer 13 of the second doping type. The thickness of the perovskite nanocrystals 17 is 2 - 7 μm. The material of the transparent insulating layer 18 includes any one of PMMA photoresist, AZ series photoresist, SU-8 photoresist, and COP photoresist. The material of the transparent electrode 19 is ITO, and the thickness is 30 - 80 nm. The thickness of the drain electrode 20 can be 50 - 100 nm.

[0100] Taking the first doping type as N-type and the second doping type as P-type as an example, the working principle of the perovskite transistor in this embodiment is as follows:

[0101] Under dark conditions, that is, when there is no light illumination, the gate is composed of a photosensitive material, namely perovskite. However, due to the absence of light illumination, the conductivity characteristics of the photosensitive material remain unchanged. At this time, the P-type epitaxial layer plays a role in preventing electrons from flowing from the source to the drain. The presence of the P-type epitaxial layer makes the channel in a closed state and the current difficult to pass through when there is not enough gate voltage.

[0102] When there is light illumination, the light irradiates the photosensitive material in the trench. Under the action of light illumination, the photosensitive material generates a large number of photo-generated carriers, forming a conductive channel in the NPN structure composed of N-type silicon, P-type silicon, and the N++ region, enabling electrons to flow smoothly from the source to the drain, thereby generating a large current. The P++ region still plays a role in reducing the contact resistance under light illumination conditions, improving the electrical performance and stability of the device, and ensuring the stable transmission of current.

[0103] In summary, by replacing the gate in the trench with the photosensitive material perovskite, this device can achieve response to light illumination and realize the function of light-controlled current. The P-type epitaxial layer and the P++ region play important auxiliary and regulatory roles in the performance and working characteristics of the device in different states.

[0104] The perovskite nanocrystals in this embodiment are formed in the microchannel, forming an embedded perovskite nanostructure protected by semiconductor materials on three sides, reducing the influence of the environment such as light, water, and heat on perovskite, and greatly improving the stability of the perovskite nanostructure.

[0105] Compared with some simple photosensitive components such as photoresistors, the phototransistor of this embodiment can amplify optical signals, is more sensitive to optical signals, can detect relatively weak light changes, and has high sensitivity; it can respond to a wide range of spectra, often covering common bands from visible light to near-infrared light, etc.; it has a built-in current amplification function (transistor characteristics) and does not require an additional complex and expensive amplification circuit to amplify signals; it can process both analog light intensity change signals and, under certain conditions, digital light control signals, and has analog and digital signal compatibility; it has a faster response speed than photodiodes; and compared with complex optical detection and signal processing systems, it has a lower cost; it integrates light sensing and amplification functions, is relatively simple in circuit design and layout, and the circuit is relatively simple; at the same time, the phototransistor can control the magnitude of the current by controlling the intensity of the light source, and has good controllability and flexibility; to a certain extent, it is not affected by electromagnetic interference and has good reliability; it is suitable for large-scale integration on chips, which is conducive to the development of optoelectronic integration technology.

[0106] The phototransistor of this embodiment can be applied in the lighting field, such as street lamp control, indoor intelligent lighting, light-controlled night lights, etc.; the security monitoring field, such as surveillance cameras, access control systems, etc.; the industrial automation field, such as lighting systems in factory workshops, position detection of materials on production lines, light environment monitoring and control components, etc.; the consumer electronics field, such as automatic exposure control of cameras or mobile phones, opening and closing control of automatic curtains, etc.; the communication field, such as being used as the signal receiving and conversion part in optical communication systems, detecting ambient light intensity to optimize the performance of devices or protect devices, etc.; the agricultural field, such as intelligent greenhouse control, aquaculture, etc.; the aerospace field, such as sensors on the outer surface of spacecraft, control of aircraft internal lighting systems, etc.

[0107] The above content is a further detailed description of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention belongs, without departing from the concept of the present invention, several simple deductions or substitutions can still be made, and all should be regarded as belonging to the protection scope of the present invention.

Claims

1. A method for preparing a perovskite phototransistor array for an image sensor, characterized in that: Includes steps: Sequentially growing a first doping type epitaxial layer (12) and a second doping type epitaxial layer (13) on a surface of a first doping type substrate (11); Forming a second doping type region (15) and a plurality of first doping type regions (14) spaced apart and distributed in the second doping type region (15) in a surface layer of the second doping type epitaxial layer (13); Etching grooves extending from the surfaces of the first doping type region (14) and the second doping type region (15) to the interior of the first doping type epitaxial layer (12) to form a plurality of microchannels (16) distributed at intervals, wherein each microchannel (16) extends from the end of the second doping type region (15) until it connects a plurality of first doping type regions (14) in each row or column and forms a crystallization channel (161) in each first doping type region (14); The perovskite solution is directed into the microchannel (16) by a microfluidic process, and evaporated and crystallized in each crystallization channel (161) to form patterned perovskite nanocrystals (17); Spin-coating photoresist on the surface of the sample and performing exposure and etching to form a plurality of electrode windows corresponding to the plurality of first doping type regions (14) one by one, thereby obtaining a transparent insulating layer (18), wherein each electrode window exposes a portion of the surface of the first doping type region (14) and a portion of the surface of the second doping type region (15); Depositing transparent electrodes (19) on the surface of the transparent insulating layer (18) and the plurality of electrode windows; A drain electrode (20) is grown on the other surface of the first doping type substrate (11).

2. The method for preparing a perovskite phototransistor array for an image sensor according to claim 1, characterized in that: The microchannel (16) includes a plurality of crystal channels (161), a plurality of buffer channels (162) and a flow guide channel (163), wherein: The plurality of buffer channels (162) and the plurality of crystallization channels (161) are connected alternately in sequence, the area of ​​the buffer channel (162) is larger than the area of ​​the crystallization channel (161), and the width of the buffer channel (162) gradually narrows along the liquid flow direction; The guide channel (163) extends from an end of the second doping type region (15) and is connected to the buffer channel (162) close to the guide channel (163).

3. The method for preparing a perovskite phototransistor array for an image sensor according to claim 2, characterized in that: Along the liquid flow direction, the buffer channel (162) transitions to the crystallization channel (161) in the shape of an arc.

4. The method for preparing a perovskite phototransistor array for an image sensor according to claim 2, characterized in that: The shape of the buffer channel (162) includes a heart shape.

5. The method for preparing a perovskite phototransistor array for an image sensor according to claim 3, characterized in that: The area ratio of the buffer channel (162) to the crystal channel (161) is 20:1 to 200:

1.

6. The method for preparing a perovskite phototransistor array for an image sensor according to claim 2, characterized in that: The perovskite solution is directed into the microchannel (16) by a microfluidic process, and evaporated and crystallized in each crystallization channel (161) to form patterned perovskite nanocrystals (17), comprising: By utilizing the capillary phenomenon, the perovskite solution is introduced from the flow guide channel (163) through a microfluidic pump until the buffer channel (162) and the crystallization channel (161) are fully filled; the perovskite solution is evaporated and crystallized in the crystallization channel (161) to form patterned perovskite nanocrystals (17).

7. The method for preparing a perovskite phototransistor array for an image sensor according to claim 1, characterized in that: The thickness of the perovskite nanocrystal (17) is equal to the depth of the microchannel (16).

8. A perovskite phototransistor array for an image sensor, characterized in that: Prepared by the preparation method according to any one of claims 1 to 7, comprising: a first doping type substrate (11), a first doping type epitaxial layer (12), a second doping type epitaxial layer (13), a plurality of first doping type regions (14), a second doping type region (15), a plurality of microchannels (16), perovskite nanocrystals (17), a transparent insulating layer (18), a transparent electrode (19) and a drain electrode (20), wherein: The drain electrode (20), the first doping type substrate (11), the first doping type epitaxial layer (12), and the second doping type epitaxial layer (13) are stacked in sequence; The second doping type region (15) is formed in a surface layer of the second doping type epitaxial layer (13), and the plurality of first doping type regions (14) are distributed in the second doping type region (15) in an array; The plurality of microchannels (16) are distributed at intervals and extend from the surfaces of the first doping type region (14) and the second doping type region (15) to the inside of the first doping type epitaxial layer (12), and extend from the end of the second doping type region (15) until connecting the plurality of first doping type regions (14) in each row or column to form a crystallization channel (161) in each first doping type region (14); The perovskite nanocrystals (17) are filled in the crystal channels (161); The transparent insulating layer (18) covers the first doping type region (14), the second doping type region (15), a plurality of microchannels (16) and the perovskite nanocrystals (17), and forms a plurality of electrode windows corresponding to the plurality of first doping type regions (14) on a partial surface of the first doping type region (14) and a partial surface of the second doping type region (15); The transparent electrode (19) covers the transparent insulating layer (18) and the plurality of electrode windows.

9. The perovskite phototransistor array for an image sensor according to claim 8, characterized in that: The first doping type is N-type, and the second doping type is P-type; Alternatively, the first doping type is P type, and the second doping type is N type.

10. The perovskite phototransistor array for an image sensor according to claim 8, characterized in that: The thickness of the first doping type epitaxial layer (12) is 10 to 50 μm; The thickness of the second doping type epitaxial layer (13) is 1 to 5 μm; The thickness of the first doping type region (14) is 1 / 4 to 1 / 2 of the thickness of the second doping type epitaxial layer (13); the thickness of the second doping type region (15) is 1 / 4 to 1 / 2 of the thickness of the second doping type epitaxial layer (13); The thickness of the perovskite nanocrystal (17) is 2 to 7 μm; The material of the transparent insulating layer (18) includes any one of PMMA photoresist, AZ series photoresist, SU-8 photoresist and COP photoresist; The material of the transparent electrode (19) includes ITO, and the thickness is 30-80 nm.

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