Method of manufacturing electrode structure

Abstract

A method of fabricating an electrode structure includes etching a bottom metal layer through a first patterned photoresist including first and second shielding portions to form a first metal pattern, a second metal pattern, and a bridge connected therebetween; removing the first shielding part; anodizing the bottom metal layer with the remaining second shielding portion by flowing an anodizing current from the first metal pattern; removing the remaining second shielding part; depositing a conductive layer on the bottom metal layer to contact the non-anodized region of the second metal pattern; etching the conductive layer through the second patterned photoresist until the open section of the bridge is exposed; and etching the open section of the bridge through the second patterned photoresist until the bridge is electrically disconnected. Therefore, the floating island structure can be formed by only adopting two groups of PEP processes, so that the manufacturing cost can be obviously reduced, and the manufacturing efficiency can be effectively improved.

Description

Technical Field

[0001] The present disclosure relates to a method for manufacturing an electrode structure. Background Art

[0002] The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.

[0003] Traditional display manufacturing is a standardized process. In recent years, new types of displays such as micro LED displays, mini LED displays, quantum dot LED displays, etc. have emerged and are expected to dominate the display field. The process of making a display includes many steps. Reducing one of the steps can reduce costs and improve efficiency. Summary of the invention

[0004] According to some embodiments of the present disclosure, a method for manufacturing an electrode structure includes: forming a first patterned photoresist on a bottom metal layer, wherein the first patterned photoresist includes a first shielding portion and a second shielding portion that is thicker than the first shielding portion; etching the bottom metal layer through the first patterned photoresist to form a first metal pattern, a second metal pattern, and at least one bridge connected between the first metal pattern and the second metal pattern; removing the first shielding portion while retaining a second shielding portion having a first sub-portion and a second sub-portion, wherein the first sub-portion at least partially covers a top surface of at least one bridge, and the second sub-portion covers at least a region of a top surface of the second metal pattern; and conducting an anodic oxidation current from the first metal pattern through the second metal pattern. At least one bridge flows to the second metal pattern, and anodizes the bottom metal layer covered with the remaining second shielding portion; removes the remaining second shielding portion after the anodization; deposits a conductive layer on the bottom metal layer after the remaining second shielding portion is removed, wherein the conductive layer contacts at least one area of ​​the second metal pattern; deposits a second patterned photoresist on the conductive layer, wherein a vertical projection of the second patterned photoresist onto the bottom metal layer overlaps at least one area of ​​the second metal pattern; etches the conductive layer through the second patterned photoresist until an open section on the top surface of the at least one bridge that is not anodized is exposed; and etches the open section of the at least one bridge through the second patterned photoresist until the at least one bridge is electrically disconnected.

[0005] In one or more embodiments of the present disclosure, the atomic ratio of aluminum in the bottom metal layer is greater than 80%.

[0006] In one or more embodiments of the present disclosure, anodization is performed to achieve a termination voltage. The etched bottom metal layer has a thickness and a line width. The termination voltage is less than the minimum of the thickness and the line width in nm divided by 0.9 nm-V -1 .

[0007] In one or more embodiments of the present disclosure, the thickness of the unanodized portion of the etched bottom metal layer after anodization is equal to or greater than 1 / 10 of the thickness of the etched bottom metal layer before anodization.

[0008] In one or more embodiments of the present disclosure, the number of at least one region of the second metal pattern is two or more than two.

[0009] In one or more embodiments of the present disclosure, the bottom metal layer includes a first sublayer containing aluminum and at least one second sublayer stacked on the first sublayer. The method further includes: selectively etching the at least one second sublayer relative to the first sublayer to expose the first sublayer after removing the first shielding portion and before anodizing.

[0010] In one or more embodiments of the present disclosure, depositing the conductive layer includes: depositing a semiconductor layer to cover the bottom metal layer after the remaining second shielding portion is removed; and depositing a top metal layer on the semiconductor layer. The second patterned photoresist has a first shielding portion and a second shielding portion that is thicker than the first shielding portion. The method further includes: before etching the conductive layer, anodizing the top metal layer on which the second patterned photoresist is deposited; and after anodizing and before etching the conductive layer, removing the first shielding portion of the second patterned photoresist.

[0011] In one or more embodiments of the present disclosure, the surface of the top metal layer in contact with the semiconductor layer contains aluminum.

[0012] In one or more embodiments of the present disclosure, depositing the conductive layer includes: depositing a semiconductor layer to cover the bottom metal layer before the remaining second shielding portion is removed; and depositing a top metal layer on the semiconductor layer. The second patterned photoresist has a first shielding portion and a second shielding portion that is thicker than the first shielding portion. The method further includes: after etching the conductive layer, removing the first shielding portion of the second patterned photoresist; and after removing the first shielding portion, anodizing the top metal layer on which the second patterned photoresist is deposited.

[0013] In one or more embodiments of the present disclosure, the surface of the top metal layer in contact with the semiconductor layer contains aluminum.

[0014] In one or more embodiments of the present disclosure, the conductive layer includes aluminum.

[0015] In one or more embodiments of the present disclosure, the conductive layer includes a first sublayer containing aluminum and at least one second sublayer stacked on the first sublayer. Etching the conductive layer includes: selectively etching the at least one second sublayer relative to the first sublayer to expose the first sublayer; and etching the exposed first sublayer until the open segment on the at least one bridge is exposed.

[0016] In one or more embodiments of the present disclosure, the bottom metal layer includes at least one element of aluminum, zirconium, hafnium, and tantalum.

[0017] In one or more embodiments of the present disclosure, the bottom metal layer includes at least one rare earth metal element.

[0018] In one or more embodiments of the present disclosure, the bottom metal layer includes aluminum and silicon.

[0019] In one or more embodiments of the present disclosure, at least one region of the second metal pattern includes a first region and a second region. The conductive layer is etched to form a first conductive pattern, a second conductive pattern, and a third conductive pattern that are separated from each other. The first conductive pattern and the second conductive pattern contact the first region and the second region, respectively. The third conductive pattern is located between the first conductive pattern and the second conductive pattern, and extends across the second metal pattern.

[0020] In one or more embodiments of the present disclosure, the top surface of the first metal pattern has an anodized region and at least one non-anodized region after anodization.

[0021] In one or more embodiments of the present disclosure, the entirety of at least one non-anodized region of the first metal pattern is covered by the etched conductive layer.

[0022] In one or more embodiments of the present disclosure, the method further includes reflowing the first sub-portion to partially cover the sidewall of at least one bridge before anodization. The above description is only used to illustrate the problem to be solved by the present disclosure, the technical means to solve the problem, and the effect produced by the problem, etc. The specific details of the present disclosure will be described in detail in the following embodiments and related drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to make the above and other objects, features, advantages and embodiments of the present disclosure more clearly understood, the accompanying drawings are described as follows:

[0024] Figure 1A , Figure 1B , Figure 1C , Figure 1D , Figure 1E , Figure 1F , Figure 1G , Figure 1H , Fig. 1I as well as Figure 1J A cross-sectional schematic diagram illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure;

[0025] Figure 2A A partial top view showing an intermediate stage of some embodiments of the present disclosure;

[0026] Figure 2B To illustrate some embodiments of the present disclosure Figure 2A A cross-sectional view of the structure along line segment 2B-2B;

[0027] Figure 3A A partial top view showing an intermediate stage of some embodiments of the present disclosure;

[0028] Figure 3B To illustrate some embodiments of the present disclosure Figure 3A A cross-sectional view of the structure along line segment 3B-3B;

[0029] Figure 3C A partial top view showing an intermediate stage of some embodiments of the present disclosure;

[0030] Figure 3D To illustrate some embodiments of the present disclosure Figure 3C A local cross-sectional view of the structure along the line segment 3D-3D;

[0031] Figure 3E A partial top view showing an intermediate stage of some embodiments of the present disclosure;

[0032] Figure 3F , Figure 3G as well as Figure 3H A cross-sectional schematic diagram illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure;

[0033] Figure 4 A schematic diagram illustrating an anodizing process according to some embodiments of the present disclosure;

[0034] Figure 5 Schematic diagrams showing cross sections of a bottom metal layer before and after anodization according to some embodiments of the present disclosure;

[0035] Figure 6 A circuit diagram of a 2T1C pixel circuit according to some embodiments of the present disclosure is shown;

[0036] Fig. 7A A partial top view of an electrode structure according to some embodiments of the present disclosure is shown;

[0037] Figure 7B To illustrate some embodiments of the present disclosure Fig. 7A The electrode structure in the figure is a partial cross-sectional view along line segment 7B-7B;

[0038] Fig. 8A , Figure 8B , Figure 8C , Fig.8D , Fig. 8E , Fig.8F , Figure 8G , Figure 8H , Figure 8I , Figure 8J as well as Figure 8K A cross-sectional schematic diagram illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure;

[0039] Fig. 9 To illustrate some embodiments of the present disclosure Figure 8K A partial top view of the structure shown in ;

[0040] Fig. 10A , Fig. 10B , Fig. 10C , Fig. 10D as well as Fig.10E A cross-sectional schematic diagram illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure;

[0041] Fig.11A , Fig. 11B , Fig. 11C , Fig.11D , Fig.11E as well as Fig.11F A cross-sectional schematic diagram illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure;

[0042] Fig. 12A , Fig. 12B as well as Fig. 12C The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure.

[0043] Reference numerals:

[0044] A: Semiconductor layer

[0045] A1, A2: Area

[0046] Aa: Channel area

[0047] Ab: Conductive area

[0048] AD: Anodized part

[0049] AZ: Anodizing Area

[0050] BM, BM-1: bottom metal layer

[0051] C: Anodizing Section

[0052] CL: Conductive layer

[0053] CP1, CP2, CP3: Conductive pattern

[0054] DE: Drain

[0055] E1: First exposure dose

[0056] E2: Second exposure dose

[0057] EL:Electrolyte

[0058] FG: Floating Gate

[0059] H1: The first hollow part

[0060] H2: The second hollow part

[0061] LP1, LP1': First lower metal pattern

[0062] LP2, LP2': Second lower metal pattern

[0063] M1: First metal pattern

[0064] M2: Second metal pattern

[0065] MB: Bridge

[0066] OB1,OB2: Object

[0067] OS: Open Segment

[0068] PR: Photoresist

[0069] PR1: First patterned photoresist

[0070] PR11, PR21: First shielding part

[0071] PR12, PR22: Second shielding position

[0072] PR12a: first subsite

[0073] PR12b: Second subsite

[0074] PR2: Second patterned photoresist

[0075] S1, S3, S4: surface area

[0076] SE: Source

[0077] SL1: First sublayer

[0078] SL2: Second sublayer

[0079] SL3: The third sublayer

[0080] SUB: Substrate

[0081] T1, T2, T3: thickness

[0082] TM: Top Metal Layer

[0083] UP1: First upper metal pattern

[0084] UP2: Second upper metal pattern

[0085] UZ: Unanodized Zone

[0086] W1,W2: Width DETAILED DESCRIPTION

[0087] The following will disclose multiple embodiments of the present disclosure with the accompanying drawings. For the purpose of clear description, many practical details will be described together in the following description. However, it should be understood that these practical details should not be used to limit the present disclosure. In other words, in some embodiments of the present disclosure, these practical details are not necessary. In addition, in order to simplify the drawings, some known conventional structures and components will be depicted in a simple schematic manner in the drawings.

[0088] In various embodiments, description is made with reference to the accompanying drawings. However, certain embodiments may be implemented without one or more of these specific details, or in combination with other known methods and configurations. In the following description, many specific details, such as specific configurations, dimensions, and processes, etc., are described to provide a thorough understanding of the present disclosure. In other cases, known semiconductor processes and manufacturing techniques are not described in particular detail to avoid unnecessarily obscuring the present disclosure. References throughout this specification to "one embodiment", "some embodiments", etc. mean that specific features, structures, configurations, or characteristics described in conjunction with the embodiment are included in at least one embodiment of the present disclosure. Therefore, phrases "in one embodiment", "according to some embodiments", etc., which appear throughout this specification, do not necessarily refer to the same embodiment of the present disclosure. In addition, specific features, structures, configurations, or characteristics may be combined in any suitable manner in one or more embodiments.

[0089] Please refer to Figure 1A . Figure 1A Schematic cross-sectional view showing an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 1AAs shown, a bottom metal layer BM is formed on a substrate SUB, and a photoresist PR is formed on the bottom metal layer BM. The material of the photoresist PR is a positive photoresist. The first area of ​​the photoresist PR is exposed to light of a first exposure dose E1. The second area of ​​the photoresist PR is exposed to light of a second exposure dose E2 that is less than the first exposure dose E1. The third area of ​​the photoresist PR is not exposed. In some embodiments, UV light may be used to expose the photoresist PR, but the present disclosure is not limited thereto. In some embodiments, a grayscale mask (or halftone mask) may be used to expose the photoresist PR. For example, the halftone mask may include a fully exposed portion that transmits the full intensity of light (i.e., the first exposure dose E1), a halftone portion that transmits a portion of the light (e.g., the second exposure dose E2, which may be 20% to 60% of the first exposure dose E1), and a full-tone portion that completely blocks the light.

[0090] In some embodiments, the bottom metal layer BM may include at least one element selected from the group consisting of aluminum, zirconium, hafnium, and tantalum. For example, the atomic ratio of aluminum in the bottom metal layer BM is greater than 80%.

[0091] In some embodiments, the bottom metal layer BM may include at least one rare earth metal element.

[0092] In some embodiments, the bottom metal layer BM may include aluminum and silicon, so that the bottom metal layer BM may have better film quality.

[0093] Please refer to Figure 1B . Figure 1B The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 1A The intermediate stages shown can be followed in sequence by Figure 1B The intermediate stage shown. Figure 1B As shown, the photoresist PR is exposed and developed into a first patterned photoresist PR1 having a first shielding portion PR11 and a second shielding portion PR12. The second shielding portion PR12 is thicker than the first shielding portion PR11. It can be seen that the area where the photoresist PR is exposed with the first exposure dose E1 will be completely removed, the area where the photoresist PR is exposed with the second exposure dose E2 will be partially removed to form the first shielding portion PR11, and the area where the photoresist PR is not exposed will be retained originally to form the second shielding portion PR12.

[0094] Please refer to Figure 1C . Figure 1C The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 1B The intermediate stages shown can be followed in sequence by Figure 1C The intermediate stage shown. Figure 1CAs shown, the bottom metal layer BM is etched through the first patterned photoresist PR1 to form a first metal pattern M1, a second metal pattern M2, and a bridge MB connected between the first metal pattern M1 and the second metal pattern M2. In some embodiments, a wet etching process may be performed to etch the bottom metal layer BM. In some embodiments, a PAN etchant (a mixture of phosphoric acid, acetic acid, nitric acid, and water) may be used in the wet etching process. For example, the mixing ratio of phosphoric acid, acetic acid, nitric acid, and water may be 16:1:1:2, but the present disclosure is not limited thereto. In some embodiments, hydrogen peroxide and sulfuric acid may be used in the wet etching process.

[0095] In some embodiments, a dry etching process may be performed to etch the bottom metal layer BM. For example, the dry etching process may be performed using, for example, Cl 2 and BCl 3 The invention relates to an enhanced capacitance coupled plasma (ECCP) process, but the present disclosure is not limited thereto.

[0096] Please refer to Figure 1D . Figure 1D The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 1C The intermediate stages shown can be followed in sequence by Figure 1D The intermediate stage shown. Figure 1D As shown, the first shielding portion PR11 is removed, while the second shielding portion PR12 is retained. In some embodiments, an ashing process is performed on the first shielding portion PR11 and the second shielding portion PR12 until the first shielding portion PR11 is completely removed and the second shielding portion PR12 still remains on the bottom metal layer BM. In some embodiments, oxygen plasma is used in the ashing process to perform corrosion of the first shielding portion PR11 and the second shielding portion PR12. Specifically, the remaining second shielding portion PR12 has a first sub-portion PR12a and a second sub-portion PR12b. The first sub-portion PR12a covers an area A1 of the top surface of the bridge MB, which can be etched in a subsequent process to be electrically disconnected. The second sub-portion PR12b covers an area A2 of the top surface of the second metal pattern M2. In some embodiments, the area A1 can be the entire top surface of the bridge MB.

[0097] Please refer to Figure 1E as well as Figure 2A . Figure 1E The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure.

[0098] Figure 2ATo illustrate some embodiments of the present disclosure Figure 1E A partial top view of the intermediate stage of Figure 1E is along Figure 2A Schematic diagram of the cross section of line segment 1E-1E in FIG. Figure 1D The intermediate stages shown can be followed in sequence by Figure 1E and Figure 2A The intermediate stage shown. Figure 1E and Figure 2A As shown, the etched bottom metal layer BM on which the remaining second shielding portion PR12 (i.e., the first sub-portion PR12a and the second sub-portion PR12b) is covered is anodized by passing an anodization current from the first metal pattern M1 to the second metal pattern M2 via the bridge MB. The etched bottom metal layer BM is partially anodized to have an anodized portion AD (i.e., an anodic oxide). After the anodization of the etched bottom metal layer BM is completed, the region A1 of the bridge MB and the region A2 of the second metal pattern M2 contact the first sub-portion PR12a and the second sub-portion PR12b, respectively.

[0099] In some embodiments, the etched bottom metal layer BM is anodized to achieve a termination voltage. The etched bottom metal layer BM has a thickness (eg, the etched bottom metal layer BM is Figure 1D The vertical thickness T1 in the Figure 2A The lateral width W1 in the figure is less than the minimum of the thickness and the line width in nm divided by 0.9nm-V -1 In this way, the etched bottom metal layer BM will not be completely anodized and leave a conductive portion.

[0100] In some embodiments, the etched bottom metal layer BM is anodized to a termination voltage greater than 10 V and less than 500 V. It should be noted that if the etched bottom metal layer BM is anodized to a termination voltage greater than 500 V, the thickness of the anodized portion AD of the etched bottom metal layer BM may be too thick, resulting in a higher operating voltage of the manufactured thin film transistor.

[0101] In some embodiments, the etched bottom metal layer BM is heated by applying more than 0.5 mA / cm 2 In some embodiments, the constant current is 0.05 mA / cm 2 With 5mA / cm 2 between.

[0102] In some embodiments, the etched bottom metal layer BM is anodized until the termination voltage is reached and maintained for at least 300 seconds, which makes the thickness of the anodized portion AD of the etched bottom metal layer BM more uniform.

[0103] In some embodiments, an annealing process may be performed on the anodized bottom metal layer BM. In this way, the resistance of the anodized bottom metal layer BM (e.g., the anodized portion AD) to the second wet etching process (if any) may be increased. In some embodiments, the annealing temperature used in the annealing process is greater than 200° C., but the present disclosure is not limited thereto.

[0104] Please refer to Figure 4 . Figure 4 Schematic diagram of anodizing process according to some embodiments of the present disclosure. Figure 4 As shown, the electrolyte EL is placed in a container, the object OB1 to be anodized is used as the anode of a power source (e.g., a DC power source), and the object OB2 having a corrosion-resistant material is used as the cathode of the power source. The object OB1 may be Figure 1D The structure shown in FIG. 1 may be a semi-finished product of a thin film transistor substrate. The object OB2 may include platinum or graphite.

[0105] In some embodiments, the etched bottom metal layer BM uses an electrolyte having a pH value between pH 5 and pH 8 (e.g., Figure 4 It should be noted that if the pH value is less than pH 5 or greater than pH 8, more pores will appear in the anodized portion AD of the etched bottom metal layer BM.

[0106] In some embodiments, the bottom metal layer BM is etched using an electrolyte containing less than 45 wt % water (e.g., Figure 4 The anodized portion AD of the etched bottom metal layer BM can be anodized with an electrolyte EL in the bottom metal layer BM. In this way, the hydrogen content in the anodized portion AD of the etched bottom metal layer BM can be very small. The hydrogen content can reduce the breakdown voltage of the gate insulator. Hydrogen sometimes affects Figure 8G The semiconductor layer A to be produced is degraded and its stability is reduced.

[0107] In some embodiments, the etched bottom metal layer BM is etched using an electrolyte containing water, ethylene glycol, and ammonium tartrate (eg, Figure 4 For example, the electrolyte may include about 68.5 wt % of ethylene glycol, about 30 wt % of water, and about 1.5 wt % of ammonium tartrate, but the present disclosure is not limited thereto.

[0108] In some embodiments, the etched bottom metal layer BM is anodized at a temperature below 15° C. In this way, the anodized portion AD of the etched bottom metal layer BM is more dense, thereby improving the quality. Figure 5 . Figure 5 Schematic diagrams showing cross sections of the bottom metal layer BM before and after anodization according to some embodiments of the present disclosure. Figure 5 As shown, in some embodiments, the thickness T2 of the non-anodized portion of the anodized bottom metal layer BM is equal to or greater than 1 / 10 of the thickness T1 of the bottom metal layer BM before anodization. In this way, the resistance of the etched bottom metal layer BM will not be too large.

[0109] Please refer to Figure 1F . Figure 1F The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 1E The intermediate stages shown can be followed in sequence by Figure 1F The intermediate stage shown. Figure 1F As shown, the remaining second shielding portion PR12 (ie, the first sub-portion PR12a and the second sub-portion PR12b) is removed, so that the unanodized region A1 of the bridge MB and the region A2 of the second metal pattern M2 are exposed.

[0110] Please refer to Figure 1G . Figure 1G The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 1F The intermediate stages shown can be followed in sequence by Figure 1G The intermediate stage shown. Figure 1G As shown, the conductive layer CL is deposited on the anodized bottom metal layer BM after the remaining second shielding portion PR12 is removed, wherein the conductive layer CL contacts the region A1 of the bridge MB and the region A2 of the second metal pattern M2. In addition, a second patterned photoresist PR2 is deposited on the conductive layer CL. The vertical projection of the second patterned photoresist PR2 onto the anodized bottom metal layer BM overlaps with the region A2 of the second metal pattern M2, but does not overlap with the region A1 of the bridge MB. The formation method of the second patterned photoresist PR2 may be the same as or similar to the formation method of the first patterned photoresist PR1, and thus the formation of the second patterned photoresist PR2 may refer to the relevant Figure 1A and Figure 1B The description is not repeated here.

[0111] Please refer to Figure 1H . Figure 1H The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 1G The intermediate stages shown can be followed in sequence by Figure 1H The intermediate stage shown. Figure 1H As shown, the conductive layer CL is etched through the second patterned photoresist PR2 until the open segment OS on the top surface of the bridge MB is exposed. At the same time, the area A2 of the second metal pattern M2 is still covered by the etched conductive layer CL and the second patterned photoresist PR2. It should be noted that since the vertical projection of the second patterned photoresist PR2 onto the anodized bottom metal layer BM does not overlap with the area A1 of the bridge MB, the open segment OS is equal to the area A1 of the bridge MB and is defined by the anodized portion AD of the etched bottom metal layer BM.

[0112] Please refer to Fig. 1I . Fig. 1I The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 1H The intermediate stages shown can be followed in sequence by Fig. 1I The intermediate stage shown. Fig. 1I As shown, the open segment OS of the bridge MB is etched through the second patterned photoresist PR2 until the bridge MB is electrically disconnected. In some embodiments, "the bridge MB is electrically disconnected" means that the etched bridge MB forms an open circuit (i.e., electrically disconnected) between the first metal pattern M1 and the second metal pattern M2. In order to achieve the purpose of electrically disconnecting the bridge MB, the open segment OS must extend to the opposite edge of the top surface of the bridge MB.

[0113] Please refer to Figure 1J as well as Figure 3A . Figure 1J The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure.

[0114] Figure 3A To illustrate some embodiments of the present disclosure Figure 1J A partial top view of the intermediate stage of Figure 1J is along Figure 3A Schematic diagram of the cross section of line segment 1J-1J in FIG. Fig. 1I The intermediate stages shown can be followed in sequence by Figure 1J and Figure 3A The intermediate stage shown. Figure 1J and Figure 3A As shown, the second patterned photoresist PR2 is removed to expose the etched conductive layer CL. Figure 3A In FIG. 8 , the open segment OS of the bridge MB which has been completely removed is indicated by a dotted line.

[0115] From this, it can be seen that the bottom metal layer BM can be Figures 1A to 1JThe method for manufacturing the electrode structure using only two sets of PEP (PhotoEngraving Process) processes is shown to form the floating island structure (ie, the second metal pattern M2 connected to the disconnected bridge MB). Therefore, the cost of manufacturing the electrode structure can be significantly reduced and the manufacturing efficiency can be effectively improved.

[0116] At Figure 3A In FIG. 5 , although the open section OS of the bridge MB that has been completely removed is indicated by the dotted line, the remnants of the anodized portion AD that was originally in contact with the open section OS of the bridge MB may still remain on the substrate SUB. Figure 2B as well as Figure 3B . Figure 2B To illustrate some embodiments of the present disclosure Figure 2A A cross-sectional view of the structure along line segment 2B-2B. Figure 3B To illustrate some embodiments of the present disclosure Figure 3A The cross-sectional view of the structure along line segment 3B-3B. Figure 3A As shown, and refer to Figure 3B , after the open segments OS of the bridges MB are etched to be electrically disconnected, the residue of the anodized portion AD that was originally in contact with the open segments OS of the bridges MB remains on the substrate SUB.

[0117] Please refer to Figure 3C . Figure 3C A partial top view illustrating an intermediate stage according to some embodiments of the present disclosure is shown. Figure 3C The intermediate stage shown may be identical to Figure 1H The intermediate stage shown. Figure 3C As shown, the region A1 is only a portion of the top surface of the bridge MB. In addition to covering the region A2 of the second metal pattern M2, the second patterned photoresist PR2 further covers a portion of the region A1 of the bridge MB. That is, the open segment OS is a portion of the region A1 and is defined by both the etched anodized portion AD of the bottom metal layer BM and the second patterned photoresist PR2. Specifically, as shown in FIG. Figure 3C As shown, the upper boundary and the lower boundary of the open segment OS are defined by the second patterned photoresist PR2 and the anodized portion AD, respectively.

[0118] Please refer to Figure 3D . Figure 3D To illustrate some embodiments of the present disclosure Figure 3C The local cross-sectional view of the structure along the line segment 3D-3D. Figure 3C and Figure 3DAs shown, it can be seen that the top surface of the first metal pattern M1 has an anodized area AZ and at least one unanodized area UZ, and a portion of the etched conductive layer CL covers and contacts the unanodized area UZ. In this way, the aforementioned portion of the etched conductive layer CL covering and contacting the unanodized area UZ can be used as a conductor of the first metal pattern M1, and the combination of the aforementioned portion of the etched conductive layer CL and the first metal pattern M1 has a lower resistance than the first metal pattern M1 alone. In order to obtain the anodized area AZ and the unanodized area UZ, Figure 1E The first sub-portion PR12a at the intermediate stage shown needs to further partially cover the top surface of the first metal pattern M1.

[0119] like Figure 3C and Figure 3D As shown in FIG. 1 , the entire unanodized region UZ is covered by the etched conductive layer CL. That is, the entire unanodized region UZ is covered by the second patterned photoresist PR2. In this way, the first metal pattern M1 can be prevented from being Fig. 1I The intermediate stage shown is etched and electrically disconnected.

[0120] Please refer to Figure 3E . Figure 3E The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 3E The intermediate stage shown may be identical to Figure 1H The intermediate stage shown. Figure 3E As shown, region A1 is the entire top surface of the bridge MB. In addition to covering region A2 of the second metal pattern M2, the second patterned photoresist PR2 further covers the region A1 of the bridge MB. That is, the open segment OS is a portion of region A1 and is only defined by the second patterned photoresist PR2. Specifically, Figure 3E As shown, the upper boundary and the lower boundary of the open segment OS are both defined by the second patterned photoresist PR2.

[0121] Please refer to FIG. 3F to FIG. 3H . FIG. 3F to FIG. 3H The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 3F To illustrate some embodiments of the present disclosure Figure 1D A partial cross-sectional view of the structure along line segment 3F-3F. Figure 3F The intermediate stages shown can be followed in sequence by Figure 3G The intermediate stage shown. Figure 3GAs shown, the first sub-portion PR12a on the top surface of the region A1 of the bridge MB is reflowed, so that the first sub-portion PR12a further partially covers the sidewall of the region A1 of the bridge MB. To reflow the first sub-portion PR12a, the first sub-portion PR12a is baked above its glass transition temperature (Tg). Figure 3G The intermediate stages shown can be followed in sequence by Figure 3H The intermediate stage shown. Figure 3H As shown, the bridge MB with the first sub-portion PR12a covered thereon is anodized, so that the top surface of the region A1 of the bridge MB in contact with the reflowed first sub-portion PR12a and the portion after the anodization of the bridge MB is completed are not anodized. Next, the reflowed first sub-portion PR12a can be removed to expose the bridge MB, and then the bridge MB can be etched, while the residue of the anodized portion AD remains on the substrate SUB. Figure 2B Compared with the structure shown, due to Figure 3H The anodized portion AD in the embodiment exposes more surface of the bridge MB, so the bridge MB is more easily etched away.

[0122] Please refer to Figure 6 . Figure 6 FIG. 2 is a circuit diagram of a 2T1C pixel circuit according to some embodiments of the present disclosure. Figure 6 As shown, and with reference Figure 1J and Figure 3A , the second metal pattern M2 connected to the disconnected bridge MB can be used as Figure 6 The floating gate FG indicated in .

[0123] In some embodiments, Figure 1D The number of the second sub-regions PR12b in the intermediate stage shown may be two, so that the anodized second metal pattern M2 will have a Figure 1E Two unanodized areas A2 are shown in the intermediate stage. Fig. 7A as well as Figure 7B . Fig. 7A A partial top view of an electrode structure according to some embodiments of the present disclosure is shown. Figure 7B To illustrate some embodiments of the present disclosure Fig. 7A A partial cross-sectional view of the electrode structure along line segment 7B-7B. Fig. 7A and Figure 7B The intermediate stage shown corresponds to Figure 1J and Figure 3A The intermediate stage shown. Fig. 7A and Figure 7B As shown, the conductive patterns CP1, CP2, and CP3 are formed by the conductive layer CL through Figure 1HThe conductive patterns CP1, CP2, CP3 extend across the two areas A2 thereof and contact the anodized second metal patterns M2 of the conductive patterns CP1, CP2, respectively. Thus, the etched conductive layer CL can form a metal crossing structure with the anodized second metal patterns M2.

[0124] In practical applications, the number of the regions A2 of the second metal pattern M2 may be greater than two.

[0125] In some embodiments, the method of manufacturing an electrode structure disclosed herein can be used to manufacture a thin film transistor, such as FIG. 8A to FIG. 8K The example given.

[0126] Please refer to Fig. 8A as well as Figure 8B . Fig. 8A and Figure 8B The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 1A and Fig. 8A Different cross sections of the same intermediate stage are presented. Figure 1B and Figure 8B Different cross sections of the same intermediate stage are presented. Fig. 8A and Figure 8B The same cross section at different intermediate stages is presented.

[0127] Please refer to Figure 8C . Figure 8C The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 8B The intermediate stages shown can be followed in sequence by Figure 8C The intermediate stage is shown. Figure 1C and Figure 8C They show different cross sections of the same intermediate stage. Figure 8C As shown, the bottom metal layer BM is etched through the first patterned photoresist PR1 to further form a first lower metal pattern LP1 and a second lower metal pattern LP2 covered by the first shielding portion PR11 and the second shielding portion PR12 , respectively.

[0128] Please refer to Fig.8D . Fig.8D The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 8C The intermediate stages shown can be followed in sequence by Fig.8D The intermediate stage is shown. Figure 1D and Fig.8D They show different cross sections of the same intermediate stage. Fig.8D As shown, the first shielding portion PR11 is removed to expose the top surface of the first lower metal pattern LP1.

[0129] Please refer to Fig. 8E . Fig. 8E The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig.8D The intermediate stages shown can be followed in sequence by Fig. 8E The intermediate stage is shown. Figure 1E and Fig. 8E They show different cross sections of the same intermediate stage. Fig. 8E As shown, the etched bottom metal layer BM is anodized. The first lower metal pattern LP1 and the second lower metal pattern LP2 are partially anodized after anodization and thus have an anodized portion AD (i.e., anodized). The anodized second lower metal pattern LP2 has a surface portion S1 that is not anodized and contacts the second shielding portion PR12.

[0130] Please refer to Fig.8F . Fig.8F The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig. 8E The intermediate stages shown can be followed in sequence by Fig.8F The intermediate stage is shown. Figure 1F and Fig.8F They show different cross sections of the same intermediate stage. Fig.8F As shown, the second shielding portion PR12 is removed to expose the unanodized surface portion S1 of the second lower metal pattern LP2.

[0131] Please refer to Figure 8G . Figure 8G The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig.8F The intermediate stages shown can be followed in sequence by Figure 8G The intermediate stage is shown. Figure 1G and Figure 8G They show different cross sections of the same intermediate stage. Figure 8G As shown, the semiconductor layer A is deposited on the anodized bottom metal layer BM to cover the first lower metal pattern LP1 and the second lower metal pattern LP2, so that the first lower metal pattern LP1 and the second lower metal pattern LP2 contact the semiconductor layer A. The first lower metal pattern LP1 serves as a gate, and the anodized portion AD of the anodized first lower metal pattern LP1 serves as a gate insulator. In addition, a top metal layer TM is deposited on the semiconductor layer A. It should be noted that the surface of the top metal layer TM contacting the semiconductor layer A contains a metal that can be anodized (e.g., aluminum). In other words, Figure 8G The combination of the semiconductor layer A and the top metal layer TM shown corresponds to Figure 1G The conductive layer CL is shown.

[0132] In some embodiments, the semiconductor layer A is an oxide semiconductor layer. In addition, the semiconductor layer A includes at least one element selected from aluminum, gallium, indium, zinc, tin, and zirconium, but the present disclosure is not limited thereto. In some embodiments, the semiconductor layer A includes MoS 2 .

[0133] In some embodiments, the semiconductor layer A may be deposited by a physical vapor deposition (PVD) process or a chemical vapor deposition (CVD) process.

[0134] In some embodiments, the semiconductor layer A may be a multilayer structure containing different components. For example, the semiconductor layer A may be a double-layer structure containing indium gallium zinc oxide (IZO) and indium gallium zinc tin oxide (IGZTO), but the present disclosure is not limited thereto. In this way, the channel mobility may be improved.

[0135] like Figure 8G As shown, the second patterned photoresist PR2 is formed on the top metal layer TM. The second patterned photoresist PR2 has a first hollow portion H1 exposing a surface portion S3 of the top metal layer TM.

[0136] In some embodiments, the step of depositing the semiconductor layer A and the step of depositing the top metal layer TM are performed continuously in a vacuum. That is, before depositing the top metal layer TM, the semiconductor layer A is not in contact with the atmosphere. In some embodiments, the step of depositing the semiconductor layer A and the step of depositing the top metal layer TM are performed in a chamber and transferred in a vacuum. In this way, the oxidized semiconductor layer A can be prevented from contacting the air.

[0137] Please refer to Figure 8H . Figure 8H The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 8G The intermediate stages shown can be followed in sequence by Figure 8H The intermediate stage shown. Figure 8H As shown, and with reference Figure 8G, the surface portion S3 of the top metal layer TM is anodized through the second patterned photoresist PR2 until the top metal layer TM has an anodized segment C (i.e., an anodic oxide) extending from the surface portion S3 of the top metal layer TM to the side of the top metal layer TM facing the semiconductor layer A. As described above, the surface portion S3 of the top metal layer TM contacting the semiconductor layer A contains a metal that can be anodized (e.g., aluminum), and thus the top metal layer TM can be anodized to extend the anodized segment C to the side of the top metal layer TM facing the semiconductor layer A.

[0138] In some embodiments, the surface portion S3 of the top metal layer TM is anodized to achieve a termination voltage. The top metal layer TM has a thickness T3 before being anodized. The termination voltage is greater than the thickness T3 in nm divided by 1.0 nm-V -1 In this way, it can be ensured that the anodized segment C can reach the side of the top metal layer TM facing the semiconductor layer A.

[0139] In some embodiments, Figure 8H As shown, the semiconductor layer A has a channel region Aa and a conductive region Ab. The channel region Aa is covered and contacted by the anodized segment C. The channel region Aa can be defined by the vertical projection of the anodized segment C onto the semiconductor layer A. The conductive region Ab is covered and contacted by other conductive segments of the top metal layer TM. In order to reduce the contact resistance of the conductive region Ab relative to the top metal layer TM, an annealing process can be performed to react the conductive region Ab with the aluminum in the top metal layer TM. Aluminum increases the oxygen vacancies of the conductive region Ab of the semiconductor layer A, thereby reducing its resistance. The annealing process also improves the stability of the channel region Aa of the semiconductor layer A. Please refer to Figure 8I . Figure 8I The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 8H The intermediate stages shown can be followed in sequence by Figure 8I The intermediate stage shown. Figure 8I As shown, the second hollow portion H2 is formed in the second patterned photoresist PR2. In some embodiments, an ashing process is performed on the second patterned photoresist PR2 until the second hollow portion H2 is formed to expose a portion of the top metal layer TM. In some embodiments, oxygen plasma is used in the ashing process to perform etching of the second patterned photoresist PR2.

[0140] Please refer to Figure 8J . Figure 8J The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 8I The intermediate stages shown can be followed in sequence by Figure 8J The intermediate stage shown. Figure 8J As shown, the top metal layer TM is etched through the second hollow portion H2 to form a first upper metal pattern UP1 and a second upper metal pattern UP2. The first upper metal pattern UP1 is above the anodized first lower metal pattern LP1 and has a drain DE and a source SE. The drain DE and the source SE are connected to the anodized segment C and are electrically isolated from each other by the anodized segment C. The anodized segment C serves as a channel protection structure. The second upper metal pattern UP2 is above the second lower metal pattern LP2. The second upper metal pattern UP2 forms a contact structure with the second lower metal pattern LP2.

[0141] In some embodiments, the top metal layer TM and the anodized section C are connected during the step of etching the top metal layer TM (eg Figure 8J The etching selectivity ratio in (as shown) is higher than 2.0.

[0142] Please refer to Figure 8K . Figure 8K The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Figure 8J The intermediate stages shown can be followed in sequence by Figure 8K The intermediate stage shown. Figure 8K As shown, the second patterned photoresist PR2 is removed to expose the first upper metal pattern UP1 and the second upper metal pattern UP2.

[0143] In some embodiments, the thickness of the semiconductor layer A is less than 100 nm. In this way, back channel leakage can be reduced in some cases. In addition, the problem of excessive contact resistance between the semiconductor layer A and other layers in contact with the semiconductor layer A (i.e., the second lower metal pattern LP2, the second upper metal pattern UP2, the drain DE and the source SE) can be avoided.

[0144] Please refer to Fig. 9 . Fig. 9 To illustrate some embodiments of the present disclosure Figure 8K A partial top view of the structure shown in FIG. Fig. 9 FIG. 4 is a partial schematic diagram showing the anodized first lower metal pattern LP1 (covered by the anodized portion AD) and the first upper metal pattern UP1.

[0145] Please refer to Fig. 10A . Fig. 10A Schematic cross-sectional view showing an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. In some embodiments, Fig.8F The intermediate stage shown can be followed directly by Fig. 10A The intermediate stage shown. Fig. 10AAs shown, the semiconductor layer A is deposited on the anodized bottom metal layer BM, and the top metal layer TM is deposited on the semiconductor layer A. The deposition method of the semiconductor layer A and the top metal layer TM can be the same or similar to Figure 8G The embodiment shown in FIG. Figure 8G The description is not repeated here.

[0146] like Fig. 10A As shown, the second patterned photoresist PR2 is formed on the top metal layer TM. The method for forming the second patterned photoresist PR2 may be the same as or similar to the method for forming the first patterned photoresist PR1. Therefore, the formation of the second patterned photoresist PR2 may refer to the related Figure 1A and Figure 1B The second patterned photoresist PR2 has a first hollow portion H1 exposing the top metal layer TM.

[0147] Please refer to Fig. 10B . Fig. 10B The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig. 10A The intermediate stages shown can be followed in sequence by Fig. 10B The intermediate stage is shown in the figure. Fig. 10B As shown, the top metal layer TM is etched through the second patterned photoresist PR2 to form a first upper metal pattern UP1 and a second upper metal pattern UP2. The first upper metal pattern UP1 is above the anodized first lower metal pattern LP1 and is covered by the first shielding portion PR21 of the second patterned photoresist PR2. The second upper metal pattern UP2 is above the anodized second lower metal pattern LP2 and is covered by the second shielding portion PR22 of the second patterned photoresist PR2.

[0148] Please refer to Fig. 10C . Fig. 10C The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig. 10B The intermediate stages shown can be followed in sequence by Fig. 10C The intermediate stage is shown in the figure. Fig. 10C As shown, a portion of the first shielding portion PR21 of the second patterned photoresist PR2 is removed to form a second hollow portion H2. The second hollow portion H2 exposes the surface portion S3 of the first upper metal pattern UP1. In some embodiments, an annealing process is performed on the second patterned photoresist PR2 until the second hollow portion H2 is formed to expose the surface portion S3 of the first upper metal pattern UP1. In some embodiments, oxygen plasma is used in the ashing process to perform etching of the second patterned photoresist PR2.

[0149] Please refer to Fig. 10D . Fig. 10D The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig. 10C The intermediate stages shown can be followed in sequence by Fig. 10D The intermediate stage shown. Fig. 10D As shown, the surface portion S3 of the first upper metal pattern UP1 is anodized until the first upper metal pattern UP1 has a drain DE, a source SE, and an anodized segment C connected between the drain DE and the source SE and electrically isolating the drain DE and the source SE. The anodized segment C serves as a channel protection structure.

[0150] In some embodiments, the etched bottom metal layer BM is anodized to reach a termination voltage. The first lower metal pattern LP1 has a thickness before being anodized (e.g., the vertical thickness T1 of the bottom metal layer BM in FIG. 1D ), and the termination voltage is less than the thickness in nm divided by 0.9 nm-V -1 In this way, the etched bottom metal layer BM will not be completely anodized and leave a conductive portion.

[0151] In some embodiments, the surface portion S3 of the first upper metal pattern UP1 is anodized to achieve a termination voltage. The first upper metal pattern UP1 has a width W2 and a thickness T3 before being anodized. Fig. 10C The termination voltage is greater than the smallest of the width W2 and the thickness T3 in nm divided by 1.0nm-V -1 In this way, it can be ensured that the anodized section C can reach the side of the first upper metal pattern UP1 facing the semiconductor layer A, such as Fig. 10D shown.

[0152] Please refer to Fig.10E . Fig.10E The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig. 10D The intermediate stages shown can be followed in sequence by Fig.10E The intermediate stage is shown in the figure. Fig.10E As shown, the second patterned photoresist PR2 is removed to expose the first upper metal pattern UP1 and the second upper metal pattern UP2.

[0153] Please refer to Fig.11A . Fig.11A Schematic cross-sectional view showing an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. In some embodiments, Figure 1A The intermediate stage shown can be followed directly by Fig.11A In other words, Figure 1A The bottom metal layer BM in is replaced by Fig.11AThe bottom metal layer BM-1 in Fig.11A As shown, the bottom metal layer BM-1 is a multi-layer structure. Specifically, the bottom metal layer BM-1 includes a first sub-layer SL1, a second sub-layer SL2 and a third sub-layer SL3. The first sub-layer SL1 contains aluminum. The second sub-layer SL2 is stacked on the first sub-layer SL1. The third sub-layer SL3 is stacked on the second sub-layer SL2.

[0154] In some embodiments, the second sub-layer SL2 contains molybdenum, but the present disclosure is not limited thereto. The second sub-layer SL2 containing molybdenum can prevent the first sub-layer SL1 containing aluminum from hillocking during subsequent high-temperature processes. Molybdenum has a poor anodizing effect, but can be used as a barrier metal.

[0155] In some embodiments, the third sub-layer SL3 contains copper, but the present disclosure is not limited thereto. The third sub-layer SL3 containing copper can increase the conductivity of the entire bottom metal layer BM-1. In some embodiments, the second sub-layer SL2 containing molybdenum can be used as a barrier layer to prevent copper diffusion from the third sub-layer SL3 containing copper.

[0156] In some embodiments, the third sub-layer SL3 may include a barrier metal, such as tantalum, titanium, or tungsten, but the present disclosure is not limited thereto.

[0157] In some embodiments, one of the second sub-layer SL2 and the third sub-layer SL3 may be omitted. For example, in some embodiments, the bottom metal layer BM-1 may be a double-layer structure including only the first sub-layer SL1 and the second sub-layer SL2 containing molybdenum. In some embodiments, the bottom metal layer BM-1 may be a double-layer structure including only the first sub-layer SL1 and the third sub-layer SL3 containing copper.

[0158] Please refer to Fig. 11B . Fig. 11B The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig.11A The intermediate stages shown can be followed in sequence by Fig. 11B The intermediate stage shown. Fig. 11B As shown, the bottom metal layer BM-1 is etched through the first patterned photoresist PR1 to form a first lower metal pattern LP1 and a second lower metal pattern LP2. In addition, the first lower metal pattern LP1 and the second lower metal pattern LP2 are covered by the first shielding portion PR11 and the second shielding portion PR12, respectively.

[0159] Please refer to Fig. 11C . Fig. 11C The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig. 11BThe intermediate stages shown can be followed in sequence by Fig. 11C The intermediate stage shown. Fig. 11C As shown, the first shielding portion PR11 is removed to expose the top surface of the third sub-layer SL3 of the first lower metal pattern LP1. Fig. 11C The steps of removing the first shielding portion PR11 are the same or similar to Figure 1D The steps shown in Figure 1D The description is not repeated here.

[0160] Please refer to Fig.11D . Fig.11D The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig. 11C The intermediate stages shown can be followed in sequence by Fig.11D The intermediate stage shown. Fig.11D As shown, the third sublayer SL3 and the second sublayer SL2 of the first lower metal pattern LP1 are selectively etched (relative to the first sublayer SL1) to expose the top surface of the first lower metal pattern LP1. The remaining first sublayer SL1 of the first lower metal pattern LP1 serves as a first lower metal pattern LP1'.

[0161] In some embodiments, the second sub-layer SL2 including molybdenum may be etched by using a solution including hydrogen peroxide and citric acid.

[0162] In some embodiments, an etching selectivity ratio of the second sub-layer SL2 to the first sub-layer SL1 in the selective etching is higher than 2.0.

[0163] In some embodiments, the second sub-layer SL2 may be omitted. That is, the bottom metal layer BM-1 may only include the first sub-layer SL1 including aluminum and the third sub-layer SL3 including copper.

[0164] Please refer to Fig.11E . Fig.11E The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig.11D The intermediate stages shown can be followed in sequence by Fig.11E The intermediate stage is shown in the figure. Fig.11E As shown, the first lower metal pattern LP1' is anodized, and the second lower metal pattern LP2 is anodized to form the second lower metal pattern LP2'. Fig.11E The anodized first lower metal pattern LP1' is shown

[0165] The steps for the second lower metal pattern LP2 are the same or similar to Figure 1E The steps shown in Figure 1E The description of Fig.11F . Fig.11F The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig.11E The intermediate stages shown can be followed in sequence by Fig.11F The intermediate stage shown. Fig.11F As shown, the second shielding portion PR12 is removed to expose the top surface of the third sub-layer SL3 of the second lower metal pattern LP2'. Fig.11F The steps of removing the second shielding portion PR12 are the same or similar to Figure 1F The steps shown in Figure 1F The description of is omitted here. In some implementations, Fig.11F The intermediate stages shown can be followed in sequence Figure 8G to Figure 8K The intermediate stage is shown.

[0166] Please refer to Fig. 12A . Fig. 12A Schematic cross-sectional view showing an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. In some embodiments, Figure 1F The intermediate stage shown can be followed directly by Fig. 12A The intermediate stage shown. Fig. 12A As shown, the semiconductor layer A is deposited on the anodized bottom metal layer BM. The top metal layer TM is deposited on the semiconductor layer A. The second patterned photoresist PR2 is formed on the top metal layer TM. In other words, Figure 8G The top metal layer TM in is replaced by Fig. 12A The top metal layer TM in Fig. 12A As shown, the top metal layer TM is a multilayer structure. Specifically, the top metal layer TM includes a first sublayer SL1, a second sublayer SL2, and a third sublayer SL3. The first sublayer SL1 contains aluminum. The second sublayer SL2 is stacked on the first sublayer SL1. The third sublayer SL3 is stacked on the second sublayer SL2. In addition, the second patterned photoresist PR2 has a first hollow portion H1 that exposes a surface portion S4 of the top metal layer TM. The surface portion S4 is a portion where the top surface of the third sublayer SL3 is located directly above the first lower metal pattern LP1.

[0167] In some embodiments, the second sub-layer SL2 contains molybdenum, but the present disclosure is not limited thereto. The second sub-layer SL2 containing molybdenum can prevent the first sub-layer SL1 containing aluminum from bulging during a subsequent high-temperature process.

[0168] In some embodiments, the third sub-layer SL3 contains copper, but the disclosure is not limited thereto.

[0169] In some embodiments, one of the second sub-layer SL2 and the third sub-layer SL3 may be omitted.

[0170] In some embodiments, Fig. 12A The steps of depositing the semiconductor layer A are the same or similar to Figure 8G The steps shown in Figure 8G The description of is omitted here. In some embodiments, Fig. 12A The steps of forming the second patterned photoresist PR2 are the same or similar to Figure 8G The steps shown in Figure 8G The description is not repeated here.

[0171] Please refer to Fig. 12B . Fig. 12B The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig. 12A The intermediate stages shown can be followed in sequence by Fig. 12B The intermediate stage is shown in the figure. Fig. 12B As shown, the third sub-layer SL3 and the second sub-layer SL2 in the first hollow portion H1 are selectively etched relative to the first sub-layer SL1 to expose the surface portion S3 of the first sub-layer SL1 in the first hollow portion H1.

[0172] In some embodiments, the second sub-layer SL2 including molybdenum may be etched by using a solution including hydrogen peroxide and citric acid.

[0173] In some embodiments, an etching selectivity ratio of the second sub-layer SL2 to the first sub-layer SL1 in the selective etching is higher than 2.0.

[0174] In some embodiments, the second sub-layer SL2 may be omitted. That is, the top metal layer TM may only include the first sub-layer SL1 containing aluminum and the third sub-layer SL3 containing copper.

[0175] Please refer to Fig. 12C . Fig. 12C The diagram is a cross-sectional view illustrating an intermediate stage of a method for manufacturing an electrode structure according to some embodiments of the present disclosure. Fig. 12B The intermediate stages shown can be followed in sequence by Fig. 12C The intermediate stage shown. Fig. 12C As shown, and with reference Fig. 12B, the surface portion S3 of the first sub-layer SL1 exposed by the first hollow portion H1 is anodized by the second patterned photoresist PR2 until the top metal layer TM has an anodized segment C extending from the surface portion of the first sub-layer SL1 exposed by the first hollow portion H1 to the side of the first sub-layer SL1 facing the semiconductor layer A. In some embodiments, such as Fig. 12C The steps of anodizing the first sub-layer SL1 of the top metal layer TM are the same or similar to Figure 8H The steps shown in Figure 8H The description is not repeated here.

[0176] In some embodiments, Fig. 10A The top metal layer TM shown can be replaced by Fig. 12A The top metal layer TM shown, and the top metal layer TM is as shown Fig. 10C After the second hollow portion H2 exposed by the second patterned photoresist PR2 is exposed, the third sublayer SL3 and the second sublayer SL2 in the second hollow portion H2 can be selectively etched relative to the first sublayer SL1 to expose the first sublayer SL1. Fig. 10D The intermediate stage shown) and the step of removing the second patterned photoresist PR2.

[0177] From the above detailed description of the specific embodiments of the present disclosure, it can be clearly seen that the method of manufacturing an electrode structure disclosed herein can form a floating island structure by only using two sets of PEP processes. In addition, the method disclosed herein can also manufacture a thin film transistor by only using two sets of PEP processes. Therefore, the manufacturing cost can be significantly reduced and the manufacturing efficiency can be effectively improved.

[0178] Although the present disclosure has been disclosed in the above embodiments, it is not intended to limit the present disclosure. Anyone skilled in the art can make various changes and modifications without departing from the spirit and scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be determined by the scope of the attached patent application.

Claims

1. A method for manufacturing an electrode structure, characterized in that: Include: forming a first patterned photoresist on the bottom metal layer, wherein the first patterned photoresist comprises a first shielding portion and a second shielding portion thicker than the first shielding portion; Etching the bottom metal layer through the first patterned photoresist to form a first metal pattern, a second metal pattern, and at least one bridge connected between the first metal pattern and the second metal pattern; removing the first shielding portion while retaining the second shielding portion having a first sub-portion and a second sub-portion, wherein the first sub-portion at least partially covers the top surface of the at least one bridge, and the second sub-portion covers at least a region of the top surface of the second metal pattern; anodizing the bottom metal layer covered with the remaining second shielding portion by passing an anodizing current from the first metal pattern to the second metal pattern via the at least one bridge; removing the remaining second shielding portion after the anodizing; depositing a conductive layer on the bottom metal layer after the remaining second shielding portion is removed, wherein the conductive layer contacts the at least one region of the second metal pattern; Depositing a second patterned photoresist on the conductive layer, wherein a vertical projection of the second patterned photoresist projected onto the bottom metal layer at least overlaps with the at least one region of the second metal pattern; Etching the conductive layer through the second patterned photoresist until the unanodized open section on the top surface of the at least one bridge is exposed; and The open section of the at least one bridge is etched through the second patterned photoresist until the at least one bridge is electrically disconnected.

2. The method according to claim 1, characterized in that The aluminum atomic ratio in the bottom metal layer is greater than 80%.

3. The method according to claim 2, characterized in that The anodization is performed to achieve a termination voltage, the bottom metal layer etched has a thickness and a line width, and the termination voltage is less than the minimum of the thickness and the line width in nm divided by 0.9 nmV -1 .

4. The method according to claim 1, characterized in that The thickness of the unanodized portion of the etched bottom metal layer after the anodization is equal to or greater than 1 / 10 of the thickness of the etched bottom metal layer before the anodization.

5. The method according to claim 1, characterized in that The number of the at least one region of the second metal pattern is two or more.

6. The method according to claim 1, characterized in that The bottom metal layer includes a first sub-layer containing aluminum and at least a second sub-layer stacked on the first sub-layer, and the method further includes: The at least one second sub-layer is selectively etched relative to the first sub-layer to expose the first sub-layer after the removal of the first shielding portion and before the anodization.

7. The method according to claim 1, characterized in that The depositing the conductive layer comprises: After the remaining second shielding portion is removed, depositing a semiconductor layer to cover the bottom metal layer; and depositing a top metal layer on the semiconductor layer, The second patterned photoresist has a first shielding portion and a second shielding portion that is thicker than the first shielding portion, and the method further comprises: Prior to said etching of said conductive layer, anodizing said top metal layer on which said second patterned photoresist is deposited; and After the anodizing and before the etching of the conductive layer, the first shielding portion of the second patterned photoresist is removed.

8. The method according to claim 7, characterized in that The surface of the top metal layer in contact with the semiconductor layer contains aluminum.

9. The method according to claim 1, characterized in that The depositing the conductive layer comprises: before the remaining second shielding portion is removed, depositing a semiconductor layer to cover the bottom metal layer; and depositing a top metal layer on the semiconductor layer, The second patterned photoresist has a first shielding portion and a second shielding portion that is thicker than the first shielding portion, and the method further comprises: After etching the conductive layer, removing the first shielding portion of the second patterned photoresist; and After the first shielding portion is removed, the top metal layer on which the second patterned photoresist is deposited is anodized.

10. The method according to claim 9, characterized in that The surface of the top metal layer in contact with the semiconductor layer contains aluminum.

11. The method according to claim 1, characterized in that The conductive layer includes aluminum.

12. The method according to claim 1, characterized in that The conductive layer includes a first sub-layer containing aluminum and at least a second sub-layer stacked on the first sub-layer, and the etching of the conductive layer includes: Selectively etching the at least one second sub-layer relative to the first sub-layer to expose the first sub-layer; and The exposed first sub-layer is etched until the open section on the at least one bridge is exposed.

13. The method according to claim 1, characterized in that The bottom metal layer includes at least one element of aluminum, zirconium, hafnium and tantalum.

14. The method according to claim 1, wherein: The bottom metal layer contains at least one rare earth metal element.

15. The method according to claim 1, wherein: The bottom metal layer includes aluminum and silicon.

16. The method according to claim 1, wherein: The at least one area of ​​the second metal pattern includes a first area and a second area, and the etching of the conductive layer forms a first conductive pattern, a second conductive pattern and a third conductive pattern separated from each other. The first conductive pattern and the second conductive pattern contact the first area and the second area respectively, and the third conductive pattern is located between the first conductive pattern and the second conductive pattern and extends across the second metal pattern.

17. The method according to claim 1, wherein: The top surface of the first metal pattern has an anodized region and at least one non-anodized region after the anodization.

18. The method according to claim 17, characterized in that The entirety of the at least one non-anodized region of the first metal pattern is covered by the etched conductive layer.

19. The method according to claim 1, wherein: Further comprising reflowing the first sub-portion to partially cover the sidewall of the at least one bridge before the anodizing.

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