Preparation Method of Conductive Plug, Preparation Method of Semiconductor Device, and Semiconductor Device

Abstract

The present disclosure provides a method for preparing a conductive plug, a method for preparing a semiconductor device, and a semiconductor device. The preparation method includes the following steps: providing a substrate to be polished, the substrate to be polished including an insulating layer, a barrier layer, and a conductive layer, the insulating layer having plug holes, the barrier layer being disposed on the top surface of the insulating layer and extending to cover the hole walls of the plug holes, and the conductive layer being disposed on the barrier layer; performing a first polishing treatment on the conductive layer, and stopping the first polishing treatment at the surface of the barrier layer; performing a second polishing treatment on the conductive layer after the first polishing treatment; performing a third polishing treatment on the barrier layer and the conductive layer, and stopping the third polishing treatment at the surface of the insulating layer; and performing a fourth polishing treatment on the insulating layer and the conductive layer. This preparation method can make the thinning amount of the conductive layer more controllable, can improve the quality of the prepared conductive plug, and further enable the device to have a higher yield.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular, to a method for manufacturing a conductive plug, a method for manufacturing a semiconductor device, and a semiconductor device. Background Art

[0002] A conductive plug is usually disposed in an insulating layer and is used to achieve electrical connection between structures above and below the insulating layer, which is a common structure in semiconductor devices. The conductive plug is usually prepared by first depositing a conductive material in a plug hole and then performing back-etching. As the size of semiconductor devices gradually shrinks, the aspect ratio of the plug hole used to prepare the conductive plug will also gradually increase. When the conductive material is deposited in a plug hole with a relatively large aspect ratio, there is a problem that the conductive material deposited on the hole wall converges and seals prematurely, and finally voids are left inside the conductive plug. When performing back-etching on the conductive material, the traditional process of back-etching the conductive material has a problem that it is difficult to control the grinding amount. In the actual back-etching process, the voids in the conductive material are easily exposed, and thus the quality of the conductive plug and the yield of the device are significantly reduced. Summary of the Invention

[0003] Based on this, it is necessary to provide a method for manufacturing a conductive plug for the problems in the above background art, so as to improve the controllability of the conductive material during back-etching, and thus improve the quality of the conductive plug and the yield of the device.

[0004] According to some embodiments of the present disclosure, a method for manufacturing a conductive plug is provided, which includes the following steps:

[0005] Providing a substrate to be polished, the substrate to be polished includes an insulating layer, a barrier layer, and a conductive layer, the insulating layer has a plug hole, the barrier layer is disposed on the top surface of the insulating layer and extends to cover the hole wall of the plug hole, and the conductive layer is disposed on the barrier layer;

[0006] Performing a first polishing treatment on the conductive layer, and the first polishing treatment stops at the surface of the barrier layer;

[0007] Performing a second polishing treatment on the conductive layer after the first polishing treatment;

[0008] Performing a third polishing treatment on the barrier layer and the conductive layer, and the third polishing treatment stops at the surface of the insulating layer;

[0009] Performing a fourth polishing treatment on the insulating layer and the conductive layer.

[0010] In some embodiments of the present disclosure, after the fourth polishing treatment, the top end of the conductive layer is higher than or flush with the top end of the insulating layer.

[0011] In some embodiments of the present disclosure, in the step of performing the fourth grinding process on the insulating layer and the conductive layer, the thinning rate of the conductive layer is controlled to be less than the thinning rate of the insulating layer.

[0012] In some embodiments of the present disclosure, after performing the third grinding process, the height difference between the bottom end of the top surface of the conductive layer and the top surface of the insulating layer is H C3 , and during the fourth grinding process, the thinning amount of the conductive layer is H C4 ; where H C3 and H C4 The sum is less than the thinning amount of the insulating layer during the fourth grinding process.

[0013] In some embodiments of the present disclosure, according to the initial thickness of the insulating layer, the time of the second grinding process is correspondingly controlled so that the top end of the conductive layer is higher than or flush with the top end of the insulating layer.

[0014] Before performing the first grinding process, the initial thickness of the insulating layer is H0, and the target thickness of the insulating layer reserved after the fourth grinding process is H T , after performing the first grinding process and before performing the second grinding process, the thickness of the barrier layer is H B , the time required for the second grinding process is T2, the thinning rate of the conductive layer during the second grinding process is R C1 , the thinning rate of the conductive layer during the third grinding process is R C2 , the thinning rate of the conductive layer during the fourth grinding process is R C4 , the thinning rate of the barrier layer during the third grinding process is R B , the thinning rate of the insulating layer during the fourth grinding process is R T , where each parameter satisfies the following relational expression: .

[0015] In some embodiments of the present disclosure, after performing the second grinding process, the height difference between the bottom end of the top surface of the conductive layer and the top surface of the barrier layer is 0 nm to 50 nm.

[0016] In some embodiments of the present disclosure, the mode used in the step of performing the fourth grinding process is process control feedback, and the polishing time is dynamically controlled according to the thickness of the insulating layer before the fourth grinding process so that the thinned insulating layer reaches a preset target thickness.

[0017] In some embodiments of the present disclosure, the material of the insulating layer is selected from one or more of silicon nitride, silicon carbide, silicon dioxide, silicon oxynitride, and black diamond; and / or,

[0018] the material of the conductive layer is selected from one or more of tungsten, aluminum, copper, gold, and silver; and / or,

[0019] the material of the barrier layer is selected from one or more of titanium nitride, tantalum nitride, titanium, tantalum, and titanium-tungsten alloy.

[0020] In some embodiments of the present disclosure, the second polishing treatment is carried out immediately after the first polishing treatment, and the polishing liquid used in the first polishing treatment is the same as the polishing liquid used in the second polishing treatment.

[0021] In some embodiments of the present disclosure, the polishing liquid used in the first polishing treatment includes one or more of amorphous silica, hydrogen peroxide, water, corrosion inhibitor, and barrier layer inhibitor; and / or,

[0022] the polishing liquid used in the second polishing treatment includes one or more of amorphous silica, hydrogen peroxide, water, corrosion inhibitor, and barrier layer inhibitor; and / or,

[0023] the polishing liquid used in the third polishing treatment includes one or more of amorphous silica, hydrogen peroxide, water, corrosion inhibitor, and barrier layer inhibitor; and / or,

[0024] the polishing liquid used in the fourth polishing treatment includes one or more of amorphous silica, hydrogen peroxide, water, citric acid, and chelating agent.

[0025] Furthermore, the present disclosure also provides a method for manufacturing a semiconductor device, which includes the following steps:

[0026] An insulating layer, a barrier layer, and a conductive layer are sequentially formed on a functional structure as a substrate to be polished;

[0027] A conductive plug is formed in the substrate to be polished by using the method for manufacturing a conductive plug according to any one of the above embodiments.

[0028] Furthermore, the present disclosure also provides a semiconductor device, which is manufactured by using the method for manufacturing a semiconductor device according to the above embodiments; or,

[0029] the semiconductor device includes a conductive plug formed by using the method for manufacturing a conductive plug according to the above embodiments.

[0030] In the method for preparing the conductive plug of the present disclosure, the substrate to be polished is successively subjected to a first polishing treatment, a second polishing treatment, a third polishing treatment, and a fourth polishing treatment. Among them, the barrier layer is used as the stop layer during the first polishing treatment, the conductive layer is continuously polished during the second polishing treatment as an over-polishing step, and the insulating layer is used as the stop layer during the third polishing treatment. In this preparation method, the over-polishing step, that is, the second polishing treatment, is arranged before the barrier layer, which can make the thinning amount of the conductive layer more controllable. And in the subsequent third polishing treatment and fourth polishing treatment, there is no need to perform the over-polishing step anymore, so the depression amount of the conductive layer in the plug hole can be reduced, and the probability of exposing the pores therein can be reduced or avoided. Therefore, the method for preparing the conductive plug can improve the quality of the prepared conductive plug, and further enable the device to have a higher yield.

[0031] The above description is only an overview of the technical solution of the present invention. In order to be able to understand the technical means of the present invention more clearly and implement it according to the content of the specification, the following takes the preferred embodiments of the present invention and combines the drawings to describe in detail as follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present disclosure. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained according to these drawings.

[0033] Figure 1 It is a schematic diagram of the steps of a method for preparing a conductive plug;

[0034] Figure 2 It is a schematic diagram of the structure of a substrate to be polished;

[0035] Figure 3 For Figure 2 It is a schematic diagram of the structure after the first polishing treatment of the conductive layer on the basis of the structure shown;

[0036] Figure 4 For Figure 3 It is a schematic diagram of the structure after the second polishing treatment on the basis of the structure shown;

[0037] Figure 5 For Figure 4 It is a schematic diagram of the structure after the third polishing treatment on the basis of the structure shown;

[0038] Figure 6 For Figure 5 It is a schematic diagram of the structure after the fourth polishing treatment of the insulating layer and the conductive layer on the basis of the structure shown;

[0039] Figure 7 It is a schematic diagram for comparing the thickness changes of each layer during the process from step S1 to step S5;

[0040] Figure 8 It is Figure 7 an enlarged structural schematic diagram of area A in

[0041] Among them, the meanings of each reference numeral are as follows:

[0042] 110, insulating layer; 120, barrier layer; 130, conductive layer; 131, conductive plug. Specific embodiments

[0043] To facilitate the understanding of this article, the following will provide a more comprehensive description of this article. Preferred embodiments of this article are given herein. However, this article can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the content of this article more thorough and comprehensive.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this article belongs. The terms used in the description of this article herein are only for the purpose of describing specific embodiments and are not intended to limit this article.

[0045] It should be understood that when an element or layer is referred to as "on...", "adjacent to...", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or there may also be intervening elements or layers. In contrast, when an element is referred to as "directly on...", "directly adjacent to...", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part.

[0046] Spatial relationship terms such as "under", "below", "beneath", "underneath", "above", "over", etc. may be used herein for convenience of description to describe the relationship of one element or feature to other elements or features. It should be understood that spatial relationship terms are also intended to include different orientations of the device during use and operation. For example, if the device in the figures is flipped, then an element or feature described as "below other elements" or "beneath it" or "under it" will be oriented "above" the other elements or features. Thus, the exemplary terms "below" and "under" can include both upper and lower orientations. The device may be otherwise oriented (e.g., rotated 90 degrees or other orientations) and the spatial descriptors used are interpreted accordingly.

[0047] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present disclosure. As used herein, the singular forms "a", "an", and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, specify the presence of the features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. As used herein, the term "and / or" includes any and all combinations of the associated listed items.

[0048] Due to certain unevenness on the surface of the wafer during the grinding process, it is usually necessary to perform a certain amount of over polish on the conductive layer during the preparation of the conductive plug. In the related art, the over polish step is usually performed after grinding until the insulating layer is exposed, and a certain depression is generated on the surface of the conductive layer in the plug hole. At this time, it is difficult to control the thinning amount of the conductive layer. If the thinning amount is too large, the depression on the surface of the conductive layer deepens, and it is very easy to expose the voids in the conductive layer during the subsequent grinding process, affecting the quality of the conductive plug and the yield of the device.

[0049] The present disclosure provides a method for preparing a conductive plug, which includes the following steps:

[0050] Providing a substrate to be ground, the substrate to be ground includes an insulating layer, a barrier layer, and a conductive layer. The insulating layer has a plug hole, the barrier layer is disposed on the top surface of the insulating layer and extends to cover the hole wall of the plug hole, and the conductive layer is disposed on the barrier layer.

[0051] Performing a first grinding process on the conductive layer, and the first grinding process stops at the surface of the barrier layer.

[0052] Performing a second grinding process on the conductive layer after the first grinding process.

[0053] Perform a third grinding process on the barrier layer and the conductive layer, and stop the third grinding process at the surface of the insulating layer.

[0054] Perform a fourth grinding process on the insulating layer and the conductive layer.

[0055] In the method for preparing the conductive plug of the present disclosure, a first grinding process, a second grinding process, a third grinding process, and a fourth grinding process are sequentially performed on the substrate to be ground. Among them, the barrier layer is used as the stop layer during the first grinding process, the conductive layer is continuously ground during the second grinding process as an over-grinding step, and the insulating layer is used as the stop layer during the third grinding process. In this preparation method, the over-grinding step, that is, the second grinding process, is set before the barrier layer, which can make the thinning amount of the conductive layer more controllable. And in the subsequent third grinding process and fourth grinding process, there is no need to perform the over-grinding step anymore, so the depression amount of the conductive layer in the plug hole can be reduced, and the probability of exposing the pores therein can be reduced or avoided. Therefore, the preparation method of the conductive plug can improve the quality of the prepared conductive plug, and further make the device have a higher yield.

[0056] To facilitate understanding of the specific implementation manner of the present disclosure, the present disclosure further provides specific steps of a method for preparing a conductive plug. Figure 1 It is a schematic diagram of the steps of the method for preparing the conductive plug, which includes steps S1 to S5, specifically as follows.

[0057] Step S1, provide a substrate to be ground.

[0058] Figure 2 It is a schematic structural diagram of a substrate to be ground. Refer to Figure 2 As shown, the substrate to be ground includes an insulating layer 110, a barrier layer 120, and a conductive layer 130. The insulating layer 110 has a plug hole, the barrier layer 120 is disposed on the top surface of the insulating layer 110 and extends to cover the hole wall of the plug hole, and the conductive layer 130 is disposed on the barrier layer 120.

[0059] Among them, the material of the insulating layer 110 is selected from insulating materials, which is used to insulate and separate the components above and below it. The barrier layer 120 is used to isolate the conductive layer 130 and the insulating layer 110, and is used to prevent the atoms of the conductive layer 130 from diffusing outward.

[0060] As some examples of this embodiment, a functional structure may also be provided in the substrate to be ground, and the functional structure may be disposed below the insulating layer 110.

[0061] The material of the insulating layer 110 should be an insulating material. As some examples of this embodiment, the material of the insulating layer 110 may be selected from one or more of silicon nitride, silicon carbide, silicon dioxide, silicon oxynitride, and Black Diamond.

[0062] The material of the conductive layer 130 should be a conductive material. As some examples of this embodiment, the material of the conductive layer 130 is selected from one or more of tungsten, aluminum, copper, gold, and silver for the conductive layer 130.

[0063] The material of the barrier layer 120 should be selected from materials that have a strong barrier ability to the atoms of the conductive layer 130. As some examples of this embodiment, the material of the barrier layer 120 is selected from one or more of titanium nitride, tantalum nitride, titanium, tantalum, and titanium-tungsten alloy.

[0064] As some examples of this embodiment, the step of providing the substrate to be polished may include: sequentially preparing an insulating layer 110, a barrier layer 120, and a conductive layer 130 on the functional structure.

[0065] Furthermore, in this example, the step of preparing the insulating layer 110 on the functional structure includes: depositing an insulating material on the functional structure and etching the insulating material to form plug holes. Among them, the method of depositing the insulating material is chemical vapor deposition or atomic layer deposition, and the method of etching the insulating material is selected from wet etching or dry etching.

[0066] In this example, the method of preparing the barrier layer 120 on the functional structure is chemical vapor deposition or atomic layer deposition. Refer to Figure 2 As shown, the material of the barrier layer 120 can be deposited on the top surface of the insulating layer 110 and the hole walls of the plug holes simultaneously.

[0067] In this example, the method of preparing the conductive layer 130 on the functional structure is chemical vapor deposition or atomic layer deposition. Refer to Figure 2 As shown, the material of the conductive layer 130 is deposited on the side of the barrier layer 120 away from the insulating layer 110. Specifically, the conductive layer 130 can be located in the plug holes and cover the top surface of the barrier layer 120.

[0068] Step S2, perform a first polishing process on the conductive layer 130, and the first polishing process stops at the surface of the barrier layer 120.

[0069] Figure 3 For Figure 2 It is a schematic structural diagram after performing the first polishing process on the conductive layer 130 based on the structure shown. Refer to Figure 3 As shown, after the first polishing process, the conductive layer 130 located above the barrier layer 120 is removed, and the shielded barrier layer 120 is exposed. In this embodiment, the barrier layer 120 serves as the stop layer for the first polishing process, that is, the first polishing process stops when grinding to the barrier layer 120. The first polishing process can be performed in an end point control mode.

[0070] As some examples of this embodiment, after the first grinding process, the surface of the remaining conductive layer 130 can be flush with the surface of the barrier layer 120.

[0071] As some examples of this embodiment, the first grinding process is Chemical Mechanical Polishing. Chemical Mechanical Polishing is a processing technology that combines mechanical grinding and chemical etching and is usually used for global planarization to obtain a flat surface. During Chemical Mechanical Polishing, a polishing pad is usually used to mechanically grind the substrate to be polished, and a polishing liquid is added simultaneously for chemical etching.

[0072] It can be understood that the polishing liquid used in the first grinding process should be able to etch the conductive layer 130. Further, the etching rate of the polishing liquid used in the first grinding process for the conductive layer 130 is greater than its etching rate for the barrier layer 120.

[0073] As some examples of this embodiment, the polishing liquid used in the first grinding process includes one or more of amorphous silica, hydrogen peroxide, water, corrosion inhibitor, and barrier layer 120 inhibitor.

[0074] Step S3: Perform a second grinding process on the conductive layer 130 after the first grinding process.

[0075] Figure 4 For Figure 3 is a schematic diagram of the structure after the second grinding process based on the shown structure. Combining Figure 3 and Figure 4 as shown, after the second grinding process, the conductive layer 130 is further thinned, and correspondingly, a depression is generated on its surface.

[0076] In the actual grinding process, there is a certain degree of non-uniformity, which may cause some parts of the conductive layer 130 on the surface of the substrate to be polished to have been ground away to expose the barrier layer 120 during the first grinding process, while another part of the conductive layer 130 has not been completely ground to expose the barrier layer 120. The second grinding process set in this embodiment is a process of over-grinding the conductive layer 130 to ensure that all of the conductive layer 130 is ground to expose the barrier layer 120. However, as Figure 4 shown, over-grinding will also cause a certain depression to be generated on the surface of the remaining conductive layer 130.

[0077] As some examples of this embodiment, the second grinding process is Chemical Mechanical Polishing.

[0078] As some examples in this embodiment, the polishing liquid used in the second grinding process includes amorphous silica, hydrogen peroxide, water, corrosion inhibitor, and barrier layer 120 inhibitor.

[0079] In some examples of this embodiment, the second polishing process can be carried out immediately after the first polishing process. That is, no other polishing process is carried out after the first polishing process, and the second polishing process is directly started. Further, the polishing liquid used in the first polishing process is the same as the polishing liquid used in the second polishing process. This enables the first polishing process and the second polishing process to be carried out and completed successively in the same process, and there is no need to replace the polishing liquid.

[0080] As some examples of this embodiment, the time of the second polishing process is controllable, which enables the height difference (i.e., the degree of depression of the conductive layer 130) between the bottom end of the top surface of the conductive layer 130 and the surface of the barrier layer 120 to be controllable after the second polishing process.

[0081] As some examples of this embodiment, after the second polishing process, the height difference between the bottom end of the top surface of the conductive layer 130 and the top surface of the barrier layer 120 is 0 nm to 50 nm.

[0082] Step S4, perform a third polishing process on the barrier layer 120 and the conductive layer 130, and the third polishing process stops at the surface of the insulating layer 110.

[0083] Figure 5 For Figure 4 is a schematic structural diagram after the third polishing process is performed on the basis of the shown structure. Combining Figure 4 and Figure 5 as shown, during the third polishing process, the barrier layer 120 is removed to expose the underlying insulating layer 110, and at the same time, part of the conductive layer 130 is also removed, so that the conductive layer 130 is further thinned.

[0084] In this embodiment, the insulating layer 110 serves as the stop layer for the third polishing process, that is, the third polishing process stops when the insulating layer 110 is polished. The third polishing process can be carried out in an endpoint control mode.

[0085] As some examples of this embodiment, the third polishing process is chemical mechanical polishing.

[0086] It can be understood that the polishing liquid used in the third polishing process should be able to etch the barrier layer 120 and the conductive layer 130. Further, the etching rate of the polishing liquid used in the third polishing process for the barrier layer 120 is greater than its etching rate for the conductive layer 130. Its function is to make the thinning amount of the conductive layer 130 less than the thinning amount of the barrier layer 120, so as to retain a relatively thick conductive layer 130 when the barrier layer 130 is completely removed, making it easier for the conductive layer 130 to form a flat or convex conductive plug 131 in the subsequent etching process.

[0087] As some examples of this embodiment, the abrasive liquid used in the third grinding process includes one or more of amorphous silica, hydrogen peroxide, water, corrosion inhibitor, and barrier layer inhibitor.

[0088] It can be understood that since over-grinding has been completed during the second grinding process, the third grinding process can directly stop at the insulating layer 110, and thereafter, there is no need to perform over-grinding on the conductive layer 130 anymore. This can prevent further deepening of the depression on the surface of the conductive layer 130. Thus, compared with the conventional technology, the embodiments of the present disclosure can improve the degree of depression of the conductive layer 130.

[0089] Step S5: Perform a fourth grinding process on the insulating layer 110 and the conductive layer 130.

[0090] Figure 6 For Figure 5 is a schematic structural diagram after performing a fourth grinding process on the insulating layer 110 and the conductive layer 130 based on the shown structure. Combining Figure 5 and Figure 6 as shown, during the fourth grinding process, both the insulating layer 110 and the conductive layer 130 are removed, so both the insulating layer 110 and the conductive layer 130 are thinned.

[0091] As some examples of this embodiment, during the fourth grinding process, after the insulating layer 110 is thinned to a preset target thickness, the fourth grinding process is stopped. At this time, the remaining conductive layer 130 in the plug hole can be used as a conductive plug 131.

[0092] As some examples of this embodiment, the mode used in the step of performing the fourth grinding process is advanced process control feedback (APC Feedback), and the polishing time is dynamically controlled according to the thickness of the insulating layer 110 before the fourth grinding process, so that the thinned insulating layer 110 reaches the preset target thickness. Advanced Process Control Feedback (APC Feedback) is a process control strategy used to monitor and dynamically adjust the grinding process in real time to ensure highly consistent and repeatable polishing results. APC Feedback usually involves using sensors and control systems to monitor key parameters such as material removal rate, surface roughness, and temperature during the grinding process in real time, and automatically adjusting grinding parameters such as grinding pressure, polishing liquid flow rate, and rotation speed based on this feedback information. Adopting the APC Feedback mode during the fourth grinding process can not only accurately control the insulating layer 110 to be ground to the target thickness, but also correct the depression formed on the surface of the conductive layer 130 during the second polishing process and the third polishing process, thereby improving the depression.

[0093] As some examples of this embodiment, after the fourth grinding process, the top end of the conductive layer 130 is higher than or flush with the top end of the insulating layer 110. By setting the top end of the conductive layer 130 to be higher than or flush with the top end of the insulating layer 110, it is possible to more effectively avoid exposing the voids in the conductive layer 130, thereby ensuring the formation of conductive plugs 131 with better quality.

[0094] As some examples of this embodiment, in the step of performing the fourth grinding process on the insulating layer 110 and the conductive layer 130, the thinning rate of the conductive layer 130 is controlled to be less than the thinning rate of the insulating layer 110. It can be understood that this thinning rate can be controlled by selecting an appropriate grinding fluid. The conductive layer 130 and the insulating layer 110 have the same time during the fourth grinding process. By making the thinning rate of the conductive layer 130 less than the thinning rate of the insulating layer 110, it is possible to ensure that the final thinning amount of the conductive layer 130 is smaller.

[0095] For the embodiments of the present disclosure, the main purpose of the second grinding process is to perform a certain over-grinding on the conductive layer 130. Compared with performing the over-grinding process during the removal of the barrier layer 120, by setting the second grinding process before the third grinding process, that is, before the barrier layer 120 is removed, the thinning amount of the conductive layer 130 during over-grinding is more controllable, thereby avoiding the formation of too deep depressions in the conductive layer 130. This will be beneficial to making the top end of the conductive layer 130 higher than or flush with the top end of the insulating layer 110 during the fourth grinding process.

[0096] Further, as some examples of this embodiment, according to the initial thickness of the insulating layer 110, the time of the second grinding process is correspondingly controlled so that the top end of the conductive layer 130 is higher than or flush with the top end of the insulating layer 110. In this embodiment, based on existing or known conditions, by controlling the time of the second grinding process, it is possible to dynamically control the thinning amount of the conductive layer 130 during the second grinding process, that is, the depression amount of the conductive layer 130, and further accurately control the protrusion degree of the conductive layer 130 when the insulating layer 110 is ground to the target thickness. The specific analysis is as follows.

[0097] For the sake of convenience of explanation, Figure 7 shows a schematic diagram of the thickness change comparison of each layer during steps S1 to S5, Figure 8 is Figure 7 an enlarged structural schematic diagram of area A in

[0098] Referring to Figure 7 and Figure 8 as shown, before the first grinding process, the initial thickness of the insulating layer 110 in the substrate to be ground is H0, and the target thickness of the insulating layer 110 reserved after the fourth grinding process is H TSince the insulating layer 110 is only thinned during the fourth grinding process, the amount of thinning of the insulating layer 110 during the fourth grinding process is H0 - H T .

[0099] Referring to Figure 7 and Figure 8 as shown, after the third grinding process, the height difference between the bottom end of the top surface of the conductive layer 130 and the top surface of the insulating layer 110 is H C3 , and during the fourth grinding process, the amount of thinning of the conductive layer 130 is H C4 . Then, after the fourth grinding process, if it is necessary to obtain a conductive layer 130 with its top end higher than or flush with the insulating layer 110, H0, H C3 , H C4 and H T should satisfy the following formula (1).

[0100] (1)

[0101] It can be understood that in formula (1), when the equal sign holds, the remaining conductive layer 130 after the fourth grinding process is flush with the top end of the insulating layer 110, and at this time, a conductive plug 131 with a flat surface can be formed. When the less-than sign holds, the top end of the remaining conductive layer 130 after the fourth grinding process is higher than the top end of the insulating layer 110, and at this time, a conductive plug 131 with a convex surface can be formed.

[0102] Referring to Figure 7 and Figure 8 as shown, before the second grinding process after the first grinding process, the thickness of the barrier layer 120 is H B . After the second grinding process and before the third grinding process, the height difference between the bottom end of the top surface of the conductive layer 130 and the top surface of the barrier layer 120 is H C1 . During the third grinding process, the amount of thinning of the conductive layer 130 is H C2 . Then H C3 , H B , H C1 and H C2 satisfy the following formula (2).

[0103] (2)

[0104] Combining formula (1) and formula (2), it is easy to obtain the following formula (3).

[0105] (3)

[0106] Further, when the polishing conditions such as the polishing liquid used are determined, the thinning rate of the material to be polished in each polishing process is also correspondingly determined. In this embodiment, the thinning rate of the conductive layer 130 in the second polishing process is R C1 , and the thinning rate of the conductive layer 130 in the third polishing process is R C2 , and the thinning rate of the conductive layer 130 in the fourth polishing process is R C4 . The thinning rate of the barrier layer 120 in the third polishing process is R B . The thinning rate of the insulating layer 110 in the fourth polishing process is R T . It can be understood that each of the thinning rates can be obtained through actual measurement.

[0107] Based on the above parameters, it is easy to obtain: The time T2 required for the second polishing process = H C1 / R C1 . The time T3 required for the third polishing process = H B / R B , and at the same time T3 = H C2 / R C2 . The time T4 required for the fourth polishing process = (H0 - H T ) / R T , and at the same time T4 = H C4 / R C4 . Then, further arranging according to Equation (3) gives the following Equation (4).

[0108] (4)

[0109] That is, when Equation (4) is satisfied, a conductive layer 130 with a top end higher than or flush with the insulating layer 110 can be obtained. In Equation (4), each of the thinning rates R C1 , R C2 , R C4 , R B and R T is related to the polishing liquid used and is usually a determined quantity. The thickness H B of the barrier layer 120 is usually a determined quantity, and the target thickness H T is usually set according to actual requirements. The initial thickness H0 of the insulating layer 110 in the substrate to be polished and the time T2 of the second polishing process are relatively easy to control. According to the initial thickness H0 of the insulating layer 110, the time T2 of the second polishing process is correspondingly controlled, and the relationship between the two satisfies Equation (4), that is, the top end of the conductive layer 130 can be made higher than or flush with the top end of the insulating layer 110.

[0110] The preparation method of the above steps S1 to S5 has at least the following effects.

[0111] First, by controlling the time of the second grinding process, the thinning amount of the conductive layer 130 during the second grinding process can be dynamically controlled, making the grinding amount of the conductive layer 130 more controllable.

[0112] Furthermore, the process of the second grinding process serves as over-grinding of the conductive layer 130, and no over-grinding process is required after the third grinding process, which can improve the degree of depression of the conductive layer 130.

[0113] Furthermore, by adopting a process control feedback mode for the fourth grinding process, the insulating layer 110 can be accurately regulated to reach the target thickness, and the surface depression of the conductive layer 130 during the process from the second grinding process to the third grinding process can be corrected to more accurately control the protrusion degree of the final conductive plug 131.

[0114] Furthermore, when other parameters are kept constant, by correspondingly regulating the time of the second grinding process according to the initial thickness of the insulating layer 110, a flat or convex conductive plug 131 can be conveniently and accurately obtained.

[0115] In a second aspect, the present disclosure also provides a method for manufacturing a semiconductor device, which includes the following steps: sequentially preparing an insulating layer 110, a barrier layer 120, and a conductive layer 130 on a functional structure as a substrate to be ground; and preparing a conductive plug 131 in the substrate to be ground by using the method for preparing the conductive plug 131 in the above embodiments.

[0116] In a third aspect, the present disclosure also provides a semiconductor device, which is manufactured by using the method for manufacturing a semiconductor device described above; or, the semiconductor device includes a conductive plug 131 prepared by using the method for preparing the conductive plug 131 in any of the above embodiments.

[0117] Please note that the above embodiments are only for illustrative purposes and do not imply any limitation to this document.

[0118] It should be understood that unless there is a clear description in this document, the execution of the steps has no strict order limitation, and these steps can be executed in other orders. Moreover, at least a part of the steps in the manufacturing process may include multiple sub-steps or multiple stages. These sub-steps or stages do not necessarily need to be executed at the same time, and can also be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed alternately or in turn with at least a part of other steps or sub-steps or stages of other steps.

[0119] Each embodiment in this specification is described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other.

[0120] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

Claims

1. A method for preparing a conductive plug, characterized in that, The method includes the following steps: Providing a substrate to be polished, the substrate to be polished includes an insulating layer, a barrier layer and a conductive layer. There are plug holes in the insulating layer. The barrier layer is disposed on the top surface of the insulating layer and extends to cover the hole walls of the plug holes. The conductive layer is disposed on the barrier layer; Performing a first polishing process on the conductive layer, and the first polishing process stops at the surface of the barrier layer; Performing a second polishing process on the conductive layer after the first polishing process; Performing a third polishing process on the barrier layer and the conductive layer, and the third polishing process stops at the surface of the insulating layer; Performing a fourth polishing process on the insulating layer and the conductive layer.

2. The preparation method of the conductive plug according to claim 1, wherein, After the fourth polishing process, the top end of the conductive layer is higher than or flush with the top end of the insulating layer.

3. The method for preparing a conductive plug according to claim 2, wherein In the step of performing the fourth polishing process on the insulating layer and the conductive layer, controlling the thinning rate of the conductive layer to be less than the thinning rate of the insulating layer.

4. The manufacturing method of the conductive plug according to claim 2, characterized in that, After the third grinding process, the height difference between the bottom end of the top surface of the conductive layer and the top surface of the insulating layer is H C3 , during the fourth grinding process, the amount of thinning of the conductive layer is H C4 ; where H C3 and H C4 The sum is less than the amount of thinning of the insulating layer during the fourth grinding process.

5. The preparation method of the conductive plug according to claim 4, characterized in that, According to the initial thickness of the insulating layer, correspondingly controlling the time of the second polishing process so that the top end of the conductive layer is higher than or flush with the top end of the insulating layer.

6. The preparation method of the conductive plug according to claim 5, wherein, Before performing the first grinding process, the initial thickness of the insulating layer is H0, and the target thickness of the insulating layer reserved after the fourth grinding process is preset to be H T , after performing the first grinding process and before performing the second grinding process, the thickness of the barrier layer is H B , the time required for the second grinding process is T2, and the thinning rate of the conductive layer during the second grinding process is R C1 , the thinning rate of the conductive layer during the third grinding process is R C2 , the thinning rate of the conductive layer during the fourth grinding process is R C4 , the thinning rate of the barrier layer during the third grinding process is R B , the thinning rate of the insulating layer during the fourth grinding process is R T , where each parameter satisfies the following relational formula: .

7. The preparation method of the conductive plug according to any one of claims 1 to 6, characterized in that After the second polishing process, the height difference between the bottom end of the top surface of the conductive layer and the top surface of the barrier layer is 0 nm to 50 nm.

8. The preparation method of the conductive plug according to any one of claims 1 to 6, characterized in that, The mode used in the step of performing the fourth polishing process is process control feedback, and the polishing time is dynamically controlled according to the thickness of the insulating layer before the fourth polishing process so that the thinned insulating layer reaches a preset target thickness.

9. The preparation method of the conductive plug according to any one of claims 1 to 6, characterized in that, The material of the insulating layer is selected from one or more of silicon nitride, silicon carbide, silicon dioxide, silicon oxynitride and black diamond; and / or, The material of the conductive layer is selected from one or more of tungsten, aluminum, copper, gold and silver; and / or, The material of the barrier layer is selected from one or more of titanium nitride, tantalum nitride, titanium, tantalum and titanium-tungsten alloy.

10. The manufacturing method of the conductive plug according to any one of claims 1 to 6, characterized in that, The second polishing process follows the first polishing process, and the polishing liquid used in the first polishing process is the same as the polishing liquid used in the second polishing process.

11. The preparation method of the conductive plug according to any one of claims 1 to 6, characterized in that, The polishing liquid used in the first polishing process includes one or more of amorphous silicon dioxide, hydrogen peroxide, water, corrosion inhibitor and barrier layer inhibitor; and / or, The polishing liquid used in the second polishing process includes one or more of amorphous silicon dioxide, hydrogen peroxide, water, corrosion inhibitor and barrier layer inhibitor; and / or, The polishing liquid used in the third polishing process includes one or more of amorphous silicon dioxide, hydrogen peroxide, water, corrosion inhibitor and barrier layer inhibitor; and / or, The polishing liquid used in the fourth polishing process includes one or more of amorphous silicon dioxide, hydrogen peroxide, water, citric acid and chelating agent.

12. A method for manufacturing a semiconductor device, characterized in that, The method includes the following steps: Preparing an insulating layer, a barrier layer and a conductive layer in sequence on a functional structure as a substrate to be polished; Preparing a conductive plug in the substrate to be polished by using the preparation method of the conductive plug according to any one of claims 1 to 11.

13. A semiconductor device, characterized in that, Prepared by the preparation method of the semiconductor device according to claim 12; or, The semiconductor device includes a conductive plug prepared by the method for preparing a conductive plug according to any one of claims 1 to 11.

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