Doherty power amplifier for dynamic linear cancellation

Abstract

The present invention provides a Doherty power amplifier for dynamic linear cancellation, comprising: a power divider, a carrier power amplifier, a peak power amplifier, an input 90-degree phase shifter, an output 90-degree phase shifter, an adaptive bias circuit, and an output matching circuit, wherein the power divider is configured to split an input signal into a first input signal and a second input signal; the carrier power amplifier provides the amplified first input signal to the output 90-degree phase shifter; the output 90-degree phase shifter performs a phase shift on the amplified first input signal output by the carrier power amplifier; the input 90-degree phase shifter is connected to a circuit that shifts the phase of the second input signal by 90 degrees; the peak power amplifier receives the phase-shifted second input signal and amplifies it; the output matching circuit is configured to perform output impedance matching on the received signal; and the adaptive bias circuit is configured to configure the working type of the peak power amplifier according to the input signal.

Description

Technical Field

[0001] The present invention relates to the field of wireless communications, and more particularly, to a Doherty power amplifier for dynamic configuration or dynamic linear cancellation. Background Art

[0002] Power amplifiers are a crucial component in modern communications and are widely used in the front-end of communication systems. A Doherty amplifier, a device that transfers energy from a power supply to an AC signal, aims to address the increasing peak-to-average ratio of modulated signals in communication systems and the inefficiency of conventional amplifiers at the power back-off point. A Doherty power amplifier consists of two power amplifiers: a carrier power amplifier and a peaking power amplifier. Load modulation technology enables these two amplifiers to work together to improve back-off efficiency. The main power amplifier (carrier power amplifier) ​​typically operates in Class B or Class AB, while the auxiliary power amplifier (peaking power amplifier) ​​operates in Class C. When the input signal is low, only the main power amplifier is active, resulting in a relatively high output impedance. When the input signal increases to near the saturation point of the main power amplifier, the auxiliary power amplifier takes over, lowering the output impedance of both amplifiers. Together, the two amplifiers provide additional amplification. In this way, the Doherty power amplifier maintains high output power while reducing energy waste. In summary, the Doherty power amplifier is a highly efficient power amplifier architecture that improves efficiency and maintains linearity through load modulation technology and the coordinated operation of two power amplifiers.

[0003] In 5G mobile communications, power consumption issues caused by increased power consumption are becoming increasingly prominent. Furthermore, non-constant envelope modulation schemes have a high peak-to-average power ratio (PAPR), forcing power amplifiers to operate in back-off mode most of the time. Therefore, back-off efficiency becomes even more important for power amplifiers. Through load modulation technology, Doherty power amplifiers can maintain high efficiency at the power back-off point when processing high PAPR signals, making Doherty power amplifiers even more important in 5G communications applications. Summary of the Invention

[0004] In order to solve the above problems, the present invention provides a dynamically adjusted Doherty power amplifier for dynamic linear cancellation, which is used to enhance the back-off efficiency of the Doherty power amplifier and improve the linear performance of the Doherty power amplifier.

[0005] One aspect of the present invention provides a Doherty power amplifier for dynamic linear cancellation, comprising: a power divider, a carrier power amplifier, a peak power amplifier, an input 90-degree phase shifter, an output 90-degree phase shifter, an adaptive bias circuit, and an output matching circuit, wherein the power divider is configured to receive an input signal and power-divide the input signal into a first input signal and a second input signal; the carrier power amplifier is configured to receive the first input signal and provide the amplified first input signal to the output 90-degree phase shifter; the output 90-degree phase shifter is configured to be connected to the output end of the carrier power amplifier to phase-shift the amplified first input signal output by the carrier power amplifier; the input 90-degree phase shifter is configured to be connected to receive the second input signal and phase-shift the second input signal by 90 degrees; the peak power amplifier is configured to receive the phase-shifted second input signal and amplify it, wherein the output end of the peak power amplifier is connected to the output end of the input 90-degree phase shifter at a combining point, and the combined signal is provided to the input end of the output matching circuit; The output matching circuit is configured to perform output impedance matching on a received signal; and the adaptive bias circuit is configured to configure an operation type of the peak power amplifier according to an input signal.

[0006] One aspect of the present invention provides a Doherty power amplifier for dynamic linear cancellation, wherein the power divider is configured as an asymmetric Wilkinson power divider.

[0007] One aspect of the present invention provides a Doherty power amplifier for dynamic linear cancellation, wherein the adaptive bias circuit is configured to cause the peak power amplifier to operate in class C when the input signal is less than a first threshold, and to cause the peak power amplifier to operate in class B / AB when the input signal is greater than a second threshold.

[0008] One aspect of the present invention provides a Doherty power amplifier for dynamic linear cancellation, further comprising an adaptive clipping circuit, wherein the adaptive clipping circuit is configured to allocate additional power to a peak power amplifier when an input signal is greater than a second threshold.

[0009] One aspect of the present invention provides a Doherty power amplifier for dynamic linear cancellation, wherein the adaptive limiting circuit is configured to include: a diode D1, a capacitor C1, a resistor R1 and a transistor N1, wherein the forward input terminal of the diode D1 is connected to the input signal, and the output terminal thereof is connected to the input 90-degree phase shifter; the capacitor C1 is connected in parallel with the resistor R1 and the transistor N1 connected in series between the output terminal of the diode D1 and a ground node, and the transistor N1 is configured with the base and the drain connected.

[0010] One aspect of the present invention proposes a Doherty power amplifier for dynamic linear cancellation, wherein the peak power amplifier is configured to be size-configurable, and wherein, when the input signal is less than a first threshold, the size of the peak power amplifier is configured to be the same as the size of the carrier power amplifier; and when the input signal is greater than a second threshold, the size of the peak power amplifier is greater than the size of the carrier power amplifier.

[0011] One aspect of the present invention provides a Doherty power amplifier for dynamic linear cancellation, wherein the adaptive limiting circuit is configured to increase the number of amplifying units turned on in the peak power amplifier to increase the size of the peak power amplifier when the input signal is greater than a second threshold.

[0012] One aspect of the present invention proposes a Doherty power amplifier for dynamic linear cancellation, wherein the adaptive bias circuit is configured to cause the carrier power amplifier to operate in Class A and the peak power amplifier to operate in Class C when the input signal is less than a first power threshold; and to cause the carrier power amplifier to operate in Class A and the peak power amplifier to operate in Class C / B / AB when the input signal is greater than a second power threshold.

[0013] One aspect of the present invention proposes a Doherty power amplifier for dynamic linear cancellation, wherein the power divider and the input 90-degree phase shifter are configured as a coupling transformer structure, wherein the input signal is power-divided into a first input signal and a second input signal in quadrature through the coupling transformer, wherein the ports of the primary coil and the secondary coil of the coupling transformer are connected through coupling capacitors C1 and C2, the input signal is connected to one end of the primary coil of the transformer, and the first input signal is connected to the other end of the primary coil; a port in the secondary coil of the transformer connected to the primary coil through the coupling capacitor C1 is used to provide the second input signal, and the other end of the secondary coil is grounded through a resistor R1.

[0014] One aspect of the present invention provides a Doherty power amplifier for dynamic linear cancellation, wherein the carrier power amplifier and the peak power amplifier include one of an HBT amplifier, a CMOS amplifier, a SiGe amplifier, a single-ended amplifier, a differential amplifier or a Cascode structure power amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a schematic diagram showing a structure of a dynamically adjusted Doherty power amplifier according to an embodiment of the present invention;

[0016] Figure 2 is a schematic diagram showing a structure of an adaptive limiting circuit according to an embodiment of the present invention;

[0017] Figure 3 is a schematic diagram showing a dynamic input signal in a Doherty power amplifier according to an embodiment of the present invention;

[0018] Figure 4 A schematic diagram showing a third-order intermodulation product (IM3) and a fundamental wave of a Doherty power amplifier according to an embodiment of the present invention is shown;

[0019] Figure 5 is a schematic diagram showing IM3 and PAE curves of a Doherty power amplifier according to an embodiment of the present invention;

[0020] Figure 6 is a schematic diagram showing a Doherty power amplifier structure according to another embodiment of the present invention; and

[0021] Figure 7 FIG. 4 is a schematic diagram showing a structure of a Doherty power amplifier according to another embodiment of the present invention. DETAILED DESCRIPTION

[0022] Before proceeding with the detailed description below, it may be beneficial to set forth the definitions of certain words and phrases used throughout this document. The terms "couple," "connect," and their derivatives refer to any direct or indirect communication between two or more elements, regardless of whether those elements are in physical contact with each other. The terms "transmit," "receive," and "communicate," and their derivatives, encompass both direct and indirect communication. The terms "include," "comprise," and their derivatives, mean including but not limited to. The term "or" is inclusive, meaning and / or. The phrase "associated with..." and its derivatives mean including, included within, interconnected, containing, contained within, connected or connected with, coupled or coupled with, communicate with, cooperate, intertwine, parallel, close to, bound or bound with, having, having attributes, having a relationship, or having a relationship with, etc. The term "controller" refers to any device, system, or part thereof that controls at least one operation. Such a controller can be implemented with hardware, or a combination of hardware and software and / or firmware. The functions associated with any particular controller can be centralized or distributed, whether local or remote. The phrase "at least one of," when used with a list of items, means that different combinations of one or more of the listed items may be used, and only one of the items in the list may be needed. For example, "at least one of A, B, and C" includes any of the following combinations: A, B, C, A and B, A and C, B and C, and A, B, and C.

[0023] Definitions for additional specific words and phrases are provided throughout this document. Those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior and future uses of such defined words and phrases.

[0024] In this invention document, the application combination of circuit blocks and the division of sub-circuit blocks are only for illustration, and the application combination of circuit blocks and the division of sub-circuit blocks may be in different ways without departing from the scope of the present disclosure.

[0025] The following discussion Figures 1 to 7 The various embodiments used to describe the principles of the present disclosure in this invention document are for illustration only and should not be interpreted in any way as limiting the scope of the present disclosure. Those skilled in the art will understand that the principles of the present disclosure can be implemented in any appropriately arranged system or device.

[0026] Based on their structure, Doherty amplifiers can be categorized as symmetric or asymmetric. In a symmetric Doherty amplifier, the carrier and peak power amplifiers are of equal size and 90 degrees out of phase. At maximum power output, their output impedances are identical, and they deliver the same power. In an asymmetric Doherty amplifier, the peak power amplifier is larger than the carrier power amplifier. At maximum power output, the carrier power amplifier's output impedance is slightly higher, resulting in slightly lower power delivery. This offers the potential for further increased added efficiency and improved linearity.

[0027] Based on the input signal, Doherty power amplifiers can be divided into two types: those with and without input signal differences. For standard Doherty power amplifiers, the carrier and peak power amplifier input signals are equal, and the operating modes of the two amplifiers are fixed. For improved Doherty power amplifiers, the difference between the carrier and peak power amplifier input signals is constant, which has a certain effect on improving power back-off efficiency and linearity. However, because the input signals of the carrier and peak power amplifiers cannot be dynamically adjusted, when the input signal increases to a certain level, the carrier power amplifier enters saturation. The saturated power no longer increases with input power, but the current of the carrier power amplifier continues to increase due to the rectification of the HBT tube. This limits the improvement in the Doherty power amplifier's back-off efficiency. Furthermore, the saturation of the carrier power amplifier also limits the improvement in the amplifier's linearity.

[0028] Based on the peak power amplifier operating type, Doherty amplifiers can be divided into Class C and Class B / AB. For Class C Doherty amplifiers, the peak power amplifier operates in Class C, resulting in optimal back-off efficiency. However, when the input signal is too small, the peak power amplifier cannot fully turn on, causing it to operate in saturation. This weakens the load modulation effect on the carrier power amplifier, preventing the Doherty power amplifier from achieving optimal saturation power, thus limiting the amplifier's linear performance. For Class B / AB Doherty amplifiers, the peak power amplifier operates in Class B / AB, limiting the Doherty power amplifier's back-off efficiency and preventing the carrier power amplifier from prematurely entering saturation, resulting in better linear performance.

[0029] In summary, for each type of Doherty power amplifier using different technologies, its efficiency and linear performance always need to be traded off. The reason is that the types of Doherty power amplifiers distinguished from different perspectives are fixed. However, to achieve optimal performance, the type of Doherty power amplifier should change with the input signal. That is, the size of the carrier and peak power amplifiers, the difference in the input signals between the carrier and peak power amplifiers, and the operating type of the peak power amplifier should all be dynamically adjusted with the input power. Through dynamic adjustment, the amplification path can be optimized so that under small signals, the carrier power amplifier will not enter an oversaturated state, affecting the back-off efficiency and linearity; and under large signals, the peak power amplifier smoothly enters a saturated state, thereby increasing the saturation power of the Doherty power amplifier, avoiding performance compromises, and thus achieving the optimal performance of the Doherty power amplifier.

[0030] Figure 1 FIG. 1 is a schematic diagram showing a structure of a dynamically adjusted Doherty power amplifier according to an embodiment of the present invention.

[0031] like Figure 1 As shown, the Doherty power amplifier according to an embodiment of the present invention includes: a power divider, a carrier power amplifier, a peak power amplifier, an input 90-degree phase shifter, an output 90-degree phase shifter, an adaptive bias circuit, an adaptive limiter circuit, and an output matching circuit.

[0032] The power splitter is configured to receive an input signal and split the input signal into a first input signal and a second input signal. According to an embodiment of the present invention, the power splitter is configured as an asymmetric Wilkinson power splitter to generate a first input signal and a second input signal with different powers.

[0033] The carrier power amplifier is configured to receive a first input signal and provide an amplified first input signal to the output 90 degree phase shifter.

[0034] The output 90-degree phase shifter is configured to be connected to an output terminal of the carrier power amplifier to perform phase shift on the amplified first input signal output by the carrier power amplifier.

[0035] The input 90 degree phase shifter is configured to receive the second input signal and to shift the phase of the second input signal by 90 degrees.

[0036] The peak power amplifier is configured to receive a second input signal that has undergone phase shifting and perform an amplification operation on it, wherein the output end of the peak power amplifier is connected to the output end of the input 90-degree phase shifter, and the combined signal is provided to the input end of the output matching circuit; the output matching circuit is configured to perform output matching on the received signal.

[0037] The input 90-degree phase shifter and the output 90-degree phase shifter are configured as a 1 / 4 wavelength line.

[0038] The carrier power amplifier is configured as a class A power amplifier, and the peak power amplifier is configured as a class C / B / AB power amplifier.

[0039] According to an embodiment of the present invention, a carrier power amplifier is configured as a two-stage differential power amplifier, comprising: a carrier single-ended-to-differential converter, a driver-stage amplifier 1, an interstage matching network 1, and a carrier power stage amplifier. The carrier single-ended-to-differential converter is configured to receive a first input signal and convert the first input signal into a differential first input signal; the interstage matching circuit 1 is configured between the driver-stage amplifier 1 and the carrier power stage amplifier to provide interstage impedance matching; and the carrier power stage amplifier is configured to include a power stage amplifier 1 and a power stage amplifier 2. The power stage amplifier 1 and the power stage amplifier 2 are configured to respectively amplify one of the differential first input signals and provide the amplified differential signals to a signal combining point via output 90-degree phase shifters.

[0040] According to an embodiment of the present invention, the peak power amplifier is configured as a two-stage differential power amplifier, comprising: a peak single-ended-to-differential converter, a driver stage amplifier 2, an interstage matching network 2, and a peak power stage amplifier. The peak single-ended-to-differential converter is configured to receive a phase-shifted second input signal and convert the second input signal into a differential second input signal; the interstage matching network 2 is configured between the driver stage amplifier 2 and the peak power stage amplifier to provide interstage impedance matching; and the peak power stage amplifier is configured to include a power stage amplifier 3 and a power stage amplifier 4. The power stage amplifier 3 and the power stage amplifier 4 are configured to respectively amplify one of the differential second input signals and provide the amplified differential signals to the signal combining point of the Doherty power amplifier.

[0041] The bias signals of the driver stage amplifier 2 and the peak power stage amplifier in the peak power amplifier are configured according to the input signal through the adaptive bias circuit to optimize the performance under different powers.

[0042] The peak power stage amplifiers in the peak power amplifier can be configured to have variable sizes (dimensions) to adjust the sizes of the power stage amplifiers according to the input signal. For example, the sizes of power stage amplifiers 3 and 4 in the peak power stage amplifier can be configured to be adjustable according to the input signal.

[0043] According to an embodiment of the present invention, a capacitor C may be further configured between the two signal combining points of the carrier power amplifier and the peak power amplifier to further suppress common-mode signals.

[0044] According to an embodiment of the present invention, the carrier amplifier path and the peak amplifier path each consist of two stages: a fully differential driver stage and an amplifier stage. The carrier amplifier path performs load modulation impedance transformation via a 90-degree phase shifter. The two amplifier paths combine power via a differential-to-single-ended converter connected to the combining point, converting the power into a single-ended signal and outputting it to the matching circuit. The differential-to-single-ended converter is configured as a transformer to achieve impedance matching and power combination through the turns ratio of the primary / secondary coils.

[0045] According to an embodiment of the present invention, the Doherty power amplifier further includes an adaptive clipper circuit configured to adjust the power of the input signal of the peak amplification path according to the input signal to optimize performance at different powers.

[0046] According to an embodiment of the present invention, the Doherty power amplifier further includes a mode control circuit and an adaptive bias circuit. The mode control circuit and the adaptive bias circuit are configured to adjust the bias signals of the driver stage amplifier 2 and the peak power stage amplifier in the peak amplification path according to the input signal to optimize performance at different power levels.

[0047] According to an embodiment of the present invention, a structure is provided for adjusting the amplifier structure in the peak amplification path of a Doherty power amplifier by using an adaptive limiting circuit, a mode control circuit, and an adaptive bias circuit to optimize the performance of the Doherty power amplifier at different power levels. The adaptive limiting circuit, the mode control circuit, and the adaptive bias circuit can be configured as follows:

[0048] 1) According to an embodiment of the present invention, when the input signal is small (e.g., when the input signal is less than a first threshold), the amplifiers in the carrier and peak amplification paths are configured to be the same size to improve the efficiency of the carrier power amplifier. When the input signal is large (e.g., when the input signal is greater than a second threshold), the peak power amplifier is configured to be larger than the carrier power amplifier to increase the output current of the amplifier in the peak amplification path. For example, when the input signal is large, the number of conducting amplification units in power stage amplifiers 3 and 4 is increased through an adaptive bias circuit to increase the size of the peak power amplifier. By increasing the size of the peak power amplifier when the input signal is large, load modulation is enhanced and the saturation power of the Doherty power amplifier is increased.

[0049] 2) According to an embodiment of the present invention, when the input signal is a small signal, since the peak power amplifier does not need to load modulate the carrier power amplifier, more power can be allocated to the carrier power amplifier; when the input signal is a large signal, more power can be allocated to the peak power amplifier to enhance load modulation and improve Doherty linear performance.

[0050] For example, according to an embodiment of the present invention, the Doherty power amplifier may further include a driver amplifier. By adjusting the working type of the driver amplifier, the input signals of the carrier and peak amplification paths may be dynamically adjusted.

[0051] In addition, according to an embodiment of the present invention, the input signal (second input signal) of the peak amplification path may be adjusted by an adaptive limiter circuit. Figure 2 FIG. 1 is a schematic diagram showing a structure of an adaptive amplitude limiting circuit according to an embodiment of the present invention. Figure 2As shown, the adaptive limiting circuit includes: a diode D1, a capacitor C1, a resistor R1 and a transistor N1. The positive input terminal of the diode D1 is connected to the input signal, and the output terminal thereof is connected to the input 90-degree phase shifter. The capacitor C1 is connected in parallel with the resistor R1 and the transistor N1 connected in series between the output terminal of the diode D1 and the ground node. The transistor N1 is configured to connect the base and the drain. The adaptive limiting circuit according to an embodiment of the present invention can be configured to provide an additional input signal to the peak power amplifier in the case of a large signal to enhance load modulation and improve Doherty linear performance.

[0052] Figure 3 FIG. 1 is a schematic diagram illustrating a dynamic input signal in a Doherty power amplifier according to an embodiment of the present invention.

[0053] The dynamic changes of the input signals of the carrier amplifier path and the peak amplifier path are as follows: Figure 3 Reference Figure 3 In graphs (a) and (b), under low-signal conditions, the input signal to the carrier amplifier path (first input signal) is approximately 1.2 dB larger than the input signal to the peak amplifier path (second input signal). At this point, the Doherty power amplifier is primarily powered by the carrier power amplifier. As the input signal increases and drives the amplifier into saturation, the input signal to the carrier amplifier path (first input signal) becomes approximately 2 dB smaller than the input signal to the peak amplifier path (second input signal), making the peak power amplifier's load modulation of the carrier power amplifier more pronounced.

[0054] 3) According to an embodiment of the present invention, when the input signal is a small signal, the peak power amplifier operates in Class C to improve the back-off efficiency of the Doherty power amplifier. When the input signal is a large signal, the peak power amplifier operates in Class B / AB to enhance load modulation and increase the saturation power of the Doherty power amplifier.

[0055] For example, the operating type of the peak power amplifier can be adjusted using an adaptive bias circuit. According to an embodiment of the present invention, the operating types of the driver amplifier 2 and the peak power amplifier can be controlled by adjusting the bias voltage provided by the adaptive bias circuit to the driver amplifier 2 and the peak power amplifier. This allows the driver amplifier 2 and the peak power amplifier to operate in Class C when the input signal is small, and to operate in Class B / AB when the input signal is large.

[0056] 4) In implementing a linear Doherty power amplifier, eliminating the third-order intermodulation distortion (IMD3) generated by the carrier power amplifier and the peak power amplifier is a crucial design consideration. According to embodiments of the present invention, to further improve amplifier linearity, when the input signal is small (e.g., when the input power is less than a first power threshold), the carrier power amplifier operates in Class A and the peak power amplifier operates in Class C. When the input signal is large (e.g., when the input power is greater than a second power threshold), the carrier power amplifier operates in Class A, while the peak power amplifier dynamically adjusts between Class C, Class B, and Class AB through adaptive biasing. Furthermore, dynamic scaling of the peak power amplifier and dynamic input power allocation mechanisms can be combined to offset the third-order intermodulation distortion (IMD3) generated by the carrier power amplifier at different power levels, thereby improving power amplifier linearity while improving power amplifier efficiency. By combining multiple dynamic adjustment mechanisms, IMD3 can be adjusted at various power levels, increasing flexibility and range. This allows the Doherty power amplifier according to the present invention to achieve effects not achievable with a single adjustment method.

[0057] Figure 4 A schematic diagram showing the third-order intermodulation product (IM3) and fundamental wave of a Doherty power amplifier according to an embodiment of the present invention is shown.

[0058] refer to Figure 4 For the carrier power amplifier, when gain compression occurs, the third-order intermodulation product (IM3) of the carrier power amplifier with class A bias and the fundamental signal are in anti-phase. For the peak power amplifier, when gain expansion begins, the IM3 of the peak power amplifier with class C / B / AB bias and the fundamental signal are in phase. Therefore, if Figure 4 As shown in the graph (a), within a specific power range (for example, when the input power of the input signal is greater than the second power threshold), the IM3 of the carrier power amplifier and the peak power amplifier can cancel each other (IM3 cancellation), thereby improving the linearity of the Doherty power amplifier. At the same time, since the fundamental waves of the two amplifiers remain in the same direction, the efficiency is not affected. Figure 4 As can be seen in graph (b), the fundamental waves of the carrier and peak power amplifier are in phase in both the high-power and low-power regions. Therefore, by utilizing the complementary gain characteristics of the two amplifiers and dynamically optimizing the bias conditions, better AM-AM distortion performance can be achieved.

[0059] Figure 5 FIG. 1 is a schematic diagram showing IM3 and PAE curves of a Doherty power amplifier according to an embodiment of the present invention.

[0060] like Figure 5As shown in the figure, after adopting the dynamic input power adjustment technology, by comparing the conventional Class AB PA and the IM3 cancellation DPA, it can be seen that the linear IM3 and efficiency are significantly improved compared with the conventional power amplifier structure.

[0061] According to an embodiment of the present invention, by adaptively adjusting the operating sizes of the carrier and peak power amplifiers, the input signal power difference, and the peak power amplifier operating type, a linear IM3 dynamic cancellation effect can be achieved at various power levels, thereby improving the back-off efficiency and linearity of the Doherty power amplifier and avoiding the compromise between linearity and efficiency encountered in other Doherty power amplifiers.

[0062] Figure 6 FIG. 4 is a schematic diagram showing a structure of a Doherty power amplifier according to another embodiment of the present invention.

[0063] like Figure 6 As shown, the Doherty power amplifier according to the embodiment of the present invention includes: a power divider, a carrier power amplifier, a peak power amplifier, an input 90-degree phase shifter, an output 90-degree phase shifter, an adaptive bias circuit, a limiter circuit and an output matching circuit.

[0064] and Figure 1 The embodiment of the Doherty power amplifier shown differs in that the Figure 1 In the embodiment, the mode control circuit is configured as a MIPI control circuit, and the process used by the mode control circuit and the adaptive bias circuit is different from the process used by the Doherty power amplifier chip, so that the mode control circuit and the adaptive bias circuit are configured as different chips from the Doherty power amplifier.

[0065] exist Figure 6 In the illustrated Doherty power amplifier, the adaptive bias circuit is configured to be implemented using the same process as the Doherty power amplifier, enabling the adaptive bias circuit and the Doherty power amplifier to be implemented on the same chip. The adaptive bias circuit is configured to adjust the bias signal generated by the mode control circuit based on the input signal to dynamically configure the peak power amplifier in the peak amplification path. For example, the adaptive bias circuit can be configured to include a comparator that compares the input signal with a threshold signal and adjusts the bias signal provided by the mode control circuit based on the comparison result.

[0066] By integrating the adaptive bias circuit into the chip of the Doherty power amplifier, the cost can be further reduced and the stability of the amplifier can be improved.

[0067] Figure 7 FIG. 4 is a schematic diagram showing a structure of a Doherty power amplifier according to another embodiment of the present invention.

[0068] like Figure 7 As shown, the Doherty power amplifier according to the embodiment of the present invention includes: a power divider, a carrier power amplifier, a peak power amplifier, an output 90-degree phase shifter, an adaptive bias circuit, a limiter circuit and an output matching circuit.

[0069] and Figure 1 The embodiment shown is different. Figure 7 In the Doherty power amplifier shown, the power divider and input 90-degree phase shifter are configured as a coupling transformer. The input signal is split into a first input signal and a second input signal in quadrature via the coupling transformer. The primary and secondary windings of the coupling transformer are connected via coupling capacitors C1 and C2. The input signal is connected to one end of the primary winding, and the first input signal is connected to the other end of the primary winding. A port of the secondary winding, connected to the primary winding via coupling capacitor C1, provides the second input signal, which is in quadrature with the first input signal. The other end of the secondary winding is grounded via resistor R1.

[0070] By implementing the structure of the power divider and the 90-degree phase shifter through a transformer, the circuit area can be further reduced, thereby saving the circuit cost.

[0071] In addition, with Figure 1 Unlike the embodiment shown in Figure 1 In the carrier amplifier path and the peak amplifier path, the driver stage power amplifier adopts a fully differential amplifier structure. Figure 7 In the example shown, the driver-stage power amplifiers in the carrier and peak amplifier paths are implemented single-ended, while the interstage transformers use a single-ended-to-differential converter to provide differential input signals for the power-stage amplifiers. This structure further reduces the circuit's area and complexity, lowering circuit cost.

[0072] exist Figure 7 In the Doherty power amplifier according to the embodiment of the present invention, the adaptive bias circuit is also configured to be implemented using the same process as the Doherty power amplifier, and is configured to adjust the bias voltage of the peak power amplifier based on the input signal. The adaptive bias circuit is configured to separately configure the bias signal of the driver stage amplifier and the bias signal of the power stage amplifier in the peak power amplifier based on the second input signal. For example, the adaptive bias circuit is configured to separately configure the bias signal of the driver stage amplifier based on the input signal of the driver stage amplifier, and to configure the bias power stage amplifier signal based on the input signal of the power stage amplifier. With the above structure, the bias signal can be configured more accurately, thereby achieving more precise adjustment of circuit performance.

[0073] The architecture of the present invention is applicable to Doherty power amplifiers with differential, single-ended or cascode structures made using various CMOS, HBT and SiGe processes.

[0074] Although the present disclosure has been described with exemplary embodiments, various changes and modifications may be suggested to one skilled in the art. It is intended that the present disclosure encompass such changes and modifications as fall within the scope of the appended claims.

[0075] Any description in the present invention should not be construed as implying that any particular element, step, or function is an essential element that must be included in the claims scope.The scope of the present subject matter is limited only by the claims.

Claims

1. A Doherty power amplifier for dynamic linear cancellation, comprising: Power divider, carrier power amplifier, peak power amplifier, input 90-degree phase shifter, output 90-degree phase shifter, adaptive bias circuit and output matching circuit, wherein, The power splitter is configured to receive an input signal and power split the input signal into a first input signal and a second input signal; The carrier power amplifier is configured to receive a first input signal and provide an amplified first input signal to the output 90-degree phase shifter; The output 90-degree phase shift is configured to be connected to the output terminal of the carrier power amplifier to perform phase shift on the amplified first input signal output by the carrier power amplifier; The input 90-degree phase shifter is configured to receive the second input signal and shift the phase of the second input signal by 90 degrees; The peak power amplifier is configured to receive the phase-shifted second input signal and amplify it, wherein the output terminal of the peak power amplifier is connected to the output terminal of the input 90-degree phase shifter at a combining point, and the combined signal is provided to the input terminal of the output matching circuit; The output matching circuit is configured to perform output impedance matching on a received signal; an adaptive bias circuit configured to configure an operating mode of the peak power amplifier according to an input signal, and an adaptive clipping circuit configured to allocate additional power to the peak power amplifier when the input signal is greater than a second threshold, The adaptive amplitude limiting circuit is configured to include: a diode D1, a capacitor C1, a resistor R1, and a transistor N1, wherein the forward input terminal of the diode D1 is connected to the input signal, and the output terminal thereof is connected to the input 90-degree phase shifter; the capacitor C1 is connected in parallel with the resistor R1 and the transistor N1 connected in series between the output terminal of the diode D1 and the ground node, and the transistor N1 is configured to have its base and drain connected, wherein the peak power amplifier is configured to be configurable in size, and wherein, When the input signal is less than a first threshold, the size of the peak power amplifier is configured to be the same as that of the carrier power amplifier; and when the input signal is greater than a second threshold, the size of the peak power amplifier is configured to be greater than that of the carrier power amplifier.

2. The Doherty power amplifier according to claim 1, wherein The power divider is configured as an asymmetric Wilkinson power divider.

3. The Doherty power amplifier according to claim 1, wherein The adaptive bias circuit is configured to enable the peak power amplifier to operate in class C when the input signal is less than a first threshold, and to enable the peak power amplifier to operate in class B / AB when the input signal is greater than a second threshold.

4. The Doherty power amplifier according to claim 1, wherein The adaptive bias circuit is configured to increase the number of amplification units turned on in the peak power amplifier to increase the size of the peak power amplifier when the input signal is greater than a second threshold.

5. The Doherty power amplifier according to claim 1, wherein The adaptive bias circuit is configured to cause the carrier power amplifier to operate in class A and the peak power amplifier to operate in class C when the input signal is less than a first power threshold; and to cause the carrier power amplifier to operate in class A and the peak power amplifier to operate in class C / B / AB when the input signal is greater than a second power threshold.

6. The Doherty power amplifier according to claim 1, wherein The power divider and the input 90-degree phase shifter are configured as a coupled transformer structure. The input signal is split into a first input signal and a second input signal in quadrature by a coupling transformer. In which, the ports of the primary coil and the secondary coil of the coupling transformer are connected through coupling capacitors C1 and C2, the input signal is connected to one end of the primary coil of the transformer, and the first input signal is connected to the other end of the primary coil; a port in the secondary coil of the transformer connected to the primary coil through the coupling capacitor C1 is used to provide a second input signal, and the other end of the secondary coil is grounded through a resistor R1.

7. The Doherty power amplifier according to claim 1, wherein: The carrier power amplifier and the peak power amplifier include one of an HBT amplifier, a CMOS amplifier, a SiGe amplifier, a single-ended amplifier, a differential amplifier or a Cascode structure power amplifier.

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