Low power dc-ac coupled preamplifier circuit for high speed link receiver
By designing a DC-AC preamplifier circuit for high-speed link receivers, the problem of high power consumption in the AC coupling mode of traditional receivers is solved, and AC coupled transmission with low power consumption is achieved.
Patent Information
- Application Number
- CN202411753138.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-11-25
- Filing Date
- 2024-12-02
- Publication Date
- 2025-06-06
AI Technical Summary
The traditional on-chip DC-AC coupling scheme in AC coupling mode has additional power overhead due to the need to add a common mode generation circuit.
A DC-AC preamplifier circuit for high-speed link receivers is designed, which does not include the input common mode generation circuit required by the traditional receiver, and generates the input common mode signal through the internal common mode signal to achieve AC coupled transmission without additional current consumption.
Power consumption is reduced during AC coupled transmission, avoiding additional current consumption, and improving the energy efficiency performance of the link receiver.
Smart Images
Figure CN120110339A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates generally to preamplifier circuits, and more particularly to low power direct current (DC) to alternating current (AC) preamplifier circuits for high speed link receivers capable of AC coupled transmission without additional power consumption. Background Art
[0002] Generally, the receiver can receive data in two modes, including DC coupling mode and AC coupling mode. In the DC coupling mode, the common mode level V of the signal transmitted by the transmitter is CM-TX must be equal to the receiver's common-mode level, V CM－RX In AC coupling mode, the common-mode level of the signal transmitted by the transmitter is V CM－TX does not have to match the receiver's common-mode level V CM－RX alignment, which requires the use of additional circuits that consume additional power. More specifically, in conventional on-chip DC-AC coupling schemes, a switchable internal common-mode generation circuit must be added to provide AC-coupled data transmission as well as DC-coupled data transmission. For example, the common-mode generation circuit includes a resistor and a level shifter. When the link is operated in AC coupling mode, the addition of the common-mode generation circuit results in additional power consumption overhead. Summary of the invention
[0003] According to the present disclosure, a DC-AC preamplifier circuit for a high-speed link receiver does not include an input common-mode generation circuit required by a conventional receiver, which results in reduced power consumption during AC-coupled transmission compared to conventional receivers. To achieve reduced power consumption, the DC-AC preamplifier circuit according to the present disclosure uses an internal common-mode signal to generate an input common-mode signal, while the high-speed link receiver to which the DC-AC preamplifier circuit is electrically coupled operates in an AC-coupled mode. Therefore, when the receiver operates in the AC-coupled mode, no additional current is consumed.
[0004] A receiver according to the present disclosure is characterized by including a preamplifier circuit and an amplifier circuit, which generates an amplified signal based on an output signal provided by the preamplifier circuit in operation. The preamplifier circuit includes: a first output terminal and a second output terminal, which provide the output signal to the amplifier circuit in operation; a first input terminal; a second input terminal; a first resistor having a first terminal electrically coupled to the first input terminal and a second terminal electrically coupled to a first node; a second resistor having a first terminal electrically coupled to the second input terminal and a second terminal electrically coupled to the first node; a third resistor having a first terminal electrically coupled to the first output terminal and a second terminal electrically coupled to the second node; a fourth resistor having a first terminal electrically coupled to the second output terminal and a second terminal electrically coupled to the second node; and a switch having a first terminal electrically coupled to the first node and a second terminal electrically coupled to the second node.
[0005] The preamplifier circuit may operate in a DC coupling mode when the switch is in a non-conducting state, and the preamplifier circuit may operate in an AC coupling mode when the switch is in a conducting state.
[0006] When the switch is in the on state, the average value of the voltage at the first output terminal and the voltage at the second output terminal can be provided to the first node, while when the switch is in the off state, the average value of the voltage at the first output terminal and the voltage at the second output terminal may not be provided to the first node.
[0007] The resistance of the first resistor may be equal to the resistance of the second resistor, and the resistance of the third resistor may be equal to the resistance of the fourth resistor.
[0008] The preamplifier circuit may further include: a fifth resistor having a first terminal electrically coupled to a power supply voltage and a second terminal electrically coupled to the second output terminal; a sixth resistor having a first terminal electrically coupled to the power supply voltage and a second terminal electrically coupled to the first output terminal; a first transistor having a first terminal electrically coupled to the second input terminal, a second terminal electrically coupled to the first output terminal, and a third terminal; a second transistor having a first terminal electrically coupled to the first input terminal, a second terminal electrically coupled to the second output terminal, and a third terminal electrically coupled to the third terminal of the first transistor; and a third transistor having a first terminal electrically coupled to a bias voltage potential, a second terminal electrically coupled to the third terminal of the first transistor and the third terminal of the second transistor, and a third terminal electrically coupled to a ground potential. The resistance of the first resistor may be equal to the resistance of the second resistor, the resistance of the third resistor may be equal to the resistance of the fourth resistor, and the resistance of the fifth resistor may be equal to the resistance of the sixth resistor.
[0009] The preamplifier circuit according to the present invention is characterized by comprising: a first input terminal; a second input terminal; a first output terminal; a second output terminal; a first resistor having a first terminal electrically coupled to the first input terminal and a second terminal electrically coupled to a first node; a second resistor having a first terminal electrically coupled to the second input terminal and a second terminal electrically coupled to the first node; a first transistor having a first terminal electrically coupled to the second input terminal, a second terminal electrically coupled to the first output terminal, and a third terminal; a second transistor having a first terminal electrically coupled to the first input terminal, a second terminal electrically coupled to the second output terminal, and a third terminal electrically coupled to the first node. a third terminal coupled to the third terminal of the first transistor; a third resistor having a first terminal electrically coupled to a power supply voltage and a second terminal electrically coupled to the second output terminal; a fourth resistor having a first terminal electrically coupled to the power supply voltage and a second terminal electrically coupled to the first output terminal; a fifth resistor having a first terminal electrically coupled to the second output terminal and a second terminal electrically coupled to a second node; a sixth resistor having a first terminal electrically coupled to the first output terminal and a second terminal electrically coupled to the second node; and a switch having a first terminal electrically coupled to the first node and a second terminal electrically coupled to the second node.
[0010] Each of the first terminal of the first transistor and the first terminal of the second transistor may be a gate terminal, each of the second terminal of the first transistor and the second terminal of the second transistor may be a drain terminal, and each of the third terminal of the first transistor and the third terminal of the second transistor may be a source terminal.
[0011] The preamplifier circuit may further include: a third transistor having a first terminal electrically coupled to a bias voltage potential, a second terminal electrically coupled to the third terminal of the first transistor and electrically coupled to the third terminal of the second transistor, and a third terminal electrically coupled to a ground potential. Each of the first terminal of the first transistor, the first terminal of the second transistor, and the first terminal of the third transistor may be a gate terminal, each of the second terminal of the first transistor, the second terminal of the second transistor, and the second terminal of the third transistor may be a drain terminal, and each of the third terminal of the first transistor, the third terminal of the second transistor, and the third terminal of the third transistor may be a source terminal.
[0012] The preamplifier circuit may operate in a DC coupling mode when the switch is in a non-conducting state, and the preamplifier circuit may operate in an AC coupling mode when the switch is in a conducting state.
[0013] When the switch is in the on state, the average value of the voltage at the first output terminal and the voltage at the second output terminal can be provided to the first node, while when the switch is in the non-conducting state, the average value of the voltage at the first output terminal and the voltage at the second output terminal may not be provided to the first node.
[0014] The preamplifier circuit may further include: a first capacitor coupled to the first input terminal; and a second capacitor coupled to the second input terminal. The first capacitor and the second capacitor may block a DC signal from entering the first input terminal and the second input terminal in operation.
[0015] The resistance of the first resistor may be equal to the resistance of the second resistor, the resistance of the third resistor is equal to the resistance of the fourth resistor, and the resistance of the fifth resistor is equal to the resistance of the sixth resistor.
[0016] A method of operating a receiver including a preamplifier circuit and an amplifier circuit according to the present disclosure may be characterized by including: electrically coupling a first output terminal of the preamplifier circuit to the amplifier circuit; electrically coupling a second output terminal of the preamplifier circuit to the amplifier circuit; electrically coupling a first terminal of a first resistor to a first input terminal of the preamplifier circuit; electrically coupling a second terminal of the first resistor to a first node of the preamplifier circuit; electrically coupling a first terminal of a second resistor to a second input terminal of the preamplifier circuit; electrically coupling a second terminal of the second resistor to the first node of the preamplifier circuit; electrically coupling a first terminal of a third resistor to the first output terminal of the preamplifier circuit; electrically coupling a second terminal of the third resistor to a second node of the preamplifier circuit; electrically coupling a first terminal of a fourth resistor to a second output terminal of the preamplifier circuit; electrically coupling a second terminal of the fourth resistor to a second node of the preamplifier circuit; electrically coupling a first terminal of a switch to the first node of the preamplifier circuit; and electrically coupling a second terminal of the switch to a second node of the preamplifier circuit.
[0017] The method may further include operating the preamplifier circuit in a DC coupling mode when the switch is in a non-conducting state, and operating the preamplifier circuit in an AC coupling mode when the switch is in a conducting state.
[0018] The method may further include: when the switch is in a conducting state, providing the first node with an average value of the voltage at the first output terminal and the voltage at the second output terminal. When the switch is in a non-conducting state, the average value of the voltage at the first output terminal and the voltage at the second output terminal may not be provided to the first node.
[0019] The resistance of the first resistor may be equal to the resistance of the second resistor, and the resistance of the third resistor may be equal to the resistance of the fourth resistor.
[0020] The method may further include: electrically coupling a first terminal of a fifth resistor to a power supply voltage; electrically coupling a second terminal of the fifth resistor to the second output terminal; electrically coupling a first terminal of a sixth resistor to the power supply voltage; electrically coupling a second terminal of the sixth resistor to the first output terminal; electrically coupling a first terminal of a first transistor to the second input terminal; electrically coupling a second terminal of the first transistor to the first output terminal; electrically coupling a first terminal of a second transistor to the first input terminal; electrically coupling a second terminal of the second transistor to the second output terminal; electrically coupling a third terminal of the second transistor to a third terminal of the first transistor; electrically coupling a first terminal of the third transistor to a bias voltage potential; electrically coupling a second terminal of the third transistor to a third terminal of the first transistor and a third terminal of the second transistor; and electrically coupling a third terminal of the third transistor to a ground potential. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Non-limiting and non-exhaustive embodiments are described with reference to the following figures.In the drawings, like reference numerals refer to like parts throughout the various figures unless otherwise specified.
[0022] For a better understanding of the present disclosure, reference will be made to the following detailed description, which is to be read in conjunction with the accompanying drawings:
[0023] Figure 1 A block diagram of a receiver according to an embodiment of the present disclosure is shown.
[0024] Figure 2 It is used to explain Figure 1 A diagram showing the operation of the receiver in DC coupled mode.
[0025] Figure 3 It is used to explain Figure 1 A diagram showing the operation of the receiver in AC coupled mode. DETAILED DESCRIPTION
[0026] According to the present disclosure, when the receiver is operated in AC coupling mode, the output common mode signal from the preamplifier stage of the receiver (e.g., a high-speed link receiver) is used to provide an input common mode signal for input data. Therefore, the receiver according to the present disclosure does not consume additional current when operating in AC coupling mode.
[0027] Figure 1A block diagram of a receiver 100 according to an embodiment of the present disclosure is shown. The receiver includes a preamplifier circuit 102 and an amplifier circuit 104. In one or more implementations, the receiver 100 is a high-speed link receiver, which may include additional circuitry (not shown), such as demodulating a signal output by the amplifier circuit 104. In one or more implementations, the amplifier circuit 104 includes a differential amplifier, such as an operational amplifier. In one or more implementations, the amplifier circuit 104 is an amplification and differential to single-ended conversion circuit.
[0028] The preamplifier circuit 102 includes an input terminal I 1 and input terminal I 2 , the preamplifier circuit 102 is connected to the input terminal I 2 Receives a signal transmitted by a transmitter (not shown). Input terminal I 1 Is the positive data input terminal, input terminal I 2 is a negative data input. The preamplifier circuit 102 also includes an output terminal O 1 and output terminal O 2 , the preamplifier circuit 102 outputs the 2 The signal is provided to amplifier circuit 104 .
[0029] In addition, the preamplifier circuit 102 includes a transistor T 1 , transistor T 2 and transistor T 3 In one or more implementations, the transistor T 1 , T 2 and T 3 Each transistor in is an N-channel metal oxide semiconductor field effect transistor (MOSFET) including a gate terminal, a drain terminal, a source terminal and a body terminal.
[0030] More specifically, the transistor T 1 The gate terminal is electrically coupled to the input terminal I 2 , transistor T 1 The drain terminal is electrically coupled to the output terminal O 1 , and transistor T 1 The source terminal of transistor T is electrically coupled to 2 The source terminal of transistor T 2 The gate terminal is electrically coupled to the input terminal I 1 , transistor T 2 The drain terminal is electrically coupled to the output terminal O 2 , and transistor T 2 The source terminal of transistor T is electrically coupled to 1 The source terminal of transistor T 3The gate terminal of transistor T is electrically coupled to the bias voltage potential VG. 3 The drain terminal is electrically coupled to the transistor T 1 The source terminal of transistor T 2 The source terminal of transistor T 3 The source terminal of transistor T is electrically coupled to ground potential. 1 , T 2 and T 3 The body terminal is electrically connected to ground potential.
[0031] The preamplifier circuit 102 also includes a resistor R 1 , resistor R 2 , resistor R 3 , resistor R 4 , resistor R 5 and resistor R 6 . Resistor R 1 , R 2 , R 3 , R 4 , R 5 and R 6 Each resistor in includes a first terminal and a second terminal. More specifically, the resistor R 1 The first terminal is electrically coupled to the input terminal I 1 , and R 1 The second terminal is electrically coupled to the node N 1 . Resistor R 2 The first terminal is electrically coupled to the input terminal I 2 , and the resistor R 2 The second terminal is electrically coupled to the node N 1 . Resistor R 3 The first terminal is electrically coupled to a power supply voltage V supply , and the resistor R 3 The second terminal is electrically coupled to the output terminal O 2 . Resistor R 4 The first terminal is electrically coupled to the power supply voltage V supply , and the resistor R 4 The second terminal is electrically coupled to the output terminal O 1 . Resistor R 5 The first terminal is electrically coupled to the output terminal O 2 , and the resistor R 5 The second terminal of the resistor R is electrically coupled to the node N2. 6 The first terminal is electrically coupled to the output terminal O 1 , and the resistor R 6 The second terminal is electrically coupled to the node N 2 .
[0032] In one embodiment, the resistor R 1 and R 2 Each of the resistors R is a 50 ohm resistor. 3 and R 4 Each of the resistors R is a 1K ohm resistor. 5 and R 6 Each of them is a 10K ohm resistor. Also, the power supply voltage V supply It is 1.8 volts.
[0033] In addition, the preamplifier circuit 102 includes a switch S, the switch S includes a first terminal, a second terminal and a third terminal, and the switch S receives a control signal Bias_select from a control circuit (not shown) through the third terminal. The first terminal of the switch S is electrically coupled to the node N 1 , the second terminal of the switch S is electrically coupled to the second node N 2 When the control signal Bias_select has a first characteristic (e.g., a voltage level), the switch S is in a conducting state, wherein the first terminal is electrically coupled to the second terminal. When the control signal Bias_select has a second characteristic (e.g., a voltage level), the switch S is in a non-conducting state, wherein the first terminal is not electrically coupled to the second terminal. When the switch S is in a non-conducting state, the preamplifier circuit 102 operates in a DC coupling mode, wherein a DC signal is not blocked from passing through the input terminal I 1 and input terminal I 2 Entering the preamplifier circuit 102, as referenced Figure 2 When the switch S is in the on state, the preamplifier circuit 102 operates in an AC coupling mode, in which a DC signal is blocked from passing through the input terminal I 1 and input terminal I 2 Entering the preamplifier circuit 102, as referenced Figure 3 Explained.
[0034] Figure 2 is a diagram for explaining the operation of the receiver 100 in the DC coupling mode. Figure 2 In the embodiment, the switch S receives the control signal Bias_select which makes the switch S in a non-conducting state. Therefore, the node N 1 Not electrically coupled to node N 2 Therefore, as node N 2 The voltage at the common-mode receiver voltage V CM－RX Not used to bias the common-mode transmitter voltage V CM－TX , common mode transmitter voltage V CM－TX It is input to the input terminal I 1 and I 2 The average voltage level of the signal.
[0035] Figure 3 is a diagram for explaining the operation of the receiver 100 in the AC coupling mode. Figure 3 In the embodiment, the switch S receives the control signal Bias_select which makes the switch S in the conducting state. Therefore, the node N 1 Electrically coupled to node N 2 . Common-mode receiver voltage V CM－RX Output terminal O 1 The voltage at the output terminal O 2 The average value of the voltage at the node N 1 To bias the common-mode transmitter voltage V CM－TX , common mode transmitter voltage V CM－TX It is the input terminal I 1 The voltage level at the input terminal I 2 Therefore, the common-mode transmitter voltage V CM－TX becomes the common-mode receiver voltage V CM－RX The receiver 100 is aligned, and the receiver 100 is able to correctly receive signals from a transmitter having a common mode voltage different from the common mode voltage of the receiver 100. Therefore, when the receiver 100 is operated in the AC coupling mode (i.e., the switch is in the on state), the receiver 100 can be driven by any transmitter without any common mode constraints.
[0036] The various embodiments described above can be combined to provide additional embodiments. If necessary, aspects of the embodiments can be modified to employ the concepts of the various patents, applications and publications to provide additional embodiments.
[0037] These and other changes can be made to the embodiments in light of the above detailed description. Generally, in the following claims, the terms used should not be interpreted as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be interpreted to include all possible embodiments and the full range of equivalents to which these claims are authorized. Therefore, the claims are not limited by this disclosure.
Claims
1. A receiver, comprising: Preamplifier circuit; as well as an amplifier circuit which, in operation, generates an amplified signal based on the output signal provided by the preamplifier circuit, The preamplifier circuit comprises: a first output terminal and a second output terminal, the first output terminal and the second output terminal being operable to provide the output signal to the amplifier circuit; A first input terminal; A second input terminal; a first resistor having a first terminal electrically coupled to the first input terminal and a second terminal electrically coupled to the first node; a second resistor having a first terminal electrically coupled to the second input terminal and a second terminal electrically coupled to the first node; a third resistor having a first terminal electrically coupled to the first output terminal and a second terminal electrically coupled to a second node; a fourth resistor having a first terminal electrically coupled to the second output terminal and a second terminal electrically coupled to the second node; and A switch has a first terminal electrically coupled to the first node and a second terminal electrically coupled to the second node.
2. The receiver according to claim 1, wherein: When the switch is in a non-conducting state, the preamplifier circuit operates in a DC coupled mode, and When the switch is in an on state, the preamplifier circuit operates in an AC coupling mode.
3. The receiver according to claim 1, wherein: When the switch is in an on state, an average value of a voltage at the first output terminal and a voltage at the second output terminal is provided to the first node, and When the switch is in a non-conductive state, the average value of the voltage at the first output terminal and the voltage at the second output terminal is not provided to the first node.
4. The receiver according to claim 1, wherein: The resistance of the first resistor is equal to the resistance of the second resistor, and The resistance of the third resistor is equal to the resistance of the fourth resistor.
5. The receiver of claim 1 , wherein the preamplifier circuit further comprises: a fifth resistor having a first terminal electrically coupled to a power supply voltage and a second terminal electrically coupled to the second output terminal; a sixth resistor having a first terminal electrically coupled to the supply voltage and a second terminal electrically coupled to the first output terminal; a first transistor having a first terminal electrically coupled to the second input terminal, a second terminal electrically coupled to the first output terminal, and a third terminal; a second transistor having a first terminal electrically coupled to the first input terminal, a second terminal electrically coupled to the second output terminal, and a third terminal electrically coupled to the third terminal of the first transistor; as well as a third transistor having: a first terminal electrically coupled to a bias voltage potential; a second terminal electrically coupled to a third terminal of the first transistor and to the third terminal of the second transistor; and a third terminal electrically coupled to ground potential.
6. The receiver according to claim 5, wherein: the resistance of the first resistor is equal to the resistance of the second resistor, The resistance of the third resistor is equal to the resistance of the fourth resistor, and The resistance of the fifth resistor is equal to the resistance of the sixth resistor.
7. A preamplifier circuit comprising: A first input terminal; A second input terminal; a first output terminal; A second output terminal; a first resistor having a first terminal electrically coupled to the first input terminal and a second terminal electrically coupled to the first node; a second resistor having a first terminal electrically coupled to the second input terminal and a second terminal electrically coupled to the first node; a first transistor having a first terminal electrically coupled to the second input terminal, a second terminal electrically coupled to the first output terminal, and a third terminal; a second transistor having a first terminal electrically coupled to the first input terminal, a second terminal electrically coupled to the second output terminal, and a third terminal electrically coupled to the third terminal of the first transistor; a third resistor having a first terminal electrically coupled to a supply voltage and a second terminal electrically coupled to the second output terminal; a fourth resistor having a first terminal electrically coupled to the supply voltage and a second terminal electrically coupled to the first output terminal; a fifth resistor having a first terminal electrically coupled to the second output terminal and a second terminal electrically coupled to the second node; a sixth resistor having a first terminal electrically coupled to the first output terminal and a second terminal electrically coupled to the second node; as well as A switch has a first terminal electrically coupled to the first node and a second terminal electrically coupled to the second node.
8. The preamplifier circuit of claim 7, wherein: each of the first terminal of the first transistor and the first terminal of the second transistor is a gate terminal, Each of the second terminal of the first transistor and the second terminal of the second transistor is a drain terminal, and Each of the third terminal of the first transistor and the third terminal of the second transistor is a source terminal.
9. The preamplifier circuit according to claim 7, further comprising: a third transistor having: a first terminal electrically coupled to a bias voltage potential; a second terminal electrically coupled to the third terminal of the first transistor and electrically coupled to the third terminal of the second transistor; and a third terminal electrically coupled to ground potential.
10. The preamplifier circuit of claim 9, wherein: each of the first terminal of the first transistor, the first terminal of the second transistor, and the first terminal of the third transistor is a gate terminal, Each of the second terminal of the first transistor, the second terminal of the second transistor, and the second terminal of the third transistor is a drain terminal, and Each of the third terminal of the first transistor, the third terminal of the second transistor, and the third terminal of the third transistor is a source terminal.
11. The preamplifier circuit of claim 7, wherein: When the switch is in a non-conducting state, the preamplifier circuit operates in a DC coupled mode, and When the switch is in an on state, the preamplifier circuit operates in an AC coupling mode.
12. The preamplifier circuit of claim 7, wherein: When the switch is in an on state, an average value of a voltage at the first output terminal and a voltage at the second output terminal is provided to the first node, and When the switch is in a non-conductive state, the average value of the voltage at the first output terminal and the voltage at the second output terminal is not provided to the first node.
13. The preamplifier circuit of claim 7, further comprising: a first capacitor coupled to the first input terminal; as well as A second capacitor is coupled to the second input terminal.
14. The preamplifier circuit of claim 13, wherein: The first capacitor and the second capacitor block direct current signals from entering the first input terminal and the second input terminal in operation.
15. The preamplifier circuit of claim 7, wherein: the resistance of the first resistor is equal to the resistance of the second resistor, The resistance of the third resistor is equal to the resistance of the fourth resistor, and The resistance of the fifth resistor is equal to the resistance of the sixth resistor.
16. A method of operating a receiver, the receiver comprising a preamplifier circuit and an amplifier circuit, the method comprising: electrically coupling a first output terminal of the preamplifier circuit to the amplifier circuit; electrically coupling a second output terminal of the preamplifier circuit to the amplifier circuit; electrically coupling a first terminal of a first resistor to a first input terminal of the preamplifier circuit; electrically coupling a second terminal of the first resistor to a first node of the preamplifier circuit; electrically coupling a first terminal of a second resistor to a second input terminal of the preamplifier circuit; electrically coupling a second terminal of the second resistor to the first node of the preamplifier circuit; electrically coupling a first terminal of a third resistor to the first output terminal of the preamplifier circuit; electrically coupling a second terminal of the third resistor to a second node of the preamplifier circuit; electrically coupling a first terminal of a fourth resistor to the second output terminal of the preamplifier circuit; electrically coupling a second terminal of the fourth resistor to the second node of the preamplifier circuit; electrically coupling a first terminal of a switch to the first node of the preamplifier circuit; A second terminal of the switch is electrically coupled to the second node of the preamplifier circuit.
17. The method according to claim 16, further comprising: operating the preamplifier circuit in a DC coupled mode when the switch is in a non-conducting state, and When the switch is in an on state, the preamplifier circuit is operated in an AC coupling mode.
18. The method according to claim 16, further comprising: When the switch is in an on state, an average value of a voltage at the first output terminal and a voltage at the second output terminal is provided to the first node, Wherein when the switch is in a non-conductive state, the average value of the voltage at the first output terminal and the voltage at the second output terminal is not provided to the first node.
19. The method of claim 16, wherein: The resistance of the first resistor is equal to the resistance of the second resistor, and The resistance of the third resistor is equal to the resistance of the fourth resistor.
20. The method of claim 16, further comprising: electrically coupling a first terminal of a fifth resistor to a supply voltage; electrically coupling a second terminal of a fifth resistor to the second output terminal; electrically coupling a first terminal of a sixth resistor to the supply voltage; electrically coupling a second terminal of the sixth resistor to the first output terminal; electrically coupling a first terminal of the first transistor to the second input terminal; electrically coupling a second terminal of the first transistor to the first output terminal; electrically coupling a first terminal of a second transistor to the first input terminal; electrically coupling a second terminal of the second transistor to the second output terminal; electrically coupling a third terminal of the second transistor to a third terminal of the first transistor; electrically coupling a first terminal of the third transistor to a bias voltage potential; electrically coupling a second terminal of a third transistor to a third terminal of the first transistor and to a third terminal of the second transistor; as well as A third terminal of the third transistor is electrically coupled to ground potential.