Double-gate defect detection method
By preparing an oxide layer on the surface of the dual gate transistor and using optical defect detection methods, the detection effect of small defects is improved, and the problem that traditional detection methods are difficult to capture small defects is solved, and the pass rate and performance of the device are improved.
Patent Information
- Application Number
- CN202311684786.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-07
- Publication Date
- 2025-06-10
AI Technical Summary
Traditional detection methods are difficult to capture the defects of the double gate with smaller sizes, resulting in failure to detect and repair in time during the manufacturing process, affecting the electrical performance and reliability of the device.
The oxide layer is prepared on the surface of the element to be tested, and the optical defect detection method is used to increase the detection signal ratio by using the oxide layer reflective signal, thereby achieving effective detection of the small double gate defect.
By increasing the reflected signal of the oxide layer, small double gate defects can be effectively detected, and the pass rate and performance of semiconductor device products can be improved.
Smart Images
Figure CN120121632A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a method for detecting dual-gate defects. Background Art
[0002] Dual-Gate is a field-effect transistor (FET) structure in which the transistor has two gates, allowing for more complex electric field control and more flexible device operation. Various defects may occur during the manufacturing process of dual-gate transistors, including but not limited to crystal defects, impurities, irregular shapes, etc. Defects with smaller sizes may be difficult to capture by traditional detection methods due to their tiny sizes. Since these defects may form in the early stages of the manufacturing process, if not detected and repaired in a timely manner, they may cause problems in subsequent processes, such as HK Miss or Poly Deform, etc., thereby affecting the electrical performance and reliability of the device. Summary of the Invention
[0003] The purpose of the present disclosure is to provide a method for detecting dual-gate defects to improve the detection effect on smaller dual-gate defects.
[0004] To achieve the above purpose, the present disclosure provides a method for detecting dual-gate defects, the method comprising:
[0005] Obtaining a component to be tested, the component to be tested having a dual-gate region;
[0006] Preparing an oxide layer on the surface of the component to be tested so that the oxide layer covers the dual-gate region, obtaining a component to be tested with an oxide layer formed thereon;
[0007] Performing optical defect detection on the component to be tested with the oxide layer formed thereon.
[0008] Optionally, the material of the oxide layer includes at least one of hafnium oxide, chromium oxide, and aluminum oxide.
[0009] Optionally, the thickness of the oxide layer is 0.5 - 3 nm.
[0010] Optionally, the preparation method of the oxide layer is at least one of chemical vapor deposition, physical vapor deposition, and atomic layer deposition.
[0011] Optionally, the oxide layer is a hafnium oxide layer, and the preparation conditions of the hafnium oxide layer include: deposition temperature is 350 - 500 °C, and deposition time is 600 - 1200 s.
[0012] Optionally, the method of optical defect detection is bright field defect inspection method and / or dark field defect inspection method.
[0013] Optionally, the optical defect detection is a bright-field defect inspection method, and the detection conditions of the bright-field defect inspection method include: 50 nm pixels, blue-band light waves, and a reflected light collection mode.
[0014] Optionally, the optical defect detection of the element to be tested formed with an oxide layer includes:
[0015] Obtaining a defect reflection signal of the double-gate region;
[0016] According to the defect reflection signal, obtaining a detection result of double-gate defects.
[0017] Optionally, the size of the double-gate defect is 20-100 nm.
[0018] Optionally, the method further includes a step of removing the oxide layer after the optical defect detection is completed.
[0019] Through the above technical solution, the present disclosure first prepares an oxide layer on the surface of the element to be tested, and then performs optical defect detection on the element to be tested formed with an oxide layer. By improving the signal ratio obtained from the optical defect detection through the oxide layer reflection signal, effective detection of double-gate defects with smaller sizes is achieved, thereby improving the qualification rate and performance of semiconductor device products.
[0020] Other features and advantages of the present disclosure will be described in detail in the subsequent specific implementation section. Description of the Drawings
[0021] The drawings are used to provide a further understanding of the present disclosure, and constitute a part of the specification. Together with the following specific implementation, they are used to explain the present disclosure, but do not constitute a limitation to the present disclosure. In the drawings:
[0022] Figure 1 is a schematic flowchart of a specific implementation of the double-gate defect detection method provided by the present disclosure.
[0023] Figure 2 is a schematic structural diagram of a specific implementation of the element to be tested in the double-gate defect detection method provided by the present disclosure.
[0024] Figure 3 is a schematic structural diagram of a specific implementation of the element to be tested formed with an oxide layer in the double-gate defect detection method provided by the present disclosure.
[0025] Description of the Reference Numerals
[0026] 1 - Double-gate region, 2 - Defect, 3 - Oxide layer, 4 - Substrate. Specific Implementation
[0027] The following will describe in detail the specific embodiments of the present disclosure with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for the purpose of illustrating and explaining the present disclosure, and are not intended to limit the present disclosure.
[0028] The present disclosure provides a dual-gate defect detection method. Referring to Figure 1 , the method includes the following steps S101 to S103:
[0029] S101. Obtain a device under test, where the device under test has a dual-gate region;
[0030] S102. Prepare an oxide layer on the surface of the device under test so that the oxide layer covers the dual-gate region, obtaining a device under test with an oxide layer formed thereon;
[0031] S103. Perform optical defect detection on the device under test with the oxide layer formed thereon.
[0032] According to the present disclosure, the device under test can be various semiconductor devices with dual-gate defect detection requirements, such as integrated circuit elements, etc. In the method of the present disclosure, an oxide layer is prepared on the surface of the device under test and then optical defect detection is performed on the device under test with the oxide layer formed thereon. By enhancing the signal ratio obtained from optical defect detection through the reflection signal of the oxide layer at the dual-gate defect, effective detection of dual-gate defects with smaller sizes can be achieved, improving the qualification rate and performance of semiconductor device products.
[0033] In step S101, there are no special restrictions on the preparation process and specific structure of the device under test, as long as it has a dual-gate structure. For example, Figure 2 shows the device under test in an embodiment. The device includes a substrate 4, and a dual-gate region 1 is formed on the substrate. There are no special restrictions on the specific structure of the dual-gate region 1. For example, it may include a main gate, a sub-gate, and a channel region located between the main gate and the sub-gate, etc., which are well-known structures in the art. The dual-gate region 1 may have a defect 2. There are no special restrictions on the position of the defect 2, as long as it is within the region of the dual-gate region 1, it belongs to a dual-gate defect. The types of the defect 2 may be, for example, minute crystallization defects, impurity points, or irregular shapes at the microscopic level.
[0034] In step S102, the material of the oxide layer can be, for example, a hafnium-containing material, a chromium-containing material, an aluminum-containing material, etc. In one embodiment, the material of the oxide layer may include at least one of hafnium oxide, chromium oxide, and aluminum oxide. Further, the material of the oxide layer is preferably hafnium oxide, that is, the oxide layer is a hafnium oxide layer. The hafnium oxide layer prepared on the surface of the element to be measured can be used as the oxide layer for the optical defect detection and also as a functional layer (such as a double-gate dielectric layer, etc.) in the subsequent processes of semiconductor devices, without the need to be removed after the optical defect detection is completed.
[0035] Figure 3 FIG. Figure 3 is a schematic structural diagram of the element to be measured with an oxide layer formed thereon. The fact that the oxide layer 3 covers the double-gate region 1 means that the oxide layer 3 covers the entire region of the double-gate region 1, so that the oxide layer 3 covers the surface of the double-gate defect 2. The thickness of the oxide layer 3 can be 0.5 - 3 nm.
[0036] The oxide layer 3 can be prepared on the surface of the element to be measured by common methods in the art. Specifically, the preparation method of the oxide layer 3 can be at least one of chemical vapor deposition, physical vapor deposition, and atomic layer deposition. In one embodiment, the oxide layer 3 is a hafnium oxide layer, and the hafnium oxide layer is prepared by chemical vapor deposition. Further, the preparation conditions of the titanium nitride layer include: deposition temperature of 350 - 500 °C and deposition time of 600 - 1200 s.
[0037] In step S103, the method of optical defect detection can be a common method in the art for detecting defects in semiconductor devices. For example, the method of optical defect detection can be bright-field inspection and / or dark-field inspection.
[0038] In one embodiment, the optical defect detection is bright-field inspection, and the detection equipment and specific operation steps used can be common and well-known in the art. For example, the detection conditions can include: 50 nm pixel, blue-band light wave, and reflected light collection mode.
[0039] According to the present disclosure, since the oxide layer 3 covers the double-gate region 1, when the double-gate region 1 has a defect 2, the double-gate defect is also covered by the oxide layer 3. In this way, when the optical defect detection is performed, the presence of the oxide layer 3 covering the double-gate defect is beneficial to obtaining an increased defect reflection signal, thereby realizing the effective detection of double-gate defects with smaller sizes. Specifically, the optical defect detection of the element to be measured with an oxide layer formed thereon includes:
[0040] Obtain the defect reflection signal of the double-gate region;
[0041] According to the defect reflection signal, obtain the detection result of the double-gate defect.
[0042] Among them, the detection result of the double-gate defect may include results such as whether there is a double-gate defect and the size of the double-gate defect. The present disclosure can effectively detect double-gate defects with smaller sizes. Specifically, the size of the double-gate defect can be 20 to 100 nm.
[0043] Furthermore, the method may further include the step of removing the oxide layer after the double-gate defect detection is completed. Especially when the material of the oxide layer cannot be used to form the functional layer of the device to be measured, by removing the oxide layer, it is possible to avoid affecting the subsequent manufacturing process and device performance while realizing the double-gate defect detection. The method of removing the oxide layer can be well-known in the art. For example, methods such as grinding, pickling, and dry etching can be used to remove the oxide layer.
[0044] The preferred embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings. However, the present disclosure is not limited to the specific details in the above embodiments. Within the scope of the technical concept of the present disclosure, various simple modifications can be made to the technical solutions of the present disclosure, and these simple modifications all fall within the protection scope of the present disclosure.
[0045] In addition, it should be noted that, in the above specific embodiments, the various specific technical features described can be combined in any suitable manner without contradiction. To avoid unnecessary repetition, the present disclosure does not separately describe various possible combination methods.
[0046] In addition, any combination can be made between various different embodiments of the present disclosure as long as it does not violate the idea of the present disclosure, and it should also be regarded as the content disclosed by the present disclosure.
Claims
1. A dual-gate defect detection method, characterized in that, the method comprises: obtaining a device under test, the device under test having a dual-gate region; preparing an oxide layer on the surface of the device under test so that the oxide layer covers the dual-gate region, obtaining a device under test with an oxide layer formed thereon; performing optical defect detection on the device under test with the oxide layer formed thereon.
2. The method according to claim 1, wherein, the material of the oxide layer comprises at least one of hafnium oxide, chromium oxide and aluminum oxide.
3. The method according to claim 1, wherein, the thickness of the oxide layer is 0.5 - 3 nm.
4. The method according to claim 1, wherein, the preparation method of the oxide layer is at least one of chemical vapor deposition method, physical vapor deposition method and atomic layer deposition method.
5. The method according to claim 1, wherein, the oxide layer is a hafnium oxide layer, and the preparation conditions of the hafnium oxide layer include: deposition temperature is 350 - 500 °C, deposition time is 600 - 1200 s.
6. The method according to claim 1, wherein, the method of the optical defect detection is bright-field defect inspection method and / or dark-field defect inspection method.
7. The method according to claim 1, wherein, the optical defect detection is bright-field defect inspection method, and the detection conditions of the bright-field defect inspection method include: 50 nm pixel, blue band light wave, reflected light collection mode.
8. The method according to claim 1, wherein, performing optical defect detection on the device under test with the oxide layer formed thereon includes: obtaining a defect reflection signal of the dual-gate region; obtaining a detection result of the dual-gate defect according to the defect reflection signal.
9. The method according to claim 8, wherein, the size of the dual-gate defect is 20 - 100 nm.
10. The method according to claim 1, wherein, the method further comprises a step of removing the oxide layer after the optical defect detection is completed.